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INPUT-OUTPUT MODULES

The computer will be of no use if it is not communicating with the external world. A
computer must have a system to receive information from outside world and must be able
to communicate results to external world. Thus, a computer consists of an I/O (input-
output) system. This system includes two basic components: (i) the I/O devices and (ii)
I/O module, which not only connects an I/O device with the system bus, but plays a very
crucial role in between. A device which is connected to an I/O module of computer is
called a peripheral device.

The input/output module (I/O module) is normally connected to the computer system on
one end and one or more input/output devices on the other. An I/O module is needed
because of :

(a) Diversity of I/O devices makes it difficult to include all the peripheral device logic
(i.e. its control commands, data format etc.) into CPU.

(b) The I/O devices are usually slower than the memory and CPU. Therefore, it is not
advisable to use them on high speed system bus directly for communication purpose.

(c) The data format and word length used by the peripheral may be quite different than
that of a CPU.

Thus, we can say that :

(i) An I/O module is a mediator between the processor and an I/O device/devices.
(ii) It controls the data exchange between the external devices and main memory; or
external devices and CPU registers.
(iii) An I/O module provide an interface internal to the computer which connects it to
CPU and main memory and an interface external to the computer connecting it to
external device or peripheral.
(iv) The I/O module should not only communicate the information from CPU to I/O
device, but it should also coordinate these two.
(v) In addition since there are speed differences between CPU and I/O devices, the
I/O module should have facilities like buffer (storage area) and error detection
mechanism.

Functions of I/O Module:

The major functions of an I/O module are:
1. Processor communication -- this involves the following tasks:
a. exchange of data between processor and I/O module,

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b. command decoding - I/O module accepts commands sent from the processor.
E.g., the I/O module for a disk drive may accept the following commands
from the processor: READ SECTOR, WRITE SECTOR, SEEK track, etc.
c. status reporting – The device must be able to report its status to the processor,
e.g., disk drive busy, ready etc. Status reporting may also involve reporting
various errors.
d. Address recognition – Each I/O device has a unique address and the I/O
module must recognize this address.
2. Device communication – The I/O module must be able to perform device
communication such as status reporting.
3. Control & timing – The I/O module must be able to co-ordinate the flow of data
between the internal resources (such as processor, memory) and external devices.
4. Data buffering – This is necessary as there is a speed mismatch between speed of
data transfer between processor and memory and external devices. Data coming from
the main memory are sent to an I/O module in a rapid burst. The data is buffered in
the I/O module and then sent to the peripheral device at its rate.
5. Error detection – The I/O module must also be able to detect errors and report them
to the processor. These errors may be mechanical errors (such as paper jam in a
printer), or changes in the bit pattern of transmitted data. A common way of detecting
such errors is by using parity bits.

I/O Module Diagram

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PROGRAMMED I/O:
Using this technique, data transfer takes place under the direct control of the processor.
The processor must continuously check an I/O device and hence it cannot do another
task. This method is hence inefficient (slow).

Memory

DB Device and
MAB CB
Status FF Controller
DAB

Processor Registers DB/

CB DC

DB

DB -- Data Bus, DAB – Device Address Bus, DC – Device Control signals

MAB – Memory Address Bus, CB – Control Bus

Characteristics of Programmed I/O:

1. In programmed I/O, the I/O operations are completely controlled by the CPU
2. Used in real-time and embedded systems.
3. Used in CPUs which have a single input and a single output instruction. Each of these
instructions selects one device.
4. The disadvantage of this technique is that the CPU spends most of its time waiting for
the device to become ready.

INTERRUPT DRIVEN INPUT/OUTPUT

The basic drawback of programmed I/O is that the speed of I/O devices is much slower in
comparison to that of CPU, and because the CPU has to repeatedly check whether a
device is free; or wait till the completion of I/O, therefore, the performance of CPU in
programmed I/O goes down tremendously. What is the solution? What about CPU going
back to do other useful work without waiting for the I/O device to complete or get freed
up. On completion of I/O, the I/O device interrupts the CPU to tell it has finished the
work.

Interrupt: The term interrupt is used for any event that causes temporary transfer of
control of CPU from one program to the other which is causing the interrupt. Interrupts
are primarily issued on:

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· initiation of Input/Output operation (interrupt issued by I/O devices)

· completion of an Input/Output operation
· occurrence of hardware or software errors.

Interrupts can be generated by various sources internal or external to the CPU.

In the interrupt driven I/O the processor issues a READ/WRITE instruction to the device
and then continues doing its task. When the interface buffer is full, and it is ready to send
data to the processor, the interface sends a signal to the processor informing it that data is
ready. This signal is called as the interrupt signal. When the processor receives the
interrupt signal, it knows that the data is ready; it suspends its current job and transfers
data from buffer to its own registers.

Disadvantages of Interrupt–driven I/O technique:

The processor must suspend its work and later resume it. If there are many devices, each
can issue an interrupt and the processor must be able to attend each of these, based on
some priority.

The role of the processor in interrupt-driven I/O:

When an I/O device is ready to send data, the following events occur:

1. The device issues an interrupt signal to the processor.

2. The processor finishes execution of the current instruction. It then responds to the
interrupt signal.
3. The processor sends an acknowledgement signal to the device that sent the
interrupt. The device then removes its interrupt signal.
4. The processor must save the state of the current task(i.e., the values of registers,
the address of the next instruction to be executed, etc). These are saved onto a
stack.
5. The processor then attends to the device that issued to the interrupt signal.
6. When interrupt processing is over the saved registers are retrieved from the stack
and the processor continues its previous task from the point where it was last
stopped.

When the processor detects an interrupt, it executes an interrupt-service routine. This

routine polls each I/O device to determine which device caused the interrupt. This
technique is called software poll.

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DIRECT MEMORY ACCESS:

DMA Interface
Memory
Status
MAB
Device
MAB DB Data Register
and
DB Controller

MAR
Processor

MAB

DA and CB

This method eliminates the need for the continuous involvement of the processor in the
I/O operations. The data transfer now takes place as follows:

1. When a read instruction is encountered, the processor sends the device address via
the Device Address Bus (DAB). This is decoded by the I/O controller and the
DMA interface of the appropriate device is selected. The processor also sends the
address (in RAM) where the data is to be stored. The READ command is issued.
2. The processor continues with the next instruction in the program. It has no further
role to play in data transfer.
3. The DMA status register is set to 1 to indicate the BUSY status. Data is read from
the device and stored in the DMA’s data register (buffer).
4. When data has been entered in the data register, the data ready flip-flop is set to 1
and an interrupt is sent to the processor.
5. The processor completes the current instruction. It then gives control of MAB and
DB to the DMA interface. The DMA transfers data from its data registers to the
memory address specified.

Cycle Stealing:

The process of taking control of memory cycle to transfer data is known as cycle
stealing. The DMA transfers one data word at a time after which it must return control of
the buses to the CPU. The CPU delays its operations for 1 cycle to allow the DMA to
“steal” one memory cycle.

DMA is faster as the processor’s valuable time is not wasted in DMA transfer.
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IMPORTANT QUESTIONS

1. What is an I/O module? Illustrate with a neat diagram.

2. Justify the need for an I/O module in a computer system.
3. What are the major functions of an I/O module?
4. List and briefly define the three techniques of performing I/O.
5. What is an interrupt? Explain how a processor can take advantage of
an interrupt signal to reduce its waiting period to read input data.
6. State the advantages of direct memory access.
7. Elaborate the role of the processor in interrupt-driven I/O.
8. What is cycle stealing? Which I/O technique uses this method?
9. What is software polling?
10. Explain the following I/O techniques:
a. Programmed I/O
b. Interrupt-driven I/O
c. Direct memory access

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