Laboratory #1: Operational Amplifier

Circuits
ENSC 225 Microelectronics
Lab Group 20
By:
Harry Draaisma -301234534
Rafiul Islam 301217572
Khalid Qahwash 301191465
Randeep Shahi 301224617

For all the following experiments, the rail voltages across all op-amps were
measured to be

V cc

= 12.042 0.0044084 V and

V EE

= -12.037 0.0044074

V.

Experiment 1
Circuit 1
In this circuit we measured the output voltage to be -2.48 0.020496 mV. Since the
only voltage applied to this system is the rail voltage, we can conclude that this
voltage is also our Offset Voltage

V OS . As this circuit has negative feedback, the

Offset Voltage is applied to both inputs due to op-amps virtual sort.

Using the virtual short and the Offset Voltage, we can measure the Bias Currents
noting that:

+
R

= 0.9876 0.0006938 M

= 0.9986 0.0006993 M

By Ohms Law, the Bias Current through inverting input =

R
V OS = -2.48 0.021 nA

IB1

R
By Ohms Law, the Bias Current through Non inverting input V OS = -2.51 0.021

nA =

IB2

This makes the Input Bias Current

I B=

As well, this makes the Offset Current

Circuit 2

IB1 + IB2
=
2
I OS

-2.50 0.021 nA

|IB1 IB 2|

= 0.03 0.042 nA

In Circuit 2, we carried out the same procedure as in Circuit 1 and came up with
slightly different results:

= 0.9979 0.00069895 M

The output voltage, which for reasons stated above is the Offset Voltage, was
measured to be

V OS = -2.44 0.019512 mV

By Ohms Law, the Bias Current through inverting input =

nA =

V OS
R

= -2.45 0.020

IB1

However the Bias Current across the non-inverting input is 0, as there is no resistor
attached to that input, and therefore by Ohms Law there is no current in that input.
This makes the Input Bias Current

I B=

As well, this makes the Offset Current

IB1 + IB2
=
2
I OS

-1.225 0.010 nA

|IB1 IB 2|

= 2.44 0.020 nA

Circuit 3
R1 k

= 0.9858 0.0006929 k

R1 M

= 0.9753 0.00068765 M

In this circuit we measured the output voltage

VO

to be -2.4403 0.00068806 V.

This makes sense since we have created an inverting amplifier with a gain of 1000,
which explains the sudden increase in magnitude.
In this situation, we assume there is no Offset Voltage that is affecting

VO

and

that the output voltage is caused by the bias current running through inputs. Since
there is virtual short, the Bias Current through the non-inverting input does nothing
as there is no resistance for it to generate a voltage. Since there is no offset
voltage, the voltage at the inverting input is 0. Since the 1k resistor is connected to

that node and ground, there is no voltage difference across the resistor and
therefore no current flows through that branch. This means the first of the Input
Bias Currents can only flow through the inverting input and through the 1Meg
resistor.
Therefore, the Input Bias Current through the inverting input

IB1

VO
R1M =

-2.502 0.0019 A
This makes the Input Bias Current

I B=

As well, this makes the Offset Current

IB1 + IB2
=
2
I OS

1.251 0.00095 A

|IB1 IB 2|

= 2.502 0.020 A

These sudden increases in magnitude may also be explained by the large gain of
this particular circuit configuration.
Comparing these results with the Data sheet:
From the first two circuits we can see that our experimental Offset Voltage
(approximately 2.50 mV) is about 10% off from the 3.0 mV Offset Voltage provided
by the data sheet, which can easily be explained by various resistor and
measurement tolerances affecting the final value. However, the differences
between the data sheet and the experimental values of the Input Bias and Offset
Currents are not as easily explained. It is immediately evident that they off by three
factors of ten. However, this is assuming that the op-amp is working at 25 degrees
Celsius. If we look at the data sheet which examines values over a wide range of
temperatures, our experimental Offset Current of approximately 2.50 nA is only 25%
off from the stated max value of 2.0 nA, and our Input Bias Current is well below the
maximum. We do not know exactly why our experimental voltages match the ideal
temperature data while our experimental currents do not, but theories can range
from more precise testing equipment used by the manufacturer to the fact that we
did not use pulse techniques to gain our measurements, which the data sheet says
may cause junction temperature to change.

Experiment 2
Circuit with Gain of 10
To achieve this circuit we used the following resistors:

Ri

= 2.1504 0.0012752 k

Rf = ([9.846 0.006923] + [9.834 0.006917]) k = 19.68 0.01384 k

Based on the circuit configuration this gave us a calculated gain of

1+

Rf
=
Ri

10.152 0.0084
The circuit was then assembled as the schematic seen below:

This circuit and input created the following frequency response:

f(x) =

Frequency Plot w/gain of 10 and Input Voltage Amplitude of 1V

12
10
8

f(x) = - 0x + 8.97

Amplitude 6
4
2
0
10000

100000

1000000

Log(Frequency)

10000000

Using linear analysis formula on the latter half of the data, we can determine the
Unity Gain Frequency fT (where amplitude equals 1V) by setting

= 1 and

solving for x :

1=(3 106 ) x+ 8.9688

(18.9688 )

(3106 )

2.65 MHz

As well, you can easily see on the frequency plot that the f 3db is around 100 kHz.
Circuit with Gain of 100
To achieve this circuit we used the following resistors:

Ri = 0.9863 0.00069315 k
Rf = ([2.1505 0.00127525] + [26.543 0.152715] + [67.05 0.053525) k =
95.7435 0.20751 k

Rf
1+
=
Based on the circuit configuration this gave us a calculated gain of
Ri
98.128 0.22
The circuit was then assembled as the schematic seen below:

This circuit and input created the following frequency response:

f(x) =

Frequency Plot w/gain of 100 with Input Voltage Amplitude of 0.1V

12
10
8

Amplitude 6
4

f(x) = - 0x + 4.56

2
0
1000

10000

100000

1000000 10000000

Log(Frequency)

Using linear analysis formula on the latter half of the data, we can determine the
Unity Gain Frequency fT (where amplitude equals 0.1V) by setting

= 0.1 and

solving for x :

0.1=( 2 106 ) x+ 4.5668

( 0.14.5668 )

( 2106 )

2.23 MHz

As well, you can easily see on the frequency plot that the f 3db is around 10 kHz.
Comparing these results with the Data sheet:
Compared to the data sheet value for fT of 4.0 MHz, and knowing that an op-amps
gain does not affect the unity gain frequency of the amplifier; our experimental
values have an error of at most 44.25% and at the least 33.75%. These errors seem
rather high, but when observing the linear regression used to calculate them, it is
very apparent that data points outside of the roll-off range, either from around f 3dB in
the first graph, or near the extreme maximum frequency in the second, have shifted
the regression significantly. By simply observing both graphs, we can see that we
attain our original amplitude around 4 to 5 MHz which is more in line with the data
sheet values. An interesting thing to note is that the f 3dB point changes by a factor of
ten between circuits, which verifies Gain Bandwidth Phenomenon, since f T remains
constant, increasing the gain by a factor of ten means the bandwidth, must
decrease by a factor of ten.

Experiment 3

The calculations of the voltage levels and period value can be found in Appendix 1.
The calculated voltage levels and period are:
Peak to Peak Voltage: 6.011 0.0058 V (-6.009 0.0058 V) = 12.02 0.0116 V
Period Value: T = 219.6 0.22 s
Below are the waveforms of the circuit gathered from an LTSpice simulation. The
graph also contains values that will be used to calculate the simulation period value
and voltage levels. Note the nodes names correspond to the same nodes in the
schematic provided in the lab outline.

Period Value = 280 s 67.0 s = 213 s

Peak to Peak Voltage = 12 V (-12 V)
= 24 V

Period Value = 386 s 173 s = 213 s

Peak to Peak Voltage = 5.94 V
(-5.96 V) = 11.9 V
Now we will look at the oscilloscope measurements for the same nodes. In these
oscilloscopes captures the top waveform is the waveform at Node A and bottom
waveform is the waveform at Node B. Again these correspond to the node names
given in the lab outline.

Comparison of Results:
All the values we have gathered are all relatively close to each other, the largest
error between any two values being less 10%. This can easily be explained by a
variety of factors, such as added resistance from measuring devices being attached
to the circuit, assumptions made by the simulation that are not present in the actual
circuit, etc. It is small enough that we are confident in saying there a no major
differences between them.

Experiment 4
After acquiring our resistors and capacitor we built the following circuit (with
measured values of components):

Below are the waveforms of the circuit gathered from an LTSpice simulation. The
graph also contains values that will be used to calculate the simulation period value
and voltage levels. Note the nodes names correspond to the same nodes in the
schematic provided in the lab outline.

Period Value = 3.27 ms 1.40 ms = 1.87 ms Peak to Peak Voltage =12 V (-12 V) =
24 V

Period Value = 3.27 ms 1.40 ms = 1.87 ms Peak to Peak Voltage =2.54 V (-2.54
V) = 5.08 V

Period Value = 3.27 ms 1.40 ms = 1.87 ms Peak to Peak Voltage = 4.21 V (-4.20
V) = 8.41 V
Note that the graphs do not exactly line up exactly but this is due to formatting
issues that cannot be rectified, and as such have included select points to show
that data should in fact be in sync.

Now we will look at the oscilloscope measurements for the same nodes. In the left
oscilloscope capture, the top waveform is the waveform at Node A and bottom
waveform is the waveform at Node B.In the right oscilloscope capture, the top
waveform is the waveform at node B and the bottom waveform is the waveform at
node C. Again these correspond to the node names given in the lab outline.

Appendix 1: Calculation of Relaxing Oscillator

The measured values of all components are as follows:

= 9.920 nF

R1

= 14.720 0.00936 k

R2

= 14.673 0.0093365 k

R3

= 9.820 0.00691 k

Assume no charge is in the capacitor before

V cc

and

V EE

are applied to the op-

amp and all suffixes refer to schematic given in lab outline. The voltage divider
between R1 and R2 makes the voltage at the non-inverting input:

+ @V CC =V a

R2
=
R1 + R2

V cc( 0.4992 0.00045 )

= 6.011 0.0058 V

OR

+ @V EE=V a

R2
=
R1 +R2

V EE( 0.4992 0.00045 ) = -6.009 0.0058 V

V aV b
d Vb
=C
R3
dt

By nodal analysis, the currents at node B are:

Rearranging, this gives us

V b=V a+ k e

dVb V b
V
+
= a
dt R 3 C R3 C

which can solved to give us:

t
R3 C

At t = 0, assume

V b= 0. Therefore, using this initial value the equation becomes:

t

V b=V aV a e R C
3

As t increases, the voltage at node B will slowly increase, trying to reach the value
of

V a . However, since

+
V

is acting as the op-amps reference voltage,

only charge until it reaches that value because once it does,

thus change the equations parameters. Since we know that
of two values above (depending on the voltage of
that

Vb

Va

Va
+
V

Vb

will

will change and

can only be one

at the time), we can deduce

can only charge to either value, effectively giving it a constantly shifting

exponential function that oscillates exponentially between approximately 6 V and

-6V.
The period can be found by realizing it is simply double the time it takes for
charge from

+
V

at

V EE

to

+
V at

V cc . To find this, we use our solved

Vb

to

equation but with a different initial value. Assume at t = 0,

+ @V EE
V

V a

V a

R2
=V a +k
R1 + R 2

R2
R1 + R2

. Therefore:

k =V a (1+

Vb

R2
)
R 1 + R2

V b=V a

Now solving the equation for t at

R2
:
R 1+ R 2

t
R2
R C
1[1+
]e
R 1+ R 2

Va

R2
=
R 1+ R 2

R2
=V a
R 1+ R 2

t
R2
R C
1[1+
]e
R 1+ R 2

R1
R C
=e
R 1 +2 R 2
3

ln

R1
=
R1 +2 R2

t=R3 Cln (

t
R3C

R1 +2 R 2
)
R1

t=(97.41 0.069 s)ln (

44.07 0.02386
)
14.720 0.00936

t=( 97.41 0.069 s )ln ( 3.088 0.0026 )

t=( 97.41 0.069 s )1.275 0.00084

is now equal to

t=109.8 0.11

Therefore T = 2t = 219.6 0.22 s