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This is now a complete standard bias circuit using design guidelines. The capacitors shown in
the schematic above are used to isolate the bias from external disturbance while allowing ac
signals to be passed. This circuit will not operate at dc (zero frequency) since the bias circuit is
trying to stabilize the zero frequency voltages and currents. The capacitor across Re puts a low
impedance across it at operating frequencies and removes it from the signal path. I will return to
it later.
To evaluate how well this circuit works I will look at it in detail. The base voltage is set by the
potential divider made up of R1 and R2 to a potential given by
, with a source
resistance of
Then
and
so that
1
!"
or
$
%&
and hence
The effect of changes in is to change the voltage drop in the source resistance Rb, so that lower
values of R1 and R2 will produce more stable bias with changes. However very low values will
divert the input from the transistor; that is, they will tend to 'short it out'. The values I have
calculated give an acceptable compromise which a designer can alter to suit his/her purpose.
Having defined Vb, Ve is now given by Vb - Vbe , and Vbe is well defined for a bipolar transistor
at about 0.7 volts with a temperature coefficient of about -2 mV/C. Ve across Re sets the emitter
current which would then be constant as long as the collector has the correct bias (positive for
npn) on it. The effect of lack of constancy in Ve resulting from changes in or Vbe is to change
Ie. The design guide which sets Ve to 1 volt ensures that temperature changes in Vbe do not
affect Ie greatly, while not 'wasting' too much supply voltage across Re. Since Vce must be
positive for the (npn) transistor to function; any drop across Re is not available as voltage swing
at the collector.
Now that Ie is set and reasonably stable Ic is also defined ('
(, ( 1 and
). Then
since Ic is largely independent of Vc, Rc can be chosen to give the selected Vc. To allow for the
!
voltage drop across Re it is better to choose
''* rather than *'' if the supply voltage is low.
This analysis of the circuit operation enables one to calculate the effects of component tolerances
as well as transistor parameter changes. An alternative, but equivalent, way of looking at the
circuit is that Re, which carries both input and output current, therefore gives negative current
feedback to stabilize the operating point. This way of looking at the circuit shows that Re must
be 'short circuited' or bypassed at signal frequencies by the capacitor shown for full AC gain.
-./
The resistance it has to bypass is +, !
in parallel with Re (we will learn later why). Local
negative feedback at signal frequencies can be added deliberately, if wanted, by only partially
bypassing Re.
The effects of change of due to transistor part to part changes can be calculated because change
in base current affects the voltage drop in the potential divider feeding the base. This means that
Ie varies to compensate for the change in the part. Assuming that the base emitter voltage does
not change enough to matter from part to part (which is usually reasonable), the change in
emitter current follows. For our calculated component values doubling or halving changes Ie
by + 5 % to - 10 %. Another simple calculation is to evaluate the expression for minimum and
assume that maximum is infinite. The result is a fractional change in Ie which in this case
would be 10 %, if we had done our bias calculation with minimum . The effects of change of
Vbe (from transistor temperature changes) can also be calculated fairly simply as it will cause a
change in emitter current. The effects of change of from transistor temperature changes can be
obtained using the relationship with already derived for part to part variation. Then the two
temperature effects can be added to give a resultant overall temperature effect.
In general this bias design is straightforward and reliable but it uses a lot of components. It is
normal when the circuit has several transistors to try to reduce the component count by using
direct coupling. The bias scheme must still fulfill the same basic objective of maintaining a
designed bias point for device and temperature changes, but the detailed performance must be
determined for the specific circuit.