D D D D D D D: SN54AHC16541, SN74AHC16541 16-Bit Buffers/Drivers With 3-State Outputs

SN54AHC16541, SN74AHC16541
16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS332F MARCH 1996 REVISED JANUARY 2000
D
D
D
D
D
D
D
SN54AHC16541 . . . WD PACKAGE
SN74AHC16541 . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
Members of the Texas Instruments

Widebus Family
EPIC (Enhanced-Performance Implanted
CMOS) Process
Operating Range 2-V to 5.5-V VCC
Distributed VCC and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink
Small-Outline (DGG), and Thin Very
Small-Outline (DGV) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
1OE1
1Y1
1Y2
GND
1Y3
1Y4
VCC
1Y5
1Y6
GND
1Y7
1Y8
2Y1
2Y2
GND
2Y3
2Y4
VCC
2Y5
2Y6
GND
2Y7
2Y8
2OE1
description
The AHC16541 devices are noninverting 16-bit
buffers composed of two 8-bit sections with
separate output-enable signals. For either 8-bit
buffer section, the two output-enable (1OE1 and
1OE2 or 2OE1 and 2OE2) inputs must be low for
the corresponding Y outputs to be active. If either
output-enable input is high, the outputs of that
8-bit buffer section are in the high-impedance
state.
48
47
46
45
44
43
42
41
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE2
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE2
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54AHC16541 is characterized for operation over the full military temperature range of 55C to 125C.
The SN74AHC16541 is characterized for operation from 40C to 85C.
FUNCTION TABLE
(each 8-bit buffer/driver)
INPUTS
OE1
OE2
OUTPUT
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
Copyright 2000, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN54AHC16541, SN74AHC16541
logic symbol
1OE1
&
EN1
48
1OE2
2OE1
2OE2
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
24
&
EN2
25
47
46
44
43
41
40
38
11
37
12
36
13
35
14
33
16
32
17
30
19
29
20
27
22
26
23
1Y1
1Y2
1Y3
1Y4
1Y5
1Y6
1Y7
1Y8
2Y1
2Y2
2Y3
2Y4
2Y5
2Y6
2Y7
2Y8
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)

1OE1
1OE2
1A1
2OE1
48
47
2OE2
2
1Y1
2A1
24
25
36
To Seven Other Channels
13
2Y1
To Seven Other Channels
DALLAS, TEXAS 75265
SN54AHC16541, SN74AHC16541
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 mA
Package thermal impedance, JA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)

SN54AHC16541
VCC
VIH
Supply voltage
High-level input voltage
VCC = 2 V
VCC = 3 V
VCC = 5.5 V
VCC = 2 V
VIL
VI
VO
IOH
Low-level input voltage
Output voltage
VCC = 2 V
VCC = 3.3 V 0.3 V
VCC = 5 V 0.5 V
VCC = 2 V
IOL
t/v
Low-level output current
Input transition rise or fall rate
MAX
5.5
1.5
VCC = 3.3 V 0.3 V

VCC = 5 V 0.5 V
VCC = 3.3 V 0.3 V
VCC = 5 V 0.5 V
SN74AHC16541
MIN
MAX
5.5
UNIT
V
1.5
2.1
2.1
3.85
3.85
0.5
VCC = 3 V
VCC = 5.5 V
Input voltage
High-level output current
MIN
V
0.5
0.9
0.9
1.65
1.65
5.5
5.5
VCC
50
VCC
50
mA
50
50
100
100
20
20
mA
mA
mA
ns/V
TA
Operating free-air temperature
55
125
40
85
C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
DALLAS, TEXAS 75265
SN54AHC16541, SN74AHC16541
electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = 50 mA
VOH
IOH = 4 mA
IOH = 8 mA
IOL = 50 mA
VOL
IOL = 4 mA
IOL = 8 mA
II
IOZ
ICC
Ci
VI = VCC or GND
VO = VCC or GND,
VI (OE) = VIL or VIH
VI = VCC or GND,
VI = VCC or GND
MIN
TA = 25C
TYP
MAX
2V
1.9
1.9
1.9
3V
2.9
2.9
2.9
4.5 V
4.4
4.5
4.4
4.4
3V
2.58
2.48
2.48
4.5 V
3.94
3.8
VCC
IO = 0
SN54AHC16541
MIN
MAX
SN74AHC16541
MIN
MAX
UNIT
3.8
2V
0.1
0.1
0.1
0.1
3V
0.1
0.1
4.5 V
0.1
0.1
0.1
3V
0.36
0.5
0.44
4.5 V
0.36
0.5
0.44
0 V to 5.5 V
0.1
1*
mA
5.5 V
0.25
2.5
2.5
mA
40
40
mA
10
pF
5.5 V
5V
10
Co
VO = VCC or GND
5V
3
* On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V.
pF
switching characteristics over recommended operating free-air temperature range,

VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
CL = 15 pF
tPZH
tPZL
OE
CL = 15 pF
tPHZ
tPLZ
OE
CL = 15 pF
tPLH
tPHL
CL = 50 pF
tPZH
tPZL
OE
CL = 50 pF
tPHZ
tPLZ
OE
CL = 50 pF
tsk(o)
MIN
TA = 25C
TYP
MAX
MAX
MIN
MAX
8.4**
1**
10**
10
5**
8.4**
1**
10**
10
6**
10.6**
1**
12.5**
12.5
6**
10.6**
1**
12.5**
12.5
7**
11.5**
1**
12.5**
12.5
7**
11.5**
1**
12.5**
12.5
7.5
11.9
13.5
13.5
7.5
11.9
13.5
13.5
14.1
16
16
14.1
16
16
14
16
16
14
16
16
CL = 50 pF
1.5***

SN74AHC16541
MIN
5**
** On products compliant to MIL-PRF-38535, this parameter is not production tested.

*** On products compliant to MIL-PRF-38535, this parameter does not apply.
SN54AHC16541
DALLAS, TEXAS 75265
1.5
UNIT
ns
ns
ns
ns
ns
ns
ns
SN54AHC16541, SN74AHC16541
switching characteristics over recommended operating free-air temperature range,

VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
tPLH
tPHL
CL = 15 pF
tPZH
tPZL
OE
CL = 15 pF
tPHZ
tPLZ
OE
CL = 15 pF
tPLH
tPHL
CL = 50 pF
tPZH
tPZL
OE
CL = 50 pF
tPHZ
tPLZ
OE
CL = 50 pF
tsk(o)
MIN
TA = 25C
TYP
MAX
SN54AHC16541
SN74AHC16541
MIN
MAX
MIN
MAX
3.5*
6*
1*
7*
6.5
3.5*
6*
1*
7*
6.5
4.7*
7.3*
1*
8.5*
8.5
4.7*
7.3*
1*
8.5*
8.5
5*
7.2*
1*
8.5*
8.5
5*
7.2*
1*
8.5*
8.5
8.5
8.5
6.2
9.3
10.5
10.5
6.2
9.3
10.5
10.5
9.2
10.5
10.5
9.2
10.5
10.5
1**
CL = 50 pF
UNIT
ns
ns
ns
ns
ns
ns
ns
* On products compliant to MIL-PRF-38535, this parameter is not production tested.

** On products compliant to MIL-PRF-38535, this parameter does not apply.
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25C (see Note 4)

SN74AHC16541
PARAMETER
MIN
TYP
MAX
UNIT
VOL(P)
VOL(V)
Quiet output, maximum dynamic VOL
0.7
Quiet output, minimum dynamic VOL
0.3
VOH(V)
VIH(D)
Quiet output, minimum dynamic VOH
4.7
High-level dynamic input voltage
3.5
VIL(D)
Low-level dynamic input voltage
NOTE 4: Characteristics are for surface-mount packages only.
V
1.5
TYP
UNIT
operating characteristics, VCC = 5 V, TA = 25C

PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance
No load,
f = 1 MHz
12
pF

DALLAS, TEXAS 75265
SN54AHC16541, SN74AHC16541
PARAMETER MEASUREMENT INFORMATION

RL = 1 k
From Output
Under Test
Test
Point
From Output
Under Test
S1
VCC
Open
TEST
GND
CL
(see Note A)
CL
(see Note A)
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open Drain
Open
VCC
GND
VCC
LOAD CIRCUIT FOR

3-STATE AND OPEN-DRAIN OUTPUTS
LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS
VCC
50% VCC
Timing Input
tw
tsu
VCC
Input
50% VCC
50% VCC
0V
th
VCC
50% VCC
Data Input
50% VCC
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VCC
50% VCC
Input
50% VCC
0V
tPLH
In-Phase
Output
tPHL
50% VCC
tPHL
Out-of-Phase
Output
VOH
50% VCC
VOL
VCC
Output
Control
Output
Waveform 1
S1 at VCC
(see Note B)
50% VCC
0V
tPZL
VOH
50% VCC
VOL
tPLZ
VCC
50% VCC
tPZH
tPLH
50% VCC
50% VCC
Output
Waveform 2
S1 at GND
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
50% VCC
VOH 0.3 V
VOH
0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (CRITICAL
APPLICATIONS). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMERS RISK.
In order to minimize risks associated with the customers applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TIs publication of information regarding any third
partys products or services does not constitute TIs approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated

D D D D D D D: SN54AHC16541, SN74AHC16541 16-Bit Buffers/Drivers With 3-State Outputs

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D D D D D D D: SN54AHC16541, SN74AHC16541 16-Bit Buffers/Drivers With 3-State Outputs

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Formate disponibile

SN54AHC16541, SN74AHC16541

Members of the Texas Instruments

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DALLAS, TEXAS 75265

logic diagram (positive logic)

To Seven Other Channels

POST OFFICE BOX 655303

To Seven Other Channels

DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

Low-level input voltage

Low-level output current

Input transition rise or fall rate

VCC = 3.3 V 0.3 V

High-level output current

PRODUCT PREVIEW information concerns products in the formative or

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless

switching characteristics over recommended operating free-air temperature range,

PRODUCT PREVIEW information concerns products in the formative or

POST OFFICE BOX 655303

** On products compliant to MIL-PRF-38535, this parameter is not production tested.

DALLAS, TEXAS 75265

switching characteristics over recommended operating free-air temperature range,

* On products compliant to MIL-PRF-38535, this parameter is not production tested.

noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25C (see Note 4)

Quiet output, maximum dynamic VOL

Quiet output, minimum dynamic VOL

Quiet output, minimum dynamic VOH

High-level dynamic input voltage

operating characteristics, VCC = 5 V, TA = 25C

Power dissipation capacitance

PRODUCT PREVIEW information concerns products in the formative or

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

LOAD CIRCUIT FOR

LOAD CIRCUIT FOR

NOTES: A. CL includes probe and jig capacitance.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

Copyright 2000, Texas Instruments Incorporated

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