ADS DDR Test Benches

with Waveform Bridge to

Instrument Certified DDR
Test Compliance

Jian Yang
R&D Engineer
Nilesh Kamdar
Applications Engineer

New Keysight EEsof EDA Simulation Tools for

Signal Integrity, Power Integrity, and EMI/EMC
Sept 16, 2014

Agenda
Introduction to DDR4
DDR4 Simulation -> Compliance Test Flow
DDR4 Compliance Test Bench Demo
Summary

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC

Page 2

Introduction: DDR4 memory ramping up in electronic systems

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC

Page 3

DDR4 Memory in the News

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC

Page 4

DDR4 High Speed => Less Timing Margin

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC

Page 5

Shrinking Eye due to Package, PCB and Connectors

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC

Page 6

ADS 2014 DDR4 Simulation=>Compliance Test

User Story
1. As a DDR controller designer at an IC company, I need to swap out the
simulated testbenchs generic controller model with my controller I/O
model
2. As a PCB/package/DIMM designer at an OEM or IC company, I need to
swap out parts of the simulated testbenchs generic channel cascade with
the post-layout EM-based model of my package (or PCB or DIMM)
3.

As a DRAM I/O designer at an IC company, I need to swap out the

simulated testbenchs generic DRAM model with my DRAM I/O model.

(for all three)then I want to run a sign-off compliance test on the simulated
test bench waveforms before committing to fabrication. I want to run the exact
same tests on the simulated testbench that I will run on my scope in the test
lab when get my prototypes back from fab.

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 7

ADS 2014 DDR4 Simulation=>Compliance Test Flow

ADS Waveform
Bridge: Script that
writes file format
that scope
compliance app
understands

Simulated test bench in ADS

Real test bench

Infiniium
oscilloscope
Keysight EEsof EDA Simulation
Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 8

ADS DDR4 Simulation Setup

Simulation Setup for Data and Strobe Signals in WRITE Cycle

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 9

Driver and Receiver IBIS models

10

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 10

Channel Model
Use multilayer transmission
line models and Sparameters to build the
channel model
Can import a PCB layout to
build an EM model using
Momentum or FEM
Can import S-parameters
from other EM tools or
VNA/TDR measurements

11

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 11

Pattern Generator
Use PRBS sources to
generate random DQ pattern
and repetitive DQS pattern
Use pulse sources as input
to IBIS Enable Pin to
generate DQ and DQS
bursts

12

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 12

ADS Transient Simulation Controller and Netlist Include

13

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 13

Save ADS waveforms to .h5 files for analysis in Infiniium Offline

14

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 14

DDR4 Compliance Test

What are we testing?

15

Clock Tests

Electrical

Timing

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 15

DDR4 Electrical and Timing Tests

16

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 16

Load ADS waveforms to perform DDR4 compliance tests

17

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 17

Generate measurement results and HTML report

18

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 18

DDR4 Compliance Test Bench demo

19

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 19

Summary
ADS simulates the physical channel effects of I/O drivers/receivers and
package/PCB/connectors between MCH and DDR4 memory
Simulated waveforms are used to run DDR4 compliance test
Compliance sign-off report is generated from the simulated waveforms before
committing to fabrication. Exact same tests can be run in the test lab when
hardware prototypes come back from fabrication

20

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 20

Call to Action
Watch DDR4 Compliance Test Bench video :
http://www.keysight.com/en/pd-2423419-pn-W2351EP/ddr4-compliance-test-bench

Download DDR4 Compliance Test Bench software:

http://www.keysight.com/main/software.jspx?cc=US&lc=eng&ckey=2504328&id=2504328

21

Keysight EEsof EDA Simulation

Tools for Signal Integrity, Pow er
Integrity, and EMI/EMC
Copyright 2014 Agilent Technologies,
Inc.

Page 21