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Device and SPICE modeling of RRAM devices

Patrick Sheridan, Kuk-Hwan Kim, Siddharth Gaba, Ting Chang, Lin Chen and Wei Lu*

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Published on 17 August 2011 on http://pubs.rsc.org | doi:10.1039/C1NR10557D

Received 31st May 2011, Accepted 5th July 2011

DOI: 10.1039/c1nr10557d
We report the development of physics based models for resistive random-access memory (RRAM)
devices. The models are based on a generalized memristive system framework and can explain the
dynamic resistive switching phenomena observed in a broad range of devices. Furthermore, by
constructing a simple subcircuit, we can incorporate the device models into standard circuit simulators
such as SPICE. The SPICE models can accurately capture the dynamic effects of the RRAM devices
such as the apparent threshold effect, the voltage dependence of the switching time, and multi-level
effects under complex circuit conditions. The device and SPICE models can also be readily expanded to
include additional effects related to internal state changes, and will be valuable to help in the design and
simulation of memory and logic circuits based on resistive switching devices.

Introduction
Two-terminal resistive switches, sometimes termed memristors,14 are electronic devices that exhibit hysteretic resistance
switching behavior in their IV characteristics and have been
proposed in a broad range of applications including, but not
limited to, resistive random access memory (RRAM),57 neuromorphic systems,8 Boolean logic implementation,9 signal processing, and circuit design.10 Such circuits can extend the
functional scaling of integrated circuits beyond CMOS, and offer
non-volatility and 3D integration potential.9,10 In particular, as
a potential replacement for Flash memory technology, RRAM
has generated significant interest in ultra-high density nonvolatile information storage applications. A broad range of
materials have been studied1116 that can act as RRAM devices.
On the other hand, there is a lack of well-established models
that can simulate and predict the resistance switching effects
observed in RRAM devices. Previous attempts to simulate
RRAM memory or circuits have either focused entirely on the
steady state, with fixed resistances assigned to the devices, or
used a fixed threshold voltage, fixed switching time and predetermined on-resistance Ron (e.g. by using a voltage controlled
switch to emulate an RRAM device). Unfortunately, these
approaches do not correctly capture the critical dynamic
switching properties of RRAM devices. In particular, previous
experimental studies have shown that the threshold voltage,
switching time, and Ron are not fixed parameters but rather are
dynamic effects and vary with differing circuit conditions even
for the same device.17,18 In this paper, we discuss the development
of an analytical device model that can accurately predict the

Electrical Engineering and Computer Science, University of Michigan, Ann

Arbor, MI, 48109, USA. E-mail: wluee@eecs.umich.edu; Fax: +1 734-7639324; Tel: +1 734-615-2306
These authors contributed equally to this work.

This journal is The Royal Society of Chemistry 2011

dynamic effects during resistance switching. In addition, we show

the analytical model can be incorporated into standard circuit
simulators such as SPICE, by creating a subcircuit and using
floating node voltages to represent the internal state variables.
Such a SPICE model can accurately predict the switching characteristics of the RRAM device, such as the dependence of
switching time on voltage, the apparent threshold effect and its
dependence on sweep rate, and the multi-level storage effect. The
development of the device and SPICE model will greatly aid the
simulation and design of memory and logic circuits based on
RRAM devices. Furthermore, the framework developed here
can be applied to a broad range of resistance switching devices.

Device model
Memristive device framework
The model is based on the conceptual framework of memristive
systems.1,2 Central to the theory are the two generalized equations given below:
y(t) h(s, x)x(t)
ds
f s; x
dt

(1)
(2)

Eqn (1) describes the relation between a time varying input, x,

and corresponding output y. h is a generalized transfer function
that depends upon both the input and a state variable, s, which
could be a vector representing some set of conditions internal to
the device. For resistive devices discussed here, eqn (1) is the
usual IV equation:
i(t) g(s, v)v(t)

(3)

where v(t) is the arbitrary voltage input to the device, i(t) is the
current output at time t, g(s, v) is the generalized conductance,
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and s is the state variable, the nature of which will be explained

below.
Eqn (2) is the key that differentiates memristive devices (e.g.
devices with hysteresis) from other resistive devices. Unlike the
case for conventional devices whose state is determined by the
present input signals such as voltage or current, for a memristive
device, the external signals control only the time derivative of the
state variable through eqn (2), i.e. the state of the device is
determined by the time integral of the input signals, leading to
a history-dependent, hysteretic behavior. Thus, identifying the
state variable and the dynamic equation (eqn (2)) is crucial to
understanding memristive devices. For RRAM, the state variable, s, normally represents the length or width of the conductive
(filamentary) region within the active area, and the function
f(s, x) is often a complex, non-linear relationship that captures
the physical processes occurring during state transformation. We
note that by self-consistently solving eqn (1) and (2), the dynamic
behavior of a broad range of resistive switching devices can be
accurately predicted.2

State variable dynamics

In most RRAM devices, the ON/OFF transitions are caused by
the movement and redistribution of ions (either cations or
anions).5,6,17 The nature of the conducting regions can be filamentary or interfacial in nature.5,13,19,20 For simplicity, the conducting regions will be broadly termed as filamentary without
losing the generality of the discussions, and the state variable
naturally takes the form of the conductive filaments dimensions
(e.g. the length of the filaments, or the lateral size of the filaments
or conducting interfacial regions).
The dynamics of the filaments will in turn be determined by
the motion of their constituent ions. As a first example, we
consider a growth model where the state variable, renamed l,
represents the length of a conductive filament; schematically

Fig. 1 (a and b) Schematics of length and lateral filament growth of an

RRAM cell, respectively. (c) Illustration of the potential energy barrier in
an applied electric field. The effective barrier lowering, as seen by
a moving ion, is qVd/2(h  l) measured from the ion location (an energy
valley) to the next peak. (d) SPICE simulation results of the IV characteristics of an RRAM cell with code listed in Table 1 and 10 mA current
compliance.

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illustrated in Fig. 1(a). With the application of a positive bias to

the top electrode while keeping the bottom electrode grounded,
filament growth can be initiated inside the insulating material.
The filament body is assumed to be metallic and with low resistance and thus, to model the growth of the filament, we need only
consider the motion of the leading ion. For simplicity, it is
further assumed that the ion moves in one dimensionparallel
to the applied electric field. The growth rate of the filament is
then determined by the drift speed of the leading ion, which
can in turn be derived by calculating how long it takes for the ion
to hop over an energy barrier, schematically illustrated in Fig. 1
(c) and given by:18,21





dl
qUa qVd=2h  l
d n exp
dt
kT



qUa  qVd=2h  l
(4)
 exp
kT
Or equivalently:
dl
2d n exp
dt





qUa
qVd
sin h
2kTh  l
kT

(5)

where d is the hopping site distance, v is the characteristic ion hop

attempt frequency, Ua is the activation potential, k is Boltzmanns constant, T is the temperature in Kelvin, q is the charge
on an electron, h is the overall thickness of the dielectric, and l is
the filament length.
We can intuitively understand eqn (4) as follows: the particles
drift velocity is a product of the distance travelled in each hop,
d, and the frequency with which these hops occur. The latter is
given by the attempt frequency, v, scaled by a factor exponentially dependent on the apparent barrier height. Under an
applied bias, the apparent barrier height will be reduced from the
barrier at zero-bias, Ua, as schematically shown in Fig. 1(c).
Assuming the voltage is dropped linearly along the distance
between the filament tip and the opposing electrode (h  l), the
apparent barrier seen by the ions will be lowered by qVd/2(h  l).
As a result, the filament growth rate will be enhanced exponentially as a function of the applied voltage, an effect that was
experimentally verified recently.17,18 The second exponential term
in eqn (4) is included to account for the probability that the
particle will hop backwards, towards the originating electrode.
On the other hand, one should note that eqn (4) and (5) are
limited to the voltage ranges such that Ua  Vd/2(h  l) > 0. At
very high field, such as when V is very large or (h  l) is very
small, Ua  Vd/2(h  l) < 0, a result that is not physical. As
a consequence, eqn (5) will overestimate the filament growth rate
at high field. In addition, under these high-field conditions, the
filament growth will instead be dominated by other processes
such as the oxidation rate of the metal atoms, rather than the
field at the tip of the filament. At high biases, it is thus reasonable
to re-write eqn (5) as





dl
qUa
V
sexp
(6)
sin h
dt
V0
kT
where V0 and s are treated as free parameters to replace the
previous free parameters y and d. Eqn (6) has been demonstrated
to reproduce experimental data (see Fig. 6(b) and 7(b) and (c))
well.
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The next step is to determine the IV relationship of the device

for eqn (1) or (3). Following the arguments above, in an RRAM
device where the filament has not bridged the electrodes, the
resistance will be dominated by that between the tip of the filament and the opposing electrode with a distance expected to be
on the order of a few nanometres. At such distances, it is
reasonable to assume that current is dominated by tunneling.22
Using the expressions for a square barrier obtained from ref. 23
the current can be expressed as:
I A

4qpmkT2
1
pc1 kT
exp b1
h30
c1 kT2 sin pc1 kT

 1  expc1 qV

(7)

where
p
8

2ah  l q 3=2
>
<
f0  f0  V 3=2
3V p
b1
>
: 2ah  l q f3=2
0
3V
8

ah  l 1=2
1=2
>
>
p f0  f0  V
<
V q
c1
ah  l 1=2
>
>
:
p f
V q 0

if V\f0
if V . f0

Fig. 2 Comparison between the full tunneling expression (eqn (7)) and
the simplified, smoothed function (eqn (8)) at different tunneling gap (h 
l) conditions. The two functions agree well in the voltage range of interest,
allowing us to use the simpler expression without losing accuracy.

created in which the state variable is represented as a floating

voltage at the node between an ideal capacitor and a current
source,24 schematically illustrated in Fig. 3. Briefly, the arbitraryfunction current source produces a current whose amplitude is

if V\f0
if V . f0

A is the filament area, m is the effective electron mass, h0 is

Plancks constant, and 40 is the barrier height at zero applied bias
and
p
2 2m
a
:
To reduce the computational complexity for modeling
purposes, the tunneling expression was simplified to
I Aq

8p2 m
kT
V \f0
h30 c1 sin pc1 kT

4pq m V
I A 3 2
h0 a f0 h  l

2

2a

(8a)

p
3=2
qhlf0
3V

V . f0

(8b)

Fig. 2 shows comparisons of results obtained from the simplified

(eqn (8)) and the full expression (eqn (7)), illustrating the accuracy of the simplification.

SPICE model
As discussed earlier, by self-consistently solving eqn (1) and (2)
(or more specifically, eqn (6) and (8) for a device based on the
filament length growth), we can fully predict the RRAM device
behavior. This can be readily achieved through a standard math
solver such as MATLAB. On the other hand, for circuit simulations, it is desirable to use a conventional circuit simulator such
as SPICE instead. Standard SPICE software does not allow for
arbitrary internal mutable variables that are determined by a rate
equation such as eqn (4). To circumvent this, a subcircuit was
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Fig. 3 Schematic of the RRAM subcircuit. The internal state variables

are represented as the voltages at the floating nodes of the capacitors.

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controlled by the external signal Vex and the internal state

variables of the RRAM (represented by voltages Vn, such as
Vn_length or Vn_width measured at the floating nodes n_length,
n_width, etc., Fig. 3): I f(Vex, Vn) is the current into the
capacitor in the subcircuit, and essentially produces the second
half of eqn (6); while the capacitor provides the derivative
function I C(dVn)/dt. By matching the two currents in the
subcircuit, the differential equation (eqn (6)) can be reproduced
and handled by SPICE.
The other component within the subcircuit is the variable
resistor that takes care of the current through the RRAM cell,
e.g. eqn (8), represented in SPICE by another current source. A
point of difficulty arises from the discontinuity in the tunneling
equation (eqn (8)) at V 40 which exists even in the full
expressions (eqn (7)).23 This causes a glitch in the LTSpice solver
and can yield unpredictableoften unphysicalresults. To
ameliorate this problem, a smoothing function of the form

1/(1 + ex) is used to account for the transition between high and
low bias. Table 1 shows the SPICE code of the memristor subcircuit based on filament length growth that was used to obtain
results in Fig. 1(d) and 47. The simulations were preformed in
LPSpice, a free SPICE circuit simulation variant. Similar codes
can be readily generated for other effects (e.g. filament width
growth, temperature change) as shown in Fig. 3.

Results
Switching dynamics, threshold and multi-level effects
By incorporating the physics based RRAM model into SPICE,
circuit level simulations can now be achieved. For example, when
the device is connected in series with other components (such as
a static resistor in Fig. 4(a)) or programmed with a current
compliance, the voltage dropped across the device, Vex is no

Table 1 SPICE code for a representative RRAM with length growth model

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Fig. 5 Switching characteristics with two different sweep rates. The

apparent threshold voltage is dynamic and dependent upon the sweep
rate, with a faster sweeping rate resulting in a larger threshold voltage.

Fig. 4 Switching dynamics of an RRAM cell connected in series with

a resistor. The test schematic is shown in (a). (b) As the filament length
grows a voltage divider effect between the device and the series resistor
reduces the voltage applied across the cell (i.e. Vmem) (c). The reduced
potential retards further filament growth. (d) Similar feedback effect is
obtained by using the current compliance instead of a series resistor.

longer a constant and must be solved for self-consistently and

can now be handled by SPICE directly.
We were able to validate the model by comparing it to previously reported experimental data.7,8,17 For example, Fig. 1(d)
shows the simulation results using the SPICE model for an
RRAM cell programmed with a DC voltage sweep with a 10 mA
current compliance. One can readily recognize the hysteretic loop
and the apparent threshold voltages related to the sharp resistance switching in the simulation results. In particular, we want
to emphasize that only continuous equations were used (i.e.
neither eqn (6) nor (8) has a threshold effect), and the apparent
threshold effect results from the exponential dependence of the
growth rate on applied bias as well as the non-linear tunneling
effect. Due to the dynamic nature of the processes, the apparent
threshold voltage is in fact not fixed but depends on the sweep
rate. For example, by changing the sweep rate from 2 V s1 to 8 V
s1, the apparent threshold voltage changes from 2.4 to 2.6 V as
shown in Fig. 5. This rate dependent threshold voltage effect was
obtained from experiments recently17,18,25 and can now be
captured by these SPICE models.
Further, we were able to gain insight into the dynamics of
a switching event and utilize such understandings to optimize the
device operation. For example, Fig. 4 shows the filament
dynamics when an RRAM device is placed in series with
a voltage source and a resistor RS. Fig. 4(b) and (c) show the
filament length and voltage across the device over time, respectively. First, the applied voltage across the cell causes the device
to switch at 2.4 V. As the device becomes less resistive,
however, a voltage divider is formed between the RRAM cell and
the series resistance. This has the effect of reducing the voltage
across the RRAM cell (Fig. 4(c)), retarding further filament
growth. Eventually the resistance of the cell stabilizes at a value
that is strongly dependent on RS. A similar result (Fig. 4(d)) is
This journal is The Royal Society of Chemistry 2011

achieved by using a compliance current to provide the feedback

in place of the resistor: once the compliance current is reached,
the voltage across the device is quickly lowered and further
filament growth will be retarded.

Fig. 6 (a) RRAM dynamics during pulse programming. Circuit 4(a) is

used with RS 10 kOhm. Top to bottom: applied voltage, voltage across
the RRAM cell, current, and device resistance. The switching event is
defined as when the current is >1mA and is marked by the dotted line. (b)
Dependence of the switching time on applied voltage.

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Fig. 7 Multi-level obtained in RRAM cells. (a) Dependence of the filament length l on the series resistance RS. (b). Dependence of the final device
resistance Ron on the series resistance RS, plotted in loglog scale. (c) Dependence of the Ron on the compliance current, plotted in loglog scale.

The same effects are observed with the application of short

programming pulses. As shown in Fig. 6, a programming voltage
pulse was applied to the RRAM cell in series with RS at t 1 ns.
Before the filament is formed, most of the voltage is dropped
across the RRAM cell. However, as the cell is switched on at
approximately t 5 ns, the voltage drop across it starts to
decrease, and the final filament length as well as current saturate.
Fig. 7(b) plots the final resistance of the cell obtained from the
simulation after the application of the programming pulse vs. RS,
and a good correlation can be found, consistent with experimental results.12,17 Similar results are obtained with current
compliance, as seen in Fig. 7(c). Thus, by controlling the series
resistance or current compliance using a series of resistors17 or
a MOS selector,26 we can achieve multilevel resistance values in
a single cell, increasing the data density with minimal cost in
device footprint. Fig. 7(a) plots the saturated filament lengths
with different RS, and it is clear that the control of the onresistance Ron is achieved by controlling the filament length for
this type of RRAM devices, with an almost linear increase of
filament length producing an exponential reduction in Ron.

Switching time
As can be seen from the simulation results, the device does not
switch ON instantly, but rather waits for a specific time before
a measurable current can be detected. Once again this apparent
wait (switching) time (or time-to-switch) is an artifact of the nonlinear filament growth and current expressions. The model
developed here not only predicts this switching time effect, but
also anticipates the dependence of the switching time with
applied bias. In Fig. 4, the switching event is qualitatively defined
by the sharp rise in conductance, highlighted by the dotted line,
and the switching time can be measured as the time between the
application of the programming pulse and the switching event.
Fig. 6(b) plots the switching time measured from simulation
(solid line) versus the applied voltage, showing that the switching
time is roughly exponentially dependent on the voltage to first
order. This result clearly demonstrates the importance of simulation models that account for the dynamic effects, since the
devices will likely experience a number of transient pulses with
different amplitudes during normal operations in actual circuits,
while a fixed switching-time model will not be able to accurately
predict the device performance. These observations from SPICE
simulations are again consistent with experimental results, shown
in Fig. 6(b) as solid squares.17
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Secondary effects
Lateral expansion
We note that the approach discussed here provides a comprehensive framework. By identifying the appropriate state variables and obtaining the corresponding rate equation (eqn (2))
and IV relation equation (eqn (1)), a broad range of devices
showing hysteresis can be explained and simulated, including
devices showing abrupt resistance switching effects discussed
here, as well as devices showing incremental resistance changes
due to interface effects or oxygen vacancy motion.27 The rate
equation (eqn (6)) and IV equation (eqn (7)) are special cases for
a type of RRAM device when the filamentary length growth is
dominating during the OFFON transition. Other effects, such
as lateral expansion of the conducting region, can also be readily
included.
It is commonly observed in conductive bridge type RRAMs
that, after the filament is formed and spans the gap between the
two electrodes, lateral expansion of the filament can occur,
further decreasing the on-state resistance.26 This can modeled
equivalently as the growth of additional conductive filaments in
parallel with the first, with the addition of each filament
increasing the overall conductance by G0, where G0 is the
conductance of a single filament. In this case the state variable
then becomes the number of parallel filaments termed w here.
The rate equation for w will be determined by an equation
similar to eqn (6) since the growth rate of each filament is an
exponential function of V.27





dw
qUa
V
sin h
(9)
sexp
kT
dt
V0
The total conductance equals to the number of parallel filaments,
w (or equivalently, the overall area of the conductive region),
multiplied by the conductance of a single filament G0:
I(t) wI0 wG0V(t)

(10)

In practice, I0 can be modeled as either a tunneling current, or

treated simply as a resistor. Fig. 8 shows SPICE simulation
results obtained from treating w as the state variable and solving
the subcircuit related to eqn (9) and (10). Here G0 was treated as
a fixed value equal to the conductance quantum, 77.5 mS,
assuming each filament is of atomic scale.28
Multi-level storage was also predicted by the SPICE model
based on area (number of filaments) growth. In this case, the
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Fig. 8 RRAM dynamics when the lateral (area) growth is dominating. (a) IV curve obtained through SPICE simulation. (b). Dependence of the
number of filaments w on the series resistance RS. Inset of (b) shows the number of filaments is linearly dependent on the series conductance (1/RS). (c)
Dependence of the device resistance Ron on the series resistance RS, plotted in linear scale.

Fig. 9 (a) Comparison with and without temperature effects of a voltage sweep (2 V s1) using the width growth model and 10 mA current compliance.
(b) The voltage across the memristor vs. total applied voltage. (c) The local temperature vs. time calculated using eqn (11) where a 3  104 K W1.

linear increase in number of filaments causes a linear increase in

device conductance, contrary to the exponential relationship
observed in the length growth mode. In actual devices, it is likely
that the length growth of the conductive filament has the largest
impact on device current when the filament is in the initial growth
stage, while the width growth becomes important with the
continued application of programming voltage.26

and can significantly reduce Ron at the same current compliance.

Interestingly, the highest temperature is experienced in a very
narrow window at the onset of the SET or RESET process (Fig. 9
(c)). This effect can be explained by competition of the fast rise in
current due to switching with the rapid reduction in voltage when
the current compliance is reached (Fig. 9(b)), another example
that external circuit components can provide a feedback mechanism which in turn affects the internal device characteristics.

Joule heating
Because ion drift is a thermally activated process (eqn (5)),
elevated temperatures can have an effect on the switching
dynamics when the device experiences localized heating.29 Not
surprisingly, Joule heating effects will be more significant when
the programming/erase current is high. Indeed, unipolar RRAM
devices rely mainly on Joule heating to dissolve the conductive
filament at erase currents higher than those used for
programming.
The effects of Joule heating can be incorporated into the
SPICE model as well. Here, for demonstration purposes, we
assume to first order that the local temperature is a linear function of the instantaneous power dissipation.30 That is:
T T0 + aIV

(11)

where T0 is the room temperature, and a is a steady-state thermal

coefficient that accounts for the specific heat of the material as
well as radiative thermal loss which can be obtained
experimentally.
Fig. 9(a) shows the SPICE simulation results of the IV
switching characteristics of an RRAM device considering
thermal effects versus neglecting thermal effects. Here, the
programming current was limited by a current compliance of 10
mA. Thermal effects reduce both the SET and RESET voltages,
This journal is The Royal Society of Chemistry 2011

Conclusion
We have developed a physical model to predict the resistance
switching effect in RRAM devices. Further, the device model was
incorporated into the SPICE framework that can be tailored to
simulate several types of resistive switching devices. The models
developed here provided insight into the dynamics of resistive
switching devices such as the apparent threshold-voltage effect,
the dependence of switching time on voltage, and the origin of
multiple resistance states. The physics and SPICE models will
help large-scale circuit development and simulation when these
devices are incorporated into actual circuits.

Acknowledgements
This work was supported in part by National Science Foundation CAREER Grant ECCS-0954621 and the DARPA
SyNAPSE program.

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This journal is The Royal Society of Chemistry 2011