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Product Summary
Operating voltage
On-state resistance
Load current (ISO)
Current limitation
Features
Vbb(on)
RON
IL(ISO)
IL(SCr)
5.0 ... 34
V
30 m
12.6
A
24
A
TO263-7-2
TO220-7-12
1
SMD
1
Straight
Application
C compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads
All types of resistive, inductive and capacitve loads
Replaces electromechanical relays, fuses and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, proportional sense of load current, monolithically integrated in Smart SIPMOS technology.
Providing embedded protective functions.
Block Diagram
4
+ V bb
Voltage
Overvoltage
Current
Gate
source
protection
limit
protection
V Logic
IN
ST
Voltage
Charge pump
sensor
Level shifter
Rectifier
ESD
Logic
Limit for
unclamped
ind. loads
Output
Voltage
detection
OUT
IL
Current
Sense
Load
Temperature
sensor
IS
I IS
R
GND
IS
6, 7
O
GND
PROFET
Load GND
2
Signal GND
Semiconductor Group
Page 1 of 15
2003-Oct-01
BTS 640 S2
Pin
Symbol
ST
Function
Diagnostic feedback: open drain, invers to input level
GND
Logic ground
IN
Vbb
IS
6&7
OUT
(Load, L)
Symbol
Vbb
Vbb
Values
43
34
Unit
V
V
60
self-limited
-40 ...+150
-55 ...+150
85
A
C
0,41
3,5
1.0
4.0
8.0
Tj Start=-40 ...+150C
VLoad dump3)
IL
Tj
Tstg
Ptot
kV
VIN
IIN
IST
IIS
V
mA
1)
2)
3)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150
resistor in the GND connection is recommended).
RI = internal resistance of the load dump test pulse generator
VLoad dump is setup without the DUT connected to the generator according to ISO 7637-1 and DIN 40839
Semiconductor Group
Page 2
2003-Oct-01
BTS 640 S2
Thermal Characteristics
Parameter and Conditions
Thermal resistance
Symbol
min
----
Values
typ
max
-- 1.47
-75
33
--
Unit
K/W
Electrical Characteristics
Parameter and Conditions
Symbol
Values
min
typ
max
Unit
--
27
54
30
60
--
50
--
mV
11.4
12.6
--
IL(NOM)
IL(GNDhigh)
4.0
--
4.5
--
-8
A
mA
ton
toff
25
25
70
80
150
200
Slew rate on
dV /dton
0.1
--
V/s
-dV/dtoff
0.1
--
V/s
IL = 5 A
VON(NL)
Tj =-40...+150C:
VON = 0.5 V, TC = 85 C
4)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb
connection. PCB is vertical without blown air.
Semiconductor Group
Page 3
2003-Oct-01
BTS 640 S2
Parameter and Conditions
Symbol
Values
min
typ
max
Operating Parameters
Operating voltage 5)
Undervoltage shutdown
Undervoltage restart
Vbb(on)
Tj =-40...+150C: Vbb(under)
Tj =-40...+25C: Vbb(u rst)
Tj =+150C:
Undervoltage restart of charge pump
see diagram page 13
Tj =-40...+25C: Vbb(ucp)
Tj =25...150C:
Undervoltage hysteresis
Vbb(under)
5.0
3.2
--
--4.5
34
5.0
5.5
6.0
V
V
V
----
4.7
-0.5
6.5
7.0
--
Overvoltage shutdown
Overvoltage restart
Overvoltage hysteresis
Overvoltage protection6)
34
33
-41
43
--1
-47
43
---52
V
V
V
V
----
4
12
--
15
25
10
--
1.2
mA
Tj =-40...+150C:
Ibb=40 mA
Vbb(over)
Tj =-40...+150C: Vbb(o rst)
Tj =-40...+150C: Vbb(over)
Tj =-40C: Vbb(AZ)
Tj =+25...+150C
Tj =-40...+150C:
VIN=0,
6)
7)
Tj =-40...+150C:
5)
Unit
IGND
At supply voltage increase up to Vbb= 4.7 V typ without charge pump, VOUT Vbb - 2 V
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150
resistor in the GND connection is recommended). See also VON(CL) in table of protection functions and
circuit diagram page 9.
Add IST, if IST > 0, add IIN, if VIN>5.5 V
Semiconductor Group
Page 4
2003-Oct-01
BTS 640 S2
Parameter and Conditions
Symbol
Protection Functions8)
Initial peak short circuit current limit (pin 4 to 6&7)
IL(SCp)
Tj =-40C:
Tj =25C:
=+150C:
Tj
Repetitive short circuit shutdown current limit
IL(SCr)
Tj = Tjt (see timing diagrams, page 12)
Values
min
typ
max
Unit
48
40
31
56
50
37
65
58
45
--
24
--
41
43
150
---
-47
-10
--
-52
--32
V
C
K
V
--
600
--
mV
4550
3300
5000
5000
6000
8000
4550
4000
5000
5000
5550
6500
5.4
6.1
6.9
0
0
0
----
1
15
10
VON(CL)
Tjt
Tjt
-Vbb
= -40C, IL = 5 A: kILIS
Tj= -40C, IL= 0.5 A:
IIS = 0, IL = 5 A:
VIS(lim)
8)
9)
10)
11)
12)
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
Requires 150 resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 2 and circuit page 9).
This range for the current sense ratio refers to all devices. The accuracy of the kILIS can be raised at least by
a factor of two by matching the value of kILIS for every single device.
In the case of current limitation the sense current IIS is zero and the diagnostic feedback potential VST is
High. See figure 2b, page 11.
Valid if Vbb(u rst) was exceeded before.
not subject to production test, specified by design
Semiconductor Group
Page 5
2003-Oct-01
BTS 640 S2
Parameter and Conditions
Symbol
Values
min
typ
max
Unit
tson(IS)
--
--
300
--
30
100
--
10
--
15
40
3,0
4,5
7,0
-1.5
--
--0.5
3.5
---
V
V
V
--
50
20
50
90
td(ST OL3)
--
400
--
tdon(ST)
--
13
--
tdoff(ST)
--
--
5.4
----
6.1
----
6.9
0.4
0.7
2
Tj= -40...+150C
Tj= -40...+150C
RI
IIN(on)
slope13)
Tj=-40 ... +150C:
13)
Semiconductor Group
Page 6
2003-Oct-01
BTS 640 S2
Truth Table
Normal
operation
Currentlimitation
Short circuit to
GND
Overtemperature
Short circuit to
Vbb
Open load
Undervoltage
Overvoltage
Negative output
voltage clamp
L = "Low" Level
H = "High" Level
16)
17)
18)
19)
20)
Input
Output
Status
Current
Sense
level
level
level
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
L
H
L
H
L
L16)
L
L
H
H
H
L
H
H
H
H
H
H
L17)
L
H (L20))
L
H
L
H
L
H
IIS
0
nominal
0
0
0
0
0
0
0
<nominal 18)
0
0
0
0
0
0
0
L19)
H
L
L
L
L
L
X = don't care
Z = high impedance, potential depends on external circuit
Status signal after the time delay shown in the diagrams (see fig 5. page 12...13)
The voltage drop over the power transistor is Vbb-VOUT>typ.3V. Under this condition the sense current IIS is
zero
An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
Low ohmic short to Vbb may reduce the output current IL and therefore also the sense current IIS.
Power Transistor off, high impedance
with external resistor between pin 4 and pin 6&7
Semiconductor Group
Page 7
2003-Oct-01
BTS 640 S2
Status output
Terms
+5V
V
bb
I IN
I ST
I IS
V
IN
Ibb
VON
Vbb
IN
OUT
R ST(ON)
IL
ST
PROFET
ST
OUT
IS
VST
5
V
IS
GND
2
R
GND
OUT
I
GND
GND
ESDZD
V
ESD-ZD I
IS
I
IS
I
IS
GND
ESD-ZD
IS
GND
VON
OUT
GND
PROFET
Semiconductor Group
Page 8
2003-Oct-01
BTS 640 S2
Overvoltage protection of logic part
GND disconnect
+ 5V
+ V bb
R ST
RI
IN
V
bb
4
3
Z2
ST
Logic
IS
RV
V
R IS
Ibb
IN
Vbb
ST
PROFET
OUT
OUT
IS
GND
2
Z1
V V V
IN ST IS
V
GND
GND
R GND
Signal GND
+ 5V
IN
Vbb
OUT
- Vbb
R ST
RI
IN
ST
PROFET
OUT
IS
Logic
GND
2
ST
VZ1
IS
OUT
V
bb
Power
Inverse
Diode
RV
R IS
V
GND
Any kind of load. If VGND > VIN - VIN(T+) device stays off
Due to VGND >0, no VST = low signal available.
GND
RL
RGND
Power GND
Signal GND
V VSTV
IN
IS
4
high
3
1
5
Open-load detection
ST
PROFET
OUT
OUT
IS
GND
V
bb
bb
EXT
Vbb
IN
OFF
Out
ST
Logic
OUT
Signal GND
Semiconductor Group
Page 9
2003-Oct-01
BTS 640 S2
Vbb disconnect with charged external
inductive load
4
high
3
1
5
IN
Vbb
ST
PROFET
OUT
OUT
IS
6
D
GND
2
RL
V
bb
4
3
1
Vbb
IN
ST
ELoad
Vbb
OUT
PROFET
OUT
IS
6
7
GND
EL
2
ER
EL = 1/2LI L
While demagnetizing load inductance, the energy
dissipated in PROFET is
EAS= Ebb + EL - ER= VON(CL)iL(t) dt,
with an approximate solution for RL > 0 :
EAS=
IL L
ILRL
(V + |VOUT(CL)|) ln (1+
)
|VOUT(CL)|
2RL bb
Semiconductor Group
Page 10
2003-Oct-01
BTS 640 S2
Figure 2a: Switching a lamp
Timing diagrams
IN
IN
ST
t don(ST)
t doff(ST)
VOUT
IL
t on
IL
OUT
t off
tslc(IS)
t slc(IS)
I IS
t
Load 1
Load 2
IIS
t son(IS)
t soff(IS)
The sense signal is not valid during settling time after turn or
change of load current.
ST
VOUT
Vbb
IL
IIS
t
I IS
ST
t
proper turn on under all conditions
Semiconductor Group
Page 11
2003-Oct-01
BTS 640 S2
Figure 4a: Overtemperature:
Reset if Tj <Tjt
IN
ST
ST
VOUT
IL
IL
I IS
IIS
TJ
t
t
IN
IL
IN
IL(SCp)
I
ST
L(SCr)
VOUT
I IS
IL
ST
open
normal
t
IIS
Semiconductor Group
normal
Page 12
2003-Oct-01
BTS 640 S2
Figure 6b: Undervoltage restart of charge pump
Figure 5b: Open load: detection in ON- and OFF-state
(with REXT), turn on/off to open load
VON(CL)
V on
IN
on-state
off-state
ST
off-state
td(ST OL3)
bb(over)
OUT
bb(u rst)
I
L
open load
bb(o rst)
bb(u cp)
bb(under)
V bb
I IS
ST
not defined
ST
Vbb
VON(CL)
bb(over)
bb(o rst)
V
bb
V
bb(under)
Vbb(u cp)
Vbb(u rst)
IL
I
IIS
IS
t
Semiconductor Group
Page 13
2003-Oct-01
BTS 640 S2
Figure 8b: Current sense ratio21:
Figure 8a: Current sense versus load current:
1.3
[mA]
1.2
15000
k ILIS
I IS
1.1
1
10000
0.9
0.8
0.7
0.6
5000
0.5
0.4
0.3
0.2
0.1
IL
0
0
[A] I L
0 1 2 3 4 5 6 7 8 9 10 11 12 13
5 [A] 6
[V]
0.2
RON
0.1
VON(NL)
IL
0.0
0
21
Semiconductor Group
Page 14
7 [A] 8
2003-Oct-01
BTS 640 S2
Straight: P-TO220-7-12
Sales code
BTS640S2
Sales Code
BTS640S2 S
Ordering code
Q67060-S6307-A5
Ordering code
Q67060-S6307-A7
10 0.2
A
4.4
0...0.15
0.25
A C
Ordering code
Q67060-S6307-A6
10 0.2
7x0.6 0.1
0.5 0.1
8 max.
0.1
Typical
All metal surfaces tin plated, except area of cut.
Ordering code
2.8 0.2
1)
We hereby disclaim any and all warranties, including but not limited
to warranties of non-infringement, regarding circuits, descriptions
and charts stated herein.
Information
For further information on technology, delivery terms and conditions
and prices please contact your nearest Infineon Technologies Office
in Germany or our Infineon Technologies Representatives
worldwide (see address list).
6x1.27
A B
Typical
All metal surfaces tin plated, except area of cut.
2.7 0.3
4.7 0.5
1.3 0.3
8 1)
10.3
9.25 0.2
(15)
0.05
0...0.15
1)
A B C
2.4
Attention please!
The information herein is given to describe certain components and
shall not be considered as a guarantee of characteristics.
4.4
1.27 0.1
B
0.1
0.25
2.4
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 Mnchen
Infineon Technologies AG 2001
All Rights Reserved.
BTS640S2 G
1)
0.5 0.1
7x
0.6 0.1
1.27
1)
Sales code
9.8 0.15
0.05
8.4 0.4
0.25
0...0.15
3.9 0.4
Typical
All metal surfaces tin plated, except area of cut.
8.5
13.4
17 0.3
15.65 0.3
0.5 0.1
4.4
1.27 0.1
110.5
3.7 0.3
2.4
7x
0.6 0.1
1.27
9.25 0.2
2.8 0.2
8.6 0.3
0.05
8.5
3.7 -0.15
1.27 0.1
10.2 0.3
13.4
17 0.3
15.65 0.3
1)
8.5
3.7 -0.15
1)
13 0.5
1)
1)
9.8 0.15
9.25 0.2
10 0.2
9.8 0.15
Warnings
Due to technical requirements components may contain dangerous
substances. For information on the types in question please contact
your nearest Infineon Technologies Office.
Q67060-S6307-A6
Infineon Technologies Components may only be used in life-support
devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system,
or to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain and/or
protect human life. If they fail, it is reasonable to assume that the
health of the user or other persons may be endangered.
Semiconductor Group
Page 15
2003-Oct-01