3 Cadence Tutorial Basic steps into Cadence

3.1 Preparation of the simulation setup

a) Log into your account
b) Type icpro c icbc tutorials into the console and submit the command (icbc is the project name and
tutorials is the subproject name) Note: Projects and subprojects in our context are used to specify
software/design kit and access rights management
c) Type icpro setup_project and follow the steps: sg25_h1_tm1tm2 h1 add tool Cadence DF II
5.1.41USR5 return to main menu commit project setup. Leave the project (exit) and log in
again (icpro icbc tutorials), in order to apply the changes.
d) Create a new unit (icunit cdb tutorial) Note: Units bundle lots of design information on a very high
level. During this course you will not need to care about it again.
e) Type cd units/tutorial and execute icdf2 prepare
f) Type cd df2 and execute icdf2 makefile
g) Type icdf2& and submit this command, too. The design framework will be started and the library
manager will be opened. Note: The smaller icfb-window provides you with feedbacks from the programs. It helps you identifying occurring problems. Furthermore, you can access most of the Cadence
tools from there.

Fig. 1: Library manager and icfb window

h) Your own library tutorial has already been created, which you should use for all cells created/modified
during this course.
i) In
the
library
manager
you
should
now
link
the
library
icbc_tutorial:
EditLibrary Path Go to Edit Exclusive Lock. Then select Edit Add Library... and browse to
the path /home2/icbc_root/ICPRO/lehre/icbc/units/icbc_tutorial/cdslib. Select the library
icbc_tutorial and press OK, then save the library (File Save) and close the dialog.
Note: This library has been created to give you a quick start into Cadence and circuit simulation. Since
it is Read Only, you will have to draw own copys from here into your own library for the different tutorial topics.

j)

Copy the cell common_emitter into your library: Right-ClickCopy... on cell in source library
(icbc_tutorial) then make sure you choose your library tutorial as destination and check the Copy All
Views checkbox. Confirm overwriting old files, if you are asked.

You can start now with the practical work.

3.2 Practical workflow

a)

In the following you will find a step-by-step guide on how to design and simulate circuits. For the further circuits there you will find additional hints and remarks, but not the whole sequence any more.
b) Start working on the first schematic (common_emitter). Place the given elements at the correct nodes
to complete a common emitter stage and its corresponding small signal equivalent circuits. Make use
of the commands add wire, move, stretch, rotate, object properties etc. Note: We often use symbolic
parameters instead of absolute values for many device properties. So we can alter these parameters
during simulation more easily.
c) Once you have finished editing the schematic press Check and save. Now start the analog design environment (ADE) from the Tools-menu.

Fig. 2: Schematic editor - starting analog design environment (AFE)

d) Then you have to load the design variables (circuit parameters) from the schematic into the ADE by
Variables Copy from Cellview. Now you need to initialize them with reasonable starting values
(double click on the variable). Use the values given in the paper tutorials (see chapter 2).

Fig. 3: Editing design variables

e) Now you must specify your desired types of simulation (Analyses Choose). Most circuits will need
a dc Analysis (Enabled, also check Save DC Operating Point) followed by other simulation types, here:
ac 1M to 100GHz Note: Further for this course relevant simulation types are transient (voltage/current
versus time), ac (voltage/current versus frequency, LINEARIZED models), sp (S-Parameter with LINEARIZED models and ports)

Fig. 4: Setting up dc and ac-analysis

f)

The next step is usually to set up the correct model files (SetupModel Libraries). In this course the
settings have already been provided by the icpro-environment. If you experience any model-related
errors, check these settings.

g)

All these settings should be saved in states that you can access with Session Load/Save state.
Finally you can press the green-lights button to start netlisting and simulation

h) After simulation you can plot the results by ResultsDirect PlotMain Form. Select the Checkbox
Add To Outputs, if you want those curves to be plotted automatically after the next simulations. Firstly plot the small signal gain (absolute value only), which is simply the ac voltage at the output node
(Click on the output node of your circuit).

Fig. 5: Specifying plots in the direct plot form; Using the calculator

i)

Add a new subwindow (Window Subwindows Add) for plotting the input impedance.

j)

Then open the calculator (ToolsCalculator). Press if (for frequency dependent currents) and click on
a terminal of the signal source device node. Since the input impedance is 1/iIN (with an ac magnitude
of 1) and is a complex value, invert the value (Press 1/x) and choose either real, imag, abs or phase.

k)

In the waveform display, there are a lot of options (double click on curves and axes) to adjust the plots
to your wishes. Finally it may look like this. If you want to save a waveform setup, use Window
Save..

Fig. 6: Waveform display

3.3 Simulation tasks

a)

Common emitter stage:

Compare the gain and input impedance plots of the model circuits with the real one. Explain the differences that occur and think of an easy solution to make it fit closer (Hint: connections). Find optimum design parameters (gm, cBE, rBE, cBC, cB, cC) to fit the model as close as possible. Derive the small
signal gain and the gain bandwidth product GBP (Special function in the calculator) of the circuits and
compare them with your calculations. (Transistor: npn201_4; Bias point: VBE=0.92V, VCC=1.5V)

b) Common emitter parallel feedback (optional):

Set up your simulation so that you plot gain, input impedances and GBP. Take the model parameters
derived from the common emitter stage. Derive the small signal gain and the GBP of the circuits. Now
perform a parametric sweep (Tools Parametric Analysis) for different RF values from 100 to 5k
and plot the GBP versus RF. Now do a parametric sweep for cBC (0 to 50fF) to determine its impact on
GBP. What is your conclusion from that analysis?

c)

Common emitter series feedback:

LF=0H
Set up your simulation so that you plot gain, input impedances and GBP. Take the model parameters
derived from the common emitter stage. Simulate the small signal gain and the GBP of the circuits.
Perform a parametric sweep for different RF values from 1 to 10 and plot the GBP versus RF. Now do

a parametric sweep for CF (0 to 1pF) to determine its impact on GBP as well. Interpret your results!
LF=100pH
Redo the plots from before. What effect can be seen? What does this behavior mean for package design?
d) Take the common emitter circuit with series resistive feedback (RF=10) and apply suitable measures
to increase the GBP (peaking)! Find optimum capacitor and inductor values for the highest GBP!
e) Design a 2-stage buffer amplifier for broadband optical communications without peaking based on a
cascode circuit. (Compare task 2.6 of the paper tutorial). What bandwidth do we need for 40GBit/s?
Therefore create a new cell e.g. output_stage (File New Cellview) and use the transistors
npn201_x from the SG25_dev library (Add instance). The passives are to be taken from analogLib (res,
cap, ind).
Use the s-Parameter analysis (sp) to plot the input and output reflection coefficients in the smith
chart. Therefore place ports (analogLib psin) and give them the right order.
The required specifications are given below. The transistors have typical operating voltage conditions
of VBE,OP=0.9V, VCE,sat=0.5V and VCE,breakdown=1.7V.
Parameter
Datarate
Low-frequency cutoff
Input and output return loss
Output voltage swing
Supply voltage

Value
>=40 Gbit/s
50 kHz
>10 dB @ 50
200 mVpp
tbd

Try to find a suitable configuration to meet the requirements and give the minimum operating voltage
for your circuit. Best circuits will be rewarded!