Tauseef Hussain

phone: +32-465-282260 , 9, Pentitentienenstraat, Leuven 3000,

Education

email: tauseef@nitc.ac.in , Skype: tauseef hussain

Katholieke Universiteit Leuven

Leuven, Belgium
September 2015 - Present
Masters in Artificial Intelligence(Speech and Language Technology)

National Institute of Technology

Calicut, India
August 2002 - June 2006
Bachelor of Technology in Electronics and Communication Engineering
CGPA : 8.07/10

Professional
Experience

Tata Institute of Fundamental Research

Junior Research Fellow
Mumbai, India
December 2014 - August 2015
Use knowledge of statistical framework of Hidden Markov Model to implement a ASR system.
Create acoustic models based on GMMs using Kaldi toolkit. Developed scripts to use the GMM
based models, alongwith finite-state grammar based language model, for speech recognition of
Marathi/Hindi words and sentences.
Keywords : Speech Signal processing, Hidden Markov Model, Viterbi Algorithm, Perl, Python,
PostGresSQL, MySQL, Sphinx, Kaldi
Tata Institute of Fundamental Research
Project Assistant
Mumbai, India
September 2010 - August 2011
Worked on a speech recognition project that implements a voice interface retrieval using advanced
speech recognition. Developed scripts to train and test large vocabulary continuous sentences
with CMU Sphinx toolbox.
Gennum Corporation India Ltd.(now Semtech)
Digital Design Engineer
Bhubaneswar, India
June 2008 - April 2010
1.Verification of PCIe Express (3rd generation computer peripheral interconnect)controller cores.
2.Verification of USB 3.0 controller cores.
3.Developing device drivers for use with inhouse PCIe and USB3.0 controllers on FPGA boards.
Keywords : VLSI, ModelSim, Specman E, Verilog, Agilent Packet Analyser, Linux Device Driver
Aricent Technologies (Holdings) Ltd.(www.aricent.com)
Software Engineer
Chennai, India
June 2006 - June 2008
1.Development/Testing in Networking/Communications domain using C/C++.
2.Development and testing of functionalities for IPSec module for Lucent Base Station Router
Project.
3.Testing key features in Hitless Redundancy project for Alcatel ISS switch.
Keywords : Switches/Routers, C++, TCP/IP, IPSec

Relevant Course
Work

Conference
Paper

Graduate
Attending Following Currently
Fundamentals of Artificial Intelligence
Speech Science
Java Programming

Cognitive Science
Speech Recognition
Prolog

Linguistics and AI
NLP
Web Information Systems

June 2011 ASR scheme over schemes for transliteration and label set purposes co-authored
with Dr. Samudravijaya K at Annual Conference of Dravidian Linguists, Patiala, Punjab, India.
"http://speech.tifr.res.in/chief/publ/11DLA_asr11transliterationScheme.pdf"

Awards / Honors Academic Honor Scholarship

Merit - based scholarship of 1200INR p.a during undergraduate education from Orissa Mining
Corporation.
Ranked 46th in State Engineering Entrance Examination amongst 0.2 million candidates.
Brand Ambassador for Aricent at National Institute of Technology, Kerala, India.

Project Details

Period
Client/Product
Description

Responsibilities/Tasks

10 Months (June 2006 Apr 2007)

Lucent BSR : Development of IP Backhaul for Base Station
Router.
Lucent Base Station Router (BSR) is a single UMTS network
element that flattens the mobile architecture by collapsing the
NodeB, RNC and SGSN into one single box and thus providing
high-speed packet services.
Ownership of two modules of this project.
Involved in training and induction of freshers into the
project.
Customer interaction and Requirement Analysis.
Writing Feature Specification (Higher/ Lower level) Documents.
Involved in designing, coding and testing of five new features
of the project.

Protocols
Tools/Languages/OS
Period
Client/Product
Description

Responsibilities/Tasks
Protocols
Tools/Languages/OS
Period
Client/Product
Description
Responsibilities/Tasks

Period
Client/Product
Description

Responsibilities/Tasks

Development of scripts for System Testing of the product.

TCP/IP, DNS, DHCP, SNMP, IPSEC, Mobile IP.
C++, Unix, VxWorks, MS Windows 2000/XP, Sun Solaris.
8 Months (May 2007 Feb2008)
Alcatel ISS Switch : Hitless Redundancy in board controller software for Alcatel ISS switch.
Hitless Redundancy is an enhancement feature type project by
which we provide a redundant standby setup of a board(ISAM
NT) in Alcatel ISS switch such that, it can take over all the activities of regulating traffic immediately in case the active ISAM NT
goes down or crashes. The term Hitless is used to refer to the fact
that none of the peers connected to the ISAM notice the switch
since it will take place in sub one second and only minimal of the
protocol and data traffic will be lost in the hardware. In short,
data traffic interruption is minimal as a result of the switch.
Underwent the complete software lifecycle beginning from
design, coding, testing of this feature.
VLAN, Link Aggregation.(Broadcom chipset)
C,
C++,
Unix,
2000/XP,
Sun
Solaris.
2 Months (Mar 2008 Apr 2008)
Port Changes for new board for Alcatel ISS switch.
This project involved changes in the L2/L3 LANX software for
Alcatel ISS switch to handle increase in physical ports from 24 to
28.
Identifying the modules affected by the change, analyzing the impact, design, coding to effect changes that implement the feature.
2 Months (May 2008 June 2008)
Swirl Traffic Generator for client Alcatel.
This board porting project involved changes in the L2/L3 LANX
software for Alcatel ISS switch to make the ordinary switch act
as traffic generator leading to huge cost savings.
Conceptualization of the idea, incorporating the changes and verifying it.

Period
Client/Product
Responsibilities/Tasks

June 2008 - Feb 2009

PCIe controller : Design and verification of 3rd generation computer interconnect. Gennum Technologies India Ltd.
Knowledge of complete ASIC flow which includes RTL design, synthesis, optimization and design flows.
Execution of RTL Simulation and test bench with simulation
tools such as Modelsim6.5, NC Verilog 8.2.
Specify, implement, test, validate and manage regression
tests for standard verification IP.
Experience with mixed-signal IP testing and complex IO
tests.Experience with mixed-signal IP testing and complex
IO tests.
Exposure to cross vendor EDA design flows.

Tools/Languages/OS

Period
Client/Product

FPGA simulation of controller on motherboard with custom

written PCIe device driver in Linux.
Cadence Tool Kit, Xilinx ISE6.3, Verilog, System Verilog, Linux,
Unix.
March 2009 - Feb 2010
USB 3.0 controller : Design and verification. Gennum Technologies India Ltd.

Responsibilities/Tasks
Specification development, RTL/Verilog development, functional verification, synthesis of USB3.0 digital IP.

Tools/Languages/OS

Period
Client/Product
Responsibilities/Tasks

Ensure proper operation of data path and control path operation by performing clean RTL simulation of USB3.0 controller IP integrated with USB3.0 phy IP. Location and removal of errors/bugs in the process.
Cadence Tool Kit, Xilinx ISE6.3, Verilog, System Verilog, Linux,
Unix.
March 2010 - April 2010
SATA device driver Gennum Technologies India Ltd.
FPGA simulation of data path/control path operation of
SATA controller.
Troubleshoot and resolve timing issues by operation of
SATA controller image burnt on FPGA board in conjunction
with a Intel motherboard.

Tools/Languages/OS

Cadence Tool Kit, Xilinx ISE6.3, Verilog, System Verilog, Linux,

Unix.

Undergraduate
Projects

Assembled hardware circuitry for traffic light control wirelessly(Infra Red) using transmission
and receiver IC.
Residual Excited Linear Prediction of Speech and Isolated Word Speech Recognition in Matlab.

Graduate
Projects

Designed an asynchronous single cycle MIPS processor.

Conferences /
Schools

WiSSAP
Guwahati, India
"http://www.iitg.ernet.in/wissap11/"

Jan 8-11, 2011

SYSTOR 2012
IBM Research Centre, Haifa, Israel
June 4-6, 2012
"http://www.research.ibm.com/haifa/conferences/systor2012/index.html"
TCE Conference 2012
Technion, Haifa, Israel
"http://tce.technion.ac.il/tce-conference-2012/"
Skill set
Languages/Scripting: Perl, Python, C shell, C, C++, Java
Hardware: Intel 8086
Hardware Description Language: Verilog, System Verilog, Bluespec
OS : Linux, VxWorks
Compilers: GCC
Protocols: TCP/IP, ARP, RARP, DHCP, IPSEC, PCIExpress, USB3.0

Contact
Information

Plot 776/2556
Radha Krishna Nagar
Garage Square, P.O. Old Town
Bhubaneswar - 751002, India.

References

1. Dr. Samudravijaya K
Scientific Officer
School of Technology and Computer Science
Tata Institute of Fundamental Research
1, Homi Bhabha Road, Colaba
Mumbai - 400005, India.
Email: chief@tifr.res.in
Phone: +919867796685

2. Dr. Ran Ginosar

Associate Professor
Department of Electrical Engineering
Technion
Haifa - 32000, Israel.
Email: ran@ee.technion.ac.il
Phone: +972-528-700-580

3. Rashmiranjan Mohapatra
Engineering Manager
Semtech
Fortune Towers
Bhubaneswar, Odisha, India
Email: rashmiranjan@gmail.com
Phone: +919337522444

June 6-7, 2012