1.

(10 points)True/False Questions

Mark each of the following statements as either (T)rue or (F)alse.
a. ______F______

Different architectures use the same assembly programming language

b. ______T______

A machine with 64 general purpose registers requires 6 bits to encode a register

number

c. ______F______

MIPS instruction formats allow for more compact code.

d. ______F______

In load and store machine, arithmetic operations can operate on data located in
memory

e. ______T______

The MIPS architecture can use any architectural register to store the results of
its test instructions.

f.

With one-address instruction, the accumulator is the only general purpose

register used.

______T______

g. ______T_____

Decreasing response time always improves throughput

h. ______F_____

In the MIPS architecture, the address 0x017D7602 is a valid instruction

address.

i.

______T_____

The instruction set and addressing modes are part of the computers
architecture.

j.

______F_____

Computer organisation describes the physical design of the computer system.

2. (10 points) Essay Questions

a. (3 points) Explain what a load-storearchitecture is
In Load and Store architecture , memory can be only accessed through Load and Store instructions. Other
instructions must use registers as their operands.

b. (4points) Transistors replaced vaccum tubes in the second generation computers. State some of the
advantages that the transistor provided for the computer industry.

Smaller
Cheaper
Less heat dissipation
Solid State device

c. (3 points) Given an instruction set, give three possible ways of improving performance.
Increases in the clock rate
Improvements in processor organization that lower the CPI
Compiler enhancements that lower the instruction count or generate instructions with a lower
CPI

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Computer Architecture

Performance Evaluation
3. (6 points) You know the following about the frequency of instructions in you r favorite application (which
may be a word processor, a spreadsheet, or maybe a database):

ALU
Load-store
Branch & Jump

fi
57%
33%
10%

CPIi
4
6
5

a. (3 points) Compute the average CPI for your application

CPI = 0.57*4+0.33*6+5*0.1 = 4.76
b. (3 points) Compute the MIPS ratings for your machine using the above table; assume a clock rate
of 200MHz

MIPS = # instruction /# seconds *10^6 = (# cycles / # seconds) /((#cycles /#instructions) * 10^6)

MIPS = clock rate /(CPI) * 10^6 = 200*10^6 /(4.76 * 10^6) = 42.11 MIPS

4. (8 points) We are interested in two implementations of a machine, one with and one without special
floating-point hardware.
Consider a program, P, with the following mix of operations:
Floating-point multiply
Floating-point add
Floating-point divide
Integer Instructions

10 %
15 %
5%
70 %

Machine MFP (Machine with Floating Point) has floating-point hardware and can therefore implement the
floating-point operations directly. It requires the following number of clock cycles for each instruction
class:
Floating-point multiply
Floating-point add
Floating-point divide
Integer instructions

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Computer Architecture

6
4
20
2

Machine MNFP (Machine with No Floating Point) has no floating-point hardware and so must emulate the
floating-point operations using integer instructions. The integer instructions all take 2 clock cycles each.
The number of integer instructions needed to implement each of the floating point operations is as follows:
Floating point multiply
Floating point add
Floating point divide

30
20
50

Both machines have a clock rate of 1000 MHz. Find the native MIPS ratings for both machines.
CPI for MFP = 0.1*6 + 0.15*4 + 0.05*20 + 0.7*2 = 3.6
CPI for MNFP = 2 (All floating-point instructions have been replaced by integer instructions.)
MIPS rating for MFP = 1000/3.6 = 278 MIPS
MIPS rating for MNFP = 1000/2 = 500 MIPS

MIPS Assembly Language

5. (10 points) Add comments to the following MIPS code and describe in one sentence what it
computes.Assume that $a0 is used for the input and initially contains n, a positive integer. Assume that
$v0 is used for the output.
begin:
loop:

finish:

addi $t0, $0, 0

____________________________________________

addi $t1, $0, 1

____________________________________________

slt $t2, $a0, $t1

____________________________________________

bne $t2, $0, finish

____________________________________________

add $t0, $t0, $t1

____________________________________________

addi $t1, $t1, 2

____________________________________________

j loop

____________________________________________

add $v0, $t0, $0

____________________________________________

___________________________________________________________________________
___________________________________________________________________________
___________________________________________________________________________

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Computer Architecture

6. (10 points) Execute the following MIPS code fragment, showing the changes that occur in the register file
and in memory. You only need to show the changes
addi

$1,$0,0x01

lw

$2,0x08($2)

add

$4,$1,$2

sw

$2, 0($3)

be

$3,$4, loop

Is the branch taken? (circle one)

YES

NO

BEFORE
REGISTERS
$0 _______ 0x00
$1 _______ 0x14
$2 _______ 0x20
$3 _______ 0x20
$4 _____ 0x1234

MEMORY
0x20 ______ 0x10
0x24 ______ 0x30
0x28 ______ 0x1F
0x2C ______ 0x50
0x30 ______ 0x60

AFTER
REGISTERS
$0 ____________
$1 ______0x01__
$2 ______0x1F__
$3 ____________
$4 ______0x20__

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MEMORY
0x20 _______0x1F_
0x24 __________
0x28 __________
0x2C __________
0x30 __________

Computer Architecture

7. (12 points) The following MIPS exercises are multiple choice types. Choose your answer among the A, B,
C, D answers provided
1

# what will be the value in $t2#

lw $t0, num1
lw $t1, num2
add $t2, $t1, $t0
.data
.word 11
.word 59

A
B
C
D

num1:
num2:
11
59
29
70

# what will be the value in t3 in decimal

lw $t0, num1
lw $t1, num2
mul $t3, $t1, $t0
.data
.word 4
.word 0x1E4

A
B
C
D

num1:
num2:
784
1452
1936
121

# what will be the value in t2 in decimal

li $t0, 0x31
li $t1, 0x41
add $t2, $t1, $t0

A
B
C
D

114
72
113
97

# what will be the value in t2 in decimal

li $t0, '9'
li $t1, 0xf
sub $t2, $t0, $t1

A
B
C
D

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82
72
8
74

Computer Architecture

# puts ASCII of 9 in $t0

8. (5 points) Show the binary equivalent of the following MIPS instructions by filling in the space provided
below (all registers are specified using their register number $0-$31). Also mark the boundaries between
the fields (e.g., opcode, etc.) and show the names of the fields.
and $5, $6, $7
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9

9. (5 points) Replace the C code for.

a[12] = b[12] - a[11]
by a set of equivalent MIPS instructions, using as few instructions as possible. Assume the staring
addresses for arrays a and b are stored in registers $4 and $5, respectively.
lw
lw
sub
sw

$6, 48($5)
$7, 44($4)
$7, $6, $7
$7, 48($4)

#load b[12] into $6

#load a[11] into $7
#$7 = b[12] - a[11]
#store $7 to a[12]

10. (10 points) Matching game

a.
b.
c.
d.
e.
f.
g.
h.
i.
j.
k.
l.

User CPU time

Throughput
Execution Time
Structure
Function
8080
80486
ISR
ACK
Clock
Address Bus
Synchronous timing

On the left side, write the letter corresponding to the word that best fits the definition to the right. Not
all words will be used. (1 point each))
a
b
c
d
e
f
g
h
i
j

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Time spent executing the lines of code that are inour program
The total amount of work done in a given time
The time between the start and completion of a task
the way in which components relate to each other
the operation of individual components
first general purpose microprocessor
First Intel microprocessor to include numerical coprocessor and cache
Executed following an interrupt
indicates that data have been accepted from or placed on the bus
used to synchronize operations

Computer Architecture

11. (6 points) Consider the following hypothetical CPU. Instructions and data are 16 bits long. The opcode is
4 bit wide and the address is 12 bit wide as shown below.
0
3
Opcode

15
Address

The CPU has five instructions of 4-bit long:

0001: Load AC from memory
0010: Store AC to memory
0101: Add to AC from memory
0110: Subtract memory from AC
0111: Subtract AC from memory
Assume that the current PC has 300H in it. Some relevant memory contents are shown in the table
below. For the instructions at 300-303H, show the contents of PC, AC and MAR at the end of each
instruction. Finally, show any changes made to the memory after the four instructions. Show the
changes by overwriting them in the memory table. Note that all the data in the memory table are in
hexadecimal.
Address Data
300
301
302
303

1800
7802
2801
2800

800
801
802
803

0004
0003
0006
0001

Instruction @300

Instruction @301

PC

PC

AC

AC

MAR

MAR
Instruction @302

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Instruction @303

PC

PC

AC

AC

MAR

MAR

Computer Architecture

12. (8 points) Consider a hypothetical CPU with 32-bit address and 32-bit data. Its 32-bit instructions are
divided into 8-bit opcode and 24-bit operand fields. (20 pts)
a. How many different opcodes can the CPU support? 256

b. How many address locations can the CPU support? 2^24

c. What is the maximum amount of directly accessible memory in bytes?2^26

d. Assume that the CPU and 32-bit main memory (i.e. each memory location contains 32 bits of data)
are connected by 32-bit data bus running at 100MHz. Assume that one data transfer takes 5 bus
cycles. What is the maximum amount of data that can be transferred between the CPU and the
memory in one second? 80 Meg bytes/sec

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Computer Architecture

MIPS Instructions
These are some of the most common MIPS instructions and pseudo-instructions
Category

Arithmetic

DataTransfer

Branch

Set
Jump
Logical

Example
add $t0, $t1, $t2
sub $t0, $t1, $t2
addi $t0, $t1, 100
mul $t0, $t1, $t2
move $t0, $t1
li $t0, 100
la $a0, addr
lw $t0, 100($t1)
sw $t0, 100($t1)
lb $t4, ($t0)
beq $t0, $t1, Label
bne $t0, $t1, Label
bge $t0, $t1, Label
bgt $t0, $t1, Label
ble $t0, $t1, Label
blt $t0, $t1, Label
slt $t0, $t1, $t2
slti $t0, $t1, 100
j Label
jr $ra
jal Label
srl $t0, $t1, 4
sll $t0, $t1, 4

Meaning
$t0 = $t1 + $t2
$t0 = $t1 - $t2
$t0 = $t1 + 100
$t0 = $t1 * $t2
$t0 = $t1
$t0 = 100
$a0=addr
$t0 = Mem[100 + $t1]
Mem[100 + $t1] = $t0
$t4=Mem[$t0] (byte load)
if ($t0 == $t1) go to Label
if ($t0 != $t1) go to Label
if ($t0 >= $t1) go to Label
if ($t0 > $t1) go to Label
if ($t0 <= $t1) go to Label
if ($t0 < $t1) go to Label
if ($t1 < $t2) then $t0 = 1; else $t0 = 0
if ($t1 < 100) then $t0 = 1; else $t0 = 0
go to Label
go to address in $ra
$ra = PC + 4; go to Label
$t0=$t1>>4
$t0=$t1<<4

SPIM provides a small set of 10 operating-system-like services through the system call (syscall)
instruction. To request a service, a program loads the system call code, into register $v0 and the
arguments into registers $a0$a3 (or $f12 for floating point values). System calls that return values put
their result in register $v0 (or $f0 for floating point results).

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Computer Architecture