ulcnoPnocffffrlilonmD[.

IEuTrLS
,

sEttll[.an,
lfonrBoor
A SSORTCOT'NSE
rcR
SCIEilTI{NS AITDE[I[}I[EERS

Br
BAJUOND
!I. BEIWEST
II{D
DR. JOgEPHB. BGS

flEruClu NTS8IN'TE
FCR
PBOFEfISIOI{IL EDUCAIION

C.ER}IDOIE
BUIIDI}IG
nrr.rgFrqt RD.

uaDxso[,N. J.

o7gb0

PREFACE

As in learnJng to drlve a car, a nl,croprocessor nust be pnactlced

rLth.

Iou cqnot really

alone.

Sls

leara how tp use @e frm

course i.nclndes a ntcrocoqruter

just read,i.rngbooks

and nore lnfornatLon tlran

can be covered in a tbree-day senlnari because lt .l.s the autborst

purpose to glve yor suffLcient
lurdrare
hrFpea if

background, rsrlttea.naterlal,

to be able to des{gn a nLcroccnputer systen.

the student does Dot strrdy ALL ttre lnfornatLon

course ald bulLd rry a systen using tbe lf,il-l,

and

BUT THIS C4$Rgl

gLven rrltb the

COUNSEOUTLINE

1-1

RElDIlKt .{$S]I}ilMESITS

2-L

EXPENI!,TENTS

g[P. #t
EIP. #z
ETP. lf3
ETP. #b
EXP. #5
E]F. #6

3-1
3-3
3-5
3-8
3-9
3-lo

DEVTCES
rcGIC AI{DINTERT'ACE
B.SSTC
IPGIC
T. TOil-I}II'ENTINC BT'FFEN
II.
II{VERTSE BUffER
rI[.
.$ID SAIE
rT. $al{D GelS
V. ORGITE
VI. NORGAE
VTI. EXCU'SIYE-OR
GAIE
VIT[. EXCLTfiiIYE-ITO8
GAIE
OF IOW-IRI,EI'GIC
IX. DrSC'USSrOil

lr.1-8
lr.1-8

ruIP-EIOPS
I. R-S LAICH
R-S TLIP-fLOP
II.
D-fNE TLIP-FIPP
I[I.
IY. J-tr ITPE ELIP-FIOP
V. T-TIPE FLIP-EIOP

lr.2-L
b.2-L
b;2-2
L.2-2
I+.2-2

DECODERS,/DWT'LTIPIJAXENS

lr.3-1

LTIPI,&TffiS
A{CODERSATIJ

b.h-1

I}MffiFACE DE\IICES
OPEI{-COIJ,ESTOR
IOGIC
T?I-ST&TE IPGTC
BUS TRANSCEIVERS

h.5-1
\.5-2
b.5-lr

L.1-1

b.r-2
lr.1-2
b.1-3
lr.l.-lr
b.L-5
b.1-6

u.L-7

AlIltTZIilG SONilNJEE
PROBIE!{S

5.o

SIIE SOFI'lflnE DESIGNPROCEDIIRE

5-t

INTO TUUCTIONAI'
5. 2 STEP2: P.0BTIIIO$THEPROBLEI!

5-z
5-e

5. 3 Slm 3;

5-tz

5. L SfEP 1:

DEFINEltIE PA0BLEU
BIOCKS

.0IEOBITHUDETEIOP!{E!$?
Il]R EACHPTRTITIOII

(comnlurD)
PRoBIEI'Is
.lxttrzrNc soFlw^[RE
5.\

OBJECTTVES
TO FIOT'CHTBTS

5-n

5.5

PBOCEDURES
ArtER AICORT$IU DE\IEIOP!.IENT

5-22

QIIESTIONS

5-23

DEsrGu
tm ilnomng,/sorrliltRr tpPRoAcET0 I'frcRoccn-tnngR
II{IRODUCTION

6-L

5.1

6-2

COST
HIRDWARE

6.1.1
6.L.2

STSTEMSFEED
DIn{OBI BEQUTBEI'{EIIIS

6.L.3 Vo nregmB@NTS

5.1.1r PERIPEER.AL
DEVICES
6J.5 DEYICESTIPPORT
6.L.6 tflcRoPnocEsgoREfiDi{tRE
SEI^ECTIO}T
St'MM.Off
6.2

SOTffARECOSTB

6-2
6-3
6-5
6-7
6-7
6-9
6-9

6.2.L

ORG.0IITZATIOI{
PROCESSOn

6.2.2 PRSBAI'f-slBucrItnE
6.2.3 rI{PIAMENTAIIoN
r,JuWiU&E

6.3 sf,sr$-fcosrs
6.3.L DEVELoP!NT
cosrs

cosrs
6.3.2 MoDrrrclrroN
6,3.3

C6lS
!4.[IUTEN.0]ICE

6-10
6-11
6-II
6-L2
6-L2
6-r3
6-1I

6.h

oN C6TS
A PERSPECTTVE

6-L5

6.5

TBADrlteoFF sort'r{tRE ANDgtRD[ilaRE

6-L6

6.9.L
6.5.2

oOIIDITIONS
WIIICHLEADTO
DESIOI{1n'.CDE
OI'FS
STS1EUSFEEDPROBIJ!{S

6.5.3 srsluM cosr PRoBLEl.ts

6.6 EenDt,t&E
sFEmtn.{DEotr'rs

6.6.L pRocE$sons
txD ltEl.loRrns
6.6.2
6.6.3
6.6.b
6.6.5
6.7

I}ECODE
I'GIC
I{BORI ilITFEBS
SPEcI.ILIZEDI!{TEBTAcEDETICEI
D{IERRUPIS

SOFmAnErRtDE OmS

6.7.1. FRMRA}T
IOOPSAI{DSUBROTNINES

6-L6

6-n
6-A
6-2L
5-2J
622
622
623

6-U

6-25
6-25

6.7.2
6.7.3
5.8

FI'NCTIOIIAL
COUpUTATIOTS
BEPEAfEDCOUpUUIIoNS

6-26
6-27
6-27

$ruM.oR:r

RT,PNESEMTIIG
BI}IINT DAIA

7-L

NI'MBERSTSTEUCO}MERSIOI{S
DECIilAL TO BIT.ABT
BIS.OBTrc DECIUAL
DECIUALTO OCTAL
OCTEITO DECII{AL
DECII{ALTO HEIADECII.IAL
HEX.CDECII.'IL
fO DECI}{AL

coNvmslous

OC:TII TO BI}IABI,
HEI.qDECIUAL
TO BII{rff,
.OCIIL TO HEI.ADECII{AL;
fiO BACK
BCDmnAEnS

8-1
8-1
8-3
8-3

&L
8-5
8-5

9-L

BII{IRI IIRICTIOI{S

10-1

BIUARTARITHMETIC
IPGIC INSIRUCTIOTS
^OIID
11.1

CoUPUTER
.0RI$IME?ICII{SmUctIOilS

L1.1.1
IL.I.z
rL.2

NO4ATIO}I
tldo'S COUPI,EMENT
BINANI .0RIITIUEEIC

COUpUmnrtrrc

TNSTRUCTiOUS

TT.2.2 IOGIC COMPTE}IENT

JJ.z.? IOGIC .E}ID
1L.2.3 IOOIC0R
Il.z.lr
IOOIC XOR

Ll-1

u-1
u-3
\-5
tL-5
11-6
L1-6
IL-7

TPPESpICES
l.

UODITIED55OOOP CODET.{BI,E

B.

KIU INFOR}TIfIOII

A-1

IIU PNGil}T DATASNEET

B-1

rIil

B-2

BIPCK DIII}BA}T

KIU INTER,FACIT{G
DATASHET

B-3

KIM MONITOR IMPORTANTADDRESSES

C.

COLLECTEDKIM SOFTWARE
DIS P LA Y ROUTINE
DIRECTORY
VU TAPE
SUPERTAPE
TAPE DUPE
MOV E-A -B LOCK
HEX DUMP
FRE QUE NCY
COUNT E R
A NA LOGTO DIGITAL CO NV E RS I O NDE MO
RE A L-TIME CLOCK
TIT,IER
HEDEC
B INA RY MULTIP LIC A T I O N A ND DI V I S I O N
16 B rT S QUA RERO O T
LUNAR LANDER
HORSE RACE
ONE-ARMEDBANDIT
KIMMAZE
MUS IC MA CHINE
HUNT THE WUMPUS

D.

B- 4

c- 1
c- 2
c- 3
c- 4
t.-/

c-8
c-10
c-11
c-13
C-L 4

c-15
c- 16
C-L 7

c-22
c-23
c- 26
c-27
c- 28
c-31

c- s3

KIM DEMONSTMTIONTAPE
INDE X
PROGRAMHEX DUMPS

D- 1
D- 2

E . SPECIA L A P P TICA TIONS

E IGHT B IT A TO D CO NV E RS I O N
MULTICHANNELANALOG INTERFACE
F.

KIM /6s00

E -1
E -3

INFORMA TIONSO URCE S

KIM SOFTWARESOURCES
65OO MICROP ROCE S S OSRUP P T I E RS
G.

GENERALREFERENCEINFORMATION

H.

TTt REFERENCESHEETS

I.

MOS TECHNOLOGYDATA SHEETS

J.

MI CROCOMPUTER
B IBt IOGRAPHY

K.

GLOSSARYOF COMMONLY
USED TERMS

F- 1
F- 5

3Nt1In0ltsunoc

MI CROPROCESS
I NG FUNDAMENTALS
CO URS EO UT L I NE
FIRS T DA Y
I.

II.

III.
IV.

Introduction
to Micro p ro c e s s o rs
A . Hardware
B . S oftware
C. Nurnber systems

a n d Mic ro c o mp u t e rs

Operating a Typical Mic ro c o rn p u t e r:

T h e K I M-1
A . E xanining and n o d if y in g
me mo ry
B . Loading and runn in g s a mp le p ro g ra ms
C. Using the K IM a u d io c a s s e t t e s y s t e n
D. Using the single s t e p mo d e
E xperinent

1:

Loa d in g

a n d Ru n n in g a S in p le

Microc.omputer A rchi t e c t u re
a n d E le n e n t a ry
A . S inplifi-ed
CP U mo d e l
B . Data, address, a n d c o n t ro l
buses
C. Memory and I/O a d d re s s in g
D. The K IM monitor
E . A selected subs e t o f in s t ru c t i-o n s

P ro g ra m

P ro g ra rn n in g

V. Programming E xamples
A . P arallel
data in p u t a n d o u t p u t
B . Use of the K IM-1 k e y b o a rd a n d d is p la y
VI.

E xperinent

2:

P aralle l

Da t a I n p u t

and Output

SECONDDAY
I. In terfacing
Microconpu t e rs
t o E x t e rn a l De v ic e s
A . Using programma b le I / O lin e s f o r d e v ic e c o n t ro l
B . Device control
s o f t wa re t e c h n iq u e s
C. Common interface
d e v ic e s
D. A nalog input and o u t p u t t e c h n iq u e s
II.
III.

E xperiment

3: Contr o llin g

E x t e rn a l

Further S oftware
A . Flags and condi t io n a l
b ra n c h e s
B . Counting and tirn in g lo o p s

1- 1

De v ic e s

THIRD DAY
I.

II.

III.

Adva nced S oftware

A. B inary and decimal a rit h rn e t ic
B. Indexed addressing
C . Indirect
addressing
In terval
Timersi and In t e rru p t s
A. Using an interval
t ime r f o r t ime d e la y s
B. The 6502 interrupt
system
C. Interval
tiner
trigg e re d
in t e rru p t s
D . fnterrupt
application s
Experinents

5 and 6:

Us in g

the

I n t e rv a l

IV.

Data Input and O u t p u t

Se r ial
A. The K IM-1 serial
T/O system
B. 20 rnA current
loop a n d RS -2 3 2 in t e rf a c e s
C . The A S CII code
D. K IM monitor,routines
f o r s e ria l
I/0

IV.

Fur ther

Topics

as Reque s t e d

L- 2

T ime r

a n d I n t e rrup t s

SINInN0|SSV
oNtovitu

P.EADII'IG ASSfGI!,IENTS

Ii
rith

is -.rirtua]]lr inrpossibla to reaci a.}l ihe r+rltten materia]

this

colrrse j-n the tno nights

This rnaterial
of expertise

during wir-ich the course is given.

is given with the course to facilitate

O!fLYcover the two nights of the course.

and understanding,

PIRST NIGHT

seninar.

belos are tr-ighly recornnended in order

to receive the most from the next dayrs lecture.

infor:nation

a hi.gher level

than can be presented or absorbed in a three-day

lhe readi-ng assignnents llsted

given

These assignraents

&ead these assignnents for

NOTFORDETAILEDknowledge.

KII'I-I USEP,
MAi{tJAT

HANDWARE
MANUAI

PRGRA},I
M..INUAT

SEMINAR
WORKBOOK

Chapter 1
Sections
2.1 thru 2 . lr
Chapter l
Section h.1
Chapter I

Sections
1.0 ttru

Chapter
Chapter

Basic Logic
Interf ace
Devices

l_

1.2, r.J.1,
L.3.3 t
1.)+ thru
1.L.1.2.L

SECOT.ID
NIOHT

Sections
1 . 3 . 2 t h ru

Glossary of
Cornmon?erms

Chapters
^!/U-

JtU t> tor(

Section
11.3 r
11"3.1
Appendix H

1^^/

L.).2.O

1.5 thru
./l

.,L.Oo4.J

A5"TERCOMPIETIONOF T}IE SE}"ID[AR:

You should reread aIL the reading assigrunents FORDETAILEDIOIOh|LEDGE.
Ttrere are many sections

of the KIM-I USERl,lAMrAl, H.ARDWIREAI{D PROGRA},I

M4NUALS,that were not made reading assigrunents.

that

they are wtimportant

or not relevant.

made a basic understandiag for

tbe lecture

FOR.DEf,AILEDIC{O"{LEEEthe entire
You will

firrd

all

the jaforrnation

extremely useful.

2-r

this

D0ES NOt MEAI{

The reading assignnents were

materia^L.

You should reari

set of manuals anci the SB{!\AR WORKBOOK.

in the W0RKB00K,highly

eondensed and

sINStUtUrdXS

, {,

KIM EXPERIMENTS

WARNING:

Your KI}I-I

EXPERII,IEM 1

experinental

set-up

operates

Loadi.og and Rrmning a Sinple

on 1ow voltage

on1y.

Progran

1. KIM-I Ini.tializarion:
Tura oa 5V power.
Press the RS key (reset).
e''d show some ramdom hex nutbers.
light

The display

should

2. Address Selectlon:
Press AD to put ICIM ln address entry uode (address entry mode ls
autonatically
seJ-ected after reset).
Enter 0000 oo the keyboard.
Obsexive the dl-splay see 0000 tn the left
You are
four digLts.
looklug at locacloa 0000 in the KIM-I read/wrlt@ ulrtrorlr Ttre
Wtrat are the
rlght
two dlgits
show the contents of thls Iocat,lon.
Coatlnue pressing
cootents?
Look at the next location
by presslag *.
* to see what aumbers are 1a your DeEory after
system start uP.
Do you see a pattera
01001 0200t
Go to locatlons
to the ouubers?
you
readlwxLte
0300, 0800, etc. and note the nunbers
KIM
flad.
meaory rauges froa 0000 to 03I1F. I{hat utlrabers are found ln locatl-oos
whgre there is oo physlcal uenory?
3. Data Eatry:
Go to address O0OO. Put KIII into the data entry node by pressJng the
To go co the
DA key.
Press varLous keye and obsenre the display,
aext address, press *.
For practLce enter the followLng data lnto
the KIM-I memory:
address

data

0000
0001
0002
0003

00
01
02
03

Ttre * key alJ.ows you to lncrenent the address Ln either the AD or

DA mode. Eow do you go to a lower address or to a much hlgher
address?' You must retura to the address mode and key la the new
address theo contlnue data entry in the DA node.
4. Load{ng a Carned prograu:
Enter the progrrnt a8 lleted on the codl-ng eheet folJ.owtng this page.
This prograo w111 cycle through the meuory and dlsplay the conteuts
of each locatlon.
For uore lnforuatlon
consult the prograo aoces
in your literature
package

3-1

PROGRAM: EPERIMENT 1 - Display

Routine

MrcRopRocE S S oR coDI NG S HE E T
I"ABEL

ADDRESS OP CODE MNEMONIC

0000

A2

0001

04

0042

8A

0003

48

0004

A9

0005

62

0006

8D

0007

47

0008

L7

0009

20

000A

t9

0008

1F

000c

2c

000D

47

0008

L7

000F

L0

0010

F8

0011

68

0012

AA

0013

ca,

o014

DO

0015

EC

00L6

E6

0017

rA

0018

DO

0019

E6

001A

E6

0018

FB

001C

DO

00lD

E2

GENERAL COMMENTS1

3-2

COI&i1I{TS

PAGE

oF

5. Progr:m Execut.ion:
Go to the beginning of rhe progrrTq using rhe AD mode (address 0000).
Press the G key.
The address display will count up and the data
display will show the contents of each memory location.
To stop
the program and return t.o the KrM monitor,
press RS. This program
is written
as a loop and will run forever.

6. Opti.onal- Experiment:
select one of the game programs in the lj.terature
package and load
and run i.t.
Lunar Lander, Horserace, and Kj.maze are reasonably short.

ilGERII(ENT 2

Parallel

Dara Inpur

and Output

1. Prepare Experlmental Equipnreut:

Locate the SK-10 breadboarding socket and the LR-25 module.
Plug
the LR-25 into the SK-10 socket so that it is oriented as shown in
the drawing be1ow. Insert the flat
cable plug 1n the center of the
SK-10 as shown. The flat cable should enter the plug fron the side
away from you.
This will put pin 1 on the front left
Connect
side.
the black lead (GNn) to the GND ter-rninal on the LR-25.
Connect the
red lead (+5V) ro the +5 LR-25 rerrinal.

(red )
(black)

Experlmental

tr f'L

J rt < :-' '*.}-.uo''l S

l -t
wl

3-3

Breadboard

.i t{st:i f

pi ,Jt{

i )6.r

+r{f

-;,.0t-

Use 8 w-ires to cormect the KIM PA output

indicators
on the LR-25.
Connect:
pAO
pAL
pA2
pA3
pA4
pA5
pA6
pA7

=
=
=
=
=
=
=
=

piu
pin
pin
pln
pin
pin
pin
pia

9
10
1l
J.2
13
14
15
16

to
to
to
to
ro
to
ro
to

lines

IA
IB
IC
ID
IE
IF
IG
IE

Use 6 sires
to connect the KIM PB ioput/output
switches and pulsers on the LR-25.
Connect:
pBQ =
pB1 =
pBZ =
pB3 =
pB4 =
pB5 =
ac
PB7

pin
ptn
pin
pin
pin
pi:r
pin
plu

I
2
3
4
5
5
7
8

to the I LED

to SA
ro SB
to SC
to SD
ro pt (0)
ro p2 (0)
used in interrupt
ro 61[D

llnes

to the

e:cp.

2. Eight Blt ParalJ-el Output:

Establish
the
the eight PA lines as OUIPUT LINES by storiag
aumber $I"F fu the PA data direction
register
at locatloa
Now use the
Use the KIM-1 keyboard to do thls.
$1701.
KIM-1 keyboard to write various hex oumbers into the output
register
and observe the effect
oo the I LED lndicators.
=
press
Go to address$1700
PAD,
DA, then press hex keys.
You wllL see the blnary represenLatiou
of the hex anrnbers
shown in the data di.splay.
registers
to
Note:
Ttre RS key resets the data direction
$00 = INPUT, so you must reenter the $Ff io $1701 each time
you use RS.
3. Parallel
Input From ExternaL Swltches:
Establish
PBO - PB7 as INPUT by storLng $00 in the PB data
direction
register
at locatlon
$1703. Remeruberthat this
ls done automaticalJ.y
by the RS key.
Use the KIM-L keyboard
to look at the conteats of the PB data register
at locatioo
0perate
the
exteroal
switches
and
obserrze
the effect
$L702.
ou the memory contents.
4. Nr.rnerical Input frou the KilFl
Keyboard:
The KI!1-1 keyboard is scanned by a software routlne.
If no key
ls pressed the routlne returns wlth $15 1n the accrnulator.
If
a key ls pressed, the routlne
returns with the hex key code ln the
program ca1ls the keyboard lnput
accumulator.
The followlng
routloe
aad transfers
the contents of the accumulator to the
PA output port.
This will
enable you to see the key codes on
the 8 LED iadicators.

)-4

Keyboard Input Test, Program

0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
000A'

.. ,,i*

D8
M
I'F
8E
01
17
20
64
1F
8D
00

CLD
LDX//
$FF
STX@
$01
$17
JSR@
$6A
$1F
STAC
$00

set binary mode

estabLish PA as out

call

keyboard input routine

send contents of A out to PA

oooB 17 $rz

J-oop back for more data

,r000c 4c JMPG
-, b*000D
06
Tr
$06
*
^.,Q.,
\ o00E o0 $oo
.,'iYt
)
To run thls prograu, go co addrees $0000, Ehea press G. Ttre
display wiJ-l go dark because lt is :rot used by this program.
5. Prograro Output to the KIM-J. Dfsplay:
The KIM-1 display
is a softnare
drlven multip3.exed seven segnent
display.
We are going to use the dlsplay
to output hex nr.rmbers,
Three Eexoory locatioos
by
hold the nuobers which are displayed
the dlsplay routlne.
Ttre leftmoet two diglts
are stored ln
two ln $00tr'9. To
$0088, the niddle th'o 1n $00FA, the right
display a number, we must store lt t4 the approprlate
locatlon
and then call the display
ls
routlne.
If a contiauous dlsplay
you must include the call instruction
desired,
in a loop so that
prograrn displays
i.t is repeatedly
executed.
The following
0L0203 oa the KIM-I dlsplay.
Display

Output Test Program

000F
00L0
001L
0012
0013
0014
0015
0016
0017
0018

49
01
8D
IB
00
A'9
02
8D
FA
00
A9
100L9
. I 001A 03
{n I 00tB 8D

LDLII
$01
STA@
$TN
$00
LDA#
$02
STA@
$FA
$00
LDAI/I
$03
STA@

load first
store lt

number
ln left

display

load second nr.rmber

store it
load thlrd
store lt

dispJ-ay

in niddle
nr.rober
1rr rlght

dtsplay

I 001c I.9 $r9

[ooro

00

$00

I 0018 20 JSR@
' 001F lF $rr
lF $rr
-*'0920
'0 0 2 L 4C JMPG
lE
v''r
^i *,-'O022
oo23 00

call

dlsplay

routine

loop back to call

$18
$00

3-5

routlne

agaln

Note that
begtnnfug
Prograo.

thls progrrn staree ee $00*1i" Gc che prograB

'Pr*ss RS te st6F the
aod run the pragr.aa"

project,
you rnright like
As a final
to 1lnk the keyboard
eatry program with the display
outpr.tt progrso so that the
hex key codes are displayed
in the righE hand displays.
Eow would the prognms given need to be nodifled?
Try
it and see what you can do.

EXPERIMENT3

'

"

Cootrolliag

ExternaL

Deviees

1. Single Step Exeeutlon of Programs:

Ihe KIM single step function
feature.
uses the NMI interrupt
you nust load
In order to actj.vate the slngle step futrctlon,
the proper address into the II}fI vector locatioas.
This is
doue by stoting
$l"7F"Eand $1C tn location
$00 lu location
Ooce this vector has beea loaded the ST key can be
$17E8.
used to stop a program and returu
Lo the KIM monitor.
You are aow ready to try the single ste:, fr.rnctloa"
Load
a progrilm and set the address to poiat lo the progran start
Switch the keyboard switch to liSorr. Press G
location.
and one lnstructlon
vilL be executei.
I{hile in ghe SS eode
the data display will only show the first
byte of each lnst,cuction.
I,lhlle ln the SS mode, you can use the AD and DA modes to exanlne
and nodlfy ey memory l-ocatlon.
T1'rePC key w111 recall
the
progrErn counter vaLue for the next iastructlon
to be executed.
are stored in memory
After each i.nstruction,
the CPU registers
where they can be examlned or nodi.fLed,
this g*ves you the
Eeaas of checking program execution or nodifiyLng
register
vaLues between steps.
Memory locatlons
f,or regl.ster storage
are:
OOEF PCL
00F0 .p6H
(P)
00FL status reglster
(S)
pointer
00F2 stack
(A)
00F3 acetrmul"ator
(Y)
00F4 Lndex register
(X)
00F5 index register
2. We are norr going ge r'nrm:giae that our KIM-I Ls connected to an
experlmental
apparatus.
The devlces to be cont'dolled are hooked
(used agaln as output).
0f course we
to the elght PA llnes
polrer drlvers
devlcee
will
and Lnterface
have to use appropriate
We
to convert the TTL output slgnals
to whatever is needed.
w111 al.so have several feedback slgnals
to feed lnto our KIM-I.
Ttrese are considered to be si"pLe contact closures aad are
connected to the PB Lines whlch wtll
be prograuned ae lnputs.
aesignments
and their
laput/output
The devlces to be controlLed
are showu in the following
schemati-c:

3-6

,,

LEVEL lir (1)

lEl'tP nI
\r ,/
DRAIN cL (0)
EEAT oN
START
STOP

DNT
'.AFFFF

3
f

( 1)
( 1)
( 0)

Nc

AGITAIOR
FILLii2
FILL#1
DMIN VALVE

Let SA = Level,
P2 = Stop.

A],ARIY

6 ItE.\TrR

4 nne

SB = Teup., SC = Drain,

SD = Ileat,

Pl = Start,

3. We are now going to use the logical

i.nstructions
OR and AI.ID
to turn individual
devices on and off.
Load che following
progrr{ and single step through 1t so you can see the effect
of each instruction
on the output LEDrs which represenL the
actual devices.
NoEe that you wiLl have to look uP your own
op codes.
Device Control Program

0000 A1 LDA/I $rr

eshblish PA as output
2 vu SlAe $IioL
5
7
A
D
F
12

,l

"ir
\
r^rU

\v
|t

,-

.,

,l

j
l

tt\

tDA/l
STAG
LDAG
oM/l
STAG
LDAG

LD
2L
24
26
29
2C
2E

all

O c ' -'

(^i/1t \ (\v --

devices

$00
$1700
$1700 get outPut status
turn on coffee pot
$40
$1700
$1700 set status

^p onail* +o*i i"t

,"15'""-tsb
sTA.9*-JfZoU
,t-17
-1A ep
r_ lF

A{
g*
Arr
{81
Se

turn off

, - ,,r '

( , ;o "
:.

li

t,.

ft'

t ,i:
I;-

bn ptni!r*

li)

aD LDA@ $1702 get iupuE status -*

h? AbID/l $04
check state of drain valve
Ds glrgr $F9
if drain is open, loop back and check agai.n
A? LDAG $L700 ger srarus
s? 0RA// $08 drain ls closed so start EL].L lll
F;. SreG $1700
r:'li LDAG $1700 get status
sX AIID/I $f7
turn off ELL]- llL
$? STAG $1700
4,C JMP@ $1C4F
etc.

As you run through the progiV.n, turn switch SC on and off

havi.ng the drain valve open and closed.
Program termination:

co si,uulate

ff you want to have a program run just oncer You must end it
This can be
to the KIM monitor.
with a command to return
your Program with:
JMP@ $1C4f'.
done by terminating

.l

3-7

D\
.j:,

\D
oo

-'

E)(PERIMENT4

Countlng

and T{rn{ng Loops

1. Counting Loops:
The following
example shows how to set up a cotrnter (bere the
X register)
to a1low executioa of a progta'n segnent for some
preselected nunber of tlmes.
We eould Just as easily used the
accumulator,
the Y register
or any r/w moory locatiou
as a
couDter.

Counting Loop Prograo Example

COUNT
LOOP
DONE

LI)A#
srA@
tDA/l
srAG
LDX/
INCG
DEX
BNEr
JMPG

establish PA aa output
$l'f
$1701
turn off all LED's
$00
$1700
SOe load cormter wLrh 10,
^
$1700 iocremeat rhe ourpurrflort
decrement the cor:nter
LoOP if cor"rater not zera. jr:mp to loop
$1C4F return ro rhe moniror

Rr:n thls program in the SS node and at fu11 speed.

count value and observe the result.
2.

f { m ing

Change the

Loops:

lrr the KIM-I system are tioed by the crystal

clock
. A11 operations
oscillator
operatlng at a nominal 1.000 MIIz. The osclllator
ls
quite stable,
but nay not be exactly L MEz slnce that would requlre
g{m{4g, check your
a nore experisive crystal.
If you need preclss.
osclllator
with a good frequeucy cornrter. Each instruction
requires
a specific
nr:mber of clock eycles for lts executlon.
Ttrus progrrn
segmeots and J-oops can be used to produce very preclse tlme delays
which are as stable as the crystal
clock.
The nunber of cycles for
each instructi.oo
ls found otr the MCS6500 Srrnrrnary card and l.n the
MOS Microcomputer
Prograrrming ldanual"
Ihe folJ.owi-ug progrErn ylelds
a delay of 502 cycles = 502 oicroseconds
froo a sr4gle loop.
Time Delay Program

LOOP

cycles

t"Dxlif $64
DEX
Bl{Er LOOP

2
2
3

Ttre loop ls 5 eycles and 1s executed 100 tLmes.

the Lal.tla1
LDX#
adds the last 2 cyeles.
To obtaln long delays, loops cen be nested
to produce delays of aay length.
Now that you have the baslc idea
here is a more coruplicated
program.
I{e put the ti-oe delay ln a
subroutlne
so that lt caa be readlly
used by other progrsms.
The
maLa program clearg A then lacreuente
lt and outputs Lt to the .
PA port.
Each cycle 1s delayed by the tloe delay subroutlne.
You w111 have to look up the op codes.- Start the oaln progrirm at
0000 and the delay subroutlne
ar 00L3.

aQ
)-v

Tjoe

Delay
:ii::r.:i:,

Test

Program

START

tDA/l

w:tth

Subroutine

$ff

.LsrAG $1701
{
LDA/I $00
I SUOW STAG $1700
n

CLC

clear

$D,9Jf,".,$Or

add 1 to A

rS
JMPG SHOW
16 ogtav
LDY# $ce
i., i$ LOOPY tDX/l $62"
STXZ $l'51' srr
iF
sii "i LOOPX DEX_9 o , * 'd
'
't'BNEr.',1L0OPX
'1,*.,-o
. DEY
LS
't"i
BNEt''{LOOpy
?-:
RTS.
The total

tiue

clear A
look at A

delay

here ls

carry

before

add

J-oop back to SE0W

load 20019 i.uto Y =
load 98rn j-nto X = ;'
x
w8$t 3-Eyeles
decremeot X
if X not zeto, loopx
decreuent Y
if Y not zero, loopy

return

TD = 5Ty( Tx + 2 ) + L4

microsec.

Run the program and try dlffcrent

values for T., and T*.
You
ulght try to write a progrEu that would al1ow fou to 6nter tlne
constants
from the keyboard ln real tLme as the program ls runnlng.
This is a good progran t,o use to see the effects
of eorne of the
other accr:uulator instructlons.
Replace Ehe CLC, ADC# sequence
with SEC, SBC#, or RORa, ROLa, ASLa, LSRa. If you replace a two
byte instruction
rrith a one byte lnstruction,
be sure to add
a NOP to fill
rhe gap.
EXPERIMENT 5

The Interval

Timer

1. Ihe KIM-I j-n.terval tlmer can produce a wide range of progra'rnable

tine delays from a few microseconds to 250 nSEC. the intenral
timer consl-sts of an eight bit down counter and a programmable
cLock divider which produces time intervals of 1 uSEC, 8 uSEC,
64 uSEC, or LO24 uSEC. The auuber of counts and the cor.rnt latervaL
are easily controlJ.ed.
In thls experiment we sha1l use the
intenral tLmer to produce a Llme delay subroutlne.
You should
use the sarnemain program used ln EXP. 4 to test thls routlne.
start ldth Ehe rDLy address E $1707, then try the other values
sholrn in the following Eable:
TDLY

Tlor

$L704 1 USEC
$1705 8 USEC
$L706 64 USEC
$1707 I nSEC

3-9

(X)

Delay

$64
$64
$64
$64

100 uSEC
800 uSEC
6400 uSEC
100 nSEC

l-.

'

:., :

.j.

Interval

Timer Subroutl::e
INTDLY PEA
LDX/I
SIXG
WAIT
LDAG
BEQr
PI,A
DONE
RTS

save the eontents of A

load
ccunt
$54
SLY load counter aad set divide
$1707 gec tjrner status
WAIT if status = 0, wait
restore aecunulator
retura

ratlo

Note that the interrraL timer always runs io real time.

If you
single step through a program ccntinlng
an interval
tiner delay,
the program wiLl flow rlght
through the delay aad aot get huog
up for N loops as is the case with tising
loops.

H(PERIMENT 6

Interrupts

1. The interval
tiuer can be prograurned to interrupt
the KIM-I system
every nnn machine cycles.
In this experiment we are going to generate
an interrupt
every 0.2 eec and uee ttili-s interrupt
to run a progrs:l
which will
increment the PA output port"
You shouLd run a ualn
progtam which does not use the PA port.
flre g,ane prograrus, or Ehe
display routine used in experiment 1 are good for this purpose.
Here is the interrupt
routine:
Interval

Timer Interrupt

1780
1781
1783
L786
1788
1788
178E

PHA
tDAil
STAG
rDAti
STAG
INCG
Pl"A

1-78F RTI

Program

$Ce
$170f
$FF
$1701
$1700

save A
ioad A wirh 2001n
Load tiner and 3Et aiviae rarlo

ro L{t24

set P.Ato out

lncrenent PA lines
restore original A
enable interrupt
teturn

froo

interrupt

We put this program in one of the enoall blocks of t/w Eemory not
used by Bost programs.
Set the IRQ interrupt
veetor to polnt tc
the above routine by storing the entry addrese in $17FE and $17FF
( store 980 in $17fE and $17 ln $17FF ).
You nnrst connect the
the lnterval
timer output slgnal to the IRQ lnput l.lne.
This le
acconpllshed as follows.
Attach a Bpare 22 pLn edge connector to
the expansion Lines on the KIM-I board.
Connect the orange clip
to the IRQ input (pin 4).
Connect a- ihort jr:mper between pins
7 and 8 of the dip plug.
Make sure PB7 is prograrnmed as an lnput
line eveo though it is used to send the tlmer signal out to IRQ.
After a system reset (RS key used) you mrst enable the lntervaL
timer interrupt
capabiLlty by readlng location $170E once. this
can be dcne manually uslng thc KII{ keyboarci.
You are now ready
to run'your rrrain Program. You shctrld obeerve noruel Program
executlon and apparently
simultaneous lncrementing of the PA
Be sure the processor atalcs wlth the interrupt
output lndlcat,ors.
enabled by storing
$00 in locatioa S00F1 befc're running the program.
TI{IS PBOGRAUWILI NOT T"TIIICTIONUNI,SS$ YOU REI'{OVETHE GNO$NDWIAE FRO},I

prN # B ou nm 16-PI3l RIBB0:{coNhTcT0fi,"

3-1C

TT-6

' rrD rr
parrE' sTBurErraf aqf ur srofrsBdBc
sazrs fuaraJJTp EuTfrasur dq
Jo
.ooo0$
gurlrers-urergord,aqS ung
r(cuanba:y rof"TTTcso eqf rrpA
f"
'(t qd) ggg 1ndul ratunoc aqf of 3nd1no rofeTTTrso
{coTc SZ-g-I ar{l
'(r-g 'dxa u1 euop sB ? urd roleauuoc uo;suedxa o1 drlc
fJauuog
a8uBro aqf
pue g pu" Z suld .:adun.f) bUf ol /gd fcauuoc .f; peol
1ooq
arnfBrafTl
'atalced
:no{ u1 urarSo:d ra3unoS dcuanbarg aq1 dn qool
ralunoC dcuanba:g
:luau-:.radxg 1euo11dg .Z

sIctASolcvJuSINtoNv3t901

BXSIC IPSIC DE'IIICES

Although mLcroprocessors 6s:s sallsd

merrts, basJ,c logi,c gates are sttU.
are rrsed for
Therefore,

Latches,

&rffers,

needed ln most nlcrocoqnrter

Ad&ess Decoderse and Sfgnal

ThEr

systems.

Condltloners.

to bave a good rrnderstendl.rog ald rorklag

ls tnportat

lt

(end oftEn are used as) logLc rerplace-

borl'edge

of basl.c J.oglc gates.

Dlltal

taput or outlmt

ttUt ls greater

references

than 2.0 volts

tCtiIC ts tlre opposlte,

t'han 2.0 volts.

or Negatlve)

,.s stsnt

lng tbe logic

synbol

absence of thls

sig[a,L,

L@IC.

ttUr ls lees then 0.8 volts

Ott logJ.cal dlagrgs,

clrcle

the

eate ta ladlcate

lndlcatps

a loglcal-

IPI{-ItsUE or II&ATIVD-TRUB
ndn

and logleal-

(PoeXtlve

ttro tJrpe of logJc

by the use of a clrc.Le tn ttre fnfnrt/ortpUt

for

a xJ'tr or

elllre

ttf,tr 13 Less tban O.8 volts;

and a logJcal

a loglcal

ar\y one

Tberefore,

stats,

nade !n regard, to a dJgltal

l.s gal1sd HICIH-TRUEor PGIIWE-IBUE

Js greater

systan.

nlnber

can oaly be l.a one of tno dlstlact

s trgltt. Norrnally,

thls

operates tn tb btnary

loglc

lead tcrrch-

a LOU-TRUEfnprut/oaq)ut.

The

a HIGH-BIIE lrput/output.

fl

PGITTYE IOCIC
INPUT
NUiAITVE I'GIC
I![PUT

t{hen the clrcle

or the absence of lt

ls used ln an outprt J.ead of a POSITfV

ln a IOW-TRIJE
lnput Eatr.t lt

HIGH-IIR,{IEINPUT GATES
-

a_/

l-

aND

clunges tbs n:ne of tJe

rrNfrln frcrrt of t,lte gatefs name, such 8Er

gat bV a<lrt{ngthe letter

_{-\

gate

hput

LOI{-IRUEINPUTOAIEI

___<{-\

lc,--

NAIrD4*/

-_/
L.1- 1

___-ol--,
br-

AtrD 4_/

l-

NAI{D

.0n ogll,anatJo
I.

of tbe bastc loglc

gates folLlons:

}ION-IIffERTINGBUFFER
TblE devl,ce l^s used prlnarlly
capabdlltles
alrry:

of aotbr

dsvtce.

be tJre sae loglc

to lacrease tbe load handllag

&e ou@ut of thls

dwlce rllJ.

Level as ltE fuFnrt.

INSIICY:

ff.

rr{gh lnput
&s srlth closed represeots
"
The srltch opeo represents a Low
laput
lrgh
the lar;> on rslreseots a
oulnrt
the lary of,f retrnreseots a J.owout4nrt

C]'osrng tlte srltch ArrDs

the laq> ON. Ope'rhg tbs
srLtcb turrs the lap OFF.
LOGICSIMBOT:

A e -

Inptrt
otttput

t?INE T.ABI,E;
A

BOOI,EAN
EQUATION:

a .e
II.

ffYERTIIffi MT'SER
Tbls.devLce ls used prlnarJty
ollut
lts

of t'bl,s dgvice rtll

alrrys

for loglc leve1 Luverelon.

be ths opposLte Loglc lsvel

Tbe
to

lnpet.

IITAI,OGT:
lbe erltcb cloaed repreeots a hlgh lapnt
The erttch open rqreamts
a 1or lnpnt
Tbe J.arp oB represelats a hrgin @Ulut
lbe 14l off rqrresente a lor output
Cl.osbg tbe srltch siA[ short
out tb 3'ap and turn Xt off .
Opltfug thc srltch rLLL rmove
the abmt end turlu on tJo IaP.

l'

I.OGIC $$TBOI,:
-

A+e

A -

Ilput

A - arEut
ths smet]. clrcJ.e at tb end of tbe
ate tadlcates outErt lsversis"

lnu$t tABLEl
-

POoLEailE@AITON:
A iE'
??.F

III.

IND

srhlc devlce uaed pJnanfly to lndtcate rbsths e aot g!! of lts

lapte 4ts hlgh at tbe same tlneo Tbe ou@ut ls EE}H-TBIIE.
.0$IIOGIr
-

closed retrEesents a hJgh lap'ut

opq retrneserts a lon lxput
oo represots
a ldgb output
off relreseots a 1or ortPut

I srritch
A srLtch
Ttre J.ap
Xhe 1op

Both srrttches mrst be closed

to bltr t'be ].ap o"
If elther
on both srLtcbes ere op@, ths
Iary rtl-l be off,o
I$GIC SIMSLT

lr'1-3

l&B

- INPUS!

- 0Ut?Ul

IAI]TE TABT,E:
-

B0oLEArEQITA?ION!
lo
IY.

B s

U.OI{D
thls dwl,ce ls used the sae es t&s .A![D,ercept tbe ortput

ls LOtf-IRlIE.

INAIOGI:
4 srttcb
A sritch
l&e ]'ap
lhe J'ap
tt@ bot&
ebort out
If elths
short rILt

3.fubtm.

c.loeed repreeerils a btgb 3sryg

otr].@,
retreeets
a 1or tnfnrt
@ rsprsents a ftl.gb mtpnrt
of,f represents a l.on outpr:*

sritctps ae closede they

ths lap ald tum, lt off.
or botb sritrcbss open, tba
be rmoved ard trlrn ths

IPGIC SIMBOI:

a&8

- Iuprts

- Artlnrt

I3IN[ ?TBT.E:
-

L.1-L

EQU48S:
BO0r.E0s,
?EE'

Ao
VO OR
Sls

hlgho

drrtce Ls used to ladLeatE rtFD qt lg_&st gq9 of Xts tapts

lte o,$nrt

ls

ls EIDH-$UE.

A srrttrh
A snttph
&e 1ry
lte lap

closed retraesents a hlgb floptrt

open repreeeots a 1or tglnt
m rspteseots a hlgh otpot
of,f relneoeots a lor outPut

Clootrg of eLtlc or bot& srttcheg

turns tbc flght on" llJ. ths srrLtcbee
uut be open to 'lilnil ths lmp offo

rocrcs4agr:
A&B

e
IRUM TABI,E:
-

't

EOOI,EAII
E@IUTION:
A+Bte

b.t-5

- IEPute
- 0utpt

VI.

NOR
ltls
sutlnt

dnlae ls used for the sae Itulpose as the 0R gatee ercept tho
ls l0tf-ffiIE.

4{4'
A sttttcb closed relnesotg

At

Closbg of
sbrts ouf
offc Botb
to ADta o

Bt

,f1 C

lte laP
eB lu1l

ql rqlresots
e rrgh ottrrt
off relneseots a lcr ootput

ettlren or both snlte,hes

tie Lry ad Utrns lt
Errttthes nrst be oPen
the lalr"

IPGIC SIilBOL:

BINH TA8L8:
A

F@ATION:
BOOI.EAI{
A

a h{gh lnprt

A srltph open rqpaesats a lor lnpst

l+.1-6

EE

A & B

Irytrts

OutErt

VII.

EKCLItsIgg -

OR

fbfu dtrLce ls rrsed to lxdfua.te rbea one, and o.ly

lbe otpnt

oep icptrt is hlb.

ls ECiH-tRtIEo

a{3rpcr:

!^

A srltsh ,n t&e ,,1r posltdolr

rqneets
a hlglt lnpt$
A srrttch fu the n2r positlm
relneeots
a Lcrr laput
a hrdl outprt
the 14l @ rqpsats
represeote
a 1or mttrnrt
Tbe 3-anp off

Fc tbe 14l
to be q,r qre srltch
urst be ln tbe n3.'t trnsltton
and oe
Oth,ff_
n1gt be ln tba r/n positJono
rlse, tb f-ql rlAL be of,fo
IOGIC SI!{BOL:

A&B

- Inputc

- Ortput

18,I'THTABI,E:

BOOI,EAI{EQIIATION:

a (DB.

aE+ - . ln r e

lr.1-7

VIII.

EICLIBM-NOB
lbls dwlcs Ls tne saFe as tbe EXCIJIIfIE-OB gatet ercept tbe Eutput
ls LOI|-IUIE.
IN.EIOGT:
I srrttch tlr tha rln posltdCIa relreeots
g h{gh

fDp11t

A srttcb lD tbe nl; prosltJ.@, relroeeate

a lon lnput
lte Lql qn rspreseots a hrgh ouQnrt
Ilte 3.ep off represelrts a Low ertgxrt
eF orqy rqy to sbort-qrt tho
lap 8d Ulrtr tt off, ls to
b^ge oe suitch ln, tbe nl,tt
posXtioa ad one Erltch ia
ths r2r poLtt@c 0therrtse,
tbe l.anp rtlt be o,o
&OGICSIMBOL:

,lr:" ..

- lnputs

A&

IRUB TIBI,E:

- Output

EOOTE/IT
&IUATTON:

A @ B .A F+ T B : 0
I]T.

DT.CSCI'SSIOII
OF IPW-IRI'E IOGIC
lbe peceedbg

gatee rl,ti
I.C.rs

dLscnsslon on tbe baglc J,oglc gates hae Dot dlgcnssed

LOt{ e NE}ASM-$IIE

epeclf,lca{y

fuputse

'l?r{o ls becanse there ar.e no

deelgnatd fon IOU-IBIIE l4nltsr

lr.1-8

h,t a close eraLnatlon

of tbe inrth

tables sbons t&e foltow{ng

NOIE: b
of
nlr
b

r*,rlatlors}rt5s:

foltoming talrrtb t,aLles, sLs & rEn ar:e used lngtead

& n0n to re&ce tbe enfuslm of rhat ls a I&IG.{L
rOil betrreea HIOH-B,UEand fp!{-!ffifi lalnt IffIC.
Oc8 voLts sFd atr H> 2oO voltso

tne
nlrt
e
L4,

HIDH-lRllE INPUT

HIGH-BIIE .eilD

ISTf-TEIIEINPUT
trOtf-IRIIE 0B

LOLJ-lfgtB ggi

HIOH-IRIIE N.0ND

?
E

fl

lr.1-9

HIIIH-BIIE

OB

IOtf-lBIIE

AIID

IIW-tRIIE NIilD

HIDE-IBIIE NOB

lr.1-10

p(.

Lri

.j!

-4

:, !

:",' )
ai r

ELIP-ff[O-PSr

ffi

I.

{i

8"8 LAICE.
the n S, latcb

rat

probably

the flrst

t3pe of ft$-flop

enrc tnrflte

( n - R e s e t & S =$ e t)o

1*l 1*

]' lo
o ll

Itilort dlmd
lb mks tee 8 lafnh tato a ctocked (Ltptlepr

a d[oc& lnRrt urst be

addedo

II.

B-g ErJp EIOP.

Ibe 8.8 fllp-fl.op

ls tha slqfleet

of t&e f,Llgrf,lqrc
B

e e
NO,]HTM}I

o I

0
I

1*

1*

xt{ot altmed
tha addlilpn of ths bto NAIIDgates rrlt& t&e clock latrlt cbsses lt
lato a ctocked n S fljp-tXopc

Ilbe bprlts (B & S) ca oly

&ange tbe

otrtputs (e a O drrllog a fdgb lnfut dloek pnlsec Ibe A, f,tlp-ffop

usualty dran tn tnfs nsrlnrt

lr.2-1

tu

rrr.

DATAoR D-frpE FLrp-FIop:

Tire D-type F. F, is used primarily
effectively

for

a data latch,

from an 8-S F. F. by:

D

D
CIOCK

rv.

can be made

It

J.K IYPE FI,IP-FI!P:

fhe J-K or Master-Slave F. F. is used whenever data is to be trapped
and laiched

at a given instant

be effectively

in time, such as in shift

registers.

made from two R-S F. F.rs by:

J

an

6'tt

V.

ft can

WHERE:
Qn = value
of Q during
previ.ous
clock eycle.

TOGGIEOR T-IYPE FLIP-FIOP:

Thc T-fype F. tr'. is used pri.rna-r'i1yin counters.

It

can be effectively

made fron a J-K (Master-Slave) F. F. by:

CL

1
I
U

For every complete clock cycle ( |

cycle.

Therefore, tb

as the ItTtr input

1
I

), O and 0 go through L of their

T-type F. F. divides the clock frequency by 2 as long

is held high.

It,2-2

Dtr ODEBIDN4II, TIPI,NXTNS

DECODERS:
Tbese devices are most comrorrly used for address decodlng.

llrery are

avall able ln 2-Llae to l+-llner 3-1lne to B-line, h-Line to LO-Ilae, l+-].lne

to l6-$xe

conffuuratiqr.

For sinpl5.city,

a 2-1jne to lr-llne

decoder ls

sbffla belov:

.H

t'lhere n.0'nls the leasts{gniflp4lt

blt Ard rtttt
ls the nost_stgnrflcant
bit.

Witn thJs device, tt m.ly takes 2 llnes to speclfy or e'nable L dlfferent

devlces.

the outtrnrt is lor-tarre"

DUJIIILTIPLF.XTnS
:
these gats are the same as a decoder, except tbe NAIiD gates have an
addltlqra.l

lnprrt

for

data.

lhis

devlce

eeparates

serial

data oa olre Llne

to separate Llnes.
B

where rrDrrls tbe DarA

preseoted to the data
Jngrt"

ENcopEvur&rrPrFm$
EIICODEFS:
Ibese devices
Llrres.

are used to ccnvert

several

lnputs

Tlrese are used m keyboards and nr:.ltLposltlon

lnto

a few encoded

sritches.
I

MULTIPLETffi r
l0rltiplexorc

or Data $electors

sources and plaoe tbs data frm

are used to seleet qre of several data

tbat source qrto a stngle ortErt

are avaJ'lable ln lr to 1, I to L, and 15 to L ccnfiguratlons,

h.lr-t

llne.

these

o
x
x
x
x

x
x
x
x
x
x

T
0
T

o
T

z-1'1

SEV9 frll00 =

x
x

ec

x
x
x
x
x
x

x
x
x
x
T

x
x

T
0

9c

TC

T
T
0
0
T
T

o
o

T
T
T
T
0

o
o
o

]NTERFACEDEYICES
OPE}I-COLI,ECTOR
INGIO
There are severaL instances where a large multiple
is needed.

rn certai.n cases the commonpractice

IfiRED-OR. This is done by riri:rg

to create
output.

a single

into

anottrer gate.

Therefore,

if

was hlghl

nhile

prevail

gate has both active

The WIRED-@ is a LoW-TRuE

to 0R several iaterrupts

procedure cANNoTbe d,one rith

standard TIL logic

is to create a

tro or more gate outputs together

the l{fRED-oR is used frequent\y

BUT, this

outprt

inpui

just

any logic

pu11-up and active

two standard TTL outputs were tied

together

ttre other was low; each gate would try

until

finally

input oR gate

one of the output

together.

gate.

The

pull-dolrn.
and one output

to make itrs

transistors

of one of the

gates burned out.

I'he only type of loglc
logic.

The inte:nal

that can be WIRED-ORtogether

differenees

of the output driving

is 0PEN-C0r.T.trCTOR

circuits

is shomn

below:
STA}IDANDTTL
OUTPUTDRTVEA,

OPEN-COII,ECTOR
OUTPUTDRTVER

Vsc

Vcc
EXIERNAL
PUil-UP
RESISTOR

0ulPuT
OUTFUT

l+.5-t

NOIE:

The open-collector

active

nor passive).

to its

outpu.t to grotnd.

logic

has no inter4:]

Therefore,

Sjnce there is no pull-up

to another gate.

resistor

device in the gate2

together with no i1l

Therefore,

must be added to the jrrnction

value of the resistor

(high and 1ow)

an external

of the WIRED-0R. The

is caleulated by:

2 .6 \D \1 r.5

(neither

what is attacbed

cqrbiaed outputs must have two states

But their

to be of any use as an input

pu1l-ry

device

the gate can 0NtY pull

several of these types of outputs call be rired

effects.

pull-up

5' ."

isE;

W}ERE:
I1X

Total of the leakage currents of all the gates of

the IfJRED-0R when thei-r outputs are aI[ high.

IS

sinking capaliU.ty
of
The lowest mocimrln ctrrent
any of the gates forming the WIRED-0Rwben its
output is 1or.

TRI.STATE I.OGIC
Il

a micro-computer systern transferriry

of data from oae part of the

systeua,to another is done via the DA?A BUS. In a large number of systemsl
the number of devices attached
capa.bi'lities
it.

of the rnj.croprocessor or other devices ttrat are conrected to

Ttrerefore,

ttre data bus.

bus, so for

to the data bus exceeds tlie load driving

there ls a aeed to buffer

the sectious

of the system to

There is always more than one secti@r connected to the data

intellegent

commrnications,

to the bus at arry one time.

Therefore,

one and oaly one can cormrunicate

there is a need to turn off

on

discorurect al'l but the section ttrat has been enabled by the processor.

b.5-2

But a large

nr:rnber of devices

only have tro output

So, there is a need. for a special

or off) .
logic

This is referenced

output that

to as tbee-state

symbols for these devices are belol:

ITIGII-TBUEEN^ABI"ES

IOhI-TRUEETIABI.ES

I+.5-3

states

(high or lon)
-

has tbree statcs

(higb,

or TRI-STATE 1ogic.

1ow,

The

These gates when enabled, through the separate enable input,

function

like

will

the standard gates that we have abeady <iiscussd.

Butr rhen they are disabled

their

off-staie.

Therefore, many l-state

commonllne

withcut

is enabled to output

outputs go to a high-inpedance or
devices caa be attached to a

unwanted interaction
-uo that

line

as long as one ald onJ-y one

at arry given tine.

BUS TBA}ISCETVERS
lhe TRI-STATE devices that have been di-scussed are essential
to one-way cornmunications to a bus, BUT, the processor and a number
of other derrices are by-directional
directions

with the by-directj.onal

and need to cqnnunicate in both

data bus.

this caused the creation

of BUS TRAIISCEIIERS. BUS TRINSCEIVER.S

a.re effecti.vely
buffers
buffer

strapped together

in sucb a nanner as to tie

to the output of the other.

the input of each

Ore of the jr.rnctions is to be

attached to one of the d.ata bus lines

to the sane res'pecti're line

two IRI-STATE

whlle the other junction

of a device or section that is to be buffereci.

One and only one gate is enabled at any given tjrne.

enabled is deterrnined by the ciesired direction

The gate that is

of communlcations (tr't

or OUT). This is uzual1y done by the READIdRITEcontrol

gf,'s usuelly fonr strapped pairs in one IC,
one of the junctions
facilitate
de'rice.

interfacing
If

this

is attached.

(j.rrput to output)

line.

There

In some Bus lbansceivers,

is not rnade within

a bj--di-rectj-ona1 bus to a split

the fC to

data bus or

is not desired cn needeci, the user can externally

the connection.
IN/OUT

make

sy|l3lgoud
3uv,l,uJos
oNtzlvNV

ANALYZING
SOFTUARE
PROBLEMS
I N T R OD U C T ION
T h e o bi e ct o f th i s ch a p te r ;s to pr esent a gener al pr ocedur eused to
d e s i g n so ftw a re to so l ve a pr ob' lem. This pr ocedur eis com pletelymac h'i ne
i n d e p e n d e n t,a n d 'i t ca n b e applied to any softwar e pr oblem syou ar e l .i k el y
t o e n co u n te r. T h e mo st i mpor tant thing to r eme+ nber
about this pr ocedur e
i s t h a t yo u d o n o t co n ce rnyounself with the pr ogr ar nming
languagede tai l s
u n t i l we l l i n to th e so l u ti on. This is tr ue of even the seemingly"tri v i al "
p r o g r a ms. T h e re i s n o w a ym or ecer tain to r esult in a pr ogr amthat is
s l o p p y' i l l -d e si g n e d , a n d har d to debugthan to tr y to wr ite the pr ogr am
d i r e c t l y fro m th e p ro b 'l e mdefinition. To be effective softwar emust be
d e s i g ne dfi rst a n d th e n i mplem ented
using the cor r ect techniques.
5 . 0 Th e S o ftw a re Oe si o nP rocedur e
T h e s yste ma ti c a p p ro a chto developinga pr ogr ar lnedsystemis a logica l
e x t e n s i o n o f th e n o rma l p roblemsolving cycle engineer sand scientists
h a v e e mp l o ye dfo r ye a rs. It consists of seven basic steps:
1.

p ro b l e md e fi n i ti o n,

2.

p ro b 'le m p a rti ti o ni ng,

3.

for each par tition,

a l g o ri th m d e ve l o pment
w ri ti n g th e p ro g ramfor each par tition,

4.
6.

d e b u g g i n ge a ch p rogr am,
i n te g ra ti n g th e pr ogr amsback into the system ,and

7.

fi n a l syste md e b ug.

5.

U s i n g th i s te ch n i q u e , th e pr oblen js br okendown into smaller and smal l er

s u b - p r o b l e msu n ti t th e y a re a size which you can dea' l with convenient'l y
a n d e f fe cti ve l y. T h i s i s becausejt is mucheasier to focus your att ent i o n o n o n e sma l 'l se cti o n o f the systemat a time. Youdevelop each of
t h e s e bl o cks a n d su b -b l o ck sinto a gr oup of detailed flowchar ts and p r og r a m s , e a ch o f w h i ch i s te sted and debugged. They ar e then inter faced
a n d t h e w h o l e syste mte ste d. This system aticappr oachis intended to hel p
y o u m i ni mi ze e rro rs, si n ce the sm all highly localized pr ogr am sar e muc h
e a s i e r to th o ro u g h l y ch e ckout than a single lar ge, spr eadout pr ogr am .

5-t

G r a p h i c a ll y, th e p ro ce d u rei s 'illustr ated in Figur e 1.1. You star t with

a c e n t r a l p ro b l e ma n d p a rti ti o n it jntcl logical blocks, solve and debug
e a c h o f t he b l o cks, a n d fi n a l l y integr ate and r efine the blocks into the
f i n a l s y s te m. T h e rema y b e o n e or m anylevejs of blocking, depend.ing
on
t h e c o m p l e xi ty o f th e p ro b l e m. |.lith exper ience,you wil l f ind thjs gene r a l a p p r o a chto b e th e mo st d i r ect and consistent way to im plementa
w o r k i n g s oftw a re syste m,re g a rdless of size. Less or ganizedappr oaches
m a yw o r k f o r sma l l e r syste ms,but you wi11 becom e
hopelesslytangled as
t h e s y s t e msg ro w i n si ze . It i s best to lear n the gener al pr ocedur eand
u s e i t o n al l p ro b 'l e ms,sma l l or lar ge. The gr eatest disaster s usually
o c c u r w h e nth e w h o 'l ed e si g n p rocedur eis dispensedwith becausethe pr ob l e m i s t o o " tri vi a l " to w a rra nt the gener al appr oach. Conver sely,dogg ed
a p p l i c a t i o n o f th i s a p p ro a chcan m akemanyfor midablepr oblem stur n out
f a r b e t t e r a n d fa ste r th a n a n ti c ipated.
I n t h e r e ma i n d e ro f th i s Je sso nwe will initiate our study of the gener a l
s o f t w a r e s ol u ti o n p ro ce d u re . L essonsThr ee thr oughTen will then expand
a n d r e f i n e th e te ch n i q u e su se d dur ing the solution pr ocess.
5 . 1 S t e p 1 : D e fi n e th e P ro b l em
A s w i t h a n y p ro ce d u refo r so l vi ng any pr oblem,the fir st step is always
t h e s a m e( an d th e h a rd e st): d efine the pr oblem. For the case of software
p r o b l e m s ,yo u mu st d e ci d e e xa ctly what the finished softwar e systemis to
T h i s de fi n i ti o n o f th e o p er atjonal char acter istics you want the final
sy s t e mt o h a ve fs ca l l e d th e fu nctional specificgtion. Natur ally, it is
e a s i e r t o de fi n e a n d sp e ci fy so lutions for som etype of pr oblemsthan for
o t h e r s . P ro b l e msw h i ch a re co n cer nedwith the im plementation
of specific
f e a t u r e s a r e g e n e ra l l y e a si e st. Pr ob' lems
which r equir e both judgem ent
do.

a n d i m p ' l e m e n ta ti oanre th e h a rdest. In the fir st case, the task is to

fi g u r e o u t h o wto d o so me th i n g. In the later case, it is often a questio n
o f w h e t h e ro r n o t th e j o b ca n b e done, and if it can, what is the best wa y
F o r e xa mp l e ,a p ro g ramto wr jte single data bytes onto a magn e t i c t a p e u n i t i s a fa i rl y sp e cific pr oblemwith a sjr nilar ly str aightto d o i t .

fo r w a r d f u n cti o n a l sp e ci fj ca ti o n. Ther e is little conceptualdesign wor k

to b e d o n e . It i s ma i n l y a q u e s tion of using a pr ogr amto contr ol the

5-e

I'IAJOR
SYSTEM
ELOCK

SYSTEI'I
SUB-BLOCK

sYsTEt'l
SUB.BLOCK

SYSTEM
SUB-BLOCK

DEVELOP
ALGORITHM

II{TERFACE
ANDDEBUG
MAJOR
SYSTEI'I
BLOCK

FIGURE5"1 GENEML
PROBLEM
SOLUTION
PROCESS
)^
5-J

s e l e c te d h a rd w a re . 0 n th e other hand, the pr ogr amr equir ed to use thi s

p r o g r ama s p a rt o f a syste mto for mat sequences
of data bytes into r e c or ds
o n t h e ta p e w i l l re q u i re consider ablymor edesign. Youwill have to dec i d e o n re co rd l e n g th , re cor d m ar ks, whetheror not you want to for m at the
d a t a w i th p a ri ty a n d /o r ch eck sum, and so on. Not only that, you mus t
d e c i d e o n th e p ro b a b l eu sa geof the r outine. The quick for m at pr ogr am
r e q u i r e d to te st a ta p e d e ck' s oper ation in the lab is apt to be quite
d i f f e r e n t fro m a g e n e ra l u sageexchangefor r nat for a tape libr ar y.
In the
s e c o n dca se yo u mu st co n si der pr oblemsof compatibility with differ ent
h a r d wa re ,re l i a b i l i ty, u se rdocum entation,
and m anyother details. Al l of
t h e s e qu e sti o n s sh o u l d b e settled in the functiona' l specification befor e
y o u p r o ce e dto th e n e xt d e s ign phase. lr Jewi]' l exam ineboth of these
c a s e s a s e xa mp l e so f g e n e ral pr oblemsolutions in th' is and later lessons .
5 . 1 . 1 In fo rma ti o n R e q u i re dFor A Functional Specification
I t i s di ffi cu l t to g i ve a c ompietedefinition of infor mation that is al w ay s
r e q u i r ed fo r a fu n cti o n a l specification. It var ies widely fr om pr obl em
t o p r o b l e m. S i mp 'l esyste mscan be specified adequatelyin a few pages .
L a r g e , cu n p l e x syste msma y have hundr edsof pagesof specifications a nd
s t l l l b e i n a d e q u a te l yd e fi n ed. However the
,
following infor mation sh oul d
a l w a y s b e p re se n t.
1.

A co n ci se p ro b l e mstatem ent. Oneshor t par agr aphdescr ibin g

th e p ro b 'l e mth e systemis being designedto soive.

2.

R e q u i re dh a rd w a re. Youmust knowwhat signals and devices a r e

a va i l a b l e o r re q uir ed. The exact l/0 or m emor yaddr essesar e
n o t i mp o rta n t a t this point, but you must knowthe har dware
yo u w i l l b e u si n g .

3.

R e q u i re dso ftw a re inter faces. W hendesigning pr ogr amsr) ou

w i l l o fte n b e p l a cing them into syster nswher ethey will hav e
to co -e xi st w i th or utilize other pr ogr am s. If this is to b e
th e ca se , i t sh o uld be noted in the specification. In this
ca se , e xa ct d e ta i l s ar e necessar y;you should m ention the
5-lt-

re l e va n t syste mstandar dor for m at ( i.e., all output must

co n fo rmto syste mi/0 standar d i- 13) for all r outjnes to be
i n te rfa ce d . T h e ser equir em entswilJ often have a significant
a ffe ct o n yo u r d e s ign.
4.

A co mp l e ted e scrfp tion of howthe systemis supposedto func ti on

w h e nco mpel te . T h is is usual' ly the ' longestpar t of the func ti o n a 'l sp e ci fi ca ti on. This section should' include a descr ipti on
o f u se r i n te ra cti o n ( if any) , data r equir ed, output pr oduced,
sp e ci a l fe a tu n e s, er r or condition handling, etc. In other w or ds ,
a co mp l e ted e scri p tion of howthe systemwill look to the wo r l d
fro m th e o u tsi d e w ith no consider ationfor how it will look
fro m th e i n si d e .

T h i s p r o b l e mma ke sw ri ti n g the softwar e specification soundl' ike a r ather

f o r m i d a b l e ta sk. It i s. A good, well thought out specification is the
k e y t o a g o o d (i .e .su cce ssf,uj!) pr oject. It is well wor th the time r eq u i : ^ e dt o th i n k th e p ro b l e mthr ough com pletely. If you knowwhat you hav e
t o d o ' i t b e co memu
s che a si e r to pr oceeddir ectly to a solution than when
y o u m u s t co n sta n tl y sto p a n d star t to fill in the blanks in the pr oblem
definition.
F e wsp e ci ffca ti o ns ar e ever totally com plete, but you sho ul d
s t r i v e t o g e t a s cl o se a s p o s sible befor e you star t the actual design.
m uc h
0 n c e y o u b e co mei mme rse di n the details of the solution, it becom es
m o r e d i f f icu l t to se p a ra teth e nor m al implementationpr ob' lemsfr om thos e
c a u s e db y a fu n d a me n tadl e si gn' logic er r or .
E x amp l e(.1
C o nsi d e rth e d e si g n o f a pr ogr amto inter face a magnetictape
r e c ord e r to mi cro co mp uter . This pr ogr amwili contr ol the tr ansfer
o f pa ra '|1 e 1d a ta b e tw e enthe tape deck and the micr ocomputer . It
w i l l co n tro l a l l ta p e d eck har dwar efunctions which ar e r equir ed to
p e r fo rm th e se d a ta tra n sfer s. The following is a possjb1efunctjo na l sp e ci fi ca ti o n .

5-5

S c o p e: T h i s sp e ci fi ca ti o n cover s the pr ogr amr equir ed to inter face

a f ' l a gb yteMo d e l 1 0 1 0d j g i ta l magnetictape dr ive to an ever yday
microcomputer.
R e q u i r e dH a rd w a re : T h e i n ter face wil' l r equir e the tape dr ive to be
connectedto the computerthrough two input ports and two output
p o r t s : o n e d a ta i n p u t p o rt with par allel data fr om the tape deck,
o n e d a ta o u tp u t p o rt w i th par al' lel data out to the tape deck, one
s t a t u s i n p u t p o rt a n d o n e c ontr ol output por t. Status input signals
a v a i l a b l e a re E n d o f T a p e , }{ r r ' te Pr otect and Ready. Contr ol signals
r e q u i r e d a re T a p eA d va n ce ,Read/llr ite and Tr ansfer Data. The timing
w a v e f ormsa re sh o w ni n F i g ur e 1.2.
Software Requirements: The I/0 routines must conform to the normal
s y s t e mre q u i re me n ts: o u tp ut data to be passedvia the C r egister
( o r t h e a p p ro p ri a te re g i ste r or memor ylocation for your system)and
i n p u t da ta i s to b e re tu rn e d in the A r egister ( or the appr opr iate
r e g i s t e r o r me mo ryl o ca ti o n for your system )upon exit. The r outines
m u s t r esto re a n y re g i ste rs or memor ylocations used.
O p e r a ti o n a lD e scri p ti o n :
I n p u t 0p e ra ti o n : U p o nca l l ,the r outine will gener ateal' l timing and
c o n t r o l si g n a l s re q u i re d to tr ansfer one data byte fr om the tape in
t h e t a pe d ri ve i n to th e p ro cessor . It will then r etur n to the calli n g p r o g ra mw i th th a t d a ta byte. If the tape dr ive status indicates
En d o f T a p e , a n e rro r i n d i cator shouJdbe set on r etur n. 0ther wise
i t s h o u l d b e re se t.
0 u t p u t 0p e ra ti o n : U p o nca l l , the r outine will gener ateal1 tim ing
a n d c o ntro l si g n a l s re q u i re d to tr ansfer the data byte passedfr om
t h e c a l l i n g p ro g ra mo n to th e m agnet{ ctape in the tape dr ive. If
t h e t a p e d ri ve sta tu s i n d i cates Endof Tapeor W r ite Pr otect, an er r or
i n d i c a t or sh o u l d b e se t o n retur n.

5-6

Other wiseit should be r eset.

READ

=+

ADVANCE
TAPF

-->

READ/WRITE

II

ENDOF TAPE

WRITE

_>

TRANSFER

+-

D A T A (S )

+-

READY

..+

ADVANCE
TAPE

-..-> READ/WRITE
<_- ENDOF TAPE
HIGHIF PROTECTED
I.JRITEPROTECT
LOI,JIF ENABLED
1

DATA
TRANSFER
<--

READY

_->

ADVANCE
TAPE

ENDOF TAPE
<--

ENDOF TAPE

FIGURE5.2

TAPEDECKTIMINGIJAVEFORMS
t.n

i s the s pe c if ic a t io nf o r a n I / 0 d r iv e r r o u t in e . A ll a n
Th ea b ov eex ampl e
I/0 driver does is control the transfer of data betweenthe cqnputerand
an I/0 device. Notethat the specificationmakesno mentionof the requirements
for initialization of the tape drive, howthe data is to be
formatted,etc. This is because
an I/0 driver is strictly concerned
with
transferringdata to or from the device it interfaces. It is the responsibility of those progranswhichutilize an I/0 driver to interpret the data
and signals returned. A complete
tape I/0 systemwhichwill use this
d r i ve r w i l l be di s c us s edi n L e s s o n7 .
l e c if ic a t io n
1 1 .2 Us i ngthe Fungti onaSp
Thefunctional specificationis the baseuponwhichyou will build your
system. If it has beenproperlydesigned,it will supportand guide the
rest of your problemsolvingeffort. lfit has not beenproperlydesigned,
your project is probablydoomed
to failure or overrunbeforeyou evenget
started. Therefoie,onceyou haveestablisheda functional specification,
use it. If you don't, you are apt to run into that dreadedsoftware
or
whenan inadequate
diseaseknownas "creepingfeatures". This happens
disregardedproblemspecificationallows non-specified"neat" featuresto
creepinto the systgnafter rrprkhas begun. This can be disastrous,bein the planningstage can require massive
causechangeseasily ac@rmodated
stage. Usually, the
effort and re-designmrk during the implerilentation
farther work has progressed,the moreeffort is required to makeany sigbefore detectedand
nificant changes. Thediseaseis often well advanced
it can be fatal to eventhe best softwareprojects. (Professionalengineers
are notoriouscarriers of this disease. l,lhile
note: marketingdeparfinents
they are knownto infect entire departments.)
they seldomshowany syrnptoms,
features
Theabovecorrnentsshouldnot be construedto meanthat advanced
makesthese
are to be shunnedor omitted. Far from it. Themicrocomputer
featuresboth possibleandattainable. blhatis meantis that they should
be deslgnedin from the top, not addedfrom the side. Therefore,whenyou
designyour functional specifications,take sometime. Brainstormfor a
whi'leand comeup with a list of featuresthat the systemcan really accomplish. Try trading off somehardware
and softwareto lowercost or increase

s y s t e mp e rfo rma n ce . Mi cro c omputrmake

s
whole newfields of featur es
p o s s i bl e , a n d i t i s w o rth your time to see if you can find sonr efor y our
p r o j e c t. B u t o n ce th a t fu nctional specification is done, stick with i t.
I f r e a l l y d ra sti c ch a n g e sar e needed,you will pr obably be better off
s t a r t i n g o ve r th a n tryi n g to patch an inadequatespecification.
5 . 2 Ste p 2 : P a rti ti o n T h e Pr oblemInto Funct' ionBlocks
0 n c e y o u h a ve co mp 'l e te th
d e functional spec' ification for your system,
y o u c a n b e g i n to p a rti ti o n it into oper ational blocks. An oper ational
b l o c k i s a se cti o n o f th e systemwhich is r esponsiblefor per for m ing s om e
s p e c i f i c syste mfu n cti o n . 0per ational blocks can be as com plexas a c om p l e t e f lo a ti n g p o i n t a ri th m etic packageor as simple as a few instr uc ti on
d a t a c o n ve rsi o n s. i n syste moper ations, contr ol passesfr om one funct i onal
b l o c k t o a n o th e r a s th e p ro gr amexecutes. In this r espect the block d i agr am
c a n a c tu a l l y b e co n si d e re das a type of over all systemflowchar t. It dj ff e r s f r o m th e fl o w ch a rt i n that it does not specify lhe actual algor ithns
u s e d t o i mp l e me n tth e fu n ctions ( see Section 5.3) . You fir st design the
s t r u c t u re o f th e p ro g ra ma s a ser ies of successivelym or edetailed oper at i o n a l bl o cks u n tj l yo u re a ch a level of comp' lexitythat you can deal w i th
e f f e c t i v e l y.

Y o u th e n p ro ceedto algor ithm development

for each bloc k .

Bl o c k i ng a n d p a rti ti o n i n g a r e the cor ner stoneof conver ting a function a'l

s p e c i f i c a ti o n i n to a fu n cti onal pr ogr am . You can have as m anylevels of
you ar e fir st lea r nb l o c k s an d su b -b l o cksa s th e pr oblemr equir es. l,Jhen
i n g , y o u sh o u l d n o t h e si ta te to block downto sections which seema' lmos t
trivial.
A s yo u g a i n e xp e rienceyou will be able to judge m or e accur atel y
w h a t s i ze b l o cks yo u ca n co m for tably handle. Also, extr eme' lyinvolved
o r c o m pl e xse cti o n s o f a systemm ay r equir e muchmor edetailed blocking
t h a n t h e mo re stra i g h tfo rw a r r dsections. The flexibility of blocking is
t h a t i t a l 1 o w syo u to e a si l y adjust the level of detail to match the c om p l e x i t y o f th e p ro b l e m.
(.2.1

D e ci d i n g o n th e S ystemBlocks
T h e d e c i si o n o f w h a t b l o cks to divide the systeminto initially is usua'l l y
m a d eb y r.e fe r.ri n gto th e ch ar acter istics defined in the functional spec i fication.

S o mecg mmoinn i ti a l

blocks ar e:
1-9

b.

i n p u t o p e ra ti o n s,
pro g ra mfu n cti o n s (transfer data, sear chmsnor y,do ar ithm etic,
etc. ) ,

c.

syste mco n tro l a n d ti m inE,

d.

o u tp u t o p e ra ti o n , a n d
ma j o r d a ta stru ctu re s ( tables, lists,

a.

e.

etc.) .

Theseblocks are then drawnand interconnectedto form the system block

d i a g r a m . It i s i mp o rta n t to re member
that at this initial point you ar e
c o n c e r n e dwi th i d e n ti fi ca ti o n of the major systemstr uctur es. You ar e not
y e t c o n c e rn e dw i th th e i r a ctu a l oper ation. The design of howthe oper ati o n a l b l o cks w i l l i mp l e me nth
t eir functions will cor mence
once the over al l
s y s t e ms t r uctu re h a s b e e ne sta blished. In theor y, it should be possible
to implementthe system in either hardware, software, or somecombination
o f h a r d w a rea n d so ftw a re a t th e end of the blocking oper ation. This
fl e x ibility for actual systemim p' lem entation.
l e a v e s y o u w i th th e ma xi mu m
Ex a m p l e!.2
L e t ' s ta ke th e sp e ci fi ca ti on for the m agnetictape I/0 dniver we
w r o t e i n E xa mp l e5 .1 a n d d o the block diagr am sfor that system .
l . l ec a n se e fro m th e fu n cti onal specification that we will r equir e
b l o c k s to i n p u t d a ta , o u tp ut data, and contr ol the data tr ansfer s.
F i g u r e 5 .3 a sh o w sa n i n i ti a l block diagr amfor this s' imp1esystem .
N o t e t h a t i t sh o w sa l l d a ta and contr ol signals that.ar e passed
through the system. Since the data is transferred to and from the
t a p e d e ck i n p a ra l l e l fo rm, no fur ther blocking is neededfor the
,
I n p u t a n d 0 u tp u t b 'l o cks. Howevet'the
contr ol block is r equir ed to
p e r f o rm se ve ra l o p e ra ti o n s. It must detect end of tape, contr ol
t h e r e a d /w ri te l fn e , se n sea wr ite pr otect condition, and advance
t h e t a p e . T h i s b l o ck i s sufficiently com plexto war r ant sub- blockin g.
I t i s sh o w nsu b -b l o cke di n Figur e 5.3b. Note howal' l inputs and
o u t p u ts o f th e su b -b l o ckd i agr ammatch those on the main block
to showmor edetail.
d i a g r a m. It i s th e sa mei nter face expanded

5-ro

TAPEDATAIN

ENDOFTAPE
WRITEPROTECT
READY
TAPEADVANCE
TRANSFER
DATA

DATA INPUT

TIM ING
AND
CONTROL

DATAOUTPUT

ERRORINDICATOE

DATAFROMSYSTEM

FIGURE
TAqEt/0 BLoCK
DIAGRAI1
5.3a MAGNETIC
DATAIHPUT
END
OF
INTERFACE
ENDOF TAPESTATUS
TAPEOETECT

TAPEADVANCE

TAPEADVANCE
CONTROL

READ/t.IRITE
SELECT

DATAOUTPUT
INTERFACE

WRITEPROTECT
TRANSFER
DATA
READY:
FIGURE
SUB-BLOCK
5.3b TIMII{GANOCONTROL
DIAGRAI'I

F T G URE
5.3

5-u

5 . 2 . 2 C h e cki n oth e B l o c! 0 i a q ram

0 n c e y o u h a ve b l o cke do u t th e system ,step back and see if it will neet
yo u r f u n c t i on a l sp e ci fi ca ti o n . Be sur e you have accountedfor all inputs,
o u t p u t s , d ata tra n sfo rma ti o n s, s ystem sfunctions, er r or conditions, and so
o n . A u s e f u l te st i s to l i st a l j the r equfr ed syster nf,eatur esand ver ify
t h a t y o u h ave i n cl u d e d a l l th e blocks r equir ed to per for m these functions.
A f t e r y o u h ave co n fi rme dth a t e ver ything is ther e, be cer tain that the
b l o c k s a r e de ta i l e d e n o u g hfo r you to pr oceedon to the togic design imp l e m e n t a t i o n . If so meo f th e b l ocks soundvagueor " only par tly defined,
y o u m a y n e ed to a d d mo re E u b -b l ocksin that ar ea. Repeatthis pr ocedur e
u n t i l y o u a r e co n vi n ce dth e systemdefined by the block diagr an m atches
y o u r f u n c t i on a 'l sp e ci fi ca ti o n . Onceyou ar e satisfied that you have covered
a l l t h e r e q u i re d fu n cti o n s i n sufficient detail, you ar e r eady to pr oceed
t o t h e n e x t ste p a n d b e g i n d e si g ning the actual logjc functions r equir ed
t o i m p l e m e n th
t e syste mb 'l o cks
A t t h i s p o i n t i t i s i mp o rta n t to r ecognizethat i{ hile we ar e going to
c o n t i n u e u s in g th e a ssu mp ti o nth at we ar e designing a softwdr e system ,this
is n o t a l w a y s th e ca se . T h e p ro blemspecification and blocking m ethodswe
ha v e p r e s e nte dso fa r a re p e rfe ctly gener al; they can be applied with equa l
f a c i l i t y t o h a rd w a re ,S o ftw a re , and har dwar e/softwarsystem
e
designs. In
t h e l a t t e r c a se , th e o p ti mu mtra d e off betweenthe two implsnentationtechni q u e s w i l l b e l o o ke d fo r a t th i s point. Backgr ound
Section C is devoted
t o h o wt h e s e fu n d a me n tadl e si g n decisions ar e m ade.
5.3 S t e p 3 : A l q o ri th n D e ve l o p ment
For Lach Par t_itiol
Up t o t h i s p o i n t w e h a ve o n l y b e enconcer nedwith.the functions to be
pe r f o r m e do n a b l o ck (o r n o n -fu nctional) leve1" br ith algor ithm developme n t w e m a k eth e tra n si ti o n fro m logical systempar titions to the actual
lo g i c r e q u i r e d to i mp l e me n tth e system . Most of our algor ittr n develognen t
wi ' l l b e d o n e u si n g f l o w ch a rts. The f ' lowchar ti s of ten m entionedas the
m o s t i m p o r t a n t ste p i n th e so ftw ar e pr ob' lemsolution. This is plainly not
T h e f lo w ch a rt i s si mp l y a tool in the continuing design pr ocess
wh i c h b e g a nwi th th e p ro b l e rnsp e cification. It is no r nor ecor r ect to sit
t ru e .

do w na n d s t a rt d ra w i n g fl o w ch a rts than it is to sjt downand star t wr it' ing

5-t2

m a c h in eco d e . B o th o p e ra tions have their place in the pr oblemsoluti on

p r o c e d u re . N e i th e r i s sa tjsfactor y alone. Flowchar tsar e one possib l e
w a y t o co n ve n i e n tl yd e ve l o pand check the logic of the pr oblemblocks for
c o r r e ct o p e ra ti o n . U si n g flowchar ts it is possible to develop pr ogr a nr
l o g i c in d e p e n d e not f a n y specific computer . It is also mucheasier to
f i n d l o g i c e rro rs i n th e sy m bolicflowchar t than to tr y and hunt them
d o w no n ce th e y a re co mmi ttedto pr ogr amimplementation. ( This is par ti c ul a r l y tru e w i th th e re l a ti vely pr im itive debugfacilities cur r ently pr ov i d e d b y mi cro p ro ce ssoma
r nufactur er s.
)
s
5. 311 Fl owchart S.ymbol
T h e d a ta p ro ce ssi n gi n d u stry has a standar dset of flowchar t symbolsand
y o u s h o u l d a d h e re to th e se in the inter est of makingyour wor k usable to
(IB M p ro d u ce sa n excellent tem p' lateof all the standar dsym bol s ;
i t i s w i d e l y a va i l a b l e i n s tationer y supply houses.) The most conr no n'l y
u s e d symb o l sa n d th e i r fu n ctt' onsar e shownin Figur e 5.4 ( see page i-]di .

others.

Thesesymbo'lsshould prove adequatefor the construction of any flowc h a r t s yo u w i l l re q u i re .

(.3.2

T yp e o f F l o w ch a rts
F l o w c ha rtsca n b e d ra w nto r epr esent algor ithm s at any desir ed level of
c o m p l exi ty. T h e tw o mo st cor mnonly
used types of flowchar t ar e the log i c
f l o w c h a rt a n d th e ma ch i n e -dep.endent
flowchar t. A logic flowchar t r epr es e n t s a l g o ri tl m l o g i c i n g ener al oper ating ter m s with no r efer ence to
s p e c i f ic ma ch i n efe a tu re s (r egister s, memor y,flags, etc.) . The m achi ne
d e p e n d e n fl
t o w ch a rt p re se n ts algor ithm logic within the context of the
to
f e a t u r e s p ro vi d e d b y so mespecific pr ocessor . It is advantageous
i n i t i a l l y d ra w a l o g i c fl o w c har :tfor each functional block in the bloc k
d i a g r a m. T h e sea re th e n th or oughlydebuggedand used as the basis for the
m a c h i n ed e p e n d e n tfl o w ch a rts r equir ed for the com puteryou ar e usin9.
I f y o u p ro g ra mi n h i g h e r l e vel languages,you will har dly ever use m ac hi ne
d e p e n de n fl
t o w ch a rts. T h e l ogic flowchar ts r equir ed to define the alg or i t l r n t o b e g se d a re a l l th at ar e r equir ed. This is becauseall of the
m a . c h i n de e p e n d e n d
t e ta i l s w ill be handledby the languagepr ocessor .

5-L3

SYMBOLS

EXAI-IPLES
PROGRAH
FLOW. ARROWS
INDICATE
SEQUENCE
THATTHE PROGRAH
FOLLO}JS.
P R OC ESS.
THEFUNCTION
SPECIT:IED
IN THERECTANGLE
IS TO BE PER.
F 0 R ME D,
e.9. A IS T0 BE MULIP L IE DB Y 2

A=AX2

P R E .D EFINED
PROCESS.
THEEXTERNALROUTINE
DEFINED
BY THENAIIIE
Ii'I THERECTANGLE
IS TO BT IIIVOKED
T 0 P E R F0RI4
ITS FUNCTI0N.e.9. THE
ROUTINE
DEFINED
BY THENAME
''TTI''
IS TO PERFORM
A FUNC'IION.

CALLTTI

A=A+ 1

OF THEPROGMI4
DECISIOI{. THEFLOI.J
I.IILLBE BASED
ONTHECONDITION
S P E C I F IEIN
D S ID ET H ED IA MONO.
=
e . g . I F A ? , A D Dl . 0 T H ERTJISE
AD D2 .

A=A+ ?

I/O OPERATION.
THEINPUTOR
OUTPUT
OPEMTION
INDICATEO
IN THE
PARALLELOGRAM
IS TO BE PERFORI4ED,
e.g. THEVALUE
0F THEVARIABLE
IIAIIIS TO 8E SENTTO AII OUTPUT
D E V IC E.

PRINTA

TERI''IINAL
OR INTERRUPT.THEOVAL
INDICATES
T}IEBEGINI{ING
OREI{DOF
EIITERTTI
A PROGMI'I
ORAN INTERRUPT
OPERA.
,.TTI" .
T I0 tl , e .9. TNTRY
P0INTFORR0UTINE

\.-/

\,/

I.IHET.I
FLOI.II,IIJST
PROCEED
CONNECTORS.
TO ANOTHER
PAGE
PLACE
0R ANoTHER
0N THESME PAGE,USEA

coNNEcr0R
IF IT Is AltKt{ARD
T0 usEANARR0IJ.
FiGURE5.4

FLOI.J
CHART
SYIIBOI.S

Si m i l a rl y, g e n e ra l a l g o rj th ms and pr oblemsolutions which ar e to be

i m p i e r n e n teodn a va ri e ty o f computer sar e best pr esentedusing Iogic fl ow c h a r t s . A n y u se r ca n th e n take the gener al logic flowchar t and use it as
t h e b asi s fo r th e i mp 'l e mentation
of a solution on any computeror in any
l a n g u ag e . A s yo u g a i n e xp er iencewith your par ticular installation, y ou
w i l l b e a b 'l e to g o d i re ctl y fr om the block diagr amsto flow char ts that
a r e a cro ss b e tw e e np u re l y logical and pur ely m achinedependentflowc har ts :
H o w e ve r,i f yo u i n te n d to save the algor ithm or solution for documentati on
o r p o ssi b l e u se o n so meo th er system, it would be a good jdea to dr aw a
g o o d l og i c fl o w ch a rt a fte r the systemis completed.
5 . 3 . 3 - H o wto D e si q nA l q o ri thms
T h e d e s i g n o f p ro g ra ma l g o ritfr ns' is actually the design of softwar e, a
v a s t s ub j e ct i n d e e d . Wew i ll be cover ing a por tion of that subject in the
n e x t e i g h t l e sso n s. H o w e v erwe
, can discuss som eof the gener ai Pr oc edur es
u s e d w h e ntra n sl a ti n g a l o g ical systemblock to an algor ithm.
1.

D eci d ew h a t th e b l o ck is to do. This is the sam estep as whenwe

i n i ti a l l y sp e ci fi e d th e pr oblem . The only differ ence is that jt i s
n ow b e i n g d o n e fo r a small, local pr ogr amr ather than for the wh ol e
s yste m. N a tu ra l yi th e label on the block w' i' ll pr ovide a good s tar ti n g p l a ce fo r th i s d e s cr iption. Usually a one or two sentence
d e scri p ti o n o f th e o p er atjon to be per for medis all that is r equ i r ed.

2.

D eci d ew h e re th e d a ta to be oper ated upon is located. Is it r ead i n,

p a sse dfro m a n o th e r b l ock, looked up in a tabl, or what? You wi l l
n e e d o p e ra tj o n b l o cks to input the r equir ed data. tllhile you dec i de
w he re to g e t th e d a ta , decide if you need to do anything special to
Rotated?
i t b e fo re yo u u se i t.
Doesit have to be com plemented?
M a ske d ? S ca l e d ? If so, you knowyou wi' ll need somedata tr ansfo r m at i o n b l o cks i n th e fl o wchar t.

J.

F i gu re o u t h o wto p e rfor m the r equir ed oper at' ion. This is the r e al

m ea t o f th e a l g o ri th m developm ent. This wjll be wher eyou com bi ne
p r oce ss b l o cks, d a ta a nd decisions to conver t the data fr om the i nput
(_1 c

f orma t to th e o u tp u t for m at. This par t of the pr ocesswill usua 'l l y

a cco u n tfo r th e l a rg e st por tion of your wor k. Rem ember
,
develcp
i ng
t he a l g o ri th m i s a n i ter ative pr ocess.
I t w i l l u su a l l y ta ke sever al tr iesbefor e you get the algor ithr n
c orre ct. S ta rt o u t b y wr iting downthe sequenceof oper ations to
b e p e rfo rme di n th e o rder they must be per for m ed,like "r ead in data,
t h e n te st fo r co n tro l char acter s, then test for iower case char a c ter s " ,
a nd so o n . T h i s w i l 'l give you that all impor tant feel for the sequencesof actions which are to be performed. After you have the
g e n e ra l fl o w , a d d th e pr ocessand decision blocks you need to actua'l l y
perform the operations
A fte r yo u h a ve a n a l g o r ithm that should wor k, tr y it out with data
t o se e i f i t d o e s w o rk ( all on paper , of cour se) . Tr y to imagin e
e ve ry p o ssi b l e d a ta co ndition that could occur and then be sur e y our
a l go ri th m ca n p ro ce ss i t cor r ectly. Youmust be cer tain your log i c
i s co rre ct i n th e a l g o r ithm befor e you pr oceedto cod' ing. Be par ti c u l a r'l y ca re fu l th a t your algor itlr m can handle er r or conditions.
T h i s i s a n a re a w h i ch i s par ticular ly susceptible to er r or s which
w il l b e ve ry h a rd to d etect. Be patient and thor ough. Tim e spe nt
g e tti n g th e l o g i c co rrect in the algor ithm will be tim e saveddur i ng
s yste md e b u g g i n g . T h i nk fir st, pr ogr amlater .
4.

D e ci d ew h a t to d o w i th the finished data. Doesit have to be spe c i al l y

f o rma tte d ? D o yo u sa ve it? Pass it back to a calling r outine? 0utput it? Add the blocks reguired to get the output data ready for the
r e c e i vi n g ro u ti n e o r d evice.

5.

Ke e pth e stru ctu re si mple. Hakeit a goal to keep the flow str aightf o r w a rd , l o g i ca l a n d cl ear . Be par ticular ly car eful about howyou
e n te r a n d e xi t fro m th e r outines. Ther e ar e r eally only a few sim pl e
s t r u ctu re s yo u sh o u l d ever need to use in constr uction of any algor i thm .
W ew i 'l l e xa mi n eth e se str uctur es in the next few lessons.

5-l.6

Ex a m p l e5 .3
L e t ' s d e ve l o p th e a l g o ri th ms r equ' ir ed for our magnetjctape dr ive
i n t e r f ace syste mu se d i n Exam ples
5.r andS.z. The fir st thing
t h a t be co me as p p a re n t i s that the data input and output blocks ar e
v e r y l arg e b l o cks a n d ve ry sm all pr ogr ams. The data is to pass
t h r o u gh th e ro u ti n e i n p a rallel without being m odified. Thus the
f l o w c h a rts fo r th o se b l o ck s would be simply one block each:

INPUT DATAFROMTAPEDECK

OUTPUTDATATO TAPEDECK

T h e o b vi o u s co n cl u si o n i s that the major ity of these flowchar ts will

b e c o nce rn e dw i th w h e nto read and wr ite the data, nam elythe tim ing
a n d c o n tro l b l o cks. L e t's take the r ead block fir st.
Fr omthe tim i n g d i a g ra mw e ca n se e th a t for this tape deck the sequenceof contr o l
f o r r e ad i n g a d a ta b yte fro m the tape is advancethe tape ( fr om the
m a n u f a ctu re r's sp e ci fi ca ti o n we find that it automaticaliy advances
i n o n e b yte i n cre me n ts),te s t for End of Tape, set the Read/W r ite
l i n e t o R e a d ,w a i t fo r d a ta r eady, r ead the data, then exit. The
a l g o r i t h m fo r th i s fu n cti o n is shownin the logic flowchar t in
F i g u r e 5 .5 . N o te h o wth e f' lowchar t defines a logical solution to
t h e p r o b 'l e mw i th o u t re fe re nce to any specific har dwar e.
A s i m i la r p ro ce d u rei s u se d to design the algor ithm for wr iting data.
F o r l , | r i te o p e ra ti o n th e ti ming wavefor mspecifies that we advance
t h e t a p e , te st fo r E n d o f T ape, test for l,lr ite pr otect, set the Read /
w r i t e I i n e to I'l ri te , se t u p the output data, str obe the data tr ansf e r l i n e , w a i t fo e D a ta R e adyand exit. This flowchar r tis shownin
F i g u r e 5.6 . U si n g th e se tw o logic flowchar ts we could then dr aw the
m a c h i n ed e p e n d e n tfl o w ch a rts or pr oceeddir ectly on to the actual
program

5-L7

EilTER
TAPEREAE

AEVANEE
TAPE

INPUT
TAPEilECK
STATUS

SET ERROR
INDICATOR

OUTPUT
TRAilISFER
SI6NAL
I}IPUT
TAPEDECK
STATUS

DATARFADY

l
F IGU R5E.5 T APEDECKREADLOGICFL0l'CHART

INPUT
TAPE
STATUS

PROTECT

SET ERROR
INDICATOR

FERSIGNAL

I NPUT
TAPE
STATUS

F IGU R5E.6

CHART
LOGICFLOt,l
T APEW RITE

5 . 4 O b j e c ti o n s to F l o w ch a rts
l' l e h a v e b e en u si n g (a n d w i I I co ntinue to use) flowchants to r epr eseni the
a l g o r i t h m s we h a ved e ve 'l o p e d . This pr ocedur eis not univer sally accepted ,
p a r t i c u l a r l y i n th e d a ta p ro ce s singindustr y. cr itics maintain, with a
c e r t a i n a m ou n to f i u sti fi ca ti o n , that flowchar ts ar e unnecessar and
y
even
m i s l e a d i n g . T h i s p o si ti o n a ri se s fr om the basic contention that ( 1) flowch a r t s a r e o n l y ma rg i n a l l y u se ful in higher level languagepr ogr amdevelopm e n t s a n d ( 2 ) co mp l e xfl o w ch a rts can become
ver y difficult to follow. To
su p p o r t t h i s p o si ti o n th e y ci te ver y valid evidencethat m ost pr ofessional
p r o g r a l m e r sd ra w o n l y ve ry l fmi ted flowchar ts pnior to com m encing
coding.
I n f a c t , m ost fl o w ch a rts fo r l a rge systemsar e dr awnfor documentation
p u r p o s e sa f te r th e p ro g ra mi s co mplete. This situation ar ises fr om the
f a c t t h a t w h e nw ri ti n g p ro g ra msin moder nhigher levei languages,a' lgor ith m s
c a n b e e f f i c i e n tl y d e ve l o p e dd i rectly in the languagewith no inter m ediate
f lo w c h a r t s at a l l .
T o a n s w e rt h e se a rg u me n ts(w h i ch we r eally basicaily agr ee with) , we must
po i n t t o t t t o b a si c fa cts: (1 ) satisfactor y higher level languagesar e
no t y e t g e n era l l y a va i l a b l e fo r rnicr ocom puter s,
and ( 2) m ost pr ogr ar m er s
d e v e l o p i n gmi cro co mp u tepr ro g ra m sar e not pr ofessional pr ogr amner s. The
c o n t e n t i o n t h a t p o o rl y stru ctu re d flowchar ts ar e har d to follow is comp l e t e l y t r u e . Wew i l l a l w a ysg o to gr eat lengths to keep flowchar t logic
s t r u c t u r e c l e a r.
Th e f i r s t

f a ct, th e l a ck o f h i g h er level languageavailability, is obvious .

Th e r e a r e a t p re se n t o n l y tw o w i dely available higher level micr ocomputer
la n g u a g e s( I nte l 's P L IM*a n d va ri ous BASIC**inter pr eter s.) 0f these,
o n l y BA S I Ci s a va i l a b l e fo r sma l l systemuse. It will be sometime befor e
c o r m o nh i g h er l e ve l l a n g u a g e ssu ch as F0RTRAN
or C0B0Lwill be available
f o r m i c r o c o mp u te rs. In th e i n te rim , the wor k will be done in assembly
lan g u a g e . Eve nw h e nh i g h e r l e ve l languagepr ocessor sbecom eavailab]e
f or m i c r o p r oce sso rs,th e n a tu re o f manym icr opr ocessorapplications is
* W l 4 i s a r . eg i ste re dtra d e ma rko f Intel cor p.**BASICis a r egister ed
t ra d e m a r ko f D a rtmo u thU n i ve rsi ty.

5-20

s u c h th a t a kn o w l e d g e
o f assemblylanguagewill still be r equ.ir ed. H .i gher
l e v e l l a n g u a g e sa re o n T y mar g' inallyeffective in
developingpr ogr amsfor
u s e i n co n tro l o r re a l ti m e app' lfcations. Pr ogr am sof
this type r equi r e
t h e co mp l e teco n tro J o f the computer ' shar dwar ethat assembly
langu age
p r o v i d e s. F o r a sse mb l y'l anguagBr
us of the flowchar t pr ovides a ps eudo
h i g h e r l e ve l l a n g u a g efo r algor ithm deveiopm entthat can
be either dependent
o r i n d e p e n d e not f th e co mputerto be used. ( L,lewill
havem uchmor eon
t h e h i g h e r l e ve i -a sse mb l ylanguagetr adeoffs .in l_esson9. )
T h a t mo st mi cro co mp u tepr rogr amm erar
s e not pr ofessjonal pr ogr am m erjss
a i s o fa i rl y o b vi o u s. Mo s t cur r ent m icr ocomputer
pr ogr ar ,r nerar
s e ' logi c
d e s i g n e rsa n d h o b b yi sts, n lanypr ' ugr ar r nr r ir
g ,Lhe !"ir .st,tim e. Sinc e they
f-ror
w i l I p ro b a b l y b e fo rce d to use assem btylanguage,these user s yu' ilI b e
l e a r n in g p ro g ra mmi n ga, i g or itir n developm ent,and m achjnestr uctur e a l l at
t h e s ameti me . T h e u se o f, assemblylanguagepr ogr anr ning
and flowchar ts
w i l l en a b l e u s to se p a ra te these jear ning activities.
In par ticu' lar, the
i n i t i a l p ro ce sso f te a ch i ng gener al algor ithm developmentis better pr es e n t e d w i th g e n e ra 'lfl o w char ts than with som especific language. The
t e c h n i q u e sp re se n te du si n g somespecific languaEem ay r eflect the com pr om i s e s ma d eb y th e l a n g u a g er ather than those r equ' ir ed to sclve the p r obl em .
Af t e r s o mei n i ti a l a 'l g o ri thmdeve' lopr nent
tr aining, the user m ay be a bi e
t o p r o ce e dto fl o w ch a rt free higher level languagepr ogr am m ing. For that
i n i t i a l tra i n i n g , h o w e ve r,the iogic flowchar t is an im por tant teach i ng
tool.
T o m a kema xi mu m
u se o f fl o wchar ts without becom ingunduiy attached to
t h e m w e w i l l a d o p t a ca re fully str uctur ed appr oach. Ali a' lgor ithm sw i l l
b e p r e se n te di n g e n e ra l l o g ic flowchar ts. l,{ ewill not use m achinedepend e n t f l o w ch a rts e xce p t i n the contexi of specific exam ples. All flowc har t
s t r u c t u re s w i l l b e ch o se nfrom a sr nall gr oup of simple, 1og' icall.ysuffi c i e n t stru ctu re s w h o seu se can be djr ectly tr ansfer r ed to m ost h' !gher
l e v e l l a n g u a g e s. i n th i s w ay we will makem axjmum
use of flowchar ts w hi l e
a v o i d i ng th e ma j o r o b j e cti o ns.

5-zt

(.5

P ro ce d u re sA fte r A l qor ithm Developm ent

A f t e r yo u h a ve co mp l e te dthe pr oblemdefinition, block diagr am s,and
a l g o ri ttrn s, yo u ca n b e g i n to think about wr iting the pr ogr amr equir ed to
i m p l e me n th
t e l o g i c syster nyou havedefined. However ,it should be appar e n t by n o wth a t i f yo u h ave followed the fir st thr ee steps cor r ectl y ,
t h i s ste p sh o u l d p re se n t you with ver y little tr ouble. The blockin g and
a l g o ri ttrn ste p s co mb i n e dwith the flow char ts will have supplied th e s y s t e m s tru ctu re a n d co n tro l logic. All you will need to do is implem ent
t h e se fe a tu re s u si n g th e pr ogr anminglanguageyou have available. N atur al l y ,
t h a t i s e a si e r sa i d th a n done, but if the logic is cor r ect, the pr o bl em
w i l l h a ve b e e n re d u ce dto finding com binationsof machineinstr ucti ons or
h i g he r l e ve l l a n g u a g estatem entsto per for m the desir ed oper ations . l l e
w i l l sp e n dth e n e xt e i g h t lessons r efining and expanding.yourpr obl em
s b l v in g ski l l s, a u g me n tingthese skills with useful pr ogr anmingtechni ques .
.5.6 Summary
This lesson has presented the general approachrequired to solve software
p r o bl e ms. A l l so ftw a re pr oblem scan be solved by dividing than int o b'l oc k s
a n d s u b -b l o cks, d e ve l o p i ngalgor ithms for those blocks, wr iting pr ogr am s
t o i mp l e me n tth e a 'l g o ri tl ms and inter facing the blocks back into a s y s tefi t
w h i c h so l ve s th e p ro b l e m. The gener al appr oachto pr oblemdefinition,
was then pr esentedand illustr ated us b l o c k i n g a n d a l g o ri ttm d evelopment
i n g th e e xa mp l eo f a d i g i tal Read/l,lr itemagnetic tape deck.

5-22

QU E S T ION S
1.

D e scri b e th e g e n e r al softwar e pr oblemsolution pr ocess. Is thi s the

w a y yo u n o rma l l y a ppr oachpr oblems? Do you think the generai pr oc ed u re ca n b e a p p l i e d to other , non- softwar epr oblems?

2.

l rl h yi s i t i mp o rta nt to establish and follow a functional spec i fi c ati on

a t th e o u tse t o f the solution to a pr oblem ?

3.

D e scri b e " cre e p i n g featur est' . Haveyou ever seen it in actio n? W hat
w a s th e ca u se ? Whatwas the r esult?

4.

D e scri b e th e d i ffe rence betweena logic flowchar t and a m achi ne

d e p e n d e n fl
t o w ch a rt. W hichdo you usually use? If you usua l l y us e
a ma ch i n ed e p e n d entflowchar t, do you usually dr aw a logic flow c har t
o f th e so l u ti o n fo r futur e use?

PROBLEI{S
1.

l l h a t va l u e o f A w i l l be pr inted in the exam pleflow char t bel ow :

B =B * 2

B=A+1

2-

Th e F i b o n a cci se ri e s F( N) is a m athem aticalnum bersequencewhic h i s

d e fi n e d fo r a l l i n te g er values of l{ by the fojlowing algor ithm
F (0 ) = g
F (1 ) = I
F (tt1 = F (N - 1) + f( H - 2) for all N > I
F o r e xa mP l e ,F (2 ) = F (2 - l) + F ( 2 - 2)
= F (1) + F( 0)
=1 +0

= t.
Thusthe Fibonacciseries can be representedas follows
N 01?34567
F(N ) 0 rL2 3 s 8 13 .

N
F ( N - 1 ) + F ( N- 2 )

Drawthe flowchart to computeF(N) for any value of N.

3.

Drawa flowchart which incorporatesthe flowchart developedin

Problern
and print the first 100valuesof N and F(N).
2, to compute
(Assume
that the cormand
"Print" is sufficient to print a value.)

4. Onesimplemethodoften usedto multiply tuo numbers

together is to
repeatedlyadd one numberto itself. For example,3 * 4 can be thought
o fas 3 + 3 + 3 + 3= L 2 . De v e lo pt h e a lg o r it t u nt o m u lt ip ly t wo n u m bers using this method. Drawthe flowchart. Doyou feel this is an
efficient wayto multiply two numbers?
Is there any way to makethis
basic algorithmmoreefficient?

5-U

l'lglSlq USrndHOCOUClltl
0I HCV0UddV
3UV/tA.ktOS/3UV,l
oUVHIHI

THEHARDWARE/SOFT}JARE
APPROACH
TO M ICROCOM PUTER
OESIGN
INTRODUCTION
I n th e co u rse o f d e si g n i ng a systemther e ar e a ser ies of cr ucial dec i s i ons
w h i ch mu st b e ma d ere g a r ding the u' ltimate systemim plementation. T hr ougho u t th e so ftw a re co u rse we ar e concer nedpr imar ily with the im plementati on
o f th e so ftw a re p o rti o n s of these systemsand how they inter act wi th av ai l a b ' l e h a rd w a re . T o b e su r e, this ar ea is vital to the designer . How ev er ,
t h e th o rn i e st p ro b l e mi n i tially confr onting m ost designer s of micr opr oc es s or
b a s edsyste msi s h o wto par tition the systemfunctions betweenhardw ar e
a n d so ftw a re i mp l e me n tatlons. This is under standablbsince r lost us er s ar e
f a r mo ree xp e ri e n ce dw i th har dwar edesign than softwar e design. How ev er ,
t h e p l a i n tru th i s th i s: within the speedlim its imposedby any com puter ,
a n y th i n g th a t ca n b e d o n e with har dwar ecan be done with softwar e. In fac t,
o n l y a sma l l p e rce n ta g eof applications will pr esent speedpr oblems .
U s u a l l y e ve n th e se a p p l i cations ar e only speedsensitive in ar eas w hi c h
c a n be re a d i l y i d e n ti fi e d and pr ocessedwith discr ete logic to m ak ethem
a d a pta b l eto a so ftw a re s olution. ice thus have a sliding scale of i m pl em e n ta ti o n p o ssi b i l i ti e s fr om applications with no softwar e ( i.e. no m i c r op r o c e sso r)to a p p l i ca ti o ns wher e 95%of the systemcost will be in the s oftw a r e . Gi ve n th i s w i d e ra nge of possibilities, howdo we decide wher eto
d r a w th e l i n e ? Wh e rei n deed. Assumingthat the objective is to do the
j o b a n d ma keso memo n e y,the answeris obvious: we dr aw the line a t the
point wherewe find the lowest cost hardware/softwaresystem that does
t h e jo b .
B e f o re w e cd n d i scu ss h o wto tr ade har dwar ecost for softwar e cost, w e
m u s t fi rst i d e n ti fy th e ar eas that affect cost in both of these ar eas .
F o r t h e p u rp o se so f d i scu ssion we shall consider cost to be localized i n
t h r e e a re a s: h a rd w a reco st, SOftwar ecost' and systemcost' After w e
h a v e d i scu sse dth e va ri o us cost ar eas we will be able to discuss tr adeoffs
r e q u ire d to mo d i fy syste mcost and per for mance.

6- 1

T h e C P Uch o se nfo r th e systemwil' l have the centr al effect on the har d w ar e

c o s t o f th e syste m. T h i s i s not becauseof the cost of the pr ocessor i ts e l f . Fo r mo st syste msth e actual CPUcost wil' l be an insignificant p or ti on
o f t h e t o ta l syste rnco st. It is a r esult of the effect of the CPUon a l i
o t h e r a s p e cts o f th e syste mdesign, both har dwar eand softwar e. It the r ef o r e m a ke sth e mo st se n seto discuss these costs within the context of the
C P Ui t s e l f.
6 . 1 H a rd w a reC o st
H a r d w a reco st w i l l b e co n si d er edto be all of the har dwar ewhich m ust be
d e s i g n e dto i mp l e me n th
t e re quir ed systemfunctions. This would includ e
t h e m i c r op ro ce sso r,
me mo ri e s,inter faces, clocks, powersupplies, ter min al s ,
p r i n t e r s, o r o th e r p re -co n fi gur edper ipher als.
6 . 1 . 1 Syste mS p e e d
T o p a r a p h ra sea n o l d p o l i ce traffic slogan, "Spbedkil' ls micr ocompUte r
p r o j e c t s " . T h i s i s d u e to the sad fact that of all the gr eat things m i c r op r o c e s s o rsd o , d o i n g th e mfa st isn' t their best attr ibute. M ost com m onl y
a v a i l a b l e mi cro p ro ce sso rsh a vem aximum
cycle speedsin the ZMHzr ange.
E x e c u t i o no f a n i n stru cti o n gener a' llyr equir es fr om 4 to 10 machinecyc l es .
l ' l o r e o v er,d o i n g a n yth in g u se ful wi 1I r equir e sever al i nstr uctions. lr lhat

al'l this meansis that a Itcfqproq-elqofp-pe!:p!.9_"sJ-"q!_:_iqgfAhl.y*,q_1gleJ*:m

c o n v e n t i o n a l se q u e n ti a l a n d com binationallogic. As a r ough r ule of th ur nb,
'if your
'AC
syste mre q u i re s th e p r ocessorto do anything faster than lOusec
( 1 0 0 k H z ) yo u w i l l n e e dto b e ver y car eful in your design

|l@-.

T h e r e a r e a l i mi te d n u mb e o
r f high speedm icr opr ocessor savailable, but
t h e s e a r e se ts o f d e vi ce s, n ot sing' le packagemicr opr ocessor s. They ar e
s o m e w h ahta rd e r to u se a n d co nsider ablym or e expensive. If you.begin to
u s e t h e s e yo u ma yd i sco ve r your cost r apidly exceedingthe cosflof som e
o t h e r f o r m o f l o g i c i mp l e me ntation. Also, high speedfor the CPUgener al l y
r e q u i r e s h i g h sp e e dme mo ri e s,inter face ' logic,andper ipher al devices,
f u r t h e r r a i si n g co sts.

6-2

A s w e me n ti o n e de a rl i e r o few pr ojects have over all speedr equir em entsthat

a re so se ve re a s to p recludemicr opr ocessoruse. However they
,
do ex i s t,
a n d i f yo u th i n k yo u have one, be ver y car eful to be cer tain fr ^o mthe s tar t
t h a t a mi cro p ro ce sso will
r
be able to do the job. Conver sely,ther e i s no
p oi n t i n p a yi n g fo r sy stemspeedyou don' t need. Speedis expens i v e. You
g en e ra l l y g e t a ce rta i n level of speedwith the m icr opr ocessor . If y ou'r e
n ot u si n g i tr s i f you can tr ade it for som einter face sim plici ty . N o
u se b u yi n g a fa st p ro cessorand fast inter faces if a fast pr oces s orand
s o mesl o w e r, d u mb e r,a nd cheaperinter faces will do. tle' ll ta]k m or e about
t h i s l a te r.
,6-.l.:,2 ltleqgryRequirements
T h e syste mme mo ryi s w her eyou will stor e the pr ogr am sand data requi r ed
f or syste mo p e ra ti o n . l.lith most micr ocomputersystemsthis m emor yw i l l
c o n si st o f a co mb i n a tionof r ead/wr ite m emor y( RAM )and r ead only m em or y
( R0M)
. (t,|ith someprocessors the CPUi tsel f contai.ns a sma'l
I read/wri te
m ern o ry,th u s ma ki n gi t possib' leto implementsimple systemswith j us t the
C PUa n d R OM's. L a rg e r system swi' 11r equir e additional r ead/wr ite m em or y) .
T h e o b i e ct o f th e g a meher e is, as usual, to minimize cost. Thi s 'i s done
b y g e tti n g a s mu cho f the softwar e fnto ROMas possible. This is bec aus e
R OM
ca n b e l e ft w i th p oweroff and the pr ogr amwill still be there w hen
p ow e ri s re sto re d . A l as, such is not the case for RAM . Thuswheny ou
h ea r p e o p l e sa y th a t p rogr amsshould be in ROMbecauseROMis cheaperthen
R A M,i t i sn 't re a l l y true. Bit for bit the costs ar e becomingqui te c om p ara b l r w i th ma n ytyp es of ROMconsider ablymor e expensivethan R AM . T he
f a ct i s th a t R A Mi s n o t pr actical in dedicated system swhicttm ust m ai ntai n
the prograrnwithout re-loading memoryevery time the power is tunned 0N.

anddynamig84F:.
Bead/writenelqry can be broadlydivided into static RAM
.a

A s ta ti c*8 & [*Wi " ].J

ma i n tain its data as long as power is applied. A dy nam i c

@.l l * p ' s r r * j " * ] k . T h i sr e fr e sh o p e r a tio n isa cio m p lish e d

b y p u l si n g so meo f th e addr esslines ( usually the most significan t bi ts )
p e ri o d i ca l l y. T o d o th is r equir es the addition of special cir cuitr y to
t h e syste m. In g e n e ra l, the integr ated cir cuit constr aints ar e s uc h that

a static memory
requires morea

me m o r o
y f si mi l a r si ze . S ta ti c m emor iesalso dissipate m or e powerper bit .
T h e l a r g e s t R A Mme mo ri e sa re , ther efor e, usual' ly dynam ic,at least initial l y .
A s t h e d e v ice te ch n o l o g yi mp ro v esthese lar ger m emor iesusual' ly then bec o m ea v a i l a b l e i n sta ti c fo rm.
T h e c o s t o f b o th sta ti c a n d d yn amicmemor ieshas declined and wil' l continu e
to d e c l i n e . T h i s co st i s b a se don the absolute cost per bit for a given
a m o u n to f s to ra g e . H o w e ve r,th e device or ganization and not this absolute
c o s t p e r b i t i s o fte n mo re i mp or tant in pr actical applications. In ter ms

of cost per bit, a 4096 x 1 dynamicmemorymay be muchcheaper than a 256 x 8

s t a t i c m e mo ry. H o w e ve r,yo u w i l l need eight of the dynamicmemor iesto do
a n y g o o d . T h e y w i l l re q u i re re fr esh cir cuitr y, and they will take up eight
t i m e s m o r e P.C . b o a rd sp a ce i n pr oduction. If you only need a 128 byte
b u f f e r a n d so memi sce l l a n e o u sp r ogr amstor age, the bigger "cheaper "memor y
m a yc o s t f a r mo re . F o r co st e ffective design it is im per ative that you
a v o i d m e m oryo ve rki l l . D e si g n i n what you need, allow someextr a for unf o r e s e e nd i ffi cu l ti e s

a n d re a so nablefutur e expansionand stop.

T h e a d v a n c e si n me mo ryte ch n o l o gyar e im pr essiveand they r eceive lots of

publicity.
But the fact remains that fglv *glg!5.,fe.ri-mas,5.-p1odu.9_!io1..ry!11

oftea nrin'i{'J[*P-?g!qq-e---c-9u[!""91d
gas-eol.
tggglqe*y.$l_3ll.9"l1.ng:*-9,f,-"SM.

one
:y*g_tg!,g.t'3ce""ylll-1.
I3.'.':-..:.lTp"'!.!t.rhansheer
"vglyrye.Buv

mw i th l o ts o f RAM. Use it to developlots of system s

d e v e l o p m e nsyste
t
w i t h o n l y t h e R A Mre q u i re d to d o the job.

l, l i t h R O M ' s,th e si tu a ti o n i s co nsider ablydiffer ent. Readonly stor age is

data wor d .
re a l l y o n l y u se fu l o rg a n i ze di n m ultiples of the computey' sbasic
for use in an
I t d o e s n ' t m a kemu chse n seto maskpr ogr amtwo 1023X 4 ROMs
s e widely available for eight- bit
1 0 2 4X 8 s y s te m. A s a re su l t, ROM ar
p r o c e s s o r si n si ze s fro m B x 8 to 2048 x 8. ROMar
s e available in thr ee
and
t yp e s , e a c h su i ta b l e fo r ce rta i n ar eas of application: ER0M s,PR0Ms
maskedprogrammed
ROMs.
can be pr ogr am m ed
An E R 0 Mi s a R OMw h i ch ca n b e e rased and r e- used. An EROM
a n d , i f e r r o rs a re fo u n d , e ra se dand r epr ogr am m ed.Er asur e is accom plished
b4

b y e xp o si n gth e E R 0 M
to intense ultr aviolet light for a half hour or s o.
I n th i s w a y th e E R 0 Mcan
s be r e- used indefinitely. EROMs
ar e th e m os t
e x p e n si veL yp e o f R 0 M. Theyar e best used in development
wor k o r l ow
v o l u mep ro d u cti o n e g u ipnentwhich r equir e fr equent changesto the oper ati ng p ro g ra m.
A P R 0 Mi s a R Of'l
w h i ch comesfr om the manufactur erwith all locati ons as
o n e 's o r ze ro 's. It can then be pr ogr am m ed
by the user . Unlike an ER OM ,
however, once programmed
a PR0f'fcannot be erased. PR0l'lsare somewhat
l o w e r i n co st th a n E R Ol' ls.However ,fr equent pr ogr amchangescan qui c k l y
m a keth e mmo re e xp e n sive. Theyar e best used in pr oduction system sw hi c h
w i l l re q u l re fe w ch a n gesbut whosepr oduct' ionvolumedoes not jus ti fy a
maskprogrammed
ROM.
A mask programmed
R0l'lis fabricated by the manufacturerto contain the
d e si re d p ro g ra m. It i s neither field pr ogr amr nable
nor er asable. A R OM
i s o rd e re d b y se n d i n gthe ser niconductor
manufactur eryour pr oqr a m . T hey
t h e n g e n e ra te a cu sto mROMfr om your specification. The cost of R OM pr
s od u ce dth i s w a y i s th e l owest available. However ,the ssnicondu c torm anuf a c tu re rs ch a rg e a fl a t fee for the gener ation of the r equir ed mas k . T hi s
cost makesmask programmed
ROMs
cost effective only for those high volume
p r od u cts w h o sep ro g ra mwil' l never ( hopefully) r equir e change.
6 . 1.3 I/0 R e q u i !" e ments
I t i s ra p i d l y b e co mi n gappar entthat I/0 is the soft under belly o f m os t
microprocessorbased systems. Interfacing the microprocessorto the rest
of the system is always a requirement.
=
JE_fn-i_."rsp.r9cg9lgtg,*cgf.r-el!.U
. a va i l a b l e g e n e ra l l y p rovide only enoughinter face capability to di r ec tl y

j1. g{ out
?l! .!.r"9,.[9.].sJll.II3.e one normalTTt,device. This me.qns"!h,q"t
:l !rl.:*,_--Ti91oOrocesso.1
1u1t bg b.uffered, Further,control signalsmustbe
d e co d e d ,i n te rru p ts mu st be pr ocessed,data m ust be latched and h el d unti l
the processor or peripheral is ready to accept it, and manyother system
r e qu i re me n tsmu st b e met. All this falls within the r ealm of I/0.

6-s

T h e f u n d a me n tael l e me n to f mi cr opr ocessorI/0 oper ations is the l,r g por t.

A n I / A p o rt fs th e p o i n t w h e re the signals to and fr om the var ious 1/A
d e v i c e s me e t th e i r re sp e cti ve signals fr om the m icr opr ocessor . I/0 ports
p r o v i d e bo th b u ffe ri n g a n d so mecontr ol decoding. The I/0 addr essessent
o u t b y t h e C P Ua re d e co d e dto pr ovide an enable signal to a specific llA
p o r t , t h ere b y g a ti n g th e i n fo rmation fr om that por t onto the systemdata
b u s f o r a re a d o p e ra ti o n o r g ating the infor m ation on the systemdata b us
i n t o t h e p o rt fo r a w ri te o p er ation. The mechanicsof howthe por t wor k s
a r e n o t a s i mp o rta n t a s th e realization that all data into and out of the
m i c r o p r o ce sso ri s g o i n g to h a ve to pass thr ough I/0 por ts. This means
t h a t y o u w i l l w a n t to g e t yo u r m oney' swor th out of ever y por t. To help
y o u d o t h i s, so mep ro ce sso rspr ovide a small num ber( usually two or four )
o f I / 0 p orts ri g h t o n th e C P Uchip itself.
If you only need one or two
p o r t s f o r a si mp l e syste m, th i s can be a significant cost saving factor .
Af t e r y o u 've g o t th e I/0 p o rts, Jou then m ust design the speciai log' ic
r c q u i r e d to co n tro l ti re d e vi ces or cir cuits you ar e inter facing. For mos t
m i c r o p r o c e sso ra p p l i ca ti o nth
s i s is wher eyou will do the m ajor ity of your
h a r d w a r ed e si g n . i f yo u d o l ot,s of micr opr ocessorsystem s,you will
e v e n t u a l l y a rri ve a t so mesta ndar d I/0 por t design, but ther e will almos t
a ' l w a y sb e so med e ta i l e d i n te rface design wor k to be done.
l . l h e nm a k i n gth e d e ci si o n s a b o ut howto implementyour I/0 por ts and contr ol
l o g i c r y o u ma y b e a b l e to o b tain somecost advantageby using a specializ ed
i n t e r f a c e d e vi ce . S o memi cro pr ocesson
manufactur er shave designedspeci al
f a m i l i e s of d e vi ce s to e a se I/0 design.' Thesedevices usually consist of
s e v e r a l I /0 p o rts, so med e fi n ed logic functions, and all r equir ed contr ol
l o g i c r e q ui re d to i n te rfa ce som edevice dir ectly to the m icr opr ocessorwi th
l i t t l e o r n o e xte rn a l l o g i c. For example,the data por ts, contr ol log' ic,
a n d i n t e r fa ce ci rcu i try re q u i red to input and output par allel data dir ec tl y
t o a s e r i al i n te rfa ce i s o n e popular example. 0ther s include inter r upt
h a n d l e r s , re a l ti me cl o cks, b i -dir ectional data por ts, and so on, with
m o r e b e c o mi n ga va i l a b l e a s th e industr y defines what functions ane conr nonl y
u s e f u l . . If yo u ca n fi n d so me ofthese to fit your needs, they can save
you money.
s- o

I / 0 d e s i g n i s th e a re a w h e reyou can often achieve significant savings b y

t r a d i n g h a rd w a refo r so ftw a re. It is also the ar ea wher eyou m ay be ab l e
t o t r a d e so meco st fo r e n o u g haddedspeedto makea usable system. I/O
d e s i g n i s a n a re a w h e recre a tive use of softwar e and har dwar ewill r esuJ t
i n o p t i m u msyste mp e rfo n n a n ceat Jowestsystemcost.
6 . 1 . 4 P e ri p h e ra l D e vi ce s
I n t e r m s o f p ro d u cti o n co st th e most expensivepor tions of your system
c a n e a s i l y tu rn o u t to b e th o se assem bliesyou have to buy pr e- assem bled.
Al l t y p e s o f co mp u te rke yb o a rds,displays, pr inter s, tape equipm ent,A/0
a n d D / A c o n ve rte rs, a n d si mi l a r per ipher als ar e ver y expensiver elative
t o t h e c o st o f th e mi cro p ro cessorhar dwar e. In the nor m alm icr opr ocess or
s y s t e mt h ese d e vi ce s a cco u n tfor over 50%of the har dwar ecost. If you
m u s t i n c l ud e th e se co mp o n e n ts
in your system, it is ver y im por tant to mak e
a v e r y c a r e fu l a n a l ysi s o f w h etheror not your pr oduct is sti' ll cost effec t i v e . I t ca n b e d e va sta ti n g to have to add a $75 keyboar dto a micr opr oc e s s o r s y s te mw h e re th e to ta l com ponent
cost is only 950. In this type
o f s i t u a t i o n yo u mi g h t se e i f y ou can use a less expensivedevice and add
t h e o t h e r fe a tu re s w i th so ftw ar e. All these types of decisions m ust be
w e i g h e d c a re fu l l y b e fo re yo u star t the actual design.

I n t o t h i s c a te g o ry w e to ss a l l those m icr opr ocessorsystemdetails that

d r i v e y o u r syste mco st u p . T h esear e par ticular Jy obnoxiousbecausethey
a r e o f t e n ove rl o o ke du n ti l i t i s too late. The thr ee m ost com m on
offender s
i n t h i s c a te g o ry a re cl o cksr p owFsupplies and inter face r equir ements.
T h e s y s t e mcl o ck i s u se d to p rovide the timing signa' ls r equir ed to r un th e
C PUa n d s o rn eo f th e o th e r systemlogic. Fr oma cost standpoint, ther e are
tw o a r e a s o f i n te re st: w h og e ner atesthe clock and howgood does it hav e
t0 be.

I n th e fi rst ca se th e a nsweris r :ither the CPUor ihe system. If

t h e C P Ug e ne ra te s i ts o w ncl o ck ( it m ay need an exter nal r esistor and
ca p a c i t o r ) , yo u d o n 't h a ve to wor r y about the secondquestion. If you hav e
t 0 g e n e r a t e th e cl o ckr Jo u d e fi nitely have to wor r y about jt.
Somem icr op r o c e s s o r sa re ve ry fi n i cky a b out their clocks. This m eansspecial dr ive r
6-7

c h i p s, crysta l s, i o g i cr p owrsupplies ( i.e. money) . If you ar e in a

v e r y c o st se n si ti ve o p e ra tion, this can r nakea significant differ enc e.
I n a d d i ti o n to th e ma fn C PUclock, c!"tdin inter faces will r equir e t hei r
o w n c lo cks. T h i s i n c'l u d esser ial inter faces, r ea' l time clocks, and m any
s p e c ia l i n te rfa ce s. In somecasesyou may be able to der ive the r eq ui r ed
c l o c k (s) fro m th e ma i n systemclock. if nat, you will have to plan on
t h e a d d e dco st o f th e re q uir ed additional clock( s) .
Po w ersu p p l i e s a re a n o th er ar ea wher er equinements
d' iffer wide' ly fr om
m i c r o p ro ce sso rto mi cro p rocessor . Somemicr opr ocessor will
r un off
s
t h e s a me+5 V p o w e rsu p p l y that' is used for all the logic. Somer equ i r e
u p t o th re e d i ffe re n t p o u rersupplies. Powersupplies ar e not cheapand
y o u c a n q u i ckl y a d d a l a rg e cost to the systemthat you m ay be able to
a v o i d e n ti re l y b y ch o si n ga differ ent pr ocessor . ( Note: after you go to
t h e t r o u b l e o f p i cki n g a micr opr ocessor "be sur e the r est of the sys tem
r u n s o n th e sa mevo i ta g e s. it doesn' t m akemuchsenseto cut cor ners to
g e t a si n g l e su p p l y mi cro pr ocessorand discover the memor ieschosenneed
t h r e e su p p l i e s a n yw a y.
)
Be s i d e sp a yi n g a tte n ti o n to the num berof systempowersupplies, you m us t
b e a wa reo f th e o ve ra l 'l systemcur r ent r equir ements. Theser equir ernents
c a n v a ry w i d e l y, d e p e n d i ngupon the CFU,m$r CIr ies,and inter face logi c
u s e d . Y o umu st b e ce rta i n that your powersuppTiescan supply enough
you don' t want to pay for
c u r r e nt to me e t p e a k systemusage. Conver sel,y,
m o r e ca p a b i 'l i ty th a n yo u n eed. To solve this pr oblem ,you usually don't
s e t t l e o n th e fi n a l p ro d u ction powersupply r atings until the systemi s
c o m p l e tea n d i ts p o w e rre q uir em entsar e char acter ized. This is in contr as t
t o t h e se l e cti o n o f th e systemhar dwar enwher e the numberof supplies to
b e u s e d i n th e syste mi s d eter m inedbefor e beginningthe design.
I n t e r f a ce re q u i re me n tsre l ate to suppor t cjr cuitr y r equir ed to use the
that
m i c r o p ro ce sso w
r j th o th e r devices jn the systm n. A r nicr opnocessor
s its own family of devices m ay
i s v e r y, e a sy to u se a mo n gthe m emberof
t u r n o u t to b e a h o rro r to inter face to the r est of the wor ld. This i s

6-B

pa rti cu l a rl y tru e o f P- channeldevices to be used in N- channelo r T T L

s yste ms. In co mp a ti b ilities amongsystemcomponents
can lead to pr obl em s
a n d i n cre a se dco sts a l l over the system , including the pr evious l y m enti oned
c l o ck a n d p o w e rsu p p l y ar eas.
6. I . 6 MicroprocessorHardwareSelection SuJrnnarv
I t sh o u l d b e o b vi o u s from the pr ecedingbr ief discussion that pic k i ng
m i cro p ro ce sso hr a rd w ar eis a tr icky business. Even ignor ing the s oftw ar e
c r i te ri a r |o u mu st b e ver y cer tain you get a devicewhichwill meet y our
at
s yste mre q u i re me n tsa t the lowest cost. It is im por tant to r em em ber
t hi s p o i n t th a t l o w e st systemcost maynot always be the sameas l ow es t
p ossi b l e h a rd w a reco st. M odification ease, maintenanceand other fac tor s
ma y e n te r i n to th e p i ctur e. Ther e ar e times whenyou maywant to k now i nEl y
a ll o w so mee xtra h a rd war ecost to lower the costs in someother ar ea. | r l e
wi l l p o i n t o u t th e se ar eas as we go along.
6 .2 S o ftw a reC o sts
S o ftw a reco sts a re i n sidious. You can' t see it, or feel it, or hear i t'
pr oject faster than alm os t any b u t so ftw a re ca n b re a k your micr ocomputer
mor e and m or e
t h i n g . A s h a rd w a resystem sand per ipher al devices becom e
s ta n d a rd , mo rea n d mo r e of the design- to- pr ice bur den is going to fal 1 on
t h e d e si g n e r w h o h a s to design the softwar e to hold these har dw ar ebl oc k s
t og e th e r.
cost and a v er y 1ow
So ftw a re i s ch a ra cte ri zedby a ver y high development
of 0S 360
d up l i ca ti o n co st. B y way of exam ple,IBM' s softwar e development
( a ve ry l a rg e a n d co mplexsoftwar e pr oject, to put it m ildly) is es ti m ated
to have taken over 5000 manyears of developmenttime. However,the entire
s y ste mca n e a si l y b e d uplicated and stor ed on $1000wor th of m ag neti ctape'
is expensive. This c har ac ter As w e sa i d , d u p l i ca ti o n is cheap, developm ent
i s ti c b ri n g s w i th i t the following gener alization: softwar e for us e i n
h ig h vo l u mep ro d u ctsmust be fixed. It is absolutely not possibl e to pr oduce low cost customsoftware. 0nce you cornnit a programto R0l'1,don't
c o n si d e r ch a n g i n gth e pr ogr amunless you ar e pr epar edto changee v er y other
i d en ti ca l R OMi n e ve ry other system . ( Not to mention updating a1l
5- 9

r e f e re n ce d o cu me n ta ti o n.) The cost of customsoftwar e ( unless you ar e i n

t h a t b u si n e ss) i s so h i g h as to com pletelypr eclude it fr om volumes y s tem s .
T h e so ftw a re d e ve l o p me nt
cost ver y quick' ly completelyover shadowthe
s har dw a r e co st.
So f tw a ree xe rts co st p ressur eon pr ojects fn two basic ways. The fi r s t
i s w h e np o o r te ch n i q u ea nd analysis lead to system swith inefficien t us e
o f e xp e n si veh a rd w a rere s our ces. This causesthe systemto end up w i th
m o r eme mo ryth a n i t re a i ly needed,high speedinter faces that cou' l d hav e
b e e n e l i mi n a te d w i th g o od softwar er XtFa i/0 por ts that som esoftw ar e
m u i ti p l e xi n g co u l d h a ve eliminated, and so on. The secondway soft w ar e
r a i s e s co st i s i n th e d e v elopm ent/suppor
t
cycle.
This r esults in late
p r o j e cts d u e to i n a d e q u atetime r equir em entfor ecasting, pr ogr ambu gs that
t u r n u p j u st a fte r yo u take dejiver y on 10,000maskpr ogr anmed
R0Ms ,
d o c u me n ta ti o nth a t re q u i r es a com pletesoftwar e systemr edesign whenthe
p r o gra mh a s to b e ch a n g eda year after r elease, and other gor y, exp ens i v e
e x a mp 'l e s. 0 f th e tw o a reas softwar e causespr obiems,the secondis far
m o r e se ri o u s th a n th e fi rst.
The fir st set of pr oblemswill natur a l l y
m or e familiar with har dwar e/softwar e
b e c omel e ss se ve rea s yo u become
s y s te md e si g n s. (A fte r al' 1, that' s what this cour se is her e to tea c h y ou.)
T h e se co n dse t b e l o n g to that gr oup of pr ob' lems
that the entir e computer
c o m mu n i tysu ffe rs a l o n g with year after year . Somepr ogr ess is being
m a d e ,b u t i t i s sti l l a thor ny pr oblem . Goodeng' ineer ingpr actice i s
y o u r b e st d e fe n se . R e member
this basic r ule: har dwar eand softwar e des i gn
a r e eq u a l l y co mp l i ca te d . The only differ ence ' is the r uies.
L e t ' s l o o k a t th o se a re a s wher esoftwar e can r aise ( or lower ) your har dw ar e
e re a re cons' ider inga sliding cost scale fr om all har dw ar e
c o s t s . R e me mbw
t o v irtu a l l y a 'l l so ftw a re.

0rqani za t io n
6 .2 .1 P roc es s or
Thearchitectureof the processoryou choosefor your systemcan havea
si g n i fi c ant effec t on y ou r s o f t wa r ec o s t s . T h is is f e lt p r im a r i1 yi n tw o
r ic his d e f ic ie n t in m e m o rad
and l /0. A p r o c e s s owh
a re as : memory
y d r e ssi n g m odes
w i l l requi re l ar g e r p r o g r a mtso a c c o m p listhh e s a m eio b as a
6- 10

p r o c e sso rw i th mo re fl e xi b le addr essing. M or epr ogr ammeansmor emem or i es ,

a n d mo reme mo ri e sme a n smor e cost. A lack of on- chip r egister s m ay r eguire you to use memoryfor temporarydata storage. Thesememoryreferences
t a k e mo re ti me d u ri n g p ro gr amexecutionand maym akethe differ ence betw een
a s i m p l e (i .e . ch e a p ) i n te rface and a m or e complex( i.e. expensive)one.
A v e r sa ti l e i n te rru p t systemmayenableyou to do m ost of the inter r upt
d e c o d i n gw i th l o g i c b u i l t into the CPU. 0ther wise, you will have to add
m o r e se rvi ce ro u ti n e s, I/0 devices and m oney. A pr ocessorwith a v er s ai n stru cti o n se t ma y e nableyou to im plementyour pr ogr amsmuchm or e
e f f i c i en tl y, th e re b y sa vi ng msnor yspace. The list goes on and on. Any
a r e a of th e mi cro p ro ce ssor ' sar chitectur e can becomea cost sensitiv e
p o i n t i n ce rta i n a p p l i ca ti ons. The ultlmate goal is to find the cos t
tile

s e n s i ti ve a re a s i n yo u r a pplication and pick a pr ocessorthat is str o ng

i n t h o se a re a s.
6 . 2 . 2 P ro g ra mS tru ctu re
T h e p r o g ra mstru ctu re , j u st as with the pr ocessorar chitectur e, exer ts i ts
primary effect on the systemmemoryrequirementsand I/0 structure. Poorly
d e s i g ne dp ro g ra msw i 'l l o ften take.tur icethe m emor yof mor e car efully des i g n e d p ro g ra ms. Y o un ru stbalancethe time and cost r equir ed to opti m i z e
p r o g r a msa g a i n st th e co st of memor ysaved. ideally, you will becom e
s k i l l e d e n o u g hto d e si g n n ear optim umcode the fir st time, ther eby avoi di n g t h e e xp e n si vere fi n e ment pr ocedur e. Also, differ ent pr ogr amstr uc tur es
can be used to get maximum
speedof programexecution in speed sensitive
a r e a s . F a i l u re to ta ke a d vantageof these str uctur es can r esult in t he
u s e o f mo re e xp e n si veI/0 i nter face har dwar ethan is actually needed.
The different programstructures and their tradeoffs in speedand memory
u s a g eare d i scu sse d th ro u g houtthe softwar e lessons.
6.2.3

Imp l e me n ta ti o nL a n quaqe
The level at which you develop your programshas its primary effect on
systemmemorysize and overa'll systemspeed. Programsdeve:lopedin higher
l e v e l l an g u a g e sw i l l g e n e rally be faster to develop, but they will tak e
more time to.execute and occupy from two to ten times more memorythan the
s a m ep ro g ra md o n e i n a sse mblylanguige. Assemblylanguagepr ogr am sc an

6. l1

be designed for optimummemoryusageand system speed but they take more

t i me to d e ve l o p . A d a ta pr ocessingindustr y estimate is that ass em bl y
l a n g u a g ep ro g ra msta ke fr om two to five tim es longer to develop than c om p ara b l e h i g h e r l e ve l l anguagepr ogr ams. This is par ticular ly tr u e of
l a r g e , co mp l e xsyste ms . Youm ust balancethe cost of developm ent
agai ns t
t h e co st o f th e a d d i ti onal har dwar er esour ces. As a gener al r u' le , hi gher
l e ve l l a n g u a g e sw i l l b e lower in cost for small quantities of sys tem sw i th
a sse mb l yl a n g u a g eb e co ming
m or ecost effective as pr oduction quan ti ty
i n cre a se s. (T h i s a ssu mesthe higher ' level languagepr ogr amscan meet al l
s yste msp e e dre q u i re mentswithout extr a wor k.) ttr e hig' herlevel l anguage/
a sse mb l y'l a n g u a g e
tra d eoffs ar e discussedin Lessons9 and 10.
6.3

SystemsCos_t

B e yo n dth e co sts a sso ciatedwith pr oducingthe har dwar ear e those c os ts

a s s o ci a te dw i th d e ve l o pingand maintaining the pr oduct. Unlike pr oduc ti on
c o s ts, w h i ch a re i n cu rred as a function of howm anyunits ar e pr oduc ed,
t h e se co sts a re l a rg e l y independent
of pr oduction. Indeed, it is pos s i bl e
t o i n cu r ve ry l a rg e co sts in this ar ea and never pr oducea sing' fe uni t.
6 . 3 . 1 D e veol u n e n tC o sts
Sy ste mD e ve l o p me nCt o sts include all of the expensesyou incur dur i ng the
d e si g n o f th e p ro d u ct. Since these costs will be incur r ed pr ior to pr od u cti o n , th e y w i l l u su ally have to be met fr om your available r eso ur c es .
T h e a re a s o f co st i n th is phasear e ajl well known. However the
,
addi ti on
o f so ftw a re d e ve l o p me nt
adds a few extr a categor ies.
H a rd w a reS e l e cti o n
A l l ti me a n d mo n e yspent evaluating var ious micr opr ocessor sa nd
syste mco mp o n e n tspr ior to com m encing
the actual systemdes i gn.
T h i s w o u l d a l so i n clude a1l analysis of cr ucial tim ing and inter fa ce s a n d th e i n i ti al par titioning of the systeminto har dwar eand
so ftw a re b l o cks

tgrdw.are
?esiS
A l l ti me a n d mo n e yspent designing and&buggingthe har dwar er equi r ed
t e sy stemhar dwar e.
to i mp l e me n th
2

S o ftw a reD e si q n
A l l ti me a n d mo n e yspent designing and debuggingthe pr ogr am s
re q u i re d fo r u se i n the system . This m ay include a s' ignificant
a mo u n to f e xp e n sefor timeshar ingcomputerusageif you do not
h a ve th e re q u i re d p r ogr amtr anslation facilities available in
h o use .
D e vq l o p me nTto o l s
T h i s i n cl u d e s a n -yspecial har dwar e( such as a m icr ocomputer
develognent systemor special test hardware)you have to buy
fo r d e b u g g i n ga n d checkingout the systemdesign. Som eof
th i s co st w l 'l l a ctu ally be spr eadout over al' l developments
w h i ch e n d u p b a se don the sam em icr opr ocessor .
D o cu me n ta ti o n
A l l co st sp e n t i n d evelopingthe user manuals,pr oduction
d o cu me n ts,re fe re n ce specificationsr dod other documents
e sse n ti a l to co n ve rting a wor king lab pr oiect into a viable
p ro d u ct. T h i s co st should not be under estimated. Thor ough
d o cu me n ta ti o nw i l l pr obably consume20- 25 per cent of your
d e ve l o p me nbt u d g e t. However ,it will be m oneywell spent as
yo u r p ro d u ct ma tu re sand r equir es changes.
Marketinq
T h i s i s th e co st i n cur r ed in taking your finished pr oduct
fro m th e l a b a n d p resenting it to the wor ld. This is not
u su a l l y a n e n g i n e e ringactivity.
6 . 3 . 2 Mo d i fi ca ti o n C o sts
0 n c e yo u h a ve a w o rki n g p r oduct, ther e is always the possibil ity th at y ou
w i l l w a n t to i ssu e a n e h ,' impr ovedver sion. T,lis is one ar ea where a
m i c r o p ro ce sso rb a se dsystemcan r eally save you time and money. In a
t o t a l h a rd w a resyste m,a design extension or r e- design will usually m ean
costs. How ev er '
a n a l mo st to ta l re -i n ve stm entof the initial development
with a microprocessorbased systemyou may be able to make substantial
6- 13

f u n c ti o n a l ch a n g e sw i th l ittle or no changesto the har dwar e. This i s

b e c au sea so ftw a re syste mcan be r e- configur ed by changingthe pr ogr am .
Be a ri n g i n mi n d th a t a l l the softwar e cost r ules still applJ, this i s
s t i l l u su a l l y a ve ry e ffe ctive technique. Expandingor changingan ex i s ti n g syste mi s o n e a re a w her eyou will find that the m oneyspent on d oc um e n ta ti o nw a s w e l l sp e n t. It can often makethe differ ence betweena
s u c ce ssfu l a n d co st e ffe ctive design m odification or a com pleter e- des i gn.
Pr o g ra mch a n g e sw i 'l l o fte n not be effective in pr oducts which wer e o pti m i z ed
s o c omp l e te i y i n i ti a l l y that ther e is not m uchextr a har dwar eleft t o w or k
w i t h . T h e p ro g ra mca n , a fter all, only per for m functions which use av ai l a b l e h a rd w a re . N o ma tte r howclever your pr ogr amner ,if ther e isn' t
e n o u g hme mo ryo r I/0 p o rts, somethings just won' t be feasible. If y ou
h a v e a p ro d u ct w h i ch l o o ks like it is a candidate for later expans i on,y ou
m a yw i sh to i n cu r a l i ttl e
h a r d wa refo r 'l a te r u se .

higher pr oduction cost initially

by addi ng s om e

5 . 3 . 3 Ma i n te n a n ce
C o sts
An y c ost yo u i n cu r w h e nyour pr oduct fails in the field comesunder thi s
h e a d in g . A l l th o se fi e l d ser vicemen,r etur n cler ks, r ewor k lines, a nd
o t h e r su p p o rt a re e xp e n sive. Her e too, the m icr opr ocessorcan save y ou
m o n e y. A l mo st b y d e fi n i ti on, the m icr opr ocessormust cor municatewith
t h e e nti re syste m. T h i s meansthat with the addition of som epr ogr a m m i ng,
memory,and sornesmall amountsof hardwareyou can convert your microproc e s s or b a se dsyste mi n to i ts owndiagnostic tester . Youmaynot need to
p r o v i d e th o ro u g h te sts, b ut even som esimple tests can maketr oubleshooti ng
a l o t e a si e r. A n yth i n g yo u can do to maketesting and ser vicing eas i er
w i l l lo w e r yo u r ma i n te n a ncecosts.
N a t u r a l l y, yo u mu st w e i g h the benefits of self- testing against the cos t
i t w i l l a d d . Ofte n , h o w ever ,you will discover at the end of the pr oj ec t
t h a t yo u h a ve so mee xtra I/0 lines or a par tially full ROl{ . Since thes e
a r e g o i n g to b e th e re a n yhow,you mayas we' ll use them if you can. S i nc e
t h i s t yp e o f th i n g i s n o t usually discover eduntil wel' l into the pr oj ec t,
t h e a dd i ti o n o f se l f te st featur es at that point is one of the few ti m es
*14

w h e ni t ma y b e d e sir able to add featur es after the design has s tar ted.
H o w e ve r,i f yo u w a nt to be sur e you have self- testing you shoul d nev er
w a i t to se e w h a t i s left over . In that case, the self- testing featur es
sh o u l d b e d e si g n e din like any other systemfeatur e.
6 .4 A P e rsp e cti ve0n Costs
N o wth a t w e h a ve e xam inedthe var ious component
costs, let' s s ee howthey
re l a te to th e to ta l cost per unit of our pr oposedpr oduct. bv er the total
l i fe o f a p ro d u ct, the cost can be r epr esentedby the following gener ai
e q u a ti o n :

1 g=.f+vc

wher e TC is the total cost per unit'

FC is the fixed cost r equir ed to dev el op
and m aintain the. pr oduct,
VC is the var iable cost associat edw i th
pr oducingeach unit, and
N is the num berof units.

T h e te rms i n th i s e quation can now be fur ther br okendowninto thos e c os t

a re a s w e d i scu sse di n the pr evious sections. Thus the fixed c os t por ti ons
o f th e e q u a ti o n w o uld tur n out to be the development
costs of the har dw a re a n d so ftw a re , the docum entation,the modification costs t o the l i ne
o f p ro d u cts, ma rke ting, and all other cost which is incur r ed r egar dl es s
o f th e vo l u meo f p roduct pr oduced. Thesecosts ar e amor tizedov er the
n u mb e ro f u n i ts p ro duced; the lar ger the num berof units pr oduc ed,the
l o w e r th e fi xe d co st per unit.
T h e va ri a b l e co sts would be the cost of all the har dwar ecomponentspr
, oduc ti o n l a b o r, fi e l d ser vice for the per centageof units which pr ov e defec ti v e,
a n d a l l th o se o th e r costs which var y basedupon the num berof uni ts pr oduced

It i s c l ear fromi thi s e q u a t io nt h a t t h e a r e awh e r ewe will wan tto d i r e ct

our cost reductlon..effortis dependent
uponthe quantity of units produced.
For s mal l ql anti ti es o f u n it s , we will wa n tt o m in im iz et h e f ixe d co sts.
6-15

I n p r acti ca l te rms th i s meansusing higher level languages( whenavai l abl e) ,

h a r d w a reth a t i s d e si g n e dfor ease of debuggingand high r eliability, and
a g e n e ra l e mp h a si so n d e veloilnentspeedr ather than low cost pr oducti on.
C o n v erse l y,fo r h i g h vo l u mepr oduction we wi' ll want to absolutely min i m r 'z e
p r o d u cti o n co sts. T h i s me anshighly optim ized pr ogr amsto minimize mem or y
u s e , ma xi mu m
u se o f p ro g ramcontr olled inter faces to eliminate unnee ded
h a r d w a re ,me ch a n i cadl e si g ns for easy pr oductionand any other techn i ques
w h i c h c a n b e u se d to h o l d the cost down.
T h e e xa ct p o i n t a t w h i ch th e em phasisshifts fr om fixed cost r eduction to
v a r i a b l e co st re d u cti o n n a tur ally changesfor ever y pr oduct. In gener al ,
t h e m o re e xp e n si veth e fi n a l pr oduct, the lower the em phasison the v ar i abl e
costs.
T ra d i n q Off S o ftw a reand Har dwar e
N o wt h a t w e h a ve d i scu sse dthe m ain factor s affecting systemper for m anc e
a n d c o st, w e ca n d i scu sSth e ar eas wher e systempr oblemswill for ce us to
trade off hardwareand software to modify systemperformanceand cost.
6.5

A s w e me n ti o n e de a rl i e r, h i gh speed( pr ogr amm ed,

har dwar e,or whatev er ) ,
' l a r g e n u mb e rso f p a :'cs, a n d com plexsoftwar e ar e all expensive. t{ e wi l l
b e t r y i n g to i mp l e me nat l l requir ed systemfunctions using the minimum
c o s t c o mb i n a ti o no f th e se i tems
6 . 5 . 1 C o n d j ti o n stJh i chL e ad to DesignTr adeOffs
I n t h e co u rse o f th e d e si g n we will be faced with sever al possible proj ec t
c o n d i t io n s, so meo f w h i ch w ill r equir e us to consider the var ious pos s i bl e
s y s t e mtra d e o ffs.

as follows:
T h e seco nditions can be summ ar ized

3.

syste msp e e dto o l ow, syster ncost too high,

syste msp e e dto o l ow, systemcost acceptable,
syste msp e e da cce ptable, systemcost too high,

4.

syste msp e e da cce ptable, systemcost acceptable,

5.

syste msp e e de xce s sive, systemcost too high,

6.

syste msp e e de xce s sive, systemcost acceptable.

1.
2.

6-t6

C l e a r ' l y, e a ch o f th e se co n ditions r equir es differ ent r em edial action.

C o n d i t i o n o n e i s a n o b vi o u s cr isis situation. Unless som em ajor br eak t h r o u g h ca n b e d i sco ve re d , the pr oject is pr obab' lydoom ed. Condition
t w o i s al so fa i rl y cri ti ca l .
It can be wor kedon only if the necessar y
s p e e dc a n b e a cq u i re d w i th o ut dr iving cost into the unacceptabler ange.
V e r y c are fu l a n a l ysi s w i l l be r equir ed. Conditions thr ee and five ar e
p r o b a b l y b o th so l va b l e b y a pplication of som ehar dwar e/softwar tr
e ade offs .
C o n d i t io n s fo u r a n d si x ca n be' left alone. Theym ayalso be exam inedto
s e e i f e xtra fe a tu re s mi g h t be addedto utilize the excesssystemspeed
w i t h o u t i n cre a si n g th e co st to an unacceptablelevel. If you elect to
t r y t h i s, b e ve ry ca re fu l n ot to go over boar d. Any additions ar e best
m a d ei n ve ry sma l l co n tro l l e d incr em ents. Avoid "cr eeping featur es"
( s e e L e sso n2 ). If yo u a re n' t sur e what to add, don' t. Be happyyou
b r o u g h t th i s o n e i n u n d e r b udgetand saveyour m oneyfor next time.
A f t e r y ou fi g u re o u t w h i ch condition your pr oject is in, yoU have thr ee
a l t e r n a ti ve s: b u i l t i t, ch angeit, or cancel it.
Building it or canc el i n g i t a re d e ci si o n s th a t yo u have to makeon a situation by situation
b a s i s . C h a n g i n gi t ma y h e l p you postponethat decision for awhile,but
u l t i m a t e l y yo u w i l l sti l l h a ve to decide. t,lecan nowexaminehowto
c h a n g ei t so th a t h o p e fu l l y y ou can decide to build it.
6 . 5 . 2 S yste mS p e e dP ro b l e ms
As w e h ave e mp h a si zeadl l a l ong, speedusually costs m oney. Ther e ar e
v e r y f e w si tu a ti o n s w h e re i n c r easing systemspeedlower s the cost. If y ou
h a v e a pro j e ct w h i ch h a S to have incr easedspeed,you might consider the
title

o f th i s se cti o n to b e " Tr adeOffs that Incr easeCost". l.lith that

i n m i n d , h ,eca n e xa mi n ew h e r eto look to incr ease systemspeed.
Sy s t e ms pe e dp ro b l e msca n b e br oadly divided into data tr ansfer r ate
p r o b l e m sa n d d a ta ma n i p u l a ti onr ate pr oblem s. In systemoper ation these
t w o t y p e s o f p ro b l e msw i l 'l requir e distinctly differ ent solutions. Howev er ,
t h e s a m eg e n e ra l te ch n i q u e swill apply to cor r ecting both.

6-17

6 . 5 . 2 .1 D a ta fra n sfe r R a te Pr oblem s

D a t a t ra n sfe r p ro b l e msa re encounter ed
whentr ant' er r ing data betweenthe
c o m p ute ra n d syste mI/0 d e vices. This class of speedpr oblsn can be fur t h e r s u b d i vi d e di n to p ro ce ssorr ate. limited pr oblem sand per ipher al rate
l i m i t e d p ro b l e ms. P ro ce ss orr ate ' limited pr oblem sar ise whenthe comput e r i s tra n sfe rri n g d a ta to a device which must have a high, non- vary i ng
t r a n s f er ra te . T h i s i s ch ar acter istic of m anyr eal time inter faces, di s k
d r i v e s, a n d h i g h sp e e db u ffer ed l/0 devices. In the case of the disk
d r i v e , fo r e xa mp l e ,i t i s not pr actical for the com puterto var y the s peed
o f d i s k ro ta ti o n . T h e re fo re, the pr ocessormust be able to r ead the data
a s f a s t a s th e ro ta ti n g d i sk pr esents it to the r ead head. Data tr ans fer
r a t e p ro b l e mso f th i s typ e will r esult in lost or er r oneousdata. Th ey
represent the rnost serious system speedprob'lemsand they must be detected
a n d c o rre cte d b e fo re th e systemwill function pr oper ' ly.
C u r i n g p ro ce sso r.ra te i i mi ted pr oblemswher ethe speeddiffer ential is
e x c e s si vere q u i re s th e a d d i tion of har dwar e' totr ansfer som eof the speed
b u r d e nfro m th e C P U . If th e speeddiffer ential is close, r estr uctur ing
t h e p r o g ra mse cti o n s w h i ch per for m the actual data tr ansfer s m ay pr ovi de
,
t h e s p e e dma rg i n syo u n e e d . However since
instr uctions execute in fi x ed
m u l t i p le s o f syste mcycl e ti mes, it will be impossibleto adjust the sy s t e m s p e e da n y mo re a ccu ra tely than the executiontim e of the fastest
i n s t r u cti o n s. F o r th i s typ e of pr oblem,adjusting systemspeedby var y i ng
t h e p r o g ra mstru ctu re w i l l only be effective over a fair ly nar r owr ange
o f t i m in g .
U n l i k e p ro ce sso rra te p ro b l ems,per ipher al r ate lim ited pr oblem stur n up
w h e nt h e co mp u te ri s a b l e to pr ocessthe data at a m uchhigher r ate th an
t h e I / 0 d e vi ce s ca n su p p 'l yor accept it. This pr obiemis m ost conr no nl y
e n c o u nte re dw h e nth e mi cro com puter
is comm unicating
with per ipher als w hi c h
a r e m e ch a n i caol r w h i ch re q uir e user inter action, i.e. pr inter s, tape
r e a d e r s, te l e typ e g rri te rs, e tc. For exam ple,manysmall m icr ocompute r
s y s t e msre l y o n th e T e l e type Cor por ation' sm odelASR33 teletype as th e
m a i n s yste rnp e ri p h e ra 'l. It ser ves as the keyboar d,display, punchand
r e a d e r fo r a l l p ro g ra mI/0 oper ations. Nowthe teletype can only tr an s fer
6- 18

d a t a a t th e ra te o f te n c har acter s per second,or one data byte ever y 100

m i l l i se co n d s. P ri n ti n g 2500char acter s ( a snr all pr ogr amlisting) w i l l
t a k e o ve r fo u r mi n u te s. In this case, the com puterwill be spendi ngm os t
o f i ts ti me w a i ti n g fo r the teletype to finish pr inting.
P e r ip h e ra l ra te p ro b l e msar e pr obabty the most comm only
encounter eds y s tem
s p e edp ro b l e ms. F o rtu n ately, they seldompr esent a cr itica] design pr ob l e m . T h e cu re i s u su a l ly to add a faster I/0 device. Even this s ol uti on
h a s l i mi ta ti o n s. Mo st com puterper ipher als involve mechanicaldev i c es ,
a n d th e se w j l l a l mo st a l ways be slower than the computer . You m ust tr ade
o f f th e co st o f th e fa ster per ipher al against the tjme saved. If y ou
d i s c o ve r yo u h a ve a systemwhich spendsmost of its tjm e waiting for I/0
t r a n sfe rs (a co n d j ti o n re fer r ed to as I/0 boun- d)you
maywant tb s ee i f
,
js
y o u ca n co meu p w i th so m efeatur es to utilize what
essential]y fr ee
p r o c e sso rti me .

E ve nb e tter , you m ay be able to use someof that ti m e to

r e p l a ce so meh a rd w a rea n d fur ther lower systemcost. 0n the other hand,
i f t h e syste mca n d o e ve r ything it needsto at a cost you can affor d, w ho
c a r e s i f i t sp e n d s9 5 %o f its tim e waiting for the user to pr ess a k ey ?
M i c r o p ro ce sso rh a rd w a rei s going to becomeso inexpensivethat it w i l l
p r o b ab ]y b e co mefa r mo reeconom icalto under r .lti
I i ze sever al micr opr oc es s Or s
t h a n to sp e n dth e d e ve l o pment
cost to optim izethe use of one.
6 . 5 . 2 .2 D a ta Ma n i p u fg ti onRate Pr bblem s
W h e red a ta tra n sfe r ra te pr oblem swer e r elated to howfast we can get data
i n a n d o u t o f th e co mp u ter ,the data m anipu' lationr ate pr oblem sar e c onc e r n e d w i th h o wfa st th e data is pr ocessedonce the com puterhas it.
W h e r ed a ta tra n sfe r ra te pr ob' lemswill be solved mainly be adding or
c h a n g i n gsyste mh a rd w a re ,data manipulation r ate pr oblem swill be s ol v ed
m a i n l y b y re stru ctu ri n g the system ' s softwar e.
T h e t yp i ca l d a ta ma n i p u l ationpr oblemar ises whensomesection ( or s ec ti ons )
o f t h e syste mp ro g ra mta kes an excessiveam ountof time to execute. T he
m o r e c o rmo n l yu se d th a t p or tion of the pr ogr am ,the wor se the pr obl em .
T h i s typ e o f p ro b l e mi s char acter ized by your pushinga button and wai ti ng
f o r f ifte e n se co n d su n ti l the teletypewr iter pr ints the ten digit ans w er

6.L9

t o y o u r e q u a ti o n . U si n g so mehandheld scientific calculator s for com pi ex

c a l c u l ati o n s (try S IN 8 9 o ) pr ovides someexcellent exam plesof data m an'i p u l a t i o n ra te 1i mi ta ti o n s.
S o m ep r o b l e mso f th i s typ e ar e unavoidablein m icr opr ocessorsystem s .
T h e i r l ow sp e e d (re l a ti ve to minicomputer sand lar ge com puter s) ,modes t
i n s t r u cti o n se ts, a n d sma l l data elementsize limit the efficiency wit h
w h i c h an y p ro g ra mw i l l ru n . Theyar e simply not designedfor complexdata
p r o c e s si n ga p p l i ca ti o n s. N o matter howgood the algor ithm , cer tain cl as s es
o f o p e r a ti o n s a re g o i n g to take up significant am ountsof com putingtime.
So m ee x a mp l e so f th i s g ro u p ar e complexm athem at.ics
r outines ( anything
m o r e c o mp l i ca te dth a n a sfxteen- bit integer divide can safely be consi der ed
c o m p J ex),l a rg e me mo ryse a rches,ar r ay oper ations, and movingblocks of
d a t a a r ou n d i n me mo ry. In the lar ge and minicomputerwor Jd, another
p r i m a r y ca u seo f th i s p ro b l emis m ultiple user system s. For tunately, to
r o rl d has been spar ed this par ticular pr oblem.
d a t e t h e mi cro p ro ce sso w
I f y o u r syste mre q u i re s a n y of these types of oper atiohs, you will end up
p a y i n g so mesp e e dp e n a l ty. You will be able to m inimize it to som eex tent,
b u t i t wi Il b e th e re . F o rtunately, the types of applications which wi l l
u s e m i c ro p ro ce sso rsd o n o t n or m al' lyr equir e lar ge num ber sof complexoper a'
t i o n s . If yo u h a ve o n e th a t does, you m ight ser iously consider one of the
s i x t e e n -b i t mi cro p ro ce sso rsor a low end m in' icom puter .
6 . 5 . 3 . S yste mC o st_P l o b l e ms
Sy s t e mco st p ro b l e msb e co mes ignificant whenyou havea wor king system
w h i c h mu st b e ma d emo re e co nom icalfor pr actical pr oduction. The ter m
"p r o b l e ms"i n th i s co n te xt i s pr obablymisleading. Vir tually all system s
i n t e n d e dfo r h i g h vo l u mep ro ductionwill go thr ough som ecost optim izati on
p r o c e d ureb e tw e e np ro to typ e and final pr oduction. Usualiy you witl hav e
d e c i d e d th a t th e co st ra n g e for the pr oduct is acceptablebefor e pr oceedi ng
w ' i t h t h e d e ve l o p me n t. T h i s decision is basedon m ar ket studies, com par i s o n w i t h e xi sti n g p ro d u cts, and other evaluations of what is a r easona bl e
f i n a l s e l l i n g p ri ce o f th e p r oduct. This num bercan then be pr oiected
b a c k t o a rri ve a t a co st ra n ge for the pr oduct.

6-20

I n ge n e ra l , th e te ch n i q uesfor lower ing pr oduct cost will be the r ev er s e

o f te ch n i q u e sto i n cre a se speed. Youwill want to r em oveextr aneoushar dw a r e ' co mp a cta l l p ro g ram sinto m inimum
menor yspace, and in gene r al ,
m a k eth e ma xi mu m
u se o f the pr ocessorand softwar e to im plementsy s tem
f u n c ti o n s. T h i s mu st a l l be done without cr eating any systemspeedpr ob l e ms. T h e re fo re , th e p r oceedur eis best car r ied out in discr ete s teps .
Y o u re fi n e o n e se cti o n o f the system,m akesur e the systemstill wor k s ,
a n d mo veo n to th e n e xt section. Ultim ately you will r each a point w her e
n o f u rth e r co st e co n o mies
sys tem
can be achievedwithout compr om ising
performance.
C o s t o p ti mi za ti o n sh o u l d always be under takenwith the fir m r ealizati on
t h a t th e e n d mu st j u sti fy the means. It is an expensivepr ocessthat i s
u s u a l l y o n l y vi g o ro u sl y applied to pr oductswhosehigh volum ewi' 11j us ti fy
t h e e xp e n se . 0 th e rw i se the cost of the optim ization will over shadow
any
s a v i n g sma d ei n p ro d u cti on.
6.6 HardwgreSpeedTrade 0ffs
W h enyo u mu st mo d i fy systemspeedusing har dwar e,you will be tr yin g to
e i t h e r i n cre a seo r d e cre asethe am ountof wor k done by the pr ocess or . In
t h e fi rst ca se yo u w i l l be tr ying to simplify the systemhar dwar eor r ep l a ce mu cho f i t w i th so ftwar e. This r esults in decr easedhar dwa r ec os t
a n d lo w e r syste msp e e d . In the secondcase you will be tr ying to tr ans fer someof the work being performedby the software out to the hardware.
T h i s w i l l re su l t i n h i g h er systemcost. tJithin this fr am ewor klet' s
e x a mi n eso meo f th e a l te rnatives available.
6 . 5 . 1 P ro ce sso rsa n d Mem or ie:
A s i mp l e so l u ti o n to so mesystemspeedpr oble{ nsmay be to changepr oc es s or s
w i t h i n th e sa mefa mi l y. Somemanufactur er spr ovide micr opr ocesso r sw hi c h
a r e gra d e d b y sp e e d . If the nominalpr ocessorspeedis 2 M Hz,somedev i c es
m a y be 'a va i l a b l e i n se l e cted speedr anges fr om 1 to 4 MHz. Since t he
p r o c e sso rco st g o e s u p w j th the speedrus' ing thjs methodyou only h av e to
pay for the speedyou require.

6-21

I f y o u a re co n si d e ri n ga faster ( or slower ) pr ocessor ,you m ust also

c o n s i d e r th e e ffe ct th a t mem or yspeedhas on pr ogr amexecution. The
c o m p ute rmu st g e t a l l i n structions and data fr om memor y. If the m emor y
i s n o t a t l e a st a s fa st a s the pr ocessor , ther e is no point in incr ea s i ng
p r o c e sso rsp e e d . S i mi l a rl y , you may be able to incr ease systemspee dby
u s i n g th e sa mep ro ce sso rw i th faster memor ies.
6 . 5 . 2 D e co d eL o q i c
D e c o d e 'l o g i ci s re g u i re d fo r a var iety of pur posesin a m icr ocomputer
s y s t e m. Mo st d e co d i n gi s d one to deter m ineI/0 dev' iceaddr essesand
m e m o rya d d re sse s. T h i s'l o g ic is alm ost all done with har dwar e,and it
c a n u su a l l y b e mi n i mi ze di n a dedicated system . For example,manymi c r op r o c e sso rsca n a d d re ss6 5 K bytes of m emor using
y
16 addr esslines. Ver y
f e w a p p l i ca ti o n s w i l l re q u i r e this muchm emor y,so after you deter m in e
h o wm u chme mo ryth e syste mr equir es, you can elim inate the excessdec odi n g . F o r e xa mp l e ,i f yo u o nly need 4096 bytes of m emor y,you need onl y
d e c o d e1 2 a d d re ssl i n e s to accessali valid m emor yaddr essesin your
s y s t e m. S i mi l a r mi n i mi za ti on can be applied to the I/0 device addr es s es .
O n ea d d e db e n e fi t o f re d u ci ng the decodingis that the undecoded
lines
c a n b e u se d a s e xtra co n trol lines in the system. Usually the fult
a d d r e ssb u s ru n s e ve ryw h e rein the system. If systemspeedper mits, t he
u n d e c od e a
d d d re ss'l i n e s ma y be used to el iminate fur ther har dwar econtr ol
l o g i c . In th e ca se o f th e systemwith 4096 bytes of m emor we
y mentioned
e a r l i F, th e fo u r u n u se da d dr esslines could be used individually ( or
e v e n d eco d e d )to p ro vfd e systemcontr oi signals. Similar tr ade offs c an
b e p e r fo rme di n systsn s w h i ch r equir e fewer I/0 devices than the maxi m um
a v a i l a bl e .
6. 9. 3 l'lemoryBuJfers
M e m o r yb u ffe rs a re u se d to collect or hold data that is in tr ansit betw een
t h e C PUa n d syste mp e ri p h e ral devices. The addition of a high speedbuffer
d e d i c a te d to a sp e ci fi c p e ripher al can be used to solve pr ocessordata
t r a n s f er.ra te p ro b 'l e ms. T h is is par ticular ly effective if the per jpher al
h a s a l ow a ve ra g ed a ta ra te with high speedbur st tr ansfer s of data. A

6-22

b u ffe r ca n b e u se d to collect the data dur ing the bur st tr ansm i s s i on,
w i th th e C P Ure a d i n g the individual data elem entsfr om the buffer after
th e tra n smi ssi o ni s complete. This type of buffer ing can also be us ed i n
co n i u n cti o n w i th th e computer ' sDl' 1A
faci I i ty. In thi s case, the buffer
a ccu mu l a te sth e d a ta and tr ansfer s it into the main computermem or yi n a
si n g 'l e b l o ck tra n sfer

B u ffe rs ca n a 'l so b e used to solve per ipher al data r ate pr oblems . In thj s
ca se , th e C P Utra n sfer s the data out to the per ipher al buffer . T he per j p h e ra l ca n th e n ta ke the char acter s at its own r ate with no fur ther pr oc es s or
i n te rve n tio n.
A d d i ti o n o f b u ffe rs to the systemr eguir es the addition of con s i der abl e
h a rd w a ree xp e n se . A ccor dingly, they should only be addedif th e s y s tem
re a l l y n e e d sth e m. As long as speed is not a pr oblem,m ost mi c r opr oc es s or s
ca n d o a g o o d j o b o f implementingbuffer s. They can do this u s i ng al r eady
p re se n t ma i n me mo ryand som epr ogr anming. Data,is tr ansfer r ed i nto and
o u t o f th i s typ e o f buffer using an inter r upt. The device inter r upts
w h e ni t i s re a d y fo r a tr ansfer and the CPUper for msa single t r ans fer .
Wh e nth e b u ffe r b e comes
full or empty, the data is then pr oces s ed,i us t
a s w i th a d e d i ca te d buffer . This is alwaysm uchcheaperthan a n ex ter nal
b u ffe r syste m. In the cour seof the design, if you think you n eeddata
b u ffe ri n g , l o o k ve ry car efully to see if it can be done using softw ar e.
E ve na fte r th e d e si g n is doneyou maydiscover that a har dwarebuffer
th o u g h t n e c essar ycan actually be done in this way. It m ay be
wo rth th e re d e si g n cost to save the har dwar ecost, par ticular ly i f pr odu cti o n vo 'l u mew i l l be high
i n i ti a l l y

6 .6 .4 S p e ci a l i ze d Inter face Devices

A sp e ci a l i ze d i n te rface device is designedto per for m somedefi ned func ti on
in th e syste m. U su ally the function to be per for m edcould be per for m ed
usi n g e i th e r so ftw a re or the specialized device. You will con s i der a tr ade
o ff w h e nyo u e i th e r find your self with a.speedpr oblemand no inter fac e
d e vi ce o r th e i n te rface device and lots of pr ogr amtime availabl e. i n the
fi rst ca se l i o u d e si g n in the device to fr ee up the pr ogr amtime that

6-23

p e r f o r mi n gth e fu n cti o n i s tying up. In the secondcase you take ou t

t h e d e v'i cea n d re p l a ce th e function with softwar e.
A c o r mo ne xa mp l eo f th i s type of device is the UART( Univer sal Async hr onous
R e c e i v e rT ra n smi tte r). T h is device accepts par allel data and converts i t
t o a s e ri a l b i t stre a mco n for m ingto the EIA RS232C
data tr ansm issions tand a r d . T h e fu n cti o n ca n e a s' ily be per for m edunder pr ogr amcontr ol, but as
m e n t i o n e de a rl i F , e d ch ch ar acter sent or r eceived will take up 100 m i l l i s e c o n d so f co mp u te rti me . Dur ing this tim e the softwar e must convert a
c h a r a c te r fro m p a ra l l e l to ser ial, add star t and stop bits and generate
a l l t i mi n g a n d co n tro l si g nals r equir ed to per for m the tr ansfer . If y our
s y s t e mh a s th e ti me , fi n e . If it doesn' t, you add a UART. The on' ly ti m e
r e q u i r ed n o w i s th e ti me requir ed to wr ite one par allel byte out to th e
U AR T . A fte r th a t, th e U A RTgener atesall those functions that wer e d one
b y t h e so ftw a re , fre e i n g your pr ocessorto do other things. Similar tr ade
o f f s c an b e ma d eu si n g o th er pr e- definedfunctional devices.
6 . 6 . 5 In te rru p ts
I n m a nysyste msth e co mp u termust spendconsider abletime r espondingto
i n t e r r up ts. If th e re i s mor e than one possible inter r upting device, the
p r o c e sso rmu st d e te rmi n ew hich device gener atedthe inter r upt befor e i t
c a n p r oce ssa n y d a ta . T h i s identification can be done in a combinati on
of hardwareand software ;hat can be varied to meet systemspeed/cost
requi rements .
For maximum
system speedyou design the hardwareso that each interrupting
d e v i c e re sp o n d sto C P Ua cknowledgem ent
with the addr essof its ownde di r esponsespeed, since no ti m e
c a t e d se rvi ce ro u ti n e . T h i s gives maximum
i s s p e n t d e co d i n ga n y d e vi ce identification codes. In som epr ocessor s
t h i s c an b e re d u ce dto th e inter r upting device pr oviding an actual subr o u t i n e ca l l i n stru cti o n , makingthe inter r upt alm ost tr anspar ent in t er m s
o f o v e r h e a dti me l o ss.
T o l o w e r h a rd w a ree xp e n se ,the device identification can be movedinto
t h e s e rvi ce ro u ti n e s. In this case, the inter r upting devices al' l pr ov i de
6-24

th e sa mero u ti n e a ddr ess. The softwar e m ust then poll all de v i c es i n the
syste rnto se e w h ogener atedthe inter r upt. This adds a signi fi c ant am ount
o f o ve rh e a dti me to the r outine, and will pr obably not be sat i s fac tor y for
fa ste r d e vi ce s.
A s a co mp ro mi seth
, e systemcan be im plemented
as a com binatj onof di r ec t
a n d i n d i re ct i n te rrupt decoding. In this caser lou assign your hi ghes t
p ri o ri ty o r fa ste st ( usually the sam e)devices their own identi fi c ati on

a d d re ss. T h e yw i l l then inter r upt dir ect' ly to their r outines w i th m i ni mu mti me l o ss. T h e lower pr ior ity devices can then be assign edto a c om m on
a d d re ssa n d th e se can be decodedunder slower , cheapersoftwar e c ontr ol .
6 .7 S o ftw a reT ra d e Offs
Software trade offs are madefor the samereason as hardwaretrade offs,
n a me l ymo d i fi ca ti o n s of systemcost and speed. W her ewe tr aded off har dware for differ'ent hardwareor a combinationof less hardwareand some
so ftw a re , w i th so ftwar e we will usually be tr ading off pt' ogr a ms peedf,or
In cre asesin pr ogr amspeedwill often take mor em em or y '
th e re b y co sti n g mo r emoney. Conver sely,if speedis not a pr o bl em ,c er tai n
p ro g ra mtyp e s ca n b e r eplaced by mar kedlyless code, with a su bs equent
l o w e ri n g o f me mo rys ize and cost. It must be kept in m ind, how ev er ,that

me mo rysi ze .

n o t a l l d e cre a se si n pr ogr amsize' lower memor ycost nor do all i nc r eas es

i n p ro g ra msi ze i n crease cost. The only tim e changesin pr ogr ams i z e
a ffe ct me mo ryco st at all is whenthe changer esults in the sa v i ng or us e
o f a n e n ti re me mo ry . For example,if your pr ogr amis to be lo c ated i n
2 K x8 ma skp ro g ra rm edROMs,the only time that your cost will c hangei s
w h e nyo u r p ro g ra msi ze exceedsm ultiples of 2048bytes. Up to that poi nt,
th e me mo ryi s e sse ntially fr ee. Similar ly, if you discover your new ' i m proved, programis now 2A75bytes long, Jou maywant to expendsometjme
e l i mi n a ti n g th o se 2 7 extr a bytes. ( The ter ms and techniquesd i s c us s edi n
th e n e xt fe w se cti o ns ar e cover edin gr eater detail in the softw ar e l es s ons .)
6 .7 .1 P ro g ra mL o o p sand Subr outines
P ro g ra ml o o p s a n d subr outinesar e used to m inimize pr ogr amsize and c ontr ol
e xe cu ti o n . A se q u enceof oper ations which is to be executeda fi x ed num ber
6-28,

o f t j m e s ca n b e p l a ce d i n a loop. A section of code comm on

to sever al
p o r t i o n s o f th e p ro g ra mca n be placed in a subr outine. The actual codi ng
i s t h e r eb y o n l y mi tte n o n e time no matter howm anytimes the' toop is
e x e c u t edo r th e su b ro u ti n e i s called. Loopsand subr outinesminimize
p r o g r a msi ze a t th e e xp e n seof somepr ogr amspeed.
T h e i n s tru cti o n s w h i ch mu st be executedto contr ol executionof the loop
o r t h e c a l l i n g o f th e su b ro utine take a cer tain amountof time that is
n o t r e q ui re d fo r th e a ctu a l function being per for med. In speedcr itical
s i t u a t i o n s th e e ffe ct o f th e se over headinstr uctions can be e]iminated or
m o d i f i e d to i n cre a se e xe cu ti on speed. This is done by r eplacing the lo op
o r s u b r ou ti n e w i th th e a ctu a l str aight line code that was or iginally ther e.
T h i s e l i mi n a te s th e o ve rh e a dinstr uctions com pletely. Alter natively, a
l o o p m a y b e mo d i fi e d to u se a lower per centageof its tim e for over head.
T h i s i s d o n e b y p a rti a l l y re placing the loop with the str aight line code
a n d l o w eri n g th e n u mb e ro f ti m es thr ough the loop. For exam ple,say a
c e r t a i n fu n cti o n i s to b e p e r for m ed10 times, once for each executionof
t h e l o o p . In th i s ca se , sa y loop over headis 20%. By duplicating the
f u n c t i o n a n d l o w e ri n g th e l o op count to five we wouid do the sam epr oce s s i n g w i t h o n l y 1 0 %o ve rh e a d . The pr ice nould be a doubling of the amou nt
o f m e m ory
o ccu p i e db y th e fu nction.
6 . 7 . 2 F u n cti .g n g9-lo mp u ta ti o ns
T h r o u g h o uyo
t u r p ro g ra myo u will use functional computationsto evaluat e
d a t a a n d d e ci d e o n p ro g ra mre sponsesto input conditions. Youwill be
able to vary the execution speedand memoryusage of manyof these blocks
b a s e do n h o wyo u e va l u a te th e data. For example,let' s say we have an
a p p l i c a t i o n w h e rew e n e e d to multiply two eight- bit integer s. One soluti on
i s t o w r ite a n a l g o ri ttm w h i ch will multiply the tun number s. If for som e
r e a s o n t he sp e e do f th e a l g o rithm executionwas not adequatefor our app'l i c a t i o n , w e mi g h t co n sfd e r sto ring ali possible r esults in a ROM( or part
of a R0l'l). l,levould then use our two numbersto computethe address of
t h e p r o d u ct, th u s re mo v'i n g
most of the ccxnputations.This methodshoul d
e x e c u t ec o n si d e ra b l y fa ste r.

Again, the pr ice is mor em emor yusage.

6-26

I n p r a cti ce , n o t ma n yma thematicalfunctions can be pr oducedin the m anner

j u s t d e scri b e d , H o w e ve r,the techniqueis ver y often applicable to m em or y
a d d r esse s,.A re q u i re d a d dr esscan often be computed
as par t of the pr og r a m e xe cu ti o no r sto re d as fixed data. Computation
by algor itlr n ismor e
e f f i c ie n t,

b u t fe tch i n g d efined data is faster . Thesetypes of a' lte r nati v es

c a n be tra d e d o ff th ro u g h outthe cour se of systemsoftwar e design.
6 . 7 . 3 R e p e a te dC o mp u ta tions
R e l a te d to fu n cti o n a l co m putationsis the class of pr ogr amoper ation s
c a l l e d re p e a te dco mp u ta tions. Analys' isof pr ogr amsover the year s h as
s h o wnth a t i n mo st p ro g ra ms90%of the executiontjme is spent executi ng
7 0 %o f th e p ro g ra m. T h e s esoftwar e "cr itical paths" ar e what we cal l
r e p e a te dco mp u ta ti o n s. If your systemhas a speedpr oblem , the fir st
t h i n g to d o i s to se e i f you have any r epeatedcom putations. You ca n then
d e v o te ,yo u r'o p ti mi za ti o ne ffor t in those ar eas wher e it wjl' l do the m os t
good. Somecommon
mathematical
t.ypesof repeated computationsare common
f u n c t i o n s, ta b l e se a rch e s ,data m ovement
r outines, and data sor ts.
I f . y o ufi n d .yo u h a ve a cl e ar l.y defined r epeatedcom putatiofi,you m ay fi nd
i t w o rth w h i l e to stu d y i t.
See if you can find a better algor ithm in the
d a t a pro ce ssi n gl i te ra tu re .
If you can' t find one, do your best to dev i s e
o n e . T i me sp e n t th o ro u g h ly optim izing a r epeatedcalculation can be far
m o r e va l u a b l e th a n p a rti a l l y optim izing sever al sections of less fr equentl y
executedcode.
6.8

Sunmar.v

T h e h ard w a re /so ftw a re

d e si gn pr ocedur eis somethingthat you only le ar n
b y p r acti ce . Y o umu st g a i n fir st handexper iencein the r eal wor ld. It
i s a p ro ce ssw h i ch b e co mes
mor e than designing the har dwar eand then des i g n i n g th e so ftw a re . It is an integr ated pr oceedur ewhich will allow y ou
t o i m p l e me n so
t meo f th e m ost cr eative digital system sever im agined. l r l e
h a v e o n l y scra tch e dth e su rface of what is available, and what is av ai l a b l e i s j u st th e b e g i n n i n g.

6-27

g gNt_LNitsifudlt-u
vrvo AuvNf

REPRESENTING
BINARY
DATA
Wh e nw o rki n g w i th digital computer sit is necessar yto r vorkw i th bi nar y
d a ta . C o mp u tecromponents
ar e built up fr om electr onic dev i c es w hi c h c an
o n l y re p re se n td ata as 0' s and l' s.
you will ha v e to us e
This nr eans
b i n a ry to re p re s entnum ber s. In spite of this, it is im po s s i bl eto
e sca p efro m th e fact that binar y data is not over ly conven i entto us e.
l{e'have all used base 10 numbersfor years and the base 2 numbersystem
se e msq u 'i te i n e fficient by com par ison. It takes 6 binar y di gi ts to r epre se n t th e n u mb er50r O ( 1100102) ,and it gets wor se. In th i s s ec ti on w e
w i l l d i scu ss h o wthe individua' l binar y data e' lgnentsar e r epr es entedand
h o w th e y ca n b e g r oupedtogether for m or econvenientuse. Bi nar y ar i thma ti c a n d l o g i c ar e discussedin the following supplementar sy ec ti on.
7 .1 - B i n a ry D a ta Elements
A co mp u te rd a ta e lementof ar bitr ar y length N is shownbelow .

FT- ll
"%
Y"

T h e ri g h t mo st b i t ( bit 0) is consider edto be the least siq ni fi c ant bi t.

B i t N , a t th e l e ft m ost position, is consider edto be the m os t s i gni fi ca n t b i t. T h u sa com puterwith a 16- bit data elem entwould hav edata i n
b i t p o si ti o n s 0 -1 5:

15

L4

13

t2

11

10

16-Bit Datat'lord
S i mi l arl y , an 8-bit m ic r o c o m p u two
e r u ldh a v ed a t a in b it p o si ti o n s0 - 7 :
7

8-Bit Datat{ord
Thuswhenwe speakof Ioading one' s into bits five and seve nof an ei ghtbi t regi s ter, w ew ill be loading the following patter n.

7-L

Bit Position
1

I
I

R e f e r e n c esto th e b i t p o si ti o n s of a r egister or memor y' location r ather

th a n t o t h e b i n a ry n u mb e ri n a register or m emor ylocation ar e cor monin
c o n t r o l a n d l o g i c a p p l i ca ti o n s.
? . 2 - Bi n ary N u mb e rs
A l l n u m b e rsyste ms(i n cl u d i n g b inar y) r epr esent num ber sas a function of
t h e r a d i x ( n u mb e rb a se ) a n d th e position of the individual digits. Any
n u m b e rc o mp o seodf d i g i ts A H -AO in a r adix R can be r epr esentedas
fol I ows:
A I t A H -t

.A tA o =A N R N +AN- txRN- l+

+ AlxR1+ A0xR0

w h e r eA i s a n y d i g l t i n th e ra n ge 0 to R- l and N is the digit position.

F o r e x a m p le ,co n si d e r th e n u mb er136 in base 10. hle havedigits in positi o n s 0 , 1 a n d 2 . In th i s ca se , all values of A must be in the r ange
0 - 9 , a n d R = 1 0 . l ,l eth u s h a ve a num berr epr esentedas
t

13610=1x R' + 3 x
Rl* 6 r Ro
base.)
\s ubs c r ip t t o identify nurnber
=1x(to)z* 3 x ( 1 0 ) + ' 6 x 1
=100+ 3 0 + 6
= 136 1 0
B i n a r y n u mb e rsca n b e si mi l a rl y repr esented. The differ ence is that wher e
in d e c i m a l we h a ve te n p o ssi b l e number s( 0- 9) , in binar y we only have tr r o
(0 a n d 1 ) . T h i s me a n sth a t re p r esentinga given num berin binar y wil' l r eq u i r e m o r edi g i t p o si ti o n s th a n r epr esentingthe sam enum berin decimal.
T h u s t h e b i na ry n u mb e r1 0 1 1 0i s r epr esentedas
= L x 24+ o x 2 3 , L x z Z * I x Z L + L x z 0
1 0 1 1z0 ^.
'=

1x 16+0+4+2 + 0
2?to
7-2

sNotsur^Noc
tutls^sussnnN

NI'MBERSXSTiff COUVERStrONS
DECII'IAI ?0 Bn{lRy
To convert

any decirnal nrmber to a bi.nary nrrmbere take the decimal

number and successively

or 0) as you continue

by n2n and, nrite

divide
divi{,ing

dcnm ttre remainde,:r (1

the nr:mber becores trOft.

until

ETI}IPI,E:

Convert b3ZrO to a bjnary number.

2 ) b lz
) 1oB

/a

) itl

)zz
/t

)r:
t 6/t

)t

/o

)1

/r-l

)0

/t-,

b3ero

tl
v*

ErNAnI T,OpEqrUAr
As ln the deci:nal nunber systeu, the least signiJicant
the rlght

and the most sigrrlficant

Ls a nultiple

digit

ls on the left

dlgtt

ls on

and each diglt

of a certeln poner of 10.

L3zro

b x

8-t

mA

+ )

l0l

+ 2 x

lO0

firis is 'a1so true for a binary nurnber, except that it

of a certain

power of

trZn,

= f

IOIIA
So to eonvert

a binary

of nzil and change lt

is a nultiple

to its

23

22

ZI

2A

number to a decimal nrurberr take each power

respective

decimal nunber.

2 0 =f
2 L =Q
2 ? =L
23 = 8
,lt

= 16

ar6 = 6r rg36
etc.
EXA}IPI,E:

Take the number

101101

1 OL 1 O1 2= 1 x 2 5 + O * 2L * Ix
= 1x
-

3 2 +Ox16+1

3 2 +0 +B +b+ 0+ 1

1011012 = h51o

8-2

23 + I x 22 + A x 2L +1x
x8+ Ixb+ 0

xZ+1

x1

2O

COI{YERTINGDECI},I.AL11] OCTAJ,
Use t'tre sane nethod as to convert decinal

to bJ.ary

except dlvide

by ttre base of n8n i-nstead of n2r.

EXAIIIPLE:

Convert 13110 to Octa1

) 131

)re

/3

/o

/z

Btao = e3g
g.II.{At
CCIIVEBT
II{G_oCTAL_
TPJDE
To convert

from octal

to decLnal use the same nettrod as for

b:inery to declmal converslon,

except use the poners of n|n lnstead

EKAI{PI"E3

f:f
81 =,8
82 s d+

d=5L2
r

bo96

85 ,

32T(i8

66 .

262]|o

etc.

8-3

ef ttltt.

EXA!{PIE:
Convert 2O3U to decimal

2o3^ =
o

2 x B2+ox81*3*80
2 x( il+Ox8+ 3x1

= 1 2 8+ O+ l
= 131
c0livERTINGpECII.{ALTO.HEJilpECn{AI,
Agajnr use the sane nethod for decinal to biaary convErsion, except
use the base x16rt jastead and replace the renalnders of n10r to iltr5tr by
the letters

A to F respectively.
1 0 =A
U =B
J2 =C
13

U =f ,
$=f
EXAI"IPIE:

Convert 9L92n to hexadeclnal

) 3 5 /r Jt
)

2 /3

o/z
9192ro

=;;l

:'ill,

colwERTIllG IIEX4)EC"I1{.qLT0. DECI]4AL

lgain,

use the sane nethod fcr

binary

except use the polters of 16 lnstead,

F to 1O ttrough

to decima-l conversiooe

and convert the letters

A thrcrugb

1l respectively.

160= l
161

:162 =

16

L63

ba96

1*

65536

256

EXIIMPI.E:
Convert 23881d to decirnal

2 3 8 \6 =

+ 8x160

2xLO+3xt62+ Ex161

= 2 xt63 + 3 x t62+ ].|r x t61 + B x t6o

s
2388:]6 a

2 xbO96 + 3 x 256 + ll+ x 16 + I x I

8192+ 768+ zLt+ 8
9L92Lo

COT{VERTItrKI
OCUL TO BIXANf,. EEtrIDECII.{AIfO BIr.ONr.
OCT.[I.TO IGX'jDLCIMAI:ANDBACK
Convert to blnary firste

tlren tl

oeadrd' regroqp the bfuary nunbers

into the desj.red goqps of three c four btnary dlglts,

or fqrr for hexadeclnal).
sr5rsten. Alrays start

lnhese translate

tbe regrorrytng rlth

8-5

dlrectly
the ISB.

(three for octaL

to tbe deslrad nunber

llexadeciraal

BinarY

0ctaI

Bi-nary

000

oooo

001

0001

o10

0010

olJ

oo11

100

0100

101

0101

110

OILO

111

o111

1000

100r

1010

1011

ILOO

Ito1

1ILO

Ltu

E]NAMPT.q:

1) convertbnzncaato octal
btcncr,

= orco 10100010 1011 1100

= ovoo VoLo/oovo L1/LI V10o

'

01 OO1010 001 010 111 100

= 112l.27b

hmncr, = ltzl2?bg

8-6

2)

Convert U35S to Hexadeci:nal

rI35S

= oO1 loo 011 101

= 0Ol VQo 01/1 101
= 0O11 0001 1101
= 31D

!+358 = 3St6

B-7

ocg
sutSl,[nN

-/a

BCD }TIJI,IBERS
In some applicaLions it

is desirable

to be able to directly

resent decinal nurnbers in the binary computer.

Th.is is done using

Binarv CociedDecimaL, BCD. Whenusing BCDwe do not use all

data values that the binary data element can represent.
ourselves to the followirrg fou: bit

1!nit

Decimal

rep-

possible

Instead, we

patternsl

BCD

oooo

0001

0010
0011

o100

0101

UJ.l-U

1
I

0111

1000

1001

The o',her sj.x four bit

An eight-bit

combinations (1C10-111tr) are not used in BCD.

data element can hold two BCDdigifs.

represent decirnal nunbers from 0-99.

control

and instrLment interface

provide instructions

e - 'l

can

BCD is very cornmonlyencoultered in

applications.

to a1low direet

This means it

arithmeric

As a resulte

many computers

with BCDnwrbers.

sl{ott3vHs
AuvNts

/ /'

BINARYFRACTIONS
Binary numbers are generally considered as shole i.ntegers (i.e.,
2, 3, ..-).

Hcrcever,it

often becornesnecessary to represent nu-nbers

other then whole nurnbers. Binary fraction

cecimal fraction
of digits

to the right
the bits
binary
sider

representati.on.

to the right

point.

representation

is an3.lagous to

In decimal nwrbers a fractlon

of a declmal. point;

of the binary point

represent

consists

in biaar;y r we consider

to be a fracticn.

2-N, where l,l = the bit

In a bilary

binary

the bits

fraction

posi.tion to the right

of the

The powers of 2-N are shonn in the nunber tables.

the following

1,

Con-

nrunber?
Binary Poj-nt
1101.1101

ltris

binary nr:nber representation

Z3 + 22 + O + ZO .

means

Z-l * Z-2 + O + 2-3

=B +lr+1+.5r.25 + . 0 6 2 5

= I3.B].,Z5
Numbers can be converted to and from binary fractions
techniques already shorn fe
not all

fractj-ons

converting

whcle binary nunbers.

are as well behaved as the above exanple.

decimal number 3 L/3.

Whenwe try

using the
Unfortunately,
Consi<ier the

to convert j.t we end up with -

3 L /3IO = 3.3333......3r O
ir/-

) V 3LO = 11.01010101......012
The fracti,on repeats and there is obviously no exact result.
ri1l

have to choose a bit posi.tion where re tnurcate the value.

We
For

example, j.f we choose bit position sixl we end up with dn approximation.

) L /3n N 1 1 . 0 10 10 1

10-1

The rouadlng
courerting

errol

the tnrncated

introduced

by ttris

tnuncatio,

can be coputed

by

fraction.

1 1 . O 1 O I 0 10 1 = 2 + I + .25 + .e62i + .OLS6ZS

=3.328L29
Tbe error is about .1t.

lbe possibility

of tJrls type of rounding

error must alrays be taken into cqrsideratLon when using binary .fractioas,
partlcularly

ln dlvision

binary flacttons,

operations.

so the possibility

Very fen nunbens result

of erqr

tn eract

wlIL be ever lresent.

sNotrcnursNt
3t901oNVctr3utHrruv
AuvNts

BINARY
ARITHMETIC
AtfpLgcrc rNSTRucTroNs
provide a nr"rnber
All computers
of instructions whichare usedto perform
arithmetic and log'ic operationson data. As discussedelsewherercoCIputr
data consists of patterns of bits in registers and memory
locations. However' there is a fundamental
difference betweenthe way the arithmetic
instructionsand logic instructionstreat this binary data. Thearithmetic
instructions interpret the data as numbers.The logic instructions, on
the other hand,interpret the data as a collection of individual bits.
'11.1 Computer
Arithmetic Instructi.ons
Themostbasic computer
arithmetic instruction is additlon. This instruction
and the logic complement
instruction can be used to lmplementany known
n6thematicalfunction. As a result, manycomputers
offer addition as
their only arlthrnetic instruction, After additlon, the next mostcoflilnon
arithrntic instruction is subtraction. This is becausesubtraction can
be perfomndusing the samebasic hard*areas addition. After addition
and subtractionyou haveto go to a considerablymorecomplexcomputer
to get mul ti pl i c ati on a n dd iv is io n a s b u ilt - in f u n c t io n s . T h eh a r d w a r e
required for these operationsis conslderablymorecomplexthan that used
for addition and subtraction. As of this writing (July L976)there are
no microprocessors
with built-in multiply and divide hardware.Thls wlll
certainly change. All of theseoperationsuse the contentsof the computer's
accumulator(s)
and anotherdata sourceas operandswith the result endlng
up in the accumulator.
3I;X.l TnosComplement
ilotatlg
Themostcormonway of representingnumbersfor arlthmetic operatlons in
the computeris twos complement
notation. To understandtwos complernent
notation let's considerthe binary nurnbers
that can be representedby an
8-bit data element. lrleknowthat an 8-bit data elernentcan represent256
individual values. Whenwe use a reglster as a counter, we can count up
to 256dlfferent values. The binary numbercountlngmethodfollows,

Lt-1

Binary
00000000
00000001
00000010
00000011
00000100

Count
0
1
2
3
4

::

1 1111110

254

1 1111111

255

of using the data elementas an unsignednumber. The

This is an example
numbersin the register are interpreted as being in the range+0 to +255.
Nowthis methodis convenientfor counting,but awkward
for arithmetic
numbers.To circumvent
becausethere is no wayto representnegat_ive
this'problemwe changethe way in whichwe interpret the 256 possible,
in the registers so that we will be able to representboth posinumbers
will be called g.ignedtive and negativenumbers.This revised scheme
twos complement
Any binary numberis convertedto its negativeby complementing'it,
addingone, and ignoringany carry out causdbJ the addition. For example,
+5 in an 8-bit microcomputer;
00000101.To
considerthe binary number
co n ve rt+5 to -5 w e fi rs t c o m p le m e1n1t 1 1 1 0 1 0a,n dt h e n a d d 1 ; 1 1 1 11 0 1 1 .
If we performthe procedureon the result we get backour original number.
in an 8-bit register nowrepresentpositive and
The256 possiblenumbers
negativenumbersin the range-128 to +127as follows:

IL.2

000=0
001=1

0 0 000
0 0 000

01
11
ll
11

1 ll' ' + 1 2 7
111= -1
110--2
101=-3

111
111
1 ll
111

::

10000000'-128
t{obhowbit 7 (the mostsignificant blt) is alwaysa zero for all positive
and alwaysa one for negatlvenumbers. Thenpst slgniflcant bit
numbers
numberis called the siqn bi3, becauseby testing
in a irl,oscomplement
it you can deterrnineif a numberis positive or negative.
tL. 1.2 BinarYAri thmtlc
Blnary arithmetic is perforrnd uslng the ALUand two operands' The
or slgned tms
operation can be perfonnedusing either unsignednr,mbers
numbers,dependinguponthe operation being perforrned' ibst
complement
performaddition and subtractionas unsignedoperations. They
computers
but
do provlde flags to indicate the result ln signed tms complement,
it ls up to you to keeptrack of the slgn and magnltude.
Addltion is perfonnedby addlngthe contents of an operandto the contents
of the accumulator. If the result ls greater than the largest number
whichcan be representedin the accumrlator,a flag rill be set to indlcate a carry out has Occurred. For example,conslder the operatlon of
addlng the number15rOto an 8-blt accu,rulatorwhlch contalns 25LO' The
operatlon would be performedas follows.

IL.3

A c c u m u la t o r 0 0 0 1 1 0 0 1
+0perand 0000I111
Re s u lt 0 0 1 0 1 0 0 0 = 4 0 , ^
Nowc ons i derthe add it io n o f lllr '

t o 1 4 5 1 0in t h e a c c u m u la t or .

Ac c u m u la t o r 1 0 0 1 0 0 0 1
+Operand 01101111
u00000000
carry out
T h e re su l t o f th i s o per ation is 25510. It causesa car y out to i ndi c ate
that the accumulatoroverflowed.
Subtraction is performedby taking the twos complement
of the subtrahend
an d a d d i n g i t to th e minuendin the accum ulator . Thus to subtrac t 10r O
from 25rOwe urouldperform the following operation

Subtrahend00001010
FormTwosComplementI 1 1 1 0 1 I 0
AddTo Accumulator 0 0 0 I 1 0 0 I
4000011
carry out

11=1510

Ignoringthe camy out, we havea result of 1510. Nowconsiderthe

subtractionof 35 from 15.
S u b t r a h e n d0 0 1 0 0 0 1 1
FormTwosComplement 1 1 0 1 1 1 0 1
AddTo Accumulator 0 0 0 0 I I I 1
!/11101100
no carry
using our
Nocarry lndicatesa negativeresult. If we convertthe number
rules, we obtain the correct result, -20.
twosc6mplement
11-ir

A
b

n'.wr'^^Ir*d"
g*b*re-Iv,*A

K w-*+

Re s u lt 1 1 1 0 1 1 0 0
C omp le m e n0t 0 0 1 0 0 1 1
Addl
00010100=2010
Notice that the sense of the carry after a subtraction is reversed from
th a t o f a d d i ti o n . A car r y out indicites that the subtr ahendw as s m al l er

than the minuend

1nd the result of the subtractionwaspositive. &gry
qnCthat
indicates that the subtrahend
was larqer than the minuend
-out
the resutt rvls nega
This is called a borrpwcondit'ion,and it is
analagous
to overflowin an addition operation. To avoid confusionabout
ALU'Sautothe reversal of the state of the carry flag, manycomputer
matically complement
the carry flag after a subtraction. This makesits
state after a subtractionmatchmoreclosely lts state after an addition
(i .e. c amy s et i f re s u lt c a u s ea b o r r o w,c le a r if t h e r e s u lt di d n o t
causea borrow),
lL2 Computer
Loqic Instructions
In contrast to the arithmetic instructions, the logic instructions perform
their operationswith no regard for the numberrepresentationbeing used.
The numbers
being operateduponare simply treated as strings of bits.
That is why,theseoperationsare often refemed to as bit by bit operations. The operationperformedon one bit in no wayaffects the operation
uponadjacentbits.
AND'0R'
The four most cormoncomputerlogic instructions are Complement,
use the contents
and Exclusive0R. Theseoperations(exceptcomplement)
of the accumulatorand anotherdata sourceas operands,with the result
endingup in the accumulator.
9.2. I Loeic Conlplement
Thecomplement
instruction replaceseachbit in the accumulatorwith its
l ogi c c ompl ement.Th u sif t h e a c c u m u la t o r c o n t a in s1 0 l 0 1 I 0 1 , th e
,r
complernent
operationyields the following result.

u-5

Accumulator r 0 1 0 1 1 0 1
Complement0 1 0 1 0 0 1 0
11.2.2 Loqic AND
The Logic ANDoperations (SymbolA) operatesuponthe bits of the accumulator
and an operandaccordingto the folloring truth table.
AccumrlatorBit
it
ResultBit

0011

Thusgnly those bit positions whichare logic ones in both the accumulator
and the operandwill be logic ones ln the accunnrlatorafter a Logic Al{D
operationhas beenperfonned. For example,considerthe following Logic
At{Doperation.
A c c u m u la t o r0 1 1 0 1 1 0 1
A0perand 11011011
Re s u lt 0 1 0 0 1 0 0 1
Only those bits whichwereonesin both operandsare in the result.
L t.2.3 Looi c ,0R
The Loglc 0R operation (symbolV) operatesuponthe bfts of the
and an operandaccordingto the folloring truth table.
accumulator
B it
Accumulator
nd B it
R e s u ltB it

001
0

Bit positionswhichare logic onesin either the accunulatonor the operand

after a Logic 0R operationhas been
will be Logic onesin the accumulator
performed. For example,consider the following Logic0R operation.
II-O

B i t p o si ti o n s w h i ch a re L o gic ones in either the accumulatoror the o per and

w i l l b e L o g i c o n e s i n th e accum ulatorafter a Logic 0R oper ation has been
p e r f o r me d . F o r e xa mp l e ,consider the following Logic 0R oper ation.

Accumulator 1 0 1 1 0 1 1 0
V Operand 0 0 1 1 0 0 1 1
It
Resu
11110111
All bits whichwereonesin bcth operands
are onesin the results.
q.2.4
XOR
-Loqic
TheLogic Exclusive0R operation(symbolA, o-ten called XOR)is not
foundin all computers.It operatesuponthe bits of the accumulator
and an operandaccordingto the following truth tabSL
Accumulator
Bit

0011

a nd Bit

R es u ltB it

0110

Bit positionswhichare a Logicone in either the accumulator

or the
operandbut not both will be Logiconesin the accumulator
after a logic
XORoperation has beenperformed. For exanple,considerthe following
Exclusve0R operation.
A c c umu la t o0r 1 1 0 0 1 0 1
.lf 0perand I 0 I l gJ I 0
R es u lt I 1 0 I 0 0 I I
Thosebits whichwereonesin only oneof the operands
are onesin the
result.

u-7

APPENDIX
A
MODIFIED
6500OPCODETABLE

MODIFIED 6500 oP coDETABLE

0

8RK

OR$(t

ORAz

ASLz

PHP

ORA#

ASLa

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ROLz

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AND@ ROIS

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ANDGx ROIGx

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K ey to addressl ng el dol e:
t
@
t
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a

lnnrediate
abeol ute
8ccumulatot
rel ati ve
tero PagG

&t, Gy
N*,, zV
rl

ty

absolute tndexed
Eero page tndexed
lndercd lndtrect
lndlrcct
lndexod

APPENDIX
B
KIM INFORMATTON

KIM PROGRA}MING
DATA SHEET
.5500

OP CODETAELE

4567

8RK

oR$(l

BPLr

oRAly

JSRG

ANDX,

BITt

Bltlr

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A.liDz

ROLz

PLP

AND'

ROL.

BITE

ANDG

ROItr

AJ{Dzx

ROLil

sEc

AND@y

AN[ax

ROLG!

EORZ

IJRz

PiIA

EOR#

ISRa

JlaG

Eo8

tsR

EORzx

LSRzx

cLt

EO@y

ECRj-ex f-sRLlr

ADCZ

RORZ

PIA

ADC#

RORs

.JnPt

ADC.a

RORG

RORzr

cFt

l\D@Y

STXz

DEY

* T XA*

ADC(ax

RORGI

sTr

sTr@

sr:@

STl:r

STArr

STXzy

TfA

STAGy

fXS

sTAGx *

.tDAxl

lrxt

l.J)Yz

ItAa

lJXz

TAY

I.DA#

TA,\

rcl

LDr&

cLv

I,l@y

TsX

IrlG*

LDA(?x LDX?y

cI'rG

cliRd

STAIy

BCSr

IDAIy

U)Y?r

lJAzx

L}Xzy

cPIf

cMht

CPY8

CltPz

DEC:

INY

cMPrr

D!!{

BNE!

C!{Ply

DECzx

ct

CilrGy

CEK'

SBGxt

CEX8

lNc"

BEQr

sBcty

INCa

ol2t

CliPzx
SBC?
SBCzr

I:!X
SED

6567

'

60nf

NoF

SB@y

LD&

DE@

C.'{I?x Df,CGr

8&r

5UW

lHg

fNO!fu

SB@x

CDEI

9i {8

STASUSREGISTER

TABLE
ASCII/HEXCONVERSION

P : NV
B DI Z C
76543210

t.&t

cu

I}IPORTAI{T
ADDRSSSES
00EF PCL
00F0 PCH
OOF1
o0F2
OOF3
OOF4
00F5

P
s
A
Y
X

w.i1,
Fi.1 ". -: ,-1700 pAD
... LTOL PADD
-rr.i, ,
PBD
4L702
1703 PBDD
,4 ' ,4
i;t11s..t
,/'
''

,:,!;'

t11' /
i
-i ,
'

aAJ

=,.,, ". ;,

17rA t&tI-L ss=00

17FB NUI-H ss=1c
ITFC
17m
17FE
ITFF

RST-L
RsT-H
IRQ/BRK-L
IRQ/BRK.H

0OF1- 00 (LD)
17F5 SAL
I7F5 SAIT
L7F7 EAr+l
17F8 EAII
17F9 rBlt
1g0O DUMPI

L873 LOADT

.:..r+-

0
1
2
3
5
7
8
9
l0
l1

0
1
2
3
4
5
6
7
8
9
a
B

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011

F
E
D
c
B
A
9
6
7
6
5
4

L2
13
14
15

c
D
E
F

1100
1101
1110
1111

3
2
1
0

IMERVAL TIT'{ER
pRT to @: /ll
L704
1
1705
8
L706
64
L707 LO24
170c
I
170D
8
170E
64
l70F t024

INT
D
D
D
D
E
E
E
E

READ G
I}N
L7O7 STA?US
L7O6 COUNT D
17OE COTJIfI E

NUL
sox
slx
EIX
EOr
EflO
ACK
seL

DECIT.{AL iTA( BII{ARY M

03
v\
06

..i
i

00
HT
09
LF
OA
oa
oc
oo
so o
OF
OL t0
tl
r2
oc3 ?f,
Oc. la
l5
SYN r 6
ta l 7
cAr{
t9
Et1 '|l
sua tA
E5C
FS 'E
rc
is
US

xx
0oF9

IE
!F

8o.

as

DISPIAY OI'TPI.TT:
)g
)0(
00FB 00rA

@
0t

7.8'r
Ch,

Chr

No.

CDt

4l

e12

r6l
b6?
?
d&
.65
r66

:?f,
i24
a?5
e26
,21

o{
E4!
F4
ca1
Ba8
t49

{?E
t29
.?a
+29

,2e
i2F

r3l
232
33:l
a34
535
i3a
,37
83i
93!}

.38

,.9n

7 '8'r

K48
Lac
Mao
t.
O4F
P5q
o5r
R52
s53
74
u55
v16
w5t
gl
'x
Y!9
z5a

!58

.3o

150

rlF

..5F

e.0

\eo

t
h6
.69
r6a
r5a
r6c
m60
n6
o6F
FrA
c?l
.t2
rt3
r?a
r75
r7g
r17
r7E
rE
!tA

!a..

6:t

76
AL'
?D
EsC
'E
0eL. tt
EUBOUI

JSRG grFlF
I {UL

KEYBOARD
INPIIT:

I soH
I
srx

JSRG $1F6A

TX

OTTTPUT
TO IIY:
ENO
ACK
tL

char ln A
Jsn@ 91EA0

ss
HT

II{PTIT FROMITY:
JSR@ $1E5A
char lntoA

.'1

NULL
s7anr oF Haorr{c. AtSo 6TAFT
OF MESSAGE
START aF rXlj ALSO OA. E(O
OF AOORESS
eND OF lgxt; also oM, Eil, oF
MESSAOE
EHO OF ?FANSMr39tC{ tENOt
ENOUIRY INORYI- ALSO V'FU
ACXNO4LEOCE,
NU
RINGS TH ALL ^LsO
BACKSPAC
HOAI2OiIIAL TA'
LINE FEED OR LIN SPACE{ilW
LTNEI AOVANCES?A?'A fO
ftxr Lril aGttNrNG oF Lttr
VFRTICAL TA8 (VTAAI
FORM :EED TO
OF NEX'
PAG iPAGE}
'OP
CABRIAG RTUNN

OLE
'rC1

oc4
sYU

r8
CAN
tl
su8

RS
US

sHrFt Out
sHrtt rx
OATA LINX SCAT
DgvrcE coN?roL t
oEvrcE coitleoL
2
cEv'cE coNTBor 3
:tEvrCe CONIPCL a
i/EcAttv Acracfvtlocc
3YIJCHHONOU' IALE ISYfVC'
NO CF rnANSVrSSrON TLOCX
SArrCEL lCALCLl
EwO Of storur,
3Utg?rrutg
scAtE. PilFtx
FILE SEPAiATOI
GFOU' SEPAFATOR
RCOFIOSEPARATOR
UTITSPARATON

rII't Brocr Dr.0oniM

6530oo2
I.K ROM
TII,IER

Kf,YBOARD/
DISST.AY

.J

648 RI{U
15 PIO

PAO . PA7

7
gBO . PB7

6s30003
-1K ROt'{
TIMEF.
648 RI{U

PAO - P.A,7

15 PIO
PBO. PB7

DBO - DB7

-rRQ

NlIr

R/W RAM R/W

ABO- AB15

TTYITAPE
TNTERFACE

KII"I INTERFACIY DATA SITEET

APPLICATIONCONNECTOR
PLUG
TUNCTION

PIN #

PBO
PBl
PB2
P B3 .
PB4
PB5
INT(orange)
PB7*

TTY BAT'DRATECONTROL

FUNCTION

I
2
3
4
5
6
7
8

PI N I

PA7
PA6
PA5
PA4
PA3
PA2
PAT
PAO

*6e e p . H-7 fo r det ait s

l6
15

r4

BAUD

I1O

300

600

1200

2400

4800

l7F1
l7r3

79
02

EA
00

75
00

38
00

18
00

OA
00

l3
t2
l1
IO
9

9600
02
00

M tc
about t his

Itne

-J;)
REMOTE

EKPANSIONCONNECTOR
PLUG
FI'NCTION

F'

t,

PIN #

FIJNCTION

480
A8l
AB2
AB3
K (g ree n)
EIF

I
2
3
4
5
6

027
RAMR/r{

DB7
DB6
DB5
DB4
DB3
DB2
DBI
DBO

PIN #

E A RP H ON E

16
l5
L4
13
t2
11
10
9

__l
(A

-o
7

PR.GRAHMABLE
I/O LINES
PA DATA RECISTER 17OO
PB DATA REGISTER 1702

PA DIRECTIONREGISTER 1?OI. (0=lnput,

PB DIRECTIONREGISTER 1703

1=output )

TTY
OATA

ouT

TAPE RECORDER
CONNECTIONS
FIJNCTl,ON

PIN f

GND
AI'DIO IN
AUDIO OTIT

K
L
l.{

COLORCODE
GREY
BLUE
RED

K E Y B OA R O R TU R N

NOTES
GND
FROMEARPITONE
OUTPUT
TO MIC INPUT

-o

7
c

-o
3

4
-o

;;)

TTY
OATA
IN

<H

TTY/CRT CONNECTIONS
FT'NCTION
KEYBDRET.
PRINTERRET.
KEYBOARI)
PRINTER

PIN #
R

s
t

COLORCODE
BRO{rtN
tsR(NN
VIOI.ET
YULLCH

NOTES

(+)
(+)
20 nA current
20 nA current

{_--Loop
loop

KtM --:j

I
L J U MP f R

E X TE R N A L S W ITC H IO S E LE C I
E ITH E R MOD
FOR TTY OP E N A TION

K IM MO NI T O R I MP O RT A NTA DDRE S S E S
OOE F
OOFO
OOFl
OOF2
OOF]
OOF4
OOF5
OOF6
OOFT

US E R P C L O W B Y T E
US E R P C HI G H B Y T E
US E R S TA T US RE G I S T E R
US E R S TA CK P O I NT E R
US E R A CCUMUL A T O R
US E R Y R E G I S T E R
US E R X R E G I S T E R
CHE CK SUM
CHE CK S UM

OOF9
OOFA
OOFB

S TORA G EF O R RI G HT HA NDDI S P L A Y DI G I T P A I R
S TORA GEF O R CE NT E RDI S P L A Y DI G I T P A I R
S TORA GEF . O RL E F T HA NDDI S P L A Y DI G I T P A I R

17OO
P ORT A .DA T A
LTOT
P ORT A D I RE CT I O N CO NT RO LRE G I S T E R
I7O2
P ORT B D A T A
L7O'
P ORT B DI RE CT I O N CO NT RO LRE G I S T E R
L7O4-L707 INTE RV AL T I ME R # 1
LTOC-L7OF INTE RV AL T . I ME R # T
L744-I747
L74C-I74T
I7F2-T7F3
I7F5
L7F6
I7F7
17F8
L7F9

INTE RV A L T I ME R # 2
INTE RV A L T I ME R # 2
S E RIA L T/ O B A UD RA T E CO NT RO L
TA P E DUMPS T A RT I NG A DDRE S SL O W B Y T E
TA P E DUMPS T A RT I NG A DDRE S SHI G H B Y T E
TA P E DUMP E NDI NG A DDRE S S + I L O W B Y T E
TA P E DUMP E NDI NG A DDRE S S + I HI G H B Y T E
TA P E FILE I NDE NT I F I CA T I O N NUMB E R

ITFA
17FB

NMI V E CT O RL O W B Y T E
NMI V E CT O RHI G H B Y T E

LTFE
LTFF

rRQ V E CT O RL O W B Y T E
IRQ V E CT O RHI G H B Y T E

18OO

E NTRY P O I NT F O R T A P E DUMP RO UT I NE

1873

E NTRY P OI NT F O R T A P E L O A D RO UT I NE

ICOO

NONDE S T RUCT I VMO

E NI T O R E NT RY P O I NT

lC+F

DE S TRUCT I V EMO NI T O R E NT RY P O I NT

IE A O

S E RIA L OUT P UTE NT RY P O I NT

1E 5A

S E RIA L IN P UT E NT RY P O I NT

l F lF

E NTRY P O I NT F O R DI G I T DI S P L A Y RO UT I NE

IF 6A

E NTRY P OI NT F O R K E Y B O A RDRE A D RO UT I NE

B- 4

APPENDTX
c

C.

KTM SOFTWARE COLLECTTON

KIM User Notes vl- /13

Cass R. Lewart
HoI"mde1,N. J.
DISPI,AY ROUTINE
This routine will display any program showing each successive
location and the contents of that location.
The routine is fu1lv
relocatabLe.
By storing in the 17FA and LTFB l-ocations the
starting address of this routine one can use the ST key to start
the program. The display can be stopped by pressing RS and continued
by pressing ST again.
The program starts dispLaying consecutive
locations starting with the location shown in the displ-ay by
pressing ST. The second prograrn MULT controls the displa.v time.
With val-ue 04 it is 0.4 sec per Location.

OO
02
03
04
06
09
0C
0F
11
T2
13
L4
L6
18
1A
1C

e.g.

ll ql

A2 04
8A
48
A9 62
8D 47 L7
20 L9 \F
2C 47 17
10 F8
68
AA
CA
D0 EC
E6 FA
D0 E6
E6 FB
D0 E2

THREE
TWO

ONE

LDX/I
T)(A
PHA
LDAIf
STAG
JSRG
BITG
BlLr
PtA
TAX
DEX
BNEr
INCz
BNEr
INCz
BNEr

MULT

$62
$L7 47
SCANDS
$L747
ONE

.1 sec/cycle
Load timer
Display
Check timer

TI^IO
$FA
THREE
$FB
TI'IO

to start displayipg at. 2LO: AD,O,2,1r0,ST

if the DISPLAYstarts at 300: AD, L,7,F,A,DA,0,0,+,0,3,AD,go
to desired location,ST,.,.
.

l+i

i't"",.**11r.*'L.vs$d*f-

c-1

KIM User Notes vL l/t4

Jim Butterfield
Toronto
DIRECTORY:A KIM-I

UTILITY PROGMI'I

Program DIRECTORYaLlows you 254 program IDs to choose from ... enough
for most program libraries
with some to spare.
The program is fu1ly
reLocatabl-e, so put it anlnohere convenient.
Start at the first
instruction
(0000 in the listing).
IncidentaLly,
000L to 001D of this program are
functionaLly
identical
to the KIM monitor L88C to 18CL.
After you start the program, start your audio tape input.
When
DIRECTORYfinds a prograu, it will display the Start Address (first
four digits)
and the Program ID. Hit any key and it wiLl scan for
the next prograu.

0000 D8
0001 A9 o7
0003 8D 42 L7
0006 20 4t 1A
0009 46 F9
0008 05 E 9
000D 85 F9
000F c9 L6
0011 D0 F3
0013 20 24 LL
00L6 c6 F9
00t8 L0 F5
00LA c9 2A
001c D0 F1
0018 A2 FD
oo20 20 F3 19

oo239s FC
0025 E 8
0026 3A F8
0028 20 lF lF
0028 D0 D3
002D F0 F9

CLD

LDA#
STAG
JSRG
LSRz
ORAz
STAz
cMHl
BNEr
JSRG
DECz
BPLT

$OZ
SBD
RDBIT
INH
INH
INH
$le
SYN
RDCHT
INH
TST

cu"tt

$2A

BNET
LDXtI
JSRG
STAzx
INX
BMIT
JSRG
BNEr
BEQr

TST
$rD
RDBYT
POINTII+I

c-2

RD
SCANDS
GO
SHOI{

Directional

reg

Scan thru bits..,

new bit
..shifting
. . into left of
..byte INH
SYNCcharacter?
no, back to bits
get a character
count 22 SYNC's
then test astk
,.or SYNC
if asterisk,
stack 3 bytes
into display
atea
.,.and shine
until
keyed
atf s all fol,ks

K IM U ser N otes vl

VU TAPE

l t2

Ji m B utterfi el d
Toronto

Program VUTAPElets you actual-1y see the contents of a KIM format tape
going by.
as it's
It shows the data going by very qrrickly, because of the
taPe speed .. but you can at least 'sense' the kind of material on the tape.
In case of tape troubles, this should give you a hint as to the area of
your problem: nothing? noi se? dropouts? And you can prepare a test tape
(see beLow) to check out the tape quality and your recorder,
The test
tape will also help you establish the best settings for your volume and
tone controls.
Perhaps VUTAPE's most useful function,though,
is to give you a
tfeeling'
for how data is stored on tape. You can actually watch the
Processor trying to synchronLze into the bit stream. Once itrs synched,
you'll
see the characters rolling
off the tape
until an END or illegal
character drops you back into the sync mode agaLn. Itrs educational to
watch. And since the program is fairly
short, you should be able to trace
out just how the processor tracks the input tape.
(so you can
VUTAPEstarts at location 0000 and is fu1-J-yrelocatable
load it anyplace it fits).

OOOOD8
START CLD
0001 A9 7F
LDAI|
0003 BD 4L L7
STA@
0006 A9 13
SYN
LDA/f
0008 85 E0
STAz
OOOA8D 42 17
STA@
000D 20 41 1A
JSRG
0010 46 F9
LSRz
0012 05 F9
ORAz
00L4 85 F9
STAz
0016 8D 40 17
STA@
0019 C9 16
TST
CMIVf
0018 D0 E9
BNEr
001D 20 24 LA
JSRG
OO2OC9 2A
CMH|
0022 D0 F5
BNEr
0024 49 00
STREAM In.Ait
0026 8D E9 L7
STA@
OO29 20 24 LA
JSRG
002C 20 00 LA
JSRG
002F D0 D5
BNEr
0031 A6 E0
LDXz
OO33E8
INX
0034 EB
INX
0035 E0 1-5
c?x/f
0037 D0 02
BNEr
0039 A2 09
LDX/F
0038 86 E0
STKz
OVER
OO3D8E 42 T7
SD(@
0040 AA
TAX
0041 BD E7 \F
LDAGx
0044 8D 40 17
STA@
0047 D0 DB
BNEr

$7r
PADD
$13
POINT
SBD
RDBIT
INH
INH
INH
SAD
$16
SYN
RDCHT
$2A
TST
$OO
SAVX
RDCHT
PACKT
SYN
POINT

$15
OVER
$09
POINT
SBD
TABLE
SAD
STREAM

c- 3

set display dir reg

..window 6 and tape in
and keep pointer
get a bit and
..sLip it into
. . the right-hand
..side;
show bit flag on display
..is it a SYNC?
nope, keep 'em rolling
yup, start grabbing...
.8 bits at a time and..
it's not an r*r."
..if
..then start showing
..characters 1 at a tim e
..converting
. . if legal

to hexadec..

Move al-ong to next. .

..display position
(if last digit,..
..reset to first)

change character read

. . to segments and. .
send to the dLapLay
jurnp
unconditlonal

PROGRAMTO CHECK OUT TAPES/RECORDERS

with

Make a test taPe contal.ning

the folLowlng program:

0000 A0 BF
0002 8C 43 L7
0005 A9 16
oooT 20 7A 19
0O0A D0 F9

cO
LP

an endless stream of SYNC characters

LDy#
$Br
STlf@ PBDD
LDA/I
$rO
JSR@ OUTCH
BNEr
Lp

directionaL..
.,regtsrers
SYNC
..our to rape

Now use program WTAPE. The display should show a steady synchronizatLoa
pattern.
Tty praying with your controls and see over !f,hat range the
stays
l-ocked in.
The wider the range, the better your cassettel
Pattern
recorder.

c-4

KIM User Notes v1/12

Jim Butterfield
Toronto
SUPERTAPE

0100 A9 AD
DIIMPT LDA#
O1O2 8D EC L7
STAG
0105 20 32 L9
JSRG
oL08 A9 27
LDAIF
0104 85 El
STAz
010c 49 BF
LDA/I
010E 8D 43 L7
STAG
OLLL A2 64
LDx/f
0113 A9 16
LDA/I
0115 20 61 01
JSRG
011-8A9 6tDA/f
011A 20 88 0l_
JSRG
011D AD F9 n
LDA@
OI2O 20 70 01
JSRG
0123 AD F5 L7
LDAG
0L26 20 6D 01
JSRG
OLzg AD E6 L7
IDAG
OLaC 20 6D 01
JSR@
OL2E 20 EC L7 DIMPT4 JSRG
OL32 20 6D 01
JSRG
0135 20 EA l.9
JSRG
O].38 AD ED 17
LDAG
0138 CD E7 17
CMP@
013E AD EE L7
LDAG
0141 8D F8 17
SBC@
BCCr
0L44 90 E9
0146 A9 2F
LDA/F
0L48 20 88 01
JSRG
0148 AD W T7
LDAG
OL4E 20 70 01.
JSR@
0L51 AD E8 17
LDAG
JSRG
OL54 20 70 O].
0L57 A2 02
LDKIF
0159 A9 04
LDA/,[
0158 20 61 0lJSRG
015E 4C 5C 18
JI4FG
; subroutines
0161 86 E0
HIC
Sfiz
0163 48
HrCl
PHA
0L64 20 88 01
JSRG
PLA
0167 68
0168 C6 E0
DECz
016A D0 F7
BNEr
RTS
016C 60

op code LDA
$AO
VEB
INTVEB
ser up subrtn
527
GANG
fl-ag to go to SBD
$sr
PBDD
open the channels
send 100...
$64
..SYNC chars
$16
rrrc
send asterisk
S2A
OUTCHT
ID
then the ID
OUTBIT
SAL
followed by
OUTBTC
rhe srarr address
(1ow and hieh)
SAH
OUTBI'C
get memory word
VEB
ouTBTc
and send it
rNcvEB
on to next address
VEB+I
EAL
is the address..
VEB+z
..at the end?
EAH
DUMPT4
no, go back;
$2F
Yes: send end-data
OUTCITT
CIIKL
. . and checksum
OUTBT
CHKII
. .hi and Low. .
OUTBT
send two..
$OZ
EOT
characters
$O+
HrC
DISPZ
and werre finished
here
foll-ow
TIC
count
oUTcHT
TIC
HICL

c-5

send character
..and bring it
do it

again

back

016D 20 4C L9 OUTBTC JSRG

0L70 48
OUTBT PHA
LSRa
0l_71-4A
oL72 4L
LSRa
oL73 4A
LSRa
oL74 4A.
LSRa
JSNG
0L75 20 7p 01
PLA
0 178 68
JSNG
oL79 2A 7D 01
RTS
01.7c60
0LTD 29 OF
017F C9 OA
0181 18
0 L82 30 02
oL84 69 07
0L86 59 30
0188 A0 08
018A 84 E 2
018CA0 o2
0188 84 E3
0190 BE BE 01
0193 48
oL94 2C 47 L7
0197 L0 FB
0L99 89 BF 01
019C 8D T+T7
019F A5 E1.
01A1 49 80
0143 8D 42 t7
01A6 85 E 1
0LA8 cA
0l_A9D0 E9
OI.AB68
01Ac c6 E 3
ol.AE r0 05
0180 30 o 7
0LB2 4A
0183 90 DB
0185 A0 00
0187 F0 D7
0189 C6 E 2
O1BBDO CF
01BD60

AND/T
CMI{I
c16
BMlr
ADCI|
ITH(I
ADC'T
OUTCIIT I.D'TII
STtz
T.NYNI.
lRY
STYz
T,DXGY
ZON
PHA
BII'G
ZON1
BPLT
LDAay
STAG
LDAz
EOR/I
STAG
STA.z
IID(OUT

CHKT

compute checksum
save the character
..and take its
four left bits..
r,frite rem...
now the 4 right

bits..

HHKOUT

$0F

$oe

remove unwanted bits

change to ASCII by..
adding:

HH(T.

$oz

$ :z ifAtoF

$go
$08
conNT
$oz

$ 3 0 if numeric
for the eight bits,.

TRIB
NPUL
CLKRDI
z0N1
TIMG
CLKlT
GAIIG
$80
SBD
GANG

Dm(

send 3 units
starting
at 3600 hertz
number of half cycl.es
keep the character
wait for the previous,.
cycle to complete
get the time to the..
..next pulse ($78 or C3)
flip

between 1 and 0

have we sent all

the cycles?

BNEr zoN1
nope, aend another one
get back the character
PT.A
DECz TRIB
one less unit to send
BEQr stv,
and the last oners here
quit
ROUl
BMIr
none teft?
LSRa
take next bit
BCCr zoN
..and lf ltfs a one..
SETZ
TNYII $oo
switch to 24AA cycLes/sec
return
BEQr z0N
unconditionat
ROUT
DECz COT'NT
one less bit
any more? go back
BNEr TRY
'
RTS
I frequency/density controls
01BE02
NPUL
two pulses; one cycl.e!
.BYTE $OZ
01BFC3 03 7E TrMG
.BYTE $C3,$03,$78
end

Sp eed
X3
X6

Tining

Data: $01BE
04
02

c-6

$01"c0
06
05

KIM- 1 User Note s vl

TAPE DUPLICATIONPROGRAM

Jim Butterfield

L78O L9 27
START LDA/f $27
1782 A2 3F
GO
LDX/f $3F
1784 8E 43 17
STX@ PBDD
L787 A2 07
LDX/I $07
1789 8E 42 L7
STXG SBD
17BC A0 5E
LDY/f 94
l78E 2C 42 L7
BITG SBD
L79L lO 02
BPLr OVER
1793 A0 A3
tDY/l L63
L795 A2 BF
OVER
LDX// $BF
L797 8E 43 L7
STX@ PBDD
L79L 49 80
EORif $80
L79C 8D 42 L7
STAG SBD
L79F 8C 44 L7
STYG CLKIT
LTLZ 2C 47 17 WAIT
BITG CLKSTAT
1745 10 FB
BPLr WAIT
I7L7 30 D9
BMIr cO

Connect your two cassette

and AIJDIOOUT points.
A11 programs will

recorders

SBD value
register
set directional
input
PB5 (cont) set for input
high frequency
zero or one?
low frequency
register
set directional
output
reverse output bit
and send it
set timer
and wait

start

be copied from one tape to the other.

If

bad copies are obtained,

the volume on the playback machine.

c-7

to

in the usual way at the AIIDIO IN

With the program running,

works on speeds up to 3X.

to

the recorders.
This program
try

reducing

lf4

KIM User Notes vL lf4

MOVE-A.BLOCK

Edward J. BechteL, M.D.

Nerrport Beach, Calif .

The MovE-A-BLocK program wilL move a block of bytes up to 256 bytes

Long forewards or bachwards any distance.
The bI-ock can be across page
boundaries -- it does not have to reside in one page. The starting
address and ending address of the block is entered in 00E0 - 00E3. The
NEII starting
address of the moved block (i.e.,
where you want to move
it) is entered at 00E4 - 0085. r located it in 1780 ro be generally
out of the way, but lf you wish, you can use it to reLocate itself
anlmhere.
lhe program calculates whether the move is forewards or backwards,
then moves from the top up, or from the bottom down. The number of spaces
the block is moved (in signed notation)
is stored by the program in
0086 - 00E7' and the number of bytes that nere moved is stored in 00E8.
Also, the new ending address of the moved block is automaticall-y placed
in 0082 - 0083, for subsequent use.
1780 38
L78L A5 E4

SEC
LDA.z

$W+

1783 E5 E0
sBCz $ro
1785 85 E6
srAz
$ro
L787 A5 E5
wilz
$gs
1798 E5 EL
SBCZ $Er
L78B 85 E7
STAz $rZ
178D 90 18
BCCr MOVEB
178F 38
MOVEF SEC
L79OA5 E2
IJi.AZ $82
1792 E5 EO
SBCz $rO
L794 L8
TAY
1795 84 E8
slYz
$ng
L797 E6 E8
INCZ $Eg
L799 BL EO
LooPl- LDAiy $80
L79B 9L E4
srAiy $84
179D 88
DEY
T79E DO t^9
BNEr L00p1
17A0 81 E0
LDAiy $80
L7A2 9L E4
srAiy $sa
L7A4 88
DEY
L7A5 30 L4
BMIr
END
L7A7 38
MOVEB SEC
17A8 A5 E2
LDAZ $NZ
17AAE5 E0
SBCz $rO
17Ac 85 E8
STAz $ee
17AE E6 E8
INCz $ee
1780 A0 00
rDYtt $OO
l7B2 81 EO
LOOP? LDAiy $nO
L7B4 9L E4
SIAIy $ra
1786 C8
INY
L 7B 7C4 E 8
c wz
$ rg
t7B9 D0 F7
BNEr LOOP2
17BB 18
END
CI.E
LTBOA5 EZ
LDAz $82
LTBE65 E6
A,DCz $UO
L7c0 85 E2
STAz $pZ
L7C2A5 E3
LDAz $Ug
L7c4 65 9,7
ADCz $E7
17c6 85 E3
STAz $83
L7C8 4C 4F I.C
JMPG START

c-8

0OEO= SAL)
00E1 = SAH) Original
) block of
00E2 = EAL) bytes
00E3 = EAH)
00E4 = SAL) New location
O0E5 = SAH)
00E6 = dif
00E7 = dif

L) Number of spaces
H) block is moved
(signed notation)
00EB = Number of bytes in block

c-9

IiEX DI]MP
b y J.B .

R oss

Here is a program to print

out machine language programs in
hex a d e c i m e l fo rma t.
T o use the P rogram' l oad the starti ng
address
of th e d u m p i n $ 1 7 F 5 (S AL) and $17F6 (S A H ), the endi ng address * 1
in $17F7 (EAt+l)
and $17F8 (EAH), then run IIEX DUMP starting
at
D
U
M
P
H
EX
i
s
re
l
o
cateabLe
you
so
can
nove'
i
t
to
other
memor
y
$01 0 0 .
loc a ti o n s
A s w ri tcen,
as needed.
on
IIE X D U MP centers the pri nt-out
an 8 0 c h a ra c te r
l i n e w i e h 11 spaces on the l eft.
The pri nt-out
i tself
r equ i re s
53 spaces.
T o modi fy the l eft
margi n, change the data i n
loc a ti o n s
$ 0 1 1 3 a n d $ 0 1 3 7.

EsI BITIP
1OO AD P5 17
103 85 FA
1O5 AD r'6 17
108 85 FB
104 20 2F tE
lOD A9 0A
1SF 20 AO LE
LI,z AZ OF
114 SO 9E 1E
117 CA
118 DO FA
114 A2 10
11C A9 FF
1lE 48
11F 20 9E 1E
t22 2A 9E 1E
125 68
126 18
127 69 01
I29 48
12A 2A 38 lE
12D CA
12S DO F2
130 20 2F 1E
133 20 2F lE
136 A2 0B
138 20 9E 1E
1.38 CA
13C DO lA
138 AZ 10
L4O 20 1E 1E
143 20 9E 1E
146 20 9E lE
149 A0 0O
148 81 FA
t4D 20 38 1E
150 20 63 1F
153 A5 FB
1s5 CD F8 1_7
158 90 09
15A A5 TA
15C CD F7 L7
15F 90 02
161. BO 06
163 CA
164 D0 E0
166 18
16? 90 CA
169 20 2f 18
16C 20 ?F 1E
16f 4C 4F 1C

LDAI
,SfAU
LDA@
STAZ
JsR@
LDA#
.rSR@
LDX#
IOOP1 JSR@
DEX
BNEA
L$Xll
LDA#
PEA
JSR@
LOOP2 JSR@
PLA
CLC
ADC#
PFA
JSll@
DEX
BNER
JsR@
LOOpS JSR@
l,DX#
IOOP3 JSR@
DEX
BI\'ER
LDX#
JSR@
.tSR@
LOOP4 JSR@
LDY#
LDAIY
JSR@
JSn@
LDAZ
CMp@
BCCR
LDAZ
C',lP@
BCCR
BCSts
MORE DEX
BNHR
CtC
BCCIT
DONE JSR@
J$&@
JtrP@
SfBt

S17Fg
POINTIT
$17r'6
POINTS
CRLF
'LF'
OUTCTT
$Of
OUTSP
LOOP1
$10
$ff
OttTSP
OUTSP

gct lor startiag

eddress
save it in POINTL
get high startiag
address
save it in POINTH
print Cn/Lr
prlnt another LF
print

15 spaces on lett

print headlng:
start wlth A at -1
save A
print
1 space
priot
1 space
restore A

add 1 to A
save A
pRTgYT prlnt A as bex nunber
$01

LOOP?
CRLF
CRLF
$OB
OUTSp
L0OP3
$10
pBfP$?
OUTSP
OUTSP
$OO
F,OINTI
PRTBYT
INCPT
POIN'fg
$17F8
MORE
POINTL
$17F7
MORE
DGNE
LOOP4
LOOPS
CRLF
CRLF
KIU

tr*10

prlnt
print
print

CR/LF
CR/LF
11 spaces oa left

set up data counter

print
address
space
space
zero Y
get data from address
print
data
increnent address pointer
test for maximum address

decrement data counter

repeat if counter not uero
go to I.OOPS
priat
return

two blank
to monitor

lines

KIM-1 User Notes

Joe Laughter
Memphis, Tenn.

v1

FREQUENCY
COI'NTERROUTINE
This routine counts frequency using input PBO at a maximum rate
of 2O KHz. It counts DATA for I second. To count'for 10 seconds
load $29 into address 60. It uses PB7 for int. req. (connect PB7
to IRQ. ).
0000 A9 01
r_DNt
0002 85 65
STAz
OOO4F8
SED
0005 A9 36
LDA/f
OOOT8D FE L7
STAG
000A 49 00
LDA/r
OOOC8D FF 17
STAG
000F 58
cl,r
0010 00
BRK
OO11EA
NOP
OO12AD 02 L7 CKL6^I LDAG
0015 29 01
ANdt
0017 D0 F9
BNEr
OO].9AD 02 T7 CKHIGH LDAG
001c 29 01
AND/r
0OLE F0 F9
BEQr
0020 18
crc
0021 A9 01
LDNI
OO23 65 F9
ADCz
0025 85 F9
STAz
0027 A9 00
LDLI1
0029 65 FA
ADCz
0028 85 FA
STAz
002D A9 00
Trlill
002F 65 FB
ADCz
0031 85 FB
STAz
0033 4c 12 00
JMP@
0036 48
INT
PHA
0037 49 90
LDAii
OO39 BD 04 L7
STAG
003c 2c 07 L7
BrT@
003F 10 FB
BPLr
0041 A9 F4
LDA/F
0043 BD 0F 17
SrA@
0046 c6 65
DECz
0048 F0 02
BEQr
004A 68
PtA
RTI
OO4B40
OO4CA9 FF
DISP
LDAif
0048 85 66
STAz
OO5O20 lF lF OUT
JSRG
0053 C6 66
DECz
0055 D0 F9
BNEr
0057 49 00
Tr}ilt

$or
lUECNT
INTLOW
$17FE
INTHIGH
$17FF

set int.

PB

check

vector

for

input

lotr

$or
CKLCff
PB
$01
CKHIGH

check for

input high

add count to total

$or
$F9

$re
$oo
$ra
$FA
$00
$FB
$FB
CKLCI^I
check time

$eo
$r.704
$L704
DEI,AY
$f+

set timer

for another int.

$170r
II'{ECNT
DISP

check remaining time

Lf zero disPlaY counts

$FF
SCANCT
SCANDS
SCANCT
OUT
$00

set dispLay loop count

c- 11

output data
dee. loop count
rept. display till
count Ls zeto

looP

#3

0059 85
0058 85
o05D 85
0o5F A9
0061 85
0063 68
0064 40
0065 05
0066 rF

F9
rA
FB
05
6s

STAz $rg
STAz $m
STAz $TB
rDAtl
$OS
STAz T'{BCNT
PI,A
RTI
*DATA (${ECNT)
*DATA (SCANCT)

c-12

set total

reset

counts to zero

I see timer

ANALOGTO DIGITAL CONVERSION

DEMONSTMTIONPROGRAI-T

Display

ADC Output in HEX Format

0000 A9 FF
0002 8D ol
0005 AD 03
0008 29 sF
000A 8D 03
000D 20 B0
0010 85 F9
0012 20 lF
0015 4C 0D

START
17
17
17
00

LOOP

1F
00

LDA/I $ff
srAG
$1701
LDAG $1703
AND/f $EF
SrAG
$1703
JSRG ADC
STAz $fg
JSRG SCANDS
JMP@ L0OP

Display

ADC Output in BCD Formrt

0020 A9
0022 8D
0025 AD
0028 29
002A 8D
O02D 20
0030 85

FF
01
03
EF
03
80
E7

START

set PA port

to output

set PB4 to be input

call ADC subroutine

store ADC output in right
dispLay data
loop back for more data

set PA port

display

to output

LDA/f
STAG
LDAG
AND/}
STA@
JSRG
STAz

$ff
PADD
PBDD
$nr
PBDD
ADC
HEDEC-L

0032 !,2 00

r.Dxlt

$00

OO34 86
0036 20
0039 46
0038 86
003D 46
003F 86
0041 A2
0043 86
OO45 20
0048 4C

STXz
JSRG
IDXz
STXz
LDXz
STXz
IJX/i
STXz
JSRG
Jl@

HEDEC.H
HEDEC
call binary to BCD converslon routlne
get BCD result high
$ff
store result in left display
$FB
get
BCD resul-t Iow
$82
store
result in niddle dllsplay
$fe
zero
right display
the
$OO
:
$rg
SCANDS display final BCD value
READ
loop back for more data

17
17
17
00

E6
00 02
Ei
FB
E2
FA
00
F9
lF lF
2D 00

READ

set PB4 to be input

read ADC
set up data for

binary

to BCD conversion

note:
In order to perforrn the binary to BCD conversion, you nust
the IIEDECprogram into the memory starting
at address $0200.

c- 13

load

REAL.TIHE CLOCK

REAL-TIME CLOCK. INTERRI'FTROUTINE

Kllt-l Ueer Notee v.l
Charlee H. parsone
80 Longview Rd.
Monroe, CT 06469

f4

This progran utilizes

the interval tr'er to produce an NHr rnterrupt
every 249,856 mlcroseconds, A fine
adjustment to L/4 second is done wlth
the sane tlme In th interuppt ptogr.ri--This
flne adjustnnt can b vrrled
by.changlng the nuqber fn focation-$OSAS.
A dtsplay routine is lncluded
whlcb shous rhe t*oe on-the KrM-1 di;;t;i.
you can exlt rhis rourrnc
and get back to the Bonltor Uy pressfnt
ih. ,,I,, k"y.
To run the clock program you Duat conoect pB7
to expanaron connecEor
lll 9 "19_l"t up Ehe r{!rl interiupt vector by storing $eS'i"-Siirl
903 in $17F8. The cloci< la set iy
KIl, nonltor to entr "oa
thc
current ttlre lnto the HR, MIN, ani ""i"g-tte
SEC Iocatlone glven below.
1/4 SEC
SEC
MIN =
.
IiR
.
Llz DAI
-

o
,

$0080
$00E1
$0092
$0093
$0084

l/4 second counrer

gecond counter
minute counter
hour counter
day counter for am-pm

once starring ar g0370 to set the interrupr

*:.:I
11:t1.V.proglan
ioutlne going,
then re-enter the disflay routine
$OfZg I,henever
yo$ want to rho{ th. ttDc.
"i

tb

IIAI,-TIII

CITCK - DIs?IAY ROUTIIII

0370 A9 00
START IDA# $00
0372 p5 80
STAZ QSEC
0374 A9 F4
IDA# $F4
0376 8D 0F 1?
STAG TIMEF
0379 A5 81
D$PLY I.DAZ SEC
0378 85 19
STAZ $Pg
037DA5 82
LDAZ MIN
0371 85 FA
STAZ $FA
0381 A5 83
I.DAZ HR
0383 85 FB
STAZ $FB
0385 20 6A lF
JSR,@ GETIGY
0388 c9 or
CMP# $01
038A D0 0D
BNER ENDR
038c 20 lp lF
JSRG SCAMS
038F 20 6A 1r
JSRG GETKEY
0 3 9 2 c9 01
cl{P# $0r
0394 D0 03
BNER ENDR
0396 4C .4F tC
JUPG
YOXTR
0399 20 lF lE
JSRG SCAI{DS
0t9c ll
GTf
0t9D 90 br
BGM DSPLT

zeto Ll4 second neryry

eet tlEer

to lntelrupt

in 1/4 rcc.

get aeconds
eend to rlght dlsplay palr
get rnloutes
cend to rolddle dlsplay patr
get houre
sent to left dlsplsy patr
check for r'1r key pressed
dlsplay tlue and delay
check for "Iil key preised agatn

03A5 48
RTCLK
03A6 8A
03A7 48
03A8 98
03A9 48
.
03AA49 83
03Ac 8D 04 L7
03AF 2C 07 L7 TM
0382 10 rB
0384 E6 80
0386 A9 04
0388 C5 80
038A D0 38
03BC49 00
03BE85 80
03c0 18
03c1 F8
03c2 45 8l
03c4 69 01
03c6 85 81
o3c8 c9 60
03cA D0 28
03cc 49 00
03cE 85 8l
03D0A5 82
03D2 18
0tD3 59 01
O3D5E5 E?
03D7c9 60
03E9 D0 19
03Dl r.9 00
03DDE5 82
03DF45 83
03El 18
0382 69 01
0384 85 E3
03E6c9 12
03E8D0 02
03EAE6 84
03ECC9 13
TH
03BED0 04
0310 A9 01
0312 85 83
03F4 D8
RTN
03F5A9 rA

03178D 0F 17
03rA68
O3FB A8

Junp back to oonitor if 'r1r' prcrred

dtaplay time agaln
tr0p b{dL to DSpLy te coatlrxl.

03rc 68
O3TD AA
03F! 68

otrt 40

PHA
Tt(A
PHA
TYA
PE[
r.DA{f
STAG
BIIG
BPLR
INCZ
r.DA#
CMPZ
BNER

aave A
gave X

$83
TIME4
TI}TES
TM
qSEC
$04
QSEC
RTN

u)A# $oo

S1AZ QSEC

Save Y
ftne adJust tiuring
te8t tlnler status
loop untll tine out
count 1/4 seconds
do four tines before updating lccondl
zero QSECand update clock

cLc

SED
I.DAZ
ADC{I
STAZ
cMP#
BNER
I.DA#
STAZ
I"DAZ
cIc
toGt

stlz
ctot
trat
IDA'

SEC
$Or
SEC
60
RTN
OO
SEC
MIN

change to decirnal node

increuent seconds
untll

eeconds = 60

reset seconds to 00
lncreroent..mlnutes

0l

xtx
60
lu

untll

tlhnter

. 60

rcrot

Elnutcr

to (b

sttz

tEr

I.DAZ
cLc
ADC#
STAZ
cMP#
BNER
INCZ
CMP#
BNER
r.DA#
STAZ
CI.D
LDA#
STA@
FI.4
TAY
PIA
TA:(
PIA
TTI

HR
01
H8,
12
TH
DAY
13
RTN
01
HR
$rl
TI,}MF

lncrenent houra

untll

hours

12

lnc!nent L/2 day

check for 13 houre
statt

agalo rlth

one

teturn to blnary Eode

set tlne! to lnterrupt Ln 24grg56
reetole Y
restore X
re8tore 4
raturn fron

lnttrrupt

.Gc

TIMER (STOPWATCH)
Klm-l User Notes
v, L ll2

Joel Swank/1186
4 6 5 5 S . W. l 4 2 n d
Beaverton, 0R 97005

stopwatch showing up to 99 mi.nutes

TIMER turns KIM-I lnEo a digital
a nd 5 9.9 9 e econds . I t ls des igned t o be a c c u r a t e t o 5 0 u r i c r o s e c o n d s p e r
aecon d. Th e KL M - I lnt er v al t iur er ls us ed t o c o u n t 9 9 8 4 n a c h i n e c y c l e s
and the instructlons between time-out and the reset of the timer make
up the ren aln lng 16 c y c les needed t o pr odu c e a t i m e d e l a y o f 0 . 0 1 0 0 s e c .
The keybo ard cont r ols t he r out ine as f ollow s :

KET
0
1
2
3
4

c)

I
H
LN

FI.'NCTION
Bt op
s t ar t
r es et
ptlnt tine on terainal
return to KIM monitor

STOPI,IATCH
0300 A9 79
0302 8D F2 17
0305 A9 02
0307 8D F3 17
O3OA49 OO
030c 85 F9
0308 85 FA
0310 85 FB
0312 20 lF lF
0315 20 6A lF
0318 C9 04
031AD0 03
031C4C 64 lC
031r c9 03
0321 D0 lF
0323 A5 rB
0325 20 38 lE
0328 A9 3A
032A 20 A0 lE
O32DA5 FA
032F 20 38 lE
0332 A9 2E
0334 20 A0 lE
0337 A5 19
0339 20 38 I E
033C20 2F rE
033F 38
0340 B0 D0

BAUDR r.DA# 979

set baud rate to 110 for printer

srA@ $ r 7F2

I.DA# $02
STAG $ 17F3
RESET
900
STAZ INH
STAZ POINTL
STAZ POINTH
Hor,D JSRG SCANDS
JSRG GETKEY
CMP/I $04
BNER NOQUIT
JMPG CLEAR
NoQUIT CMP# $03
BNER NOPRT
I.DAZ POINTH
JSRG PRTBYT
I.DA{I t:t
JSR@ OUTCH
I.DAZ ?OINTL
JSRG PRTBYT
LDA# t.t
JSR@ OUTCH
LDAZ INH
JSRG PRTBYT
JSR@ CRLF

sEc
BCS

HOI.D

zero display

light dlsplay
read keyboard
key 4
return
key 3

to KIM Sonitor

print

tiroe on terminal

end of prlnt routine

Jurnp to HOLD

0342 c9 02
0344 F0 C4
0346 c9 0r
0348 D0 C8
034A A9 9C
034c 8D 06 17
O34F 20 IF IF
0352 AD 07 17
0355 F0 FB
0357 8D 00 1C
035A A9 9c
035c 8D 06 t7
335F 18
1360 F8
3361 A5 F9
0363 69 01
0365 85 F9
0367 A5 rA
G369 69 00
0368 85 FA
036D C9 60
036F D0 0B
0371 A9 00
0373 85 FA
G375 45 rB
C'37718
0378 69 01
a37A 85 rB
C37CDB
c 3 7 D 2 0 6A l F
0380 c9 00
0382 D0 cB
0384 F0 8c

NoPRT

cw# $02
BEQR RESET
nMDJI

(111
Yvr

BNER HOLD
r,DA# $9c
STA@ TIMSET
DISPL JSRG SCANDS
D(PCK I.DAG TIMCET
BEQR D(PCK
STAG ROM
I.DA/I $9c
STAG TIMSET
cLc
SED
LDAZ INH
ADCII $01
STAZ INH
LDAZ POINTL
ADC# $00
STAZ POINTL
cMPit $60
BNER CKEY
LDA# $00
STAZ POINTL
LDAZ POINTH
cLc
ADC{it $01
STAZ POINTH
CKEY
CIID
JSR@ GETKEY
cMP/f $00
BNER DISPL
BEQR Hor.D

k ey 2
bac k to z ero
key 1

s et ti ner
dl s pl ay v al ue
c hec k ti ner
w ai t l oop
del ay 4 us ec .
s et ti mer
8et fl ags
dec i mal node
l nc rement

hundredths

tnc rement

s ec onds

s top at 60

z ero s ec onds

lncreroent

mlnutes

read k ey board
k ey 0
6toP

KIM User Notes vl /f 1

H. T. Gordon
Berkeley, Calif.
HEDEC
hex number in 00 E6 (hi byte) and 00 E7
HEDECconverts a 4-digit
(Lo byte) into a decimal equivalent stored in 00 80, 00 El, and 00 E2.
It uses 00 E3, 00 E4, and 00 E5 to store calculated conversion factors
Length: 67 bytes,
for each of L6 binary bits.
Conversion times: 0.7
millisec
for hex 0000, 1.5 ms for hex 1LL1", 1".4 ms for hex 8080, and
2.L2 ms for hex FFFF. Times are proportionaL to the number of binary
1 bits, not to the numericaL val-ue.

0200 F8
98
48
8A
48
0205 A9 00
A2 06
95 DF
CA
020c D0 FB
E6 E5
02L0 A5 E7
02L2 48
A0 08
0215 68
4A
48
0218 90 0C
42 03
18
OZTD 85 E2
75 DF.
95 DF
CA
0224 DO F7
0226 A2 03
L8
85 E2
75 E2
95 E2
CA
0230 D0 17
88
0233 D0 E0
0235 68
A5 E3
0238 D0 04
A5 E6
023C D0 D4
0238 68
AA
68
A8
0242 D8
0243 60

(sets decirnal mode)

(pushes Y, then X index into

stack)

(zeros 00 E0 to 00 E5 in a Loop)
(sets X-lndex for 6 operations)
(zero-page, X storing)

(increments 00 E5 to 01, to be fLrst conversion factor)

(accumulator pick-up of Lo hex byte)
(stored in stack)
(sets Y-lndex for testing of 8 bits)
(pulls hex byte fron stack)
(one logical
shift rLght, lowest bit in carry)
(stores shifted hex byte in stack)
(if carry cl.ear, bit was a zero. skip to O226)
(if not, do tripl-e-precision
add of conversion factor
to the decimal Locatlons)

(next conversion factor atways calculated,

doubLing
gi-ving a
previous factor by adding it to itseLf'
to final 65536 (not used))
sequence 1, 2, 4, 8,

(DEY)
(if not zero, back to 02L5 for
(this PLA stack pu1l needed to
(LDA highest converslon factot
(if not zeto, Job ts finlshed,
(Lf zero, Load hl hex byte)
(tf not zero, back to 02L2 for
(restore X, then Y, lndexes)

(clear
(RrS)

decimal node)

c-15

next bit)
equallze PIIAe and PLAs)
location)
eo exit)
blt

testlng)

BINARY MATH ROUTINES

KIl4-1 User Notes vl

Ii. T, Gordon
Berke1ey, Calif

/f3

MULTIA SUBROUTINE
Program MULTIA (second, revised version) does binary multipl-ication
of tswo8-bit numbers that have been stored (before the JSR to MULTIA)
in 0083 and 00E4 and are destroyed by the operation of the subroutine.
The hi 8 bits of the product are stored in 00E0 and the low I bits in
00E1; the subroutine initiaLLy
zeras these locations, and aLso 00E2.
Operations use LSRs on the mul.tiplier i.n 00E4 to move up to B bits in
sequence into the carry flag.
If the carry is set, the multiplicand
(in 00E2 and 00E3) is double-p::ecision added to the product locations.
If bits remain in the multiplier
(00E4 not zero), the multiplicand
is
shifted left in the 16 birs of 0082-00E3; crherwise rhe subrourine
exits.
Program length: 36 bytes.
Maximun product (FF X fF) is FE01
or decimaL 65025, with execution time about 380 rnicroseconds. Time
declines ta 240 microseconds for 80 X 80" 160 microseconds for 10 X 10,
70 microseconds for 01 X 0l-" 40 microseconds for 00 X 00.

000A A9 00
85 E2
85 El
85 E0
OOL2 46 E4
0014 90 0D
0016 18
45 E].
65 E3
85 El
001D A5 E0
65 E2
85 E0
0023 A5 E4
F0 06
0027 06 E3
26 E2
0028 90 E5
002D 60

(zeros locations

00E0 to 0082)

(LSR 00E4, lowest bit into carry)

(if carry clear, skip the addition,
(CLC starts double-precision add)
(running totals

go to 0023)

stored in 00E0-0081)

(LDA of 00E4, zero fLag set if zero)

(exit to 002D if zero)
(ASL shifts highesr biE of 00E3 into carry,
ROL shifts carry intc, loisest bit of 00E2)
(carry is always ctear, so baek to 0012)
(RTS exit)

NOTE: This subroutine assumes that the processor is in the binary

(not the decimal rnode)! It should not be necessary lor subroutines
to protect themselves (by a CLD) from this problem.

c- r 7

H, T. Gordor:
Berkeley, Callf.
SUBROUTINEDIVIDA
Ttris software gives the quotient, to t6-bit or better precision,
of, any hex number from 0001 to FFFF by any hex number
from division
from 0L to FF. It uses 10 Locations from 00E0 to 00E9, The quotient
appears in the lowest 5, with a fixed decinal igfi"d.
betlseen EL and
Er.
The raage of quotlents is from $ 0000,0fffi11@o*
division
of
0001/Ff) to $ FFFF.000000 (from division of FFFF/OI). Quotient Locations
are initiai.ly
zeroed by a JSR. to SUBROUTINE
ZEROER,which must also be
in memory and is coded separateLy for use in other programs. Before
Ttre
the JSR DMDA, 4 locations must be fiLLed by the calLing program.
in
dividend high byte is set in-E6l the lshr bytl in 87, and-the Jivisor
byte'!, with a vaLne from 01 to 05, is sec in
88. The'rprecision
location E9; it is not altered by the programrbut the other 3 bytes
The purpose of the precision byte i.s to alloqz the user to
usualLy are.
control the number of quotient Xocatl.ous to be calculated by DIVIDA.
A value of 01 causes exit after the proper quotient value in Location
E0 (which may be 00) has been calculated"
A vaLue of 02 limlts the
caLculation Co quotient trocations E0 and 8L, and gives frinteger
A val-ue of 03 aLLows only one Locatlon to the right of
arithmetic".
The chief, use is to shorten the execution
the inpl-ied decimal, etc..
time, wirich caa approach 2000 mie.roseconds at a preclsion of 05.
However, DMDA aL',tays exlts when the calcuLated remainder is zeto, since
of higher-precislon
locations ls then unnecessary. No
calculation
8.g., the quotlent of FEFE/FF
operations are included.
"rounding-off!'
is 00FF.FD0000 at a preci.sion of 03, although tt should be 00FF.FE
since the quotient is 00tr'F.I'DFDFDat a preclsi.on of 05.
DIVIDA exits in Less than i.50 uicroseconds if the dividend is 0000.
agalnst a dlvisor
It provides uo protection
of 00, so the caL!.ing
program shouLd guard against thts!
A guard could be i"neerted ln
DIVIDA, but I feel it is better for the cal-ling program to decide
what should be done lf such an error occura,
elngle-btt
Operation of DIVIDA invol"ves addltl^on of a ehiftlng
by the
quotient
to
in
locatLon
05,
the
location
controLted
"Bit-Bytef
The X-register
X-register,
whenever a positive remainder is obtalned.
is not protected by DIVIDA, so it is better to use Y-indexed Loops in
the calLing program (that othenrise wilL have to store and restore the
X vaLue).
T'tte final renainder is i.n location E6 when DMDA exirs.
vaLue is not altered if it is $ 80 or rnore; otherwise
ltre divisor
lt ls left shi.fted by DMDA.
DMDA is very Long (70 bytes, or 78 Lf one includes ZEROER;tf
part of DMDA the length
the zeroing operation were made an integral
It Ls also sLor^l
would be 74 bytes and execution a strade faster).
It ls
but retratlveLy inexpenslve.
compared to hardware arithsretic"
meant to handle data, that are never precise, and not the kind of
Since the ROR
eomplex math for which cai.cul.ators are designed,
is not used, it wi.L1 run in any 6502 system.
instruction
Much of the Length of DIVIDA ls caused by speclal. Logic designed
to reduce the execution tirne---a deli.berate trade-off
of rnore program
bytes for a Lower average time, that has the effect cf proloflgtng the
tlme of divisions
wher no eaxL,g exit is posslble.

c*l_8

Execution time depends both on the number of quotient locations

to
be filLed and on the number of l-bits
to be inserteci. Thus FFF,F/gl runs
slowly because it requires insertion of 16 l-bits
into Lwo locations.
The rrhi/l-o exchange" operation at 022g speeds up many operations
with
a dividend of 00xx. rn general, higher speed will require
sacrificing
precisi on, and a precision-byte of 04 will be arlequate"
My reason for
fimiting
the dividend to L6 bits and the divisor to 8 birs was that data
more Precise than 1 part Ln 256 wil-l be rare, so that most data
will be
singl-e-byte, and data sets with more than 256 items wiLl
be uneoflnnon.
calculation
of the average of 255 one-byte data items is within the
capacity of DIVIDA. When there are more, they can be divided
into subsets
of 255 or ferter' the averages for aL1 subsets acided, and the
average of the
set of subsets calculated.
we are now in the time range of seconds!
with more bits, it would be minutes.
people who neeci arithmetic speed
had better get a 16-bit microprocessor (oi better stili,
she1l out for
hardware multiply-divide)
.
Those who want integer arithrnetic operations wilt do betcer using
a_dividend of type D(00 and precision-uyte
of 01, However, simir.ar
effects can usually be obtained more quickLy an<i by other Logic,
not
division.
The number of poesible ways of doing di-vision is irrcredibly
large, but I wi1"1-be surprised if an operation lilce that
of DIVIDA can
be done with many fewer bytes or much r,ign"" speerl alfhough using
the
,
ROR instruction
rnight help.

c- 19

SUBROUTINEZEROER

0200 A9 00
95 DF
0204 cA
D0 FB
o2a7 60

(rDA/i 00)
(STA zero-page, X)
(DH()
(BMo if * 0, back to 0202)
(Rrs)

SUBROUTIM DIVIDA
(Note that 3 Locations are unused between the end of ZEROERand the
start of DIVIDA. This is to aLl.ow users (if the subroutines are in
RAM) to insert 3 instructions
folLowing the LDA divisor
instruction
ax O2L3. If the divisor
is 0G, DIVIDA is wrong. The instructi.ons
for this a BREAKto 1C00. If something more
D0 01 00 substltute
complex is needed, the 3 ins'tructions
can be a Jl'lP or JSR to a
longer sequence of instructiorts.)
o2oB L2 06
20 00 02

(I,DA/I 06)
(JSR ZEROER, Eo zero 00E0 to 00E5)

021_038
26
02L3 A5
30
o2L7 26
0A
021A D0
85

(sEc)
(ROL sets Blt-Byte to 01 and clears carry)
(LDA dtvisor byte)
(8M1, if blt 7 = L, skip to 021C)
(ROL Blr-Byre)
(ASL, Left-shtft
divlsor
Ln accumulator)
(BNE, Lf. * 0n back ro BMI ar O2L5)
(STA bit-pattern
L)C0( XruO( into dlvlsor
locatlon)

E5
E8
05
E5
F9
E8

021-EA5
B0
0222 D0
A5
0226 FO
85
O22L 86
E8

E6
0F
09
E7
28
E6
EV

(tDA dividend-hi)
(BCS, if carry set, go to subtraction
at O23L)
(BNE, lf * 0, go to CMP at 022D)
(LDA dividend-lo)
(BEQ, dlvldend = 0 so exit to 0250)
(STA dtvidend-lo
into dlvidend-hi
l-ocatlon)
(STK zeros dfvldend-lo)
(INX to shift
to next higher quotient Locatlon)

022D C5
90
0231 E5
85
0235 L8
85
0238 65
95

E8
0B
E8
E6

(CMP dividend-hi
with dfvisor)
(BCC, dl.vlsor too large, bypass to 023C)
(SBC, subtract divlsor
frorn divldend-hl)
(STA renainder Lnto dlvidend-hi)
(CLC for addltion)
(LDA zero-pager X the proper quotl.ent byte)
(ADC the nit-Byte)
(STA zero-pager X back lnto quotient locatlon)

023C 46
D0
O24O Eg
E4
0243 I'0
A9
0247 85

E0
E5
E0
E5
09
E9
0B
80
E5

(LSR the ntt-nyte)

(BM, if * 0, bypass resetting)
(INI( to shift
to next higher quotient
(CPt( to preeision-byte)
(BEQ, lf equal exLt to 0250)
(LDAtf 80 to reser)
(STA inro E5 reeers ntt-nyte)

c-2 0

locatl.on)

T Z -3

(sru)
( ae ua nb as Ssaf fxau JoJ gTZ0 of dl^If)
(l3;;r{s eqt sa}aTduroc1q-puap}^Tp rox)
( r J;qs*+laT pu ap TATp slraf,s oT-prrapT^TpTSV)

09 AEZO
ZO H\ 3V qrzo
9s. 9Z
Ls, 90 6rz0

15 BIT SQUAREROOT

SQUAREROOTSIDROIITINE

Ilere te a progrsrn which takee the square root of a 16 bit

ouder

aod ylelda

result.
rrttteo

a! elght

blt

lnteger

plus elght blt

blnary

by B.E. DuPuy.
rtth

The prograo is rrlltten

as a subroutlne and

other programs vta rnemory locstlone.

are changed by thls

routlne.

8 blt
8 btt

taput (high)
tnput (1ov)

90080
9O0Sl

8 blt
8 blt

output (tnteger)
output (factlon)

900E0
90081

otlter locatioue

Alt

cpu .reglatctr

tnput and output data are located as

f o llowe:

I
N)
N

fractlon

Thlg routlne nas tra$alated by J.B. Rosg frou an g0g0 progrrn

coMlnl'cates

blnary

ueed are : $0082 - 900E8

0100 A9 00
0102 85 82
0104 85 E3
0106 49 Fr'
0108 85 E4
010A 85 E5
010c A'9 10
0l0E 85 E8
0110A2 02
0112 06 E r
0114 26 E0
0116 26 E3
0118 26 E2
0114 cA
0118 D0 F5
011D06 E5
011F 26 g+
0121 E6 E5
0123A5 E4
0125 85 E5
0127 A5 E5
oL29 85 E7
0t2B 06 E7
0t2D 26 E6
012F 86 E7
0131 18
0132 A5 E7
0134 65 E3
0136 85 E7
0138 A5 E6
013A 65 E2
013c 85 E6
0138 90 0A
0140 c6 E5
oL42 L5 E7
0144 85 E3
0146 A5 E6
0148 85 E2
0t4A c6 E8
014c F0 03
0l4E 18
014F 90 Br
0151 A5 E4
0153 49 FF
0155 85 E0
0157 A5 E5
0159 49 FF
0t5B 85 El

ouD 60

SQRT

LOOP
SI{FT

LDA/I
STAZ
STAZ
I.DA#
STAZ
STAZ
I,DA#
STAZ
I.DXii
ASLZ
ROLZ
ROLZ
ROLZ
DEtr
BNER
ASLZ
ROLZ
INCZ
I.DAZ
STAZ
I,DAZ
STAZ
ASLZ
ROLZ
INCZ
cLc

$00
$82
$E3
$rF
$84

lnltiallze

extended ergunent

loltiallze

cooplenented result

$10
colrNl
$02
9El
$no
$E3
982

tnltlstlze

loop count

$ns

SHTT
$85

wAz
NOGO

DONE

shift

partlat

shifr

of

result

E2-E3-80-81

left

)e4

$a:
$84
$uo
$Es
$87
987
986
$87

wAz $87
ADCZ
STAZ
IDAZ
ADCZ
STAZ
BCCR
DECZ
LDAZ
STAZ

double lefr

$nr

ehlft ln a one on tbe right

make a eopy of shlfted partial

sh i ft

co p y o f p a r tl a l

rcrult

r e e u l t l e ft

shlft ln 8 one on the right

subtract ehtfted partial result fron
hlgh L6 of curreot renainder (by
adding conplernent)

$87

$so
9E2
$86
NOGO
985
$87
$83
$86
$az
cilnn
DONE

STAZ
DECZ
BEQR
cIt
BCCR LOOP
I-DAZ $E/t
EORf $Fr
STAZ 9so
I.DAZ $85
808# $rr
8TAZ
ft8

err

te st 8 u b tr a cti o n r e su l t
tack a zrto onto complenented rerult
replace hlgh order 16 of current
renainder wlth subtractlon rerult
decresent and test

loop count

Juop to loop
conpleloent result

rcturn

and store ln E0-81

BYTE Aprit l9??

EfffI Gses tCI

rt F

r; tt
ll

l;

+\
lj

[,il u

NT, FUEL

F;;,:E;;.,i;l
ois
iEu E R y

Figure l: A generalblock
diagram of a simple lunar
fander progrom. tt can be
seen thot a tunar londer
program bosicolly breaks
dawn into o number of
updating rautines. Thse
updating routines ore continuously repeated until
the lunor lander has
reachedthe surface.

jtv-u;'(,
14.,ft

|.q!

il il

Jim Butterfield
14 ErooklynAv
Toronro Ontariofol4M?XSCANADA

There are quite a few lunar landingprcgramsavailablenowadays:some for pocket

calculators,others using graphic displays.
The one I wrote for my KlM.l, basedon the
ftfOSTechnology 65A2 microprocessor,illustrates many of the techniques needed to
developthe program.
The KIM-I comes with a six digit LED
display, which can be accessedby the user.I
used ihe first fbur digits to representthe
craft's altitude, and optionally, the fuet
remaining.The last two digits, rvhich are
slightly separated from the rest of the
display, are used for rate of descent. Both
valueschangecontinuallyas the craft moves.
The KIM-l keyboardis usedas rhe pilot's
control panel. Thrusr is set by pressing
controls 1 to 9. A value of 1 is minimurn
thrust, and the craft's rate of descent will
increasedue to gravity. Nine is maximum
thrust, which slows the rate of descent
sharply. ln addition to power control. the
pilot can elect to view either current alritude,. by pressingA, or remaining fuel, by
pressingF.
The Equationsof Motion
The craft, of course,movesin accordance
with the .forces acting upon it: thrust and
graVity'."A physics textbook shows some
rathe;"'forrmidableequations. However, they
cari"beboited down to rhe following simple
grocedure:

c-.23

Every0.01second,
add 0.01 of the accelerationto the
veloe
lty;
add 0-01 of the veiocity to the altitude;
subtract0.01 of the thrust frorn the
fuel.
The accelerationis set equal io thrust minus
gravity, and gravity is set at the constant
value 5.
The time period of S.01 s is arbitrary"
Since KIM can oprate in decimal mode,
dividing by 100 becon'resan elementary
operation. Everything would work iust as
well if it were done in.any other srnalltime
incrernent.
Figure 1 shows an elementary block
diagram of tfie program" After setting rhe
we settlinto three main
initial flight valuesu
jobs: updating the flight, lighting the display, and detectinginput from the pilot"
Sctting lnitial Values
An interestingflight ean be obtained by
starting the lunar rnodule at a height of
4,500 feet with 800 pounds of fuel. That's
rnore than rufficient fuel for a safe landing,
but not enough to allow for prclonged
hovering
It's not difficult to 5et all the inirial
values by programmingthern individually.
Howerrer,a faster method is to set them all
togethe!' in rnemory and use a loop to
initialize ali of them" Thls is what I did as
.l
shown in lisring on hexadecimallines 0000

ro 0007.
Updatingthe Flight
Every0.0i s we must updaleour rateof
descent,altitude and fuel. As previously
indicated,we have tc add 0"01 of various
valuesinto the totals.lVe can accornpllsh
this quiteeasilyby usinga gimmick.lnstead
in feet,
of holdingthe allirude,for exarnple,
let's ute two n'lore digits arid store it as
multiplesof 0"{}.1feet"f,lowwe can add rhe
rate of ascentdirectly into the six digit
number;and the divisionby 100 happens
automatically,For dispiay purposcs,of
course,we drop the lastlwo digits,so that
we'rebackto heightin fcet, Usingthes;rrne
techniqueon the otherparameters,
we find
that the updatingjoLi becomesrelatively
easy.
During the updaringtask,we must also
detecI two specialconditions;touchdown
and oul of fuai. T'hiss*effisfairly simnle

Listing t: Atr example luns lander proqran writtn for the Klfrt-l
micropracessar thot uses the flowchart af l'igure I ss s bsse" The input ond
outpat o{ this pragram is handled by rautines thot src inherent to the KIM-l
systcm. The dota display is seenon the keypad ond LED dispfay of the KIM-I
assembly" This disploy continuously shows the rate of descent, und on
tornman,l will display either the qmaufit of fuet left, ar the altitade of the
croft. Keys I through 9 are used t# !ftput thrust commands, while key A
c*ssses the altitude disploy mode and the F hey choases the fuel disploy
tnsde. A!! the numbes in this listing arc in hexadecimal unles otherwise
stsfe#.
Addrcs

$s$o

0p

L.bcl

Optrad

A2 0e

GO
LPl

85
95
eA
'r0
A?
4,0
F8
'!E
85
75
95
eA
8g
10
85
"!o
rqg
?5
95
cA
x0

ss?s

,q5 E2

LDA ALT

G0?8
so?A
s02c
0$28
fi030
ss32
0fi33
**35
f;836
smSs
s$3.4
0s3c

10
.49
A2
gs
95
cA
10
3S
A5
E5
85
A?

8FL UF
I,.DA ffiO
LDX *S2
STii.&Lf"X
STA TF|?,X

s0,40
fii84?
s$li4

E9
95
eA

6Sd7
0{J49
fls4B
004D
0s4F

S0
A9
Alt
95
cA

0s45

'r0

ol

2
E4
2

DIGIT

ro
F6

a2

99
E2

INCR

F",

E5

o8

oo
a2
E2
E8

DD

FC

D
EA
EO
ol
e8
o0
EB

UP

LF2

F7

0e
oo
03
EA

r0
?0
A5
n0

F8
AA OO
EE
OA

0c5g
01158
005n
OfisF
6061
&s63
00s
ss6?
CI*69
s0s8
s060
ilSSF
6)07!

A5
46
Fi)
D0
F0
A5
A6
sii
8S
.A5
30
rx5
F0

?
E3
08
06
,4
EB

&8?5
0s7s
0*?s

3g
A9 80
Hs c!'

f-e 4

CALC
RECAL

init,sliee veldGs;

X:*O5;
Y:*Ol;
ser dcir:al ma&;
clear carry;
l
)' add each digir;

*gn

0050
s0$2
o$gs
$s6?

ss?s o0

Ftt

0s

Gorm*tary

l-Dx sSC
tSA trutT,x
5TA ALT,X
EEX
8FL LPT
LDX *SF
LSY.,*S1

*fi42
0004
0s06
000?
00{rg
0s0s
$#dn
00$E
0fl0F
00r1
$sT3
0s15
ss'r6
00'!?
00rs
ffixg
EStS
s01F
s0?1
c023
0c?.4

ss3tr Es

B8
E2

Mnwmonie

ga<

F8
FA
E5
06

LP3

TANK

cr,g

LDA AI.T"X
AFE ALT+?,X
gTA ALT,X
DX
0Y
BP[-BISIT
LSA ALT+3.X
$FL INCR

ST
.

CD

07

ne

set up nert digit;

[-sA #sg

eounter:*counter - l;
il counter pgitirr go ta
RCAL;
elsc check it altiarde ir
$'6ititG;
it altiwde positilr{ go to UP;
elr sltitude:*q);
X:*O?

ogx
Bp[ s&

CC
LSA FTJEL+z
sse TF{flLrsT
$!.A FUL+2
LSX.#*1
L*A F{,I*L,X
$80 **S
si'A F{J#L.X
ilx
BPL LF?
geg TAr{K
LS4 #0
LSX *SS
I9TA THSUST,X
DEX
BPL O-F3
J5FI?HfiSET
LSA futI)OE
Si\{ES}'{GFL

sEs $'f"
stvtr $f
gg0 EALO
I"CIAFUL
tS X FU t+ 1
$TA POIru?H
sTX p8iiitTL
LSA X,1&L
Bf,{i sffl /F{
LFA 1l-+X
E#fl FLY

gfl,gFLY

DOWN

I
)

ADS ALT,X
STA ALT,X
DX
EPL RgI{L

tDA A{,'1"
LOX AL,T+i

LINK
SHOFL

Sge
'r-p& #{ffi
s8* vsL+x

II

els* turn off$!gino;

3et e8r{'y;

tI

uodoto fuel;

i
I

i check if fuel left;

l
I
-if fuel left
9o to TAI$K;
I
I

else turn off engine;

'ea to THflSET;
A:*display rlrods;
il rnode not 0O go to
SFiSFL;
AX :-locaticn of eltituda;
go to $T;

A:*F[.iL;
X ;TFU E L+; l
i

I dlrrlovvaluce;

A:welocityslgn;
if *ignn*grtlvc0o to DOWN;
A;./wlociry/;
I so te FLY:
b
1 vst@city:*Amtoity/;
a

(0.01 of units, rcmember?)and to riegatelhe

ratc of dcsccnt.wherc'nccessaiy,so that it
showsas a positivenumbcr.

Listing l, continued:
Address Op Operand

ooTc
007E
o080
oo83
oo85
0088
oo88
ooSD

85 F9
A9 02
85 E1
20 t F r F
F0 06
20 6A tF
20 91 00
El
c6
DO FI

008F
0091
0093

FO
c9
DO

DO
15
03

(X)gs
0097
(X)98
oo9A
o09c
009e
00A o.
00Ar
OOA3
ooA4
00A6
ooAS
OOAA
ooAc
OOAD
00AF
0081
0083
00Bs
0087
0088
(n89
ooEA
ooBB
ooBc
00BD
ooBE
00BF
00c!
00c1
ooc2
ooc3
00qr

85
60
C9
DO
A9
85
60
10
AA
A5
FO
86
A5
38
E9
85
A9
E9
85
60
45
00
@
99
8[)
00
99
98
02
08
00
00
00

EE

007A

ro

o5
o0
EE
FO
EA
F8
A
EA

Label

Mnemonic

FLY
FLITE

NO KEY

DO KEY

STA I NH
LDA =O2
STA DECK
JSR SCANDS
8EO NO K E Y
JSR GETKEY
JSR DOKEY
DEC DE C K
BNE F LITE
BEO LI N K
CM P = 15
BNE NAL T

STA MODE
RTS
NALT
CM P: 10
BNE NALz
LDA =OO
STA MOOE
BET1
BTS
NAL2
BPL RET1
TAX
LDA THRUST
8EQ RET l
STX THRUST
THRSET LDATHRUST

sEc

o5

SgC;{)5
STA TH2+1
LOA C)O

FO

00
00
EE

sBcso

STA TH2
RTS
I NI T

Cornmlntary

!
DEcK:=o2; lcounterl
l
look for depressed
key;
i f n o i n p u tg o r o N O K E Y :
elsego to GETKEY;
go to DOKEY;
DECK:-DECK-I:
i{ DECK not egualro 0 go to
FLITE;
elrego to LINK;
A:=fuel mode?;
it not fuel mode go to
NALT;
elseMODE:= fuel mode;
return;
A:raltitude mcdre?;
if not go ro NAL2;
elsemode:=altitudemode:
MODE:-A;
return;
return; fillegalmodel
lseX:-A;
A:-THRUST;
if thru:t:=0 go ro RETl;
elseTFIRUST:*X;
A:.THRUST;
3et carry;
THRUST:*THRUST- O5;
TH2+1:.THRUST;
I

I A:'00;
TH2:-OO;
raturn;

)
)

I
)
I

[inatiatheishrl
[initial-soeedl

| [initi"t acceleration]
iinitial thrustl

)
)

[initial fuell

tmoacl
untif we realizethat both the altitudeand
the fuel gaugewill probablygo right pastthe
zero mark,jumpingdirectlyfrom a positive
to a negativevalue;so a zero test is out.
Instead, we take action the instant the
number goesnegative,restoringit to zero
and then taking whateverother action is
calledfor.
Lightingthe Display
The display is quite straightforward;
in
fact, the KIM-I monitor program has a
to do thejob.
subroutine
on the displaymodeflag,all
Depending
we needto do is to movealtitudeor fuelto
the display area, togetherwith rate of
dcscent.Then we call the slbi2rllins 1t
transferit to the LEDs.
to drop the
Of course,we mustremember
last two digits from the displayedvalues

c-25

Detecting Input

Tl rr K IM-l moni to r subr out inet hat iight s

rhe display givesus a frec bonus: lt also tells
us whcther or not a kcy ir dcpresscdcfl the
keyboard. To find out which key, we murt
cali another subroutine in the monitor program.
lf we discover thet the uscr has input a
thrust command. buttons I to 9, we firsl
check to see that tlrc motor is on and that
we have fuel. Then we set the thrust, and
also calculate the acceleration as thrust
rninus 5, where 5 repretents the force of
gravity.
The two orher legal keys, A and F,set the
display mode to altitude or fuel. The prograrn sets a memory location whiEh will bc
testedby the displayroutine.
The program doesn't need to worry about
vrhen a button is released. Although the
gucstion can be quite important foi' programs that must distinguish between, say, 9
and99 on the input, lhe lunar landerdoesn't
really care. lf you leaveyour finger on the
butron, it will keep on setting the thru$r
over and over to the same value, without
affecting the fligfit.
Coming Down
The programdoesn'tstop. lf you run out
of fuel, you will wateh yourself freefall to
the surface.When you land,with or without
fuel, your rate of descentfreezes50 that you
can seehow hard you landed.
It would be easy to have the display
change after you land, to show words such
as " S A FE " or " D E A D. " The KI M - I dispiay
is segment driven so that you can easily
producespecialcombinations.
The novice astronautwho would like to
'try his or her hand at flying this, or other,
craft should keep the following rules in
mind:
1. Always conservefuel at the beginning
by reducingpower to minimum tl:rust2. Don't let your rate of descent get
excessivelyhigh;with my piogram' it's
wise to steady up with a thrust value
of 5 when your speedgetsover 90 feet
per second.
you get to lower altitudes' try to
As
3.
balanceyour altitudeagainstyour rate
of descent. At 1000 feet, a rate of
per second will
' descent of 500 feet
bring you down in 20 seconds,whiclt
is reasonable. KeeP that sort of
balance.r

HORSERACE

E ight
whip your

K I M-1 Us e r
Ch a rle s K .
1 9 6 0 6 G a ry
Sunnyvale,
1ap hor s e

horse

to

ra e e a n d y o u e a n b e t h e

g o f a s t e r.

too much and he probably

Horse

program

the

and

horse

Wh ip p in g

top
mid d le
bottom

at A2 7 F .

jo c k e y

poops o u t .

Track

Prince Charming
Colorado Cowboy
Irish
Rai-r
S tart

Warni.ng--whip

No t e s v 1 # 3
Eaton
Ave.
CA 94086

b u t to n

PC

c
4

B a c e is

e ig h t

la p s .

HORSE RACE

00 01 02 03 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0 E 0 F
0270
0280
0290
0240
0280
02cg
02D0
02E 0
OTFO
OS OO
0110
g32A
0330
05+0
O55O
0160
0370
0580
0t90

00
A2
00
20
85
95
50
06
CA
C6
89
20
B0
03
01
95
91
80
FE

00 00
L3 B D
A 2 0g
5D 1F
99 A 4
7C E 8
t8 D0
95 83
DO F5
8F DO
89 00
68 03
05 A 9
F0 0i
65 9A
8c 95
A 2 04
80 80
B F F7

00
7C
89
A5
99
96
0b
CA
EA
06
F0
29
FF
88
18
86
85
FF
01

00
07
7c
8F
86
8l
A5
10
EA
45
0B
t8
99
98
A6
4c
91
FF
0i

00 00 00
9 5 7 C CA
00 84 FC
Et A2
'803 8 9 9 0
89 90 03
8F F0 28
F6 A2 06
EA EA EA
8T 09 05
20 68 03
85 94 89
86 00 2A
55 89 85
99 75 8C
A9 02 t8
9 5 9 2 CA
FF 80 80
04

c-26

00
10
20
03
03
49
D0
85
EA
85
29
8C
5D
9A
EA
18
10
80

00
F8
4E
CA
35
FF
30
7C
EA
81
tC
00
1F
EA
EA
A5
F9
00

00
A9
lF
3A
7C
15
A2
95
EA
EA
D0
30
A0
EA
EA
92
50
00

00
7F
C8
DE
EA
7C
02
76
EA
EA
18
0B
FF
2D
EA
65
80
00

00
8D
C0
D6
EA
95
l8
A9
EA
EA
99
29
46
68
EA
95
80
80

00
41
05
86
EA
7C
85
80
EA
EA
89
t8
99
0t
EA
65
80
80

00
t7
90
D0
EA
E0
83
95
EA
EA
00
C5
3D
38
EA
96
80
80

D8
A0
F3
F9
EA
05
E9
7C
EA
EA
EA
9A
93
29
EA
85
80
08

ONE.ARMEDBANDI,T

0200 A9 25
co
0202 85 05
0204 20 BA 02
0207 A9 00
0209 85 06

rDA# $25

STAa
Al'ff
JSRG CVA}ff
CHANGETO DISP
LDA# $0O
STAz
ARRCI,J
:
HAII.I DISPLAY LooP
0208 20 8D 02 LPl
JSRG NISPLY
020s D0 FB
EIIEr
LPI
021.0E6 09
ROIL
lNCz
TLI},IBLE
0212 20 8D 02
JSRG DISPIAY
02tr5 F0 r'9
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I{OLL
02],7 A9 03
LDAII
$03
0219 8 s 0 6
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0218 F8
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021DA5 05
LDAz
AMI
02tF E9 0t
SBC# $01.
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0221 8 5 0 5
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02?3 20 BA 0?
-TSRG C'VAHT
0226 26 09
ROLZ TL&$TJ8
0223 20 8D 02 LP2
JSFLG DISPLY
0??Bc6 08
OECz STALLI
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022DD0 19
Bi{Er
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02?F A{i 06
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An-R.CSf
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0237 95 01
STAZ:- irilr.ilst=-1..1 ?i3 FegFi,p^'i
c?39 45 09
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0?3s 45 09
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0241 A5 04
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0245 DC 37
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0247 C5 02
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0249 D0 33
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o24B A2 10
024D C9 4C
024F F0 0D
0?5t A2 0B
0253 c9 42
0255 F0 C7
0257 A2 06
a?59 c9 44
0258 F0 01
025D CA

rDx+ $10
cr'tr# $40
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ilJlx*
cliP#
DEQT

pAy

rsx#
cllP*

$06
$44

BEQT
DEI(

PAY

$08
$42
PAY

Start progrsm er $0200

Press any key t o s p i n w h e e l s

J. Butterfleld
ToronSo

gr5 rp 3 $Aes
$10 rF 3 uPs

$5 rF 3 D&'NS

0258 86 07
0260 A9 B0
0?62 B5 08
0?64 20 8t] c2
c267 c6 08
0269 s0 F9
0?68 c6 0.r
0268 FO 9C
026F 18
0270 F8
s27t A5 Crs
0?73 $9 0i ,
0275 s0 94
02?7 B5 05
02?9-20B A 02
02?c Ds S2
4?T,Fifi: $l]
il?fl,j CP 4d,
O?S? F$ DA
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+3Ei ,;J 0S
{r?89 s0 {i0
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A !{INI
PAY AI'toUM. TN :T
FAY
STXz RWD

PAx

rrA#

$80

STAZ STALLI
T,P9
JSR@ DISPIY
DgCz
STALLtr,
BNEU tl'9
DECg RIJD
EDQr Lpl
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:
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lfrp"aX

SUBII0UTINfl

;
0288 A5 06
028f 1$ 02
029!, F6 02
0293 CA
0294 l0 Fb
s296 i.9 7F
0298 &D 4l J.?
0298 A0 CB
O29D A2 At+
0291' 85 00
02Al 8{ /+? l?
02A4 BD 40 1?
O2A7 D8
O2A8 49 7F
02AA E9 0t
02AC F0 ir{l
02Ai; 8* 42 L?
02Bi Cg
O2B? CE
0283 CA
028{,. 1S g;{,
0286 2S 40 lF"
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02c2 85 00
02c4 45 05
02C6 /rA
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02c0,s5 01
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At'tflUNT

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I.DAz A|$
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&TS

KIM-I User Notes v1{f4

Stan Ockers
Jim Butterfield
KIMMAZE
Find your way out of the maze. Yourre the fl-ashing f.ight in the
center of the display.
As you move up (key 9), dorm (key 1), left
(key 4), or right (key 6), KIM wiLl keep you in the central display;
you'11 see the walls of the maae moving by as you travel..
Like walking
through a real- maze, yourLl only see a smalt part of the maze as you
pass through it.
If you can get out, your 11 find yourself in a large
open area; that means youfve won.
Program starts at address 0200.

O2OODB
OaOLL2 OZ
0203 BD 85 02
0206 95 D2
O2O3 CA
0209 10 rB

CI,D
LDX{f 2
3 values
SETUP LDA@x INIT
from init
STAzx |"LZPT.
, . to maze ptr
DEX
BPLr
SEfitP
;--pick out specifLc part of maze
1.1
MAP
lDYii
O2OBAO OB
GEXI,IOR r.DAiy YEPT
6 rows X 2
020D B1 D2
sTAay WORK
O2W 99 D8 00
o2l2 88
DSY
0213 10 FB
BPLr
GEAnOR
to position vertically
;--shift
T-DXlt 10
O2L5 A2 0A
for each of 6 ro'ws, .
NXDIG LDYz
POSIT
shtft Y positions
O2L7 A4 D4
I,DA{i $ff
filling
with rwalls'
0219 A9 FF
REROL S0C
0218 38
..on both sides
ROLzx I{ORK+i.
Ozl.C 36 D9
ROLzx WORK
ro11 'em
02LE 36 D8
ROLa
O22O 2A
O22L 88
DEY
BNEr
REROL
0222 DA E7
segments
;--calculate
AbIrHi 7
0224 29 07
take 3 birs
0226 A8
TAY
& change to
LDAGy T48L
segnent pattern
0227 89 A0 02
STAzx WORK
022A 95 DB
,.and store
DE'X
O22C CA
DD(
022D CA
BPLr
}IXDIG
O22E LO E7
f!"asher
;--test
0230 C6 D5
LIGHT
DECz PLUG
time out?
BPLr
MUG
0232 L0 0A
,.no
0234 Ag 05
LDA{I 5
. ,!e8 e reset
0236 85 D5
STAz
PLUG
LDAz WORK{6
0233 A5 DE
..and..

023h49 40
023C85 DE

START

EOtVl $40
STAz WORK{6

c-28

.,fLLp.,
. ,. flasher..

display
LDA/f $Zr
open the gare
STA@ SADD
r.DYlt $Og
LDXit
10
LDAzx I,JORK
tiptoe thru. .
STAG SAD
. . the seguenrs
STY@ SBD
DECz STALL
...pausing
BN T
ST1
INY
INY
DEX
DEX
BPLr
SHCff
new
key
depression
;--test
JSRG KEYIN
ser dir reg
JSRG GETKEY
key?
CMPz SOK
,.same as l"ast?
BEQT LIGHT
STAz SOK
no, record it
which
key
;--test
5 items in tahle
LDX/I 4
SCAN
CMFGx TAB2
BEQr
FOIIND
DEX
BPLT
SCAN
BMIT
LIGHT
FOI]ND DD(
go key?
BMIr
START
if
wall
;--test
LDY@x TAB3
tDAGy WORK
AND@x TAB4
BNET LIGIIT
; --move
DEX
BPLT NOTUP
DECz POSIT
upr4Tardmove
MLINK BNEr MAP
l-o-n-g branch!
NOTUP BNEr
SIDEI^IY
INCz
POSIT
dormward move
BMT
MLINK
SIDEWY DEX
BMT
LEFT
DECz MZPT
right move
DECz MZPT
BN T
MLINK
LEFT
INCz
WW
left nove
INCz
NIZPT
BN T
MLINK
;--light

023E'A9 7F
MUG
0240 8D 41 17
0243 A0 09
o245 A2 OA
o247 85 DB
SHOI,{
o249 8D 40 17
024c 8C 42 L7
o24F c6 D6
STL
o25L DO FC
0253 CB
0254 CB
0255 CA
0256 CA
0257 10 EE
0259 20 40 lF
o25C 20 6A ].F
o25F c5 D7
026L FO CD
0263 85 D7
02.65A ? a4
0267 DD A 8 02
026A F0 05
026CCA
o26D LO F8
026F 30 BC
027L CA
0272 30
0274 BC AD o2
0277 B 9 DB 00
O27A3D BL o2
027DD0 81
o27F CA
0280 10 04
0282 C6 D4
0284 D0 85
0286 D0 04
0288 E6 D4
028A D0 F8
028C CA
02BDD0 06
o28F c6 D2
029L C6 D2
0293 D0 EF
0295 E6 D2
0297 E6 D2
0299 DO E9
TAB1
TAB2
TAB3
TAB4

O2AO
O2A8
O2AD
O2BL

;--tabL e s (h e x L is t e d )
00 08 40 48 01 09 4L 49
13 09 01 06 04
06 06 04 08
0r. 08 40 40

c- 29

INIT
MAZE

O2B5
O2B8

;--sampLe maze follolrs

3 bytes are initial
;--first
84 02 08
FF FF 04 08 F5 7E 15 OO 41 FE
51 7D 5D 04 51 86 54 L4 F7 D5
7F 5E 01 00 FD FF 00 00 00 00
00 00 00 00 00 00

cursor pointer
5F 04
04 54
00 00

Maze construction:
every two bytes, starting
at MITZE,represents a
complete cross section of the mazei a one bit in any position represents
a wa11.
In the example above, the first
cross sectioa is FF FF (a11 one
bits) - this would be an inpassable section of watL.
The next cross
section (04 03) has only rwo pieces of waL1 in it, at positions 6 and
13. The zeros at the end represent the topen spacet.

c-30

MUS IC MACHINE

F. J. Butterfield
Toronto

Descr iptio n

T his p rog ran

pla y s one or s ev er al
t unes v i a t h e r A u d i o O u t r
int etface
o f KIM - 1.
Us e t he s ane c onne c t i o n
as that
for
rocor din g
o n ca s s et t e
t ape.
I f y our t a p e r e c o r d e r
has a
t nonito rt
fe atu re,
to the tune as well
I ou c an lis t en
as
recor d it.
Alte r nat iv ely ,
an anplif ier
can be used to play
t hs tun e thro ug h
a s peak er .
How to

Run

Load th e pro gra m.

Load t he t une( s )
f r om c a s s e t t e
or from
t he ke yb oa rd.
T unes s t ar t
at loc at ion$00 0 0 .
Be sure to
st ore the valu e $FA at t he end of eac h t u n e ,
and behind the
last
tu ne ,
store :
progran uses the
$FF, $00. Sinc e t his
B reak instruction
t o t r ans f er
c ont r ol
back to the nonitor
after
ea ch tu ne is play ed,
I ou nus t s et u p t h e s o f t w a r e
int errup t
vector
by s t ox ing
900 in g17F E , a n d g l C i n g 1 7 F F .
T he startin g
ad dr es s
next tun e,
p ress G 0.
How to

)
J

Write

yo ur

f or

t he

pr ogaan

is

90200.

To play

by
co n ve r te d
T h e p r o g r a n ca n b e e a si l y
to a su b r o u ti n e
th e
w i th R TS. Th i s a l l o w s
t h e BR K i n str u cti o n
replacing
r p h r a se sr
prograaner
o f m u si c to p r o d u ce
t o p l a y va r i o u s
quite
c o n p l e x tu n e s.
T h o l o w e s t n o te yo u ca n p l a y i s A b e l o s n i d d l e
C.
Yo u ca n
p l s y s h o r t n o tcs a n d l o n g n o te s ( a l o n g n o te i s tw i ce a s
l o n g a s a s h o r t n o te ) .
If yo u n a n t to str e tch
o u t a n o te
e v c n l o n g e r th a n a l o n g n o te a 1 1 o w s, p u t a r p a u se t n o te
it.
So n e o f th e n o te s a xe a s fo l l o w s:
after

niddle

the

own Tune

E ach n ote go es i nt o
a by t e of s t or age,
starting
Eac h t une s hould end w i t h t h e
$0000 of me rno ry.
which sto ps th e pr ogr am unt il
G O is pr e s s e d .

N o te
A --Af
B ----C
c# - - - - D 5 AD A
D#--E
F ----

--

Sh o r t
79 - ----72
6C -----66
60 ------

Long
F9
F2
EC
E6
E0

56 -----51
4C ------

D6
Dl
CC

48
44
40
3D
39
36
33
30
2D
28
26
00

BD
B9
B6
B3
BO
AD
A8
A6
80

--

at location
value $FA

S pec ial
co de s a r e inc or por at ed
in t he p ! o g r a m t o a 1 l o w
cert ain
e ffects
of s peed, t o n e ,
etc.
The codes
- adjus t nent
arc follo weil
b y a v alue whic h s et s t he p a r t i c u l a r
effect.
T he cod es a re list ed
below:
Cod e
FB
FC
FD
FE
FF

E f f ec t

I - nit ially

sets s p6ed of t une

sets lengt h
of
rlongr not es
se t s pit c h
sets ins t r ur nent
sets addTes s f or
tu ne

$30
$0?
$01
$FF
$00

Exanpl.es18 is quick;60
is slow
2 neans tlongrnote
lasts
twice as longras I short I
2 is bass; 4 is deep bass
FF is piano,
00 is clarinet
00 will
take you back to
first
like
tune;
a tjunpt

F or e xa mple ,
you nay insert
a t any t ine
dur ing
a t une,
the
seque nce $ FB $1 8 and t he t une will
begi n t o p l a y a t a f a s t
speed .
Insertin g
c aus e a s w i t c h
to the tune at
$FF $45 will
zero p ag e a dd ress $0045.
The init ial
values shown can be
reset
a t an y tim e by s t ar t ing
at addr es s $ 0 2 0 0 .
N o tu ne sh ou ld ex t c nd bc y ond addr es s
valuc s
arc store d
at $00E0 and up.

$00DF,

rlnce

prog!an

Sanple

0000
0 010
0020
00 30
0040
0050
0060
00 70
0080
0090

-------------------------------

c8
c4
c0

Tgnqq

FB
BD
14
00
5A
iF
56
5A

18
BD
B5
FB
5A
5A
56
56
80
80 4C

FE
BD
B0
28
st
5A
56
4C
FE
56

FF 44
O O 44
80 44
SA 5A
48 44
5A 5A
56 5A
00 C4
00 00
5A s6

51 E6
BD 00
51 c4
51 48
48 5l
5A JA
66 tt
44 4 C
72 5 A
5A E6

E6
44
80
5A
sA
66
80
56
cc
F2

66
3D
80
48
60
72
80
5A
72
80

5A sl 4C C4 C4 C4 Dl
36 33 2D A8 80 80 33
5A 51 E6 EO 80 FA FE
Dl 5A 5A 51 48 DA EO
7e 6C 60 DA DA FA FE
79 E6 E6 80 00 s6 s6
4C 48 4C 4C 4C 4C 56
5A s6 5A 66 56 5A 66
5A cc 72 5L cc 80 BB
FA FF O O

HUSIC M A CHI NE
;

0200
0202
0205
0207
0208

F. J. B utterfi el d
Toront o

lnit ializ c

A2
BD
9s
cA
l0

05
86 02
E0
F8

S T AR T !D X#
$os
LP I
L D A@ X I NI T
S T AZ X W O RK
DEX
B PL R LPI

,
, n a i n ro u ti n e
BF
43 L7
00
E4
E4
FA
04

t I o z2 2
;0 2 2 4
10 2 2 6
, t0 2 2 8

E4
E4
Eo
E0

81
E6
es
B0

ED
0B
FB

GO

NEX T

022A A6
a22C 86
022E A6
0230 A8
o23L 30
0233 A2
0235 86
o 2 s7 2 9
0 2 3 9 '85
0 2 3 8 F0
023D 85
023F As
024L 25
0243 F0
0245 E6
_ 0 2 4 7 C6
0249 A6
0248 A9
0 2 4 D 20
0250 30

A6
A9
20
30
10

EA
27
5D
AF
E2

E0
E7
El
02
01
E6
7F
E9
02
EA
E9
Es
04
EA
E9
E9
47
5D 02
88

, "t

NOTE

0 VER

HU SH

ON

tD A#
ST A E
L D Y#
L D AIY
IN C Z
#
C MP
BN ER
BRK
N OP
B EQR
BCCR
s Bc#
T AX
L D AIY
IN C Z
ST A Z X
B CSR

h e re - W OR Knot resot

up t inlng
LDXZ
STXZ
LDXZ
TAY
BM I R
LDX#
STXZ
1I 9t
STAZ
BEQ R
STAZ
LDAZ
ANDZ
BEQ R
I NCZ
DECZ
LDX#
LDA#
J SRO
BM I N,

$BF
PBDD open o u t p u t c h a n n e l
$00
W O RK+ 4 ge t n e x t n o t e
W O RK+ 4
t os t
for halt
$FA
NEXT
( or R T S i f u s o d a s s u b r o u t i n o )
G0
NoTE
$FB

los une w h e n G 0 p r e s s e d
is it a n o t e ?
if not, d e c o d e i n s t r u c t i o n
and pu t i n t o
X
W O RK+ 4 ge t p a r a n e t e r
W O RK+ 4 an d
W O RK
store
in work table
GO
J un p t o G 0
f or

not e

W O RK t ining
LI M I T+ l
W O RK+ I
lon g n o t e f a c t o !
t es t
aicuraulator
O VER long n o t e ?
nope, g e t s h o r t n o t e
$O f
LI M I T
stoie
length
factor
r enov s h o r t / t o n g
$z r
ftag
VALz
HUSH is it a p a u s e ?
VALI
no, s e t p i t c h
VAt 2
get t ir n i n g a n d
W O RK+ 5 by p a s s i f n u t , e d
ON
VALl
els e f a d e t h e
VALZ not e
V AL2
$A7
SO UND
GO

[D Xf
L D A#
JSR O
BM IR
BPL R

vz

; s u br o u ti n e

020A A9
0 2 0 c 8D
020F A0
0211 B1
0 2 1 3 E6
0215 C9
0217 D0
,0219 00
I 0e1A EA
I 0 2 rD F0
j0 2 1 0 s 0
O O2 1 F E9

, 1.oI z z r r n

0252
0254
02s6
02s9
0258

025D A 4 E 2
025F 84 E B
0261 86 EIJ
0263 E 0 00
0265 D 0 08
0267 A6 EC
0259 C 6 E I
0e6B D 0 F6
026D F0 16
026F 8D 42 L7
4272 C A
0273 C 6 E 8
0275 D 0 IL
0277 C 6 E 7
0279 D 0 E 8
FN
0278
027D ^4
84
027F C 6 E 6
028r D 0 E O
0283 A 9 F F
0285 60

30
02
01
FF
00
00

00E 0
0 0E 6
0 0E 9
OOE A
OOE B
00E c

to

se n d a b i t

S O U ND L D YZ
STYZ

WOR K+2
TIM ER

o cta ve

fl e g

.
sTxz xsAv
s lo oP c P x # $ o o

C O I {T
.

SEX

BN ER
L D XZ
D EC Z
B}IER
tEq R
STAO
D8X
D EC Z
BN ER
D EC Z
BN ER
LD'TZ
STYZ
D EC Z
BN ER

C ON T
ISAV
TIXER ,
SLOOP
g Er
SBD

LDA#
RTS

$rr

; i n i ti a l

0286
0287
0288
0289
026A
0288

vAtl
$27
SOU N D
GO
H U SH

L IM IT+2
SL OOP
L IM IT+1
SL OOP
WORK
L IM IT+ 1
L IM IT
SL OOP

co n sta o ts

i
I work

areas

lfORK
LIMIT
VALZ
VAtl
TIMER
XSAV

*e*
* =*
* =*
* =*
* =*
rrr

+6
+3
*1
+1
rl
tl

r e se r ve d
sp e e d /l e n g th
r a ti o /o cta ve /to n e
ti n i n g
o f n o te
n a r ki n g
a n d sp a ci n g
d u r a ti o n s
o cta ve co u n te r

Klm- 1 Us er

EUNT THE WUMPUS

Game by Gregory Yob
Ad apt ed f or t h e KIM-1 b y S ta n O c k e rs

S tan Ockers
R .R . #4 B ox 209
tockport,
I11 6044L

I first
ran across the 1WMPUSin TI{E BEST OF CREATIVE
COMPUTING_
where it is programmed in ba@is
EAGI on- t his pr o g ra m w i tn m o d i f i c a ti o n s so I coul d f i t i he
progratn and messages in the KIM-1 memory. The messages appear
o n the dis play i.n s c a n n j .n g fo rm rv i th " s o rt-of"
al phanumeri c
l e tte rs .
T he I I I I I M P U S
l i v e s l n a c a v e o f 1 6 rooms (l abel ed p - f).
Ea ch r oom has f ou r tu n n e l s l e a d i n g to o ther rooms (see the
n ra p b elow) .
W he n th e p ro g ra m i s s ta rte d , you and the
ar e p! - ac e d a t ra n d o m. AIs o p l a c ed at random are tw o
WU UP US
b o tto mles s pit s (th e y d o n rt b o th e r tb e W U MP U She
, has suckerO , typ e f eet ) and t w o ro o ms w i th S U p E R B ATS ,(a1so no troubl e to
If y o u e n te r a room w i th a pi t, you
. 1. ,WUMP US ,he' s t oo h e a v y ).
fa l l
in and los e.
If y o u e n te r a BA T ' S room you are pi cked
)l
u p a nd f lown at ra n d o m to a n o th e r ro o m. Y ou w i l l be w arned
wh e n B A T S , P I T S , o r th e WU M PU S
If you enter the
a re n e a r by.
ro o m wit h \ r y I t M PU S,
h e w a k e s a n d e i th e r m oves to an adj acent
ro o & or J us t eat s y o u u p (y o u l o s e ).
In order to capture the
and wln, you must use "MOODCIIANGE"gas.
1YUMPUS
When thrown
l n to a r oom c ont a l n i n g th e IYU I,{ PU S,
th e gas causes hi m to turn
fro m a v ic ious s n a rl i n g b e a s t i n to a meek and l oveabl e creature.
Ee w ill ev en c on e o u t a n d g i v e y o u a h u g. B ew are though, you
have only three cans of gas and once you toss a can of gas j,rti)
a room it is contaminated and you cannot enter or you wil-1 be
tu rn ed lnt o beas t (y o u l o s e ) !
T he pr ogr ar n s ta rts a t $ 0 3 0 0 . If you l ose and w ant everyth i n g t o r em aln th e s a m e , (e x c e p t th e rocm you are i n), resart
a t $ 0316. Us e tb e re s e t k e y to s to p th e program because about
h a l "f of page one l s u s e d a n d i f y o u j u st use the S T key the
The
sta ck wlLl ev entu a l l y w o rk i ts w a y d o w n i nto the progri l n.
'b yte at $0229 c o n tro l s th e s p e e d o f th e di spl a;r.
Once you get
u se d t o t he c hara c te rs y o u c a n s p e e d th i ngs up by putti ng i n a
lower number. The message normally given te1ls you what roon
yo u ar e ln and w h a t th e c h o i c e s a re fo r the next roorn. In order
ts flr e t he m oo d g a s , p re s s PC (p i tc h c an) w hen tbe rooms to be
se l e ct ed ar e df s p l " a y e d .
T h e n i n d i c a te the room l nto w hl ch you
wa n t t o pit c h t h e c a n .
It ta k e s a fre sh can of gas to get tbe
COODHUNTING:
WUMPUS(he may move into a room already gassed).

CAVE ITAP

Notes

v. 1 #2

APPENDIXD,
KIM DEMONSTRATION
TAPE

KII{. 1 DEMONSTMTIONTAPE
Index

Entry Point

Address Range

ID'/l

Name

01

DIRECTORY

$1780

$1780-$17AF

02

VU TAPE

$0000

$0000-$oo4e

03

SITPERTAPE (3X speed)

$0100

$oloo-$01c2

04

MOVEA BLOCK

$1780

$1780-$17cB

05

HmEC

$o2oo

$o2oo-$0244

06

ADC DEMONSTRATION
- BINARY
- BCD

$oooo

$oooo-$ooA4

$0020

07

FREQUENCYCOLNTER

$0000

$0000-$0067

08

TAPE DIIPE

$1780

$ 1 7 8 0 -$ 1 7 A e

09

REAL TIME CLOCK

$0370

$0370-$o4oo

OA

STOP WATCH

$o3oo

$o3oo-$0386

10

LI'NAR I.AI{DER

$oooo

$oooo-$ooc6

11

TIORSERACE

$027F

$027r-$0396

L2

ONE ARMEDBANDIT

$0200

$ 0 2 0 0 -$0 2 D 1

13

KIMAZE

$0200

$0200-$0210

T4

MUSIC MACHINE

$o2oo

$oooo-$028c

15

IIT'NI THE WIffPUS

$0300

$0000-$0400

Notes:
Supertape is set for 3X speed. To obtain
location $Ofnr to $02 and $01C0 to $03.

the 6X speed change

l.love A Block uses data stored in memory as follows:

SAL old
SAH old
$OOro
$0081
EAL old
old
EAH
$OOrZ
$0083
SAL
new
new
SAL
$0084
$0OnS
Frequency Counter:

Connect IRQ to PB7.

Signal

input

is PB0.

Mrslc lGchine: Be sure to set up the BRK vector by stortng

$00 ln $17rE and $lC ln $17FF.
Real Tlne Clock: Connect NMI to PB7, Btore $A5 ln $17FA and
$03 in $17F8. Restart display program at $0379. Iteas rtlr'
to return to the KIM monltor.

D-1

DI RE CTORY

0 0 0 1 0 2 0t 04 05 06 07 08 09 0A 0B 0c 0D 0E 0 F
D8 A 9 07 8D 4 2 L 7 2 A 4 1 1 A 4 6 F 9 0 5 F 9 8 5 F 9 C 9
16 D0 F3 20 2 4 1 A C6 F 9 1 0 F 5 C9 2 A DO F l A 2 F D
20 F3 19 95 F C E 8 3 0 F 8 2 0 L F lF DO D5 F O F 9

1780
1790
l7A 0

V U TA P E

0 0 0 1 a 2 0 5 04 05 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0 E 0F
0000 D8
0010 46
0 0 2 0 c9
0050 D5
0 0 +0 A A

A9
F9
2A
46
BD

7F
05
DO
EO
E7

8D
F9
F5
E8
lF

41
85
A9
E8
8D

L7
F9
00
E0
40

A9
8D
8D
15
17

L3
40
Eg
D0
D0

8 5 E 0 8 D 4 2 1 7 2 A 4 1 1A
t 7 c 9 1 6 D0 E 9 2 0 2 4 1 A
17 20 2 4 L A ' 2 0 0 0 1 A D 0
02 A2 0 9 8 6 E 0 8 E 4 2 L 7
DB

S UP E R TA P E ('X )
00 01 02 05 0 r+ 0 5 06 07 08 09 O A O B O C O D O E OF

0 1 00 4 9 A D 8 D E C L7 20
1 7 A 2 6 4 A 9 16 20
0 rl 0
0 1 2 0 2 0 7 0 0 1 A D F5 L7
0 r r 0 E c t7 2 0 6 D 01 20
0140 L7 E D F 8 T 7 90 E9
0150 01 A D E 8 L 7 20 70
0160 18 8 6 E 0 4 8 20 88
9170 48 4A 4A 4A 4A 20
0A 1 8 3 0 0 2 69 A7
0 r80
0190 B E B E 0 1 4 8 2C 47
01A 0 E 1 +9 8 0 8 D 42 L7
0180 30 0 7 4 A 9 0 DB AO
0 1c0 06 7 E

32
61
2A
EA
A9
01

19
01
6D
19
2F
A2

0r . 58
7D 01
69 30
L7 r 0
85 El
00 F0

A9 27 8 5
A9 2A 2 A
01 AD F 6
AD ED 1 7
20 88 0 1
02 49 0 4
c5 E0 D0
68 2A 7 D
A0 08 8 4
FB 89 B F
CA DO E 9
D7 C6 E 2

El
88
L7
CD
AD
20
F7
01
E2
01.
58
DO

A9
01
20
F7
E7
61
60
60
A0
8D
C6
CF

BF
AD
6D
L7
L7
01
20
29

8D
F9
01
AD
20
4C
4c
0F

43
L7
20
EE
70
5C
19
C9

a2 84 Et
44 L7 A5
E1 F0 05
60 04 c3

MOV EA B LOCK
00 01 02 0l

t7 8 0
1790
17A0
1780
L7C0

58
A5
BI
A0
85

A5
E2
E0
00
E2

E4
E5
91
B1
A5

0 4 0 5 06 07 08 09 0A 0B 0c 0D 0E 0F

E5 E0
EO A8
E4 88
E0 91
E3 65

85
84
30
E4
E7

E6 45 E5 E5
E8 E6 E8 B1
1 t + l8 A 5 E 2
c 8 c 4 E 8 DO
85 E3 4C 4F

El
EO
E5
F7
lC

85
91
EO
18

E7
E4
85
45

90
88
E8
E2

18
D0
E6
65

38
F9
E8
E5

HEDEC
0 0 0 1 0 2 0 t 04 05 06 07 08 09 0A 0B 0c 0D OE OF

0200 F8 9 8 4 8 8 A q8 A9 00 A2 06 95 DF CA D0 FB E6 E5
02r0 45 E 7 4 8 A 0 08 68 4A 48 90 0c A2 0t 18 85 E2 75
0220

DF 9 5 D F C A D0 F7 A2 A3 18 85 E2 7' E2 95 E2 CA

02ta D 0 F 7 8 8 D 0 E0 68 A5 E5 D0 04 A5 E5 D0 Dt+ 68 AA
02q0 6B A 8 D 8 6 0
D- 2

ADC DEMONSTRATION

0 0 0 1 0 2 03 04 05 06 07 08 09 0A 0B 0c 0D 0 E 0F
0000
0010
0020
00 t0
0040
0050
0060
0070
0080
0090
OOA O

A9
85
Ag
85
FA
00
00
00
A9
10
EE

FF
F9
FF
E7
A2
00
00
00
80
DO
90

8D
20
8D
A2
00
00
00
00
85
09
E3

01
1F
01
00
86
00
00
00
EE
AD
60

17
1F
17
86
F9
00
00
00
A9
00

AD
4C
AD
E6
2A
00
00
00
00
17

03
0D
03
20
1F
00
00
00
18
38

77
00
L7
00
1F
00
00
00
65
E5

29
00
29
02
4C
00
00
00
EE
EE

EF
00
EF
46
2D
00
00
00
8D
4C

8D
00
8D
El
00
00
00
00
00
9F

03
00
03
86
00
00
00
00
t7
00

L7
00
t7
FB
00
00
00
00
AD
AD

20
00
20
A6
00
00
00
00
02
00

80
00
80
E2
00
00
00
00
17
17

00
00
00
86
00
00
00
00
29
46

FRE QUE NCY

COU NT E R

0 0 0 1 0 2 0t 04 05 05 07 08 09 O A O B O C O D O E O F
0000
0010
0020
00t0
OO4O
0050
0060

A9
00
18
FB
FB
20
05

01
EA
A9
85
A9
lF
85

85
AD
01
FB
F4
lF
55

65 F8
02 L7
65 F9
t+C L2
8D 0F
C6 6 6
68 40

A9
29
85
00
t7
D0
03

36
01
F9
+8
c6
F9
00

8D
D0
49
A9
65
A9

FE
F9
00
90
F0
00

t7
AD
65
8D
02
85

A9
02
FA
04
58
F9

OO 8D
L7 29
85 FA
L7 2C
40 A9
85 FA

FF
01
A9
07
FF
85

L7 58
FO F9
00 65
L7 10
85 65
FB A9

TA P E DUP E
00 01 02 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0 E 0 F
1780
1790
r7A 0

A 9 27 A 2 3 F 8 E 4 3 L 7 A 2 a 7 8E 42 17 A0 5E 2C 42
17 10 02 A 0 A 3 A 2 B F 8 E 43 L7 49 80 8D 42 t7 8C
4t+ L7 2C 4 7 1 7 1 0 F B 3 A D9

RE A L.TIME CLOCK

0 0 0 r 0 2 05 04 05 06 07 08 09 0A 0B 0c 0D 0E 0F
0370 A9 00
0380 FA A5
0390 6A lF
03A0 00 00
0 tB 0 0 7 L 7
0 3 c0 1 8 F 8
0lDo A5 82
0 tE 0 8 5 1 8
03F0 A9 01

85
83
Cg
00
10
A5
18
69
85

80
85
01
00
FB
81
69
01
83

A9 F4
FB 20
D0 03
00 48
E6 80
69 01
01 85
85 83
D8 A9

8D
64
4C
8A
A9
85
82
c9
F4

D- 3

OF
lF
4F
48
04
81
C9
L2
8D

L7
C9
lC
98
C5
C9
60
D0
OF

45
01
20
48
80
60
D0
02
L7

81 85 F9 A5
D0 0D 20 lF
1F r .F 18 90
A9 83 8D 04
D0 58 A9 00
D0 28 A9 00
1g A9 00 85
E6 84 C9 L3
68 A8 68 AA

82 85
1F 20
DA OO
L7 2C
85 80
85 81
82 A5
D0 04
68 40

STOP WATCH

0 0 0 1 0 2 03 04 05 06 g7 08 09 0A 0B 0c 0D 0E 0F
0500
0310
0 t2 0
0350
0340
0150
0560
0170

49
85
at
38
B0
lF
F8
0B

d:so c9

75 8D
FB 20
DO lF
IE A 9
D0 c9
IF A D
A 5 F9
A 9 00
00 D0

F2
7F
45
2E
02
07
69
85
cB

t7
1F
FB
20
FO

T7
01
FA
FO

A9 0 2
20 6 A
20
AO '1BE
c4 c 9
FO F B
85 r 9
A5 F B
8C

8D F3 17
lF Cg 04
lE A 9 3A
A 5 F 9 20
0 1 D0 c8
8 D 0 0 lC
A5 FA 69
1 8 6 9 01

A9
D0
20
3B
A9
Ag
00
85

00
st
AO
].E
9C
9C
85
FB

85
4c
lE
20
8D
8D
FA
D8

F9
64
45
2F
06
06
C9
20

85
lC
FA
lE
t7
t7
60
6A

FA
c9
20
2
' 80
18
D0
lF

LUNAR LANDER
00 01 02 03 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0 E 0 F
0000
0010
0020
OO'O
0040
OO5O
0060
0070
0080
0090
OOA O
0080
00c0

A2
E2
E2
95
E9
10
06
E5
20
D0
50
E9
02

0c
75
95
E8
00
FB
F0
F0
lF
c9
10
A9
08

85
E4
E2
CA
95
2O
A5
07
lF
15
FD
00
00

88
95
CA
10
EB
AA
A5
D0
F0
D0
AA
E9
00

95 E2
E 2 CA
r0 E 5
F9
CA '180
OO 45
EB 46
05 38
06 20
03 85
A5 EA
00 85
00 00

CA
88
45
A5
F7
EE
EC
A9
6A
EE
FO
E8

D-$.

10 F9
10 F6
E2 10
ED E5
B0 0C
DO O A
85 FB
00 E5
lF 2 0
6 0 C9
F8 85
60 45

A2
85
0B
EA
49
45
85
E6
91
10
EA
00

05
E5
A9
85
00
E2
FA
85
00
D0
A5
00

A0
10
00
ED
A2
A6
45
F9
C5
05
EA
99

01
02
A2
A2
A3
E3
E5
A9
El
A9
38
80

F8
A9
02
01
95
FO
30
02
D0
00
E9
00

18
99
95
85
EA
08
06
85
Fl
85
05
99

85
75
E2
EB
CA
DO
A5
El
F0
EE
85
98

HORSE RACE

0 0 0 1 02 0 3 0 I + 0 5 0 6 0 7 08 09 0A 0B 0c 0D 0 E 0F
0270
0280
0290
02A0
0280
0 2 c0
02D0
02E0
02F0
0 r0 0
0310
0320
0530
0540
0350
0 t6 0
0370
0 r8 0
O3 9 O

0 0 0 0 00 0 0 0 0 0 0
A 2 t3 B D 7 C 0 5 9 5
0 0 A 2 09 8 9 7 C 0 0
2 0 3 D lF A 5 8 F 3 0
86 99 A4 99 86 85
9 5 7 C E8 9 6 8 3 8 9
30 18 D0 06 A5 8F
0 6 9 5 83 CA 1 0 F 6
cA D 0 F5 E A E A E A
c6 8 F D0 0 5 A 5 8 1
8 9 8 9 00 F 0 0 B 2 0
2 0 6 8 03 2 9 3 8 8 5
B0 05 A9 FF 99 86
0 3 F 0 01 8 8 9 8 5 5
0 1 6 5 9A 1 8 4 6 9 9
9 5 8 C 95 8 6 4 C A 9
9 1 A 2 04 8 5 9 1 9 5
8 0 8 0 8O F F F F F F
F E B F F7 0 1 0 2 0 4

00
7C
84
E3
89
90
FO
A2
EA
0g
68
9A
00
89
75
02
92
80

00
cA
FC
A2
90
03
28
06
EA
06
0t
89
20
85
8C
38
cA
80

00
10
20
03
03
49
D0
85
EA
85
29
8C
tD
9A
EA
l8
r. 0
80

00 00 00 00
F8 A9 7F 8D
4 E lF c 8 c 0
CA l0 DE D6
35 VC EA EA
FF L5 7C 95
30 A2 02 38
7C 95 76 A9
EA EA EA EA
81 EA EA EA
3 C D0 1 8 9 9
00 t0 0B 29
lF A 0 F F 4 6
EA EA 20 68
EA EA EA EA
A5 92 65 95
F9 60 80 80
00 00 00 80

00
41
06
86
EA
7C
85
80
EA
EA
89
t8
99
03
EA
55
80
80

00 D 8
17 A 0
90 F3
DO F9
EA EA
E0 05
83 E9
95 7C
EA EA
EA EA
00 E A
C5 9A
1D 93
18 29
EA E A
95 85
80 80
80 0 8

ONE A RME DB A N DI T
00 01 02 0 3 0 4 0 5 06 07 08 09 O A O B O C O D OE O F

0200
0210
022A
0230
0240
0250
0260
0270
0280
0290
02A0
0280
0 2 c0
02D0

A9 25
E6 09
01 85
06 A5
E7 A5
0D A2
A9 80
F8 A5
c9 4 6
02 F6
00 8C
1 .7 c8
E7 1F
50

8 5 05 20 B A 0 2
2 A 8D 02 F O F 9
0 5 20 BA 0 2 2 6
0 9 29 06 0 9 4 0
0 4 c5 03 D0 3 7
OB c9 42 F 0 0 7
8 5 08 20 8 D 0 2
0 5 69 01 B 0 9 4
F 0 DA 20 8 D 0 2
0 2 cA 10 F B A 9
4 2 17 8D f + 0 L 7
c8 cA 10 E 9 2 0
8 5 00 A5 0 5 4 A

D-5

85 06 20 8D O2 DO F B
85 06 F8 38 A5 05 E9
8D 02 c6 08 DO F9 A6
46 09 46 09 c6 06 D 0
D0 33 A2 10 c9 40 F 0
c9 44 F0 01 cA 86 07
DO F9 c6 07 F0 9C 18
20 BA 02 D0 E2 A2 01
D0 80 FO F7 46 06 r 0
4L L7 AO OB A2 04 85
7F E9 01 D0 FC 8D 42
60 45 c5 29 OF AA BD
tlA 4A 4A AA BD E7 lF 85 01

A9
A9
09
95
c5
A2
c6
85
A5
7F
D8
40

00
03
20
01
02
06
08
05
05
8D
A9
1F

K I MAZE

0200
0210
0220
a2t0
0240
0250
0260
027A
0280
0290
02A 0
0280
02c0
02D0
ozE A

00'0t

02 03 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 C 0 D 0 E 0F

D8
D8
2A
c6
8D
D6
D7
BC
l0
D2
00
08
41
71
00

02
88
D0
10
17
FC
CD
30
c6
D2
40
08
5F
01
00

A2
00
88
D5
41
D0
F0
CA
04
C6
08
01
FE
5E
00

BD
L0
17
0A
A0
C8
85
8C
D4
D0
48
40
04
00
00

85
F8
29
A9
09
C8
D7
BC
D0
EF
01
40
51
FD
00

02
A2
A7
05
A2
CA
A2
AD
85
E6
09
84
7D
FF
00

9 5 D2 CA 1 0
0A Ah Dr+ A9
A8 89 AO 02
8 5 D5 A 5 DE
O A 8 5 D8 8 D
CA 1 0 E E 2 0
0 4 DD A 8 a 2
O ? 8 9 D8 0 0
D0 0 4 E 6 D4
D2 E 6 D2 DO
41 r+9 L3 0 9
02 08 FF FF
5D 04 51 B5
o CI 0 0 0 0 0 0
00 00 00 00

F8
FF
95
49

AO
38
D8
40

OB
16
CA
85

+0 t7 8c
40 lF
F0 05
5D 81
DO F8
E9 00
01 06
0,+ 08
5+ 14
00 00
00 00

20
cA
02
CA
00
04
F5
F7
00
00

B1
D9
CA
DE
42
6A
10
DO
DO
00
06
7E
D5
00
00

D2
56
10
A9
t7
lF
F8
BI
06
00
06
15
04
00
00

99
D8
E7
7F
c6
C5
t0
CA
c6
00
04
00
54
00
00

MUS IC MA CHINE

0 0 0 1 s2 0 5 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
OOOO
OO1O
0020
0010
0040
OO5O
0060
007CI
OOS O
0090

FB
BD
44
00
5A
FF
56
5A
F2
80

18 FE
BD BD
83 80
FB 28
5A 51
5A 5A
56 56
-56 4c
B O FE
4C 56

FF
00
80
5A
48
5A
56
00
00
5A

r + 4 51 trb E5
44 BD 00 44
ttq 51 c4 80
5A 51 48 54
44 48 5'1 5A
5A 5A 5A 65
5A 66 D9 80
c4 44 4C 56
00 72 5A cc
56 5A E6 F2

65 5A 5r 4C .C4
5D 36 3t 2D A8
80 5A 5T E6 80
tl8 D1 5A 54 5T
60 79 6C 60 DA
72 79 E6 E6 80
80 4C 48 4C 4C
5A 5A 56 5A 66
7 2 5A CC 72 54
80 FA FF 00

c4 c4 Dl
80 80 33
80
48
DA
56
4C
56
cc

FA
DA
FA
56
4C
5A
80

FE
EO
FE
56
56
66
88

0 0 0 1 a 2 0 3 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0200
0210
O2 2 A
0 2 t0
0240
0250
0250
0270
0280

A2
00
FB
A8
E9
30
EB
42
E6

05
81
AA
,0
25
88
86
t7
D0

BD 86
E r+E 6
81 E4
02 A2
E3 F0
46 EA
EC E0
cA c6
EO A9

02
E4
E6
01
04
A9
00
E8
FF

95
C9
E4
86
E6
27
D0
D0
60

E0 CA r . 0 1 8 A 9
FA DO 0tr 00 E A
95 H0 BO EO A 5
E6 29 7F 85 E 9
EA C5 H9 46 E 9
20 5D 02 30 A F
08 A5 EC C6 E B
EC C6 E7 DO E 8
50 02 O1 FF 0 0

D- 5

BF
FO
EO
FO
A9
10
DO
A4
00

8D 43 L 7
ED 90 O B
86 E7 A 5
02 85 E A
A7 20 5 D
E2 A4 E 2
F6 FO r 6
E0 84 E 7

AO
E9
El
A5
02
84

8D
C6

HUNT THE WUMP US

00 01 02 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 A 0 B 0 c 0 D 0E 0 F
0000
0010
0020
00 t0
0040
0050
0060
0070
0080
0090
00A 0
0 080

80
F8
F7
87
00
02
05
08
0B
80
80
80

EE
BE
89
F3
00
02
03
04
0E
87
89
B8

DC B E
D4 D4
F9 F1
F 9 DE
00 00
00 0 1
01 0 2
03 0 4
05 0 6
84 E D
F 7 D4
DC E D

80
F9
80
80
00
01
03
07
0F
ED
ED
F9

F7
BB
00
F7
00
00
02
06
08
F9
80
80

DO F 9
ED 80
8 0 Dc
80 9C
00 00
03 04
05 06
07 0A
09 0F
DE 8 0
88 Fg
00 80

80 84
B8 F9
DC F 3
BE 87
00 00
00 06
05 08
09 0A
0B 0c
c0 80
Fl F8
DO DC

Dt + 8 0 DE
F 7 DE 8 0
ED 80 c0
F3 BE ED
00 00 00
07 00 09
09 08 0B
0F 0c 0D
0D OE OE
Dc D4 8 8
80 OO 80
DC 8 7 D3

85
F8
80
80
00
0A
0c
0E
OF
EE
EE
80

C0
DC
Fc
80
00
01
0B
0c
OD
80
DC
00

80
85
BE
OO
00
04
07
0A
OD
DB
BE
00

0 0 0 1 0 2 05 04 05 0 6 0 7 08 09 0A O B O C O D OE O F
0100
0110
0120
0 110
0140
0150
0160
at70

80
84
D0
63
F3
EE
F3
87

9C
F8
lE
1E
F9
EE
84
80

BE
80
DO
6C
DO
84
FB
00

87
89
lE
lC
FC
84
80
80

T'
88
DO
BD
F7
Fg
00
DC

BE
DC
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DC
F8
F9
80
BE

ED
ED
48
F8
80
F9
BD
F8

85
F9
22
80
ED
80
F7
80

B9 B8
OO 80
0 F tro
E E DC
D4 F 7
Fl F9
ED 80
DC F 1

DC
FC
63
BE
F8
88
84
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ED
F7
lE
8O
89
88
D4
BD

F9 00
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6C tC
OO 80
F5 80
80 84
8 0 D0
F7 ED

80
80
0F
ED
00
D4
DC
80

r3
89
E6
BE
80
80
DC
00

0 0 0 1 0 2 03 04 0 5 0 6 a 7 0 8 0 9 O A O B O C O D O E O F
0200
0210
0220
0230
0240
9250
0260
4270
0280
0290
02 A 0
0280
0 2 c0
02D0
02 E 0
O? F O

8 tr DE 8 5 DD A 9 0 7
D0 01 60 95 E8 88
2 0 2 8 0 2 A 4 DC 4 C
t7 2 0 1 E 0 2 2 C 0 7
8 D 4 1 I7 A 0 0 0 A 2
c0 0 6 9 0 F 3 2 0 3 D
20
02 FO FB 20
E7 5
'E0 A 5 c 0 D0 0 4
FD FO 05 06 c0 A5
04 D5 CB F0 01 cA
3 0 OD 2 0 8 2 0 2 A D
cB 6 0 A 6 CA 8 5 5 0
B5 80 85 c9 60 A2
01 20 00 02 A0 00
F9 F7 F8 c0 80 EE
B E BD 8 0 F l DO DC

D-7

85
cA
0A
t7
09
lF
3E
E6
C0
10
06
85
03
A9
DC
87

DF
10
02
10
89
60
02
C0
60
F9
17
C6
D5
AC
BE
80

A0
F3
A2
F8
E8
20
FO
DO

05
D8
06
C6
00
8C
F6
F8

05
60
29
B5
c6
20
8O
9C

c0
2s
0t
60
F0
00
BD
BE

A2
18
86
DB
84
tE
20
29
E6
72
AA
85
03
02
F9
87

0 5 B1 DD c 9 0 0
9 8 65 DF 8 5 D C
DB A9 52 8 D 0 7
DO EF 60 A 9 7 F
F C 20 4E L F C 8
02 D O F 8
20
6 A '1F
E c9 1 5 1 0
8 E FO 0 5 0 A 9 0
C0 A5 c 0 6 0 A 2
0 2 29 OF c9 0 4
8 5 c6 85 C B A 5
C7 B5 70 85 C 8
CA 10 F9 6 0 A 0
4 C D4 02 BD D O
F 8 80 F7 8 0 F 6
F 3 BE ED 80 0 0

HUNT THE W UMP USCCO NT . )

0500
0310
0320
0 tt0
0540
0 t5 0
0 t6 0
o t7 0
0180
0390
0lA0
0 tB 0
0 tc0
OS D O
O3 E O
05F0

0 0 '0 r

0 2 0 1 04 05 06 07 08 09 0A 0B 0c 0D 0E 0 F

AD 06
85 E0
cA F 0
0t 84
A9 19
20 00
A2 03
00 02
EB A5
30 9A
02 20
3D 20
02 A0
8A 30
1A A4
5C 0'

1 7 8 5 C0
A 0 0 5 10
F 5 C A 10
E l 8 9 C6
1 0 0 A E0
0 2 c6 El
8 4 C 6 89
2 0 5 8 02
C A A 2 04
E 0 0 5 10
9 9 0 2 C5
00 02 +c
0 0 A 9 87
E E A 5 Dl
E O 8 9 E7
A 0 0 2 A9

A9 F F
02 A 0
F9 9 9
00 2 0
0 I 30
A4 E l
E7 lF
C9 1 4
D5 c l.
L7 E 0
CA D0
16 0 5
20 0 0
46 E 0
lF 8 5
DE 2 0

D- 8

A2
00
CA
8F
04
10
95
F0
F0
01
84
A9
02
95
9F
00

O E 9 5 CI
A2 05 2A
00 88 10
02 8A 30
A9 0E 10
DA A r+ CA
2 0 c A l0
4 8 2 0 C5
tt cA 10
10 LD A0
A9 26 20
4 F 2 0 CF
20 58 02
C0 C5 CB
A0 00 A9
02 F0 F7

CA
72
EC
t7
02
89
F6
02
F9
00
CF
02
20
F0
90
A9

IO
02
20
E0
A9
El
A0
85
20
A9
02
A9
C5
L5
20
73

FB
29
82
03
00
1F
0o
CA
8F
26
A0
65
02
C6
00
2A

A9
0F
02
30
A0
85
98
8A
02
20
01
20
85
E0
02
CF

g3
D5
A0
04
01
0C
20
70
8A
q0
A9
CF
Dl
F0
4c
02

APPENDIXE.
APPLICATIONS
SPECIAL

Si n g l e

C hannel

A nal og

SUBROTITINE
ADC - 8 Bit

to D i gi tal

Analog to DigltaL

0080 49 80
ADC
LDAti
00E2 85 EE
STAZ
0084 A9 00
r.DAJt
OOE6lE
MCTBIT CLC
0087 65 EE
ADCz
0089 8D 00 17
STd@
OOECAD 02 17
I.DJG
0088 29 10
allDit
0091 D0 09
BNEr
0093 aD 00 17
r,Da@
0096 38
s8c
0097 E5 EE
SBCz
0099 4c 9F 00
JlcG
OO9CAD OO 17 SAVE I,DAG
OO9F45 EE
SHIFT I,SRZ
0041 90 E3
BCCr
00a3 60
RTs

s80
TRIAL
$00
TRIAL
PAD
PBD
$10
SAVE
PAD
TRIAT
S H IF1.
PAD
TRIA].
lDffBIT

C onversi on

Comrersion

eoter trlal Bo.

save it
clear A
clear carry before add
add tlial
to A
outPut to DAC
check cooparator
oask all. but bit 4
if conP. = 1, save result
too big, get no. fronr DAC
set carry before subtract
no.
subtract trial
load DAC loto A
dlvide trlaL by 2
done 1f tlial
less thao 1
retura with final no. la A

Hardware:

'"40 - PA7 are out to DAC

PB4 is to froo conparator

+15 V

Ref. input
-1 0 v

PA7
PA6
PA5

V output

PA4
PA3

-15 V

Pta
PAl
PAO

+uv

2.2 K
+ 5V

w4
V lnput

C@parator

100 K

r l - 'l

output

DEMONSTRATION
AMLOG TO DIGITAL CONVERSION
PROGRAM

Display

ADC Output in HEX Fornat

0000 A9
0002 8D
0005 AD
0008 29
000A BD
000D 20
0010 85
O0L2 20
0015 4C

FF
oL
A3
EF
03
B0
I'9
lF
OD

Display

ADC Output in BCD Format

0020 A9
oo22 8D
0025 AD
0028 29
OO2A 8D
O02D 20
0030 85

FF
01
03
EF
03
80
E7

START
L7
L7
L7
00

LOOP

lF
00

START
17
L7
L7
O0

READ

LDA/i
set PA port to output
$ff'
STAG $1701
LDA@ $1703
set Pts4 to be input
AND/f $EF
srA@ $1703
call ADC subroutine
JSRG ADC
STAz
store ADC output in right
$F9
JSRG SC^ANDS dispLay data
Loop back for more data
JMPG LOOP

LDAit
$ff'
STA@ PADD
LDA@ PBDD
AND/f $EF
STA@ PBDD
JSR@ ADC
STAz HEDEC-L

0032 A2 00
0034 86 E6

r,Dxit $oo
STXz IIEDEC-H

0036 20
0039 A6
0038 86
003D 4'6
O03F 86
0041 42
0043 86
OO45 20
0048 4C

JSRG
LDXz
STIk
LDXz
STXz
LDX/I
STKz
JSRG
Jl@G

O0 02
El
FB
E2
F'A
00
19
1F 1F
2D 00

HEDEC
$81
$fB
982
$fA
$00
$rg
SCANDS
READ

set PA port

display

to output

set PB4 to be input

read ADC
set up data for binary

to BCD converslo

call blnary to BCD conversion routlne

get BCD result high
store result in left display
get BCD result
Low
store result in middle display
zero the right display
display final BCD value
loop back for more data

note:
In order to perform the binary to BCD conversion, you nnrst load
at address $0200.
the HEDECprogram into the memory starting
This program uses.,:.t'h-eircuit and ADC subroutine

phown on page E-1.

MULTICHANNELANALOGINPUT/OUTPUTSYSTEMFOR KII"I.1
by J.B. Ross

A multichannel

analog I/O system whlch is

ideally

and output.

using wire-wrap techniques for

less than $50.00.

I/O system is interfaced

progragmabLe I/O lines

driving

DAC 0
DAC I

tn
to

PAO
PAI

:::
DAC 7

to

PA7

Connect the remaining control

SELECT0
SELECT1
SELECT 2
STROBE
SIGN BIT

interrupt

the DAC to port

to port

lines

PA--

PB--

software is given on the following

uses the KIM-I.interval

timer

Pages.
an NMI

to trigger

to update the inputs and outputs every 50 rnSec so you must

also connect PB7 to pin 6 of the expansion connector.

vector

the

PBO
PBl
PB2
PB3
PB4

to
to
to
to
to

The cornplete driver

driver

to KIM-1 via

as follows:

Counect the 8 data lines

The interface

provides B channels of analog input

uses standard conponents and can be constructed

The circuit

The ruultichannel

to the

(BYTE June 1977, pP. L8-23).

KIM-I system was developed by Douglas R. Ikaul

This system (see diagram on p.E-7)

suited

is set up by the initializing

To make the interface

system operate,

Routine,

the Analog to Digital

Routine.

Start

properly.

If

starting

through 7 is stored ln locations

begins to flicker,

inrnediately

the program

data to be sent to output channels 0

$00C0 through $OOCZ,elght

E-j

Driver

and the Initialization

Control w111 be transferred

the display

Eight bit

at $0380.

load the Analog Interface

Conversion Subroutlne,

the program at $0380.

back to the KIM monitor.

ls operating

routine

The NMI interrupt

bit

lnput

data from channels 0 through

when the interface

$oocr.

can be used to enter

very

driver

data for

from the analog inputs.

7 is written

into

tocations

is operating,

the keyboard monitor

the analog outputs

and to examine data

rnrkes calibration

This feature

$00C8 through

of the Lnterface

convenient.
Since the analog data is

transferred

to and from the rerrory table

by the interface

driver

with

of how to use the dlgital

the details

Programs can readily

data.

be written

of lnterference

50 nSec.

If

driver

driver.

loop is used, it
uses the interval

$L744 - $L74F is available

lnteruppting

The driver

for

general

A complete update of all

inputs

every

nay be lengthened by 5 n^Sec.

timer

tlnlng

located

at $L704 - $170tr'

the other

timer at

use,. but has no eignal

the ptocessor,,

software also includes an elght bit

$OOOOwhich increments by one each time the interface

a four digit

output

is a posalbility

tlnlng,.there

souLd not be used'by another program.

for

data and generate

about 5 n^Secand takes place automatLcally

a timing

Ttre lnterface

data contained in the table.

to examine input

by the interface

and outputs reguires

output

users need concern themselves only

a user program does any critical

If

so this

software,

BCD I'clockr' in locations

oace'each 0. 1 Sec (approxirnately).

E -4

counter
is

in location

serviced,

$OOnf and $00D2 which is

and

incremented

ANALOGINTERFACEDRIVER ROUTINE
0300 48
O3O1 8A
0302 48
0303 A2 0O
0305 BA
0306 09 0B
0308 8D OZ 17
0308 85 C0
030D 8D 00 17
0310 AD 02 17
o3L3 29 F7
0315 8D 02 L7
0318 49 64
031A BD 04 17
031D AD 07 L7
0320 F0 FB
0322 ID OZ L7
032s 09 0B
0327 BD 02 L7
032A E8
0328 E0 08
032D D0 D6
032F BE OZ L7
0332 20 58 03
0335 95 C0
0337 EB
0338 E0 l0
033A D0 F3
033C A9 30
033E BD 0F 17
0341 E6 D0
0343 18
0344 F8
0345 A'5 D0
0347 29 0I
0349 65 Dl
0349 85 Dl
034D A9 00
O34F 65 D2
0351 85 D2
0353 D8
0354 68
0355 AA
0356 68
0357 40

START

PHA
TXA
PHA
LDX/f
OUTPUT TXA
OM/f
STA@
LDAzx
STAG
LDAG
ANDdI
STA@
DELAY LDA/f
STAG
WAIT
LDAG
BEQr
LDAG
oRA#
SrAG
INX
CPX/I
BNEr
INPUT STXG
JSRG
STAzx
INX
CPX/I
BNEr
EXIT
LDA/I
STA@
fNCz
CLOCK CLC
SED
LDAz
AMif
ADCz
STAz
LDA/I
ADCz
STAz
CLD
PLA
TAX
PLA
RTI

6ave A

$00
$08
$L7AZ
$C0
$1700
$1702
Sr7
$L702
$64
$1704
$1707
WAIT
$L7OZ
$08
$1702
$Oa
OUTPUT
$1702
ADC
$CO
$10
itlpUf
$30
$170F
COUNT

COUNT
$01
TIME-L
TIlm-L
$00
TII'{E-}I
TIME-H

E -5 .

save X
clear X
get channel number
disable output multiplexer
select output channel
get nunber from memory table
send it to DAC
enable output multiplexer

set up time delay for charging

use microsecond timer
get status
wait until timer is done
disable outPut multiplexer

increment channel in X
check for maximum X=8
if less than rnaximum, rePeat output
select input channel
convert analog V to binary
save number in memory table
increment channel.in X
check for naximu* 11=$10
if less than maximum, repeat input
reload interval
timer with refresh
value (rnsec)
increment sample count
clear caxry before addition
switch to BCD mode
get count number
ur.askall buc low bit
add bit to low order time
save result
clear A
add carry to high order time
save result
return to binary mode
restore X
restore A
return from interrupt

ANALOC TO DIGITAL CONVERSIONSTEROUTINE

0358 A9 80
0354 85 EE
035C 49 00
0358 18
035F 65 EE
0361 8D 00 17
0364 C6 E3
0366 AD AZ L7
0369 29 LO
0368 D0 09
036D AD 00 17
0370 38
0371 E5 EE
0373 18
0374 90 03
0376 AD 00 17
0379 46 EE
0378 90 El
O37D 60

LDA#
$80
STAz
TRIAL
lDA/l
$OO
MCIBIT CtC
ADCz TRIAL
STA@ DAC
DECz $fS
IJA@
COMP
ANDii
$fO
BNEr
SAVE
LDAG DAC
SEC
SBCz
TRIAL
CLC
BCCr
SIIIFT
SAVE
l,DA@ DAC
SHIFT
LSRz
TRIAL
BCCr
NXIBIT
RTS

INITIALIZATION

ROUTINE FOR INTERFACEDRIVER

0380 A9 FF
0382 8D OL
0385 49 0F
0387 8D 03
038A' 49 00
038C 85 D0
0388 85 Dl
0390 85 D2
0392 8D gA
0395 A9 03
0397 8D FB
0394 AD 0E
039D 4C 4F

INTLZ
t7
17

L7
17
17
IC

ADC

LDA#
STA,G
LDAtf
STAe
IJA/F
STAz
STAz
STAz
STA@
tDAilf
STAG
LDAG
JIC@

$FF
$1701
$0f
$1703
$00
COUNT
TIUE-L
TIME-H
NMI-L
$Or
NMI-H,
$170E
$1C4F

E -6

enter trial
number
save it
clear A
clear carry before addition
add trial
value to A
send trtal
value to DAC
naste 5 microseconds
get comparator status
mask to recover bit 4
save result
if comparator = I
too big, get number from DAC
set carry before subtraction
nurnber
subtract trlal
Jr.mp to shift
get nuober from DAC
divlde trial
number by 2
done if carry is 1
return wlth finaL valud in A

set PA port

to output

set PBO - PB3 to output

,
clear A
clear COIJNT
cLear TIME-L
clear TIME-II
set up NMI interrupt

vector

enable tlmer lnterrupt

jtrnp. to monitor (or user program)

MULTICHANNEL ANALOG INTERFACE

6l
5l
4 \ourPr,rr
3 f Foflr

aI

rl
o)

IC4
IPF
IC t2
LM 3II

IC5

IO
PORT

tc?

\ 6 ro o o p F
h
|t,
rt
*

./tt

IC

-'

r ooopF

I TO8

ca3r30
-3y

-r5Y

Number

1 ro8
I
10
1l
12
13

T yp e

+ 5V

cA3 130
16.
cD4051
't6
cD4051
MCt408L-8 13
LM 311
LM 318

GND - 15 V

+1 5 V

-5V
4
1

I
a

2
I

4
4

8
B

E -7

APPEI{BtTiF.

KIr{16500

TNFORI\4AfIONSOURCES

KIM SOFII^IARE
SOURCES

KIM-1/650X User Nores

109 Centre Ave.
West Norriton,
PA 19401
Published every 5 to B weeks. Subscription:
$5.00 for
six issues.
Back issues may be available.
Highly
recoumended.
ARESCO
314 Second Ave.
Haddon Heights,
4K version
mnemonics)
mnemonics)

NJ 08035
of FOCALfor $40, 2.5K assesrbler (nonstapdard
for $30, 6K assembler/text editor (standard
for $60. Send 92.00 for literature.

6502 PROGRAMEXCHANGE
2920 l{oana
Reno, Nevada 89509
4K FOCAL (FCL-65),. scientific
routine package (writren in
FOCAL), games and general software for 6500 systems using
the KIM and TIM monitors.
Send $0.50 for program list.
THE COMPUTERIST
P.O. Box 3
S. Chelmsford, MA OL824
High quality software.
PLEASEgame package fot KIM-I:
(cassette).
HELP
text editors and word processing
$10.00
programs-send for description-$15.00
per cassette.
MICROCHESSChess playing program for KIM-L: $15.00.
PYRAMID DATA SYSTEMS
6 Terrace Avenue
New Egypt, NJ 08533
rrXIMil extended I/O nonitor package
for KIM (requires
than lK of memory) $12 for manual and cassette.

more

MICRO-h7ARE
LTD.
27 Firstbrooke Road
Toronto, Ontario
Canada M4E 2L2
Assembler, dissassembler, and text editor for 6502 with
4K memory. Manual and KIM cassette: $25, source listing:
$eS. Well documented.
IGnneth I.l. Ensele
1337 Foster Rd.
Napa, CA 94558
Source for Tom Pittnans 2K TINY BASIC on KIM cagsette.
Specify st,artlng address $0200 or $2000. $9.50 for
tape plus $1.00 handltng and postage.
F-1

oPa
P .O. B o x 3 1 1
Argonne, IL
60439
THE FIRST BOOKOF KIM by Stan Ockers, Jim Butterfield,
and
Eric Rehnke. The book includes a beginners guide to KIM,
several tutorials
on hooking things up to KIM, and a large
number of game and utility
type programs.
180 pages,
8 Ll2 X 11 fornat: $9.00 plus $0.50 postage.
Johnson Comput.er
P.O. Box 523
DIedlna, Ohio
44258
4.5K assembler/text
editor
for current information.

T- 2

and other

65O2 sof&rare.

I,Irite

6500 MICROPROCESSOR
SUPPLIERS
MOSTechnology
950 Rittenhouse Rd.
Norristown, pA 19401
Rockwell Microelectronic
P. O. Box 3669
Anaheim, CA 92903

(2L5) 666_1950
Devices

Synertek
3050 Coronado Dr.
Santa C1ara, CA 95051

eL4)

632_3729

(40g) 9g4_g900

6500 BASEDMICROCOMPTIfER
SIIPPLIERS
Apple Computer Inc.
20863 Stevens Creek Blvd.
Bldg. B3-C
Cupertino, CA 950L4

(40g) 996_1010

Coumodore Business Machines

901 California Ave.
Palo Alto, CA 94304

(4L5) 326-4000

ECD Corp.
196 Broadway
Cambridge, I,rA A2L39
Ohio Scientific
LI679 Hayden
Hiram, Ohio

(6tt1

44234

F -3

66L-440O

NorJ\fwrro,{ldrtrcldtrLlgJsurvdsNnS'o

0 xtoNlrddv

6530 TIi'J E R T L ' NCT I O I . I SA ND P RO F E RT I E S

A . T I }'IE -OUT FLA G A ND i NT f RRUF T E } { A B L E RE GI S T E R,
t.

A LL I^JRITE0P E RA T I O I . I 9T D T HE CO ' J NT E RT 0 UCH T HE I NT E R R U P T

E NA B LE RT$1S TE R (A L ' T T RE S tSs iT 3 , T HE , 8 , B I T , I S CO PI E D I N T O
THE I NTF-'II?LJPETNA B L . ERE GI S T E R) .

?.

A LL RE A D T}P E RA T I O |" ICI

: : . i T HE CO UNT E R(E V E H A DDRE S S E S iT O U C H
TI{E I NTE RRUP TE I.. iT iB i-E
RE Gi S T E R.

3.

A LL RE A D OP E RA T I S I { SO N T HE T I |, 1 E -O UTF L A G (O DD A DDRES S E S }
LE A V E THE lI.{TE FT RUPETI . { A g L ERE G I S T E R UNT O UCHE D.

4.

A FTE R COI'IP LEiTOii O F T I I . { E _ O UT .F L A G RE A D O P E RA TI O NS O O H O T

CLE A R THE TiI'iE _OU' TF L A G .

5,

A FTE R COh,IFLEi Oi'

T ; A F T i I ' ! E -I J UT , C{ J L J I . I T EERE A D O P E R* Ti O N S C L E A R T H E
T I bIE -OUT FLA G.

6.

A LL COUI..ITEUR
R I TE O P E Rf iTI O HS CL E f iR T HE T I ME -O UT F L A G .

B. PRE -S CA LE R B IT$'
1.

P |?E -S CA LE RB ITS A RE T 0 UCHE Do t ' lL Y E Y I I RI T E O P E RA T I 0 I ' | g

(A DDI?E S StsITS @ A NO I , T HE ' T ' A T J D' Z ' B I T S , A RE CO P i E D I N T O
THE P RE -S CiILE RRE G I S T E R).

?.

THE C0UNTE RCA I'{ EE L O A I , E D A T A L L A DDRE S S E SF RO t t L 7 @ 4 - L 7 A V A N D

FROM T7T\C.T76F, B UT I T CA |. {B E RE A ' I O I . ' I -YA T T HE E V E H A S O R E S S E.S

3.

THE TIME -OUT FLA G C, I F I B E RE A F O I . I L -/A T $ 0 9 f , X DE E S 1 J ESS

; UCH
RE A D 0P E HA TIC'NSAL I ^ lf t Y SRE T URI ' E
I I ' |HE R 3 6 0 R A A t HE X ).
|

C 0NSEGUE NCE2S
1.
?.

o P E li: A T i 0 H .
' rrRI T E
E NA B LI NG THE I HTE RP ' " I P TP E CI U
i P E S f 1 ld RI T E 0 P E RRTi 0 N A T A D i l R E S S E S
L7OC,_1.7@F,
F
E
A
'
,
OH A
O P E F : A T I O IA
{ T E I T HE R L 7 A C, O R t , 7 b E .
S E TTII'{G TljE P RE -S CA L E RE iT S RE 0 UI RE S A

3.

DIS A B LJNG THT II{T E RP UP T RE A UI RE $ A I ^ I RI T E O F E I ? A T I O I .AT

I ABDRESSES
t7a4-i7a7,
0R A R E A ! 0 F E RA T i0 N A 1 ' T I T HE R r7 ' , + 4 0 R t 7 6 8 .

4.

A LL TRA |.I;:A CTI0N SA T E V E t . lT I DDRE S S E CL

S E a { RT HE T I h I E -0 U T F L A G
IF IT HA P P E I.{IDTO g E r-I E T .

G -1

(\.)

rl

EXPER
IT4ENT
I NTERRUPT
@a 6 0
@A O E
ooo5
6 @0 7
g , @O A
OOOD
0o6F
A @f t .
OO15
@0 1 6
@o 7 ?
aa19
OO1B
OO1D
AO1F
6IA?A
bq??
g @? 4
80A6
OOE8
807.f1
OO?B
eo?D
Oq?F
@9 3 1
QO34
@0 3 6
OO38

A9
8D
A9
8D
8D
Ag
8D
8D
58
F8
A9
85
85
85
38
AA
85
69
95
90
E8
DO
A9
85
EO
C6
DA
FO

4g
FE
oo
FF
C I3
FF
6t
6F

L7
1 .7
1"7
L7 ,
L7

0g
F9
FA
FB
FD
I--C
00
FC
03
F5
?0
80
1F
80
F9
E5

LF

L DA# g40
S TAE fi1"7F8
.
LDA* g.CIo
S TA@FLTFF" --.) IRO VECTORINSTALLED
J
PORTB INPUT
S TAS fiX.703
}
L DA* $FF
,
t^,,t'',s
poRt A oUTPUT
S TA@#1.7OtJ
* '* i '
n
S TAB *DAF ' e*- - *' *9TARTUP TIMER 1pi{ i"'r
C LI
ENABLEINTERRUFTS
sED
DECIMALM ODE
L DA{ I $00
S THZ $F9
S TAZ SFA
S TAZ $FB.
ZEROOUT DISFLAY DIGITS
S TC
USE CARRYTO DO THE IN C R EM EN T
NOTEIIRAP- AROUND
INDE XIN G
L DX$ $FD
L DAZX $FC
TO GET TO LOEATI ON F9 F I R ST
A DCS*AO
S TqZY,$FC
I,JRITEBACK UPDATED
DIG IT PAIR
B CC SO3
FALL OUT IF NO CARRY - OU T
IJPDATEI NDEX I F NEEDBE
I NX
FALL OUT IF ALL DIGIT S D ON E
S NE $F5
L DA' $' $e6
S TAZ #BA
USE LOC. 8CI AS DISFLAY LOOPC T R ,
JSR@$lF1F
EALL TO DISPLAY DITIITS
CoUNTD0tdt'DISpLAY
t
CA LLS
trfcz SB0
E NE $F9
DO ANOTHER
DISPLAY CA LL
E EO f E5
UPDATEDI SPLAY CONTEI'IT S

,
N O t dT H E I N T E R R U F T -D
IV
RE N P R' ) GRAhl
@O 4 O
a6+1
O @4 4
OO 4 5
OO 4 6
CI048
OO 4 A
Ot ) 4 0
O O SO
-fJO51

48
nD
OA
AA
DA
A9
8D
EE
68
40

02

t7

OA
FF
q F fi
Oq T ,7

F HA
L DAo #t702
A SL A
A gL A
B NE $OA
L D AS $FF
5 T NE $X7OF
I N ';@#i7A@
PLA
R TI

SAVE ACCUIdULNTOR
GET Sh|ITCHES
SHIFT UF
TIdICE
iF fiLL $I^' ITUHES
ARE ZE R O
USE $FF FOR DEFAULT
RESTARTTIM ER
UPDATEPORTA
RITRI EVE ACCUbIULATOR
RETURNFRO} ' I NTENRUF T

N O T ES :
1.

GR 0 U N D IN G
S IAITf C H E SLr ILL SPEEDUP THE UPDATES0N P0RT A.

?,

L OC A T IONOOA EC OI,{ TROLS

THE COUNTING
RATE ON THE DIGIT D ISPLAY.

G-2

I.]ON CiIART
CODECO|'IPAN
DECII-{AL

,+-BIT
I]INARX

SIGN AI'ID 5-BIT

I"L\GNI'I'UDB
OFF'SET
(*=o
BINARY

ls COl,lPL.2s COF{P. 5-BIT

GRAY
BINARY
I]INAITY

_ = 1)

T5

I 111

o 1111

1 1 1 1 1.

O 1111

o 1111

14

1 110

1 1 r. 1 0

0 1110

o 1110

r)

1101

o 1110
o 1101

o1000
o1001

1 1101

0 1101

o 1101

o1011

L2-

1100

1 1100

0 1100

o 1100

11

1011

o '1 1 0 0
o 1011

1 L011

0 1011

o 1011

10

101o

o 1010

1 1010

0 1010

o r,o10

o1010
01110
01111.

1001

o 1001

1 1001

0 1001

o 1001

olto1

1000

o 1000

1 1000

0 10oo

o 1000

01100

0111

1 0111

0 0111

o 0111

00100

0110

o 0111
o 0110

1 0110

0 0110

0 0110

00101

0101

0 0101

1 010r.

0 0101

0 0L01

00111

I+

o 0100

1 0100

0 0100

0 0100

00110.

0 0011

t 0010

0 @10

1 0001

0 0@1

oooo

o
o
o
o

-1

o ool_t
o oo10
o oool
o ooco
1 0co1

L 001L

o100
oo11
oo10
oool

o 1111

1 11tO

1'11L1

10000

-?.

1 0010

o 1110

1 1101

L 1110

10001

-3

L 0011"

0 1101

1 1100

1 1101

10011

-l+

1 0100

0 1100

1 L011

L 1100

10010

-5
-6
-7
-B

1 0101

o 1011

1 1010

1 1011

10110

1 0110

0 1010

I 1001

r 1010

10111

1 0111

0 1001

1 1000

1 1001

10101

1 1000

0 1000

1 0111

I 1000

10100

1 1001

0 0111

1 0110

L 0111

11100

1 1010

0 0110

1 0101

1 01.10

11101

1 1011

o 0101

L 0100

1 0L01

11111

-12
-1,3

1 1100

o 0100

1 0011

1 0100

11 1 1 0

1 1101

0 0011

1 0010

1 0011

11010

- 1l}

1 1L10

0 00to

I 0001

1 0010

11011

-1 5
-1 6

1111.1

o 0001

1 0000

1 0001

11001

1 0000

11000

3
2

-9
-10
-1 1

loooo?ffi

o 0000

oo11
oo10
oool
oooo

00010
ooo11

ooool
ooooo

Offsct blnary and 2s corngrlement

dlffer only ln the slafc of ihe slgn blt,.
Cray code ls not vrclght,t:c1;it can only be converLed info a binary blf s[ring,
whlch must Lhen be fur.t,hcr lnternrcLed.

OVBRFLOI{AND I.NDER}'Lo}Il'tITI{ SIGIIUDARITill'tL'tIC

For the purpose at hand wc w-i}l use a 3-bit binary adder which rvill
accept a pair of 3-bit lnputs (the addends) to fornr a i,-bit output by
("unsi-gncd't) bj.nary addition.

the rules of strai6ht

1O bits

nnaking up the inputs

signal,

v;hich is the carry lnto the leftnost

and the output,

In additlon to the

we uiIl

define one more.

position

bit

of the addends:

Az
+2L=+2

+2o=+L

Bz
+20

ilHH

EH i l i l

To keep a running count of overflow and underflor.l el.ents rve ui1l

need

one more reglster,

here also shown as 3 bits vride. Because spill-ouL from

the adder may have a ueight of +l+ or -4 (overflow or underflpw), it vrill.
be convenient to assign a weight of lr to M2r a;:d to treat

the contents

of l'l as another sigtred nunber which may 'oe i-ncremented or decrernented

by the sar:readd/subtract

strate$r

bit

are shovn Ln the diagran;

welghts for

all

bits

we ti-I}

devclop for A, B, and S. The

they corlespond to

the standard convention for tvro's conplenent signed integers.

exarnples be3-ow,the bit

locations

In the

and fonnats rti.ll be as shovm above,

but the bit

weights r,,'i11 not be shown,

Two factors

may be held accountable for most of the confuslon around

signed arithmeti,c:
1. The term l.'lSB(rnost significant

b'it) is often used rn{.th an irnpliclt

convention which may assign the name l,tSBto either

a h'ord. fn recognitlon of this,

we will

bit

O or bit

noL use the term l{SB here.

2. The signals Ln the o corunn may have either

a positive

rvei6ht (c.-)

or a neEativc weight (Aor Bo). Thc adder nakes no such airiir.iill;

the lnterpretation

of bits as weighted nurnhorsfs stri"cLly ourBr

6 -{

1 of

sig,rredaritltnctic

p. 2

Having recognized fhc sources of confusion, lef us attennpt to create

some order by inspecting all possible conbinations of sign bits and
carry-in signals:
A.

Cir,=O;

A o=Oi

Bo =Q

OOO
B.

O 1 O

+2

Addition

O01

+1

n u mb e rs .

O11

+3

No o v e rf lo lt , n o u n d e rf lo w

A o -0;

Bo=1

(o rA o = 1 ;

O 1 0

+2

Addition

1 O 1

'3

ne3ati're number, result

111

-1

lilo o v e rf lo x , n o u n c ie rf lo ri

Cirr=O;

of tr,'o snalL posiii_ve

Bo=O)

000
C.

C.-=O;
Lno

000

A o=1;

-3

Acid:ition of tuo negative nuslbers.

11O

-2

Un d e rf lo w

011

-5

Co h a s a we ig h t o f

111

Cirr=1;

negative.

1 O 1

is reCistributed

111

and a

Bo=1

111

D.

of a rosi-tive

A o=O;

2 x -l+ ,

rr' hi c h

Lo 14, a,rd So

-L + -1
Bo=0

000

0 01
B.

Cin=1;

0 1 1

+3

Addition of tuo positive

OO1

+1

O v e rf lo w

100

+t+

S o a s f o rme d . h a s a rie ig h t o f

000

+4+0

v rh j-c h is mo v e d t o M,

A o=O;

Bo=1

(o rA o = 1 ;

nunbers.
+ !. ,

Bo=O)

0 00

O 1 O

t'?.

Adrji.l;lon of

110

-2

nurnber.

OOO

.!_q

a positj-ve

ancl a negaLive

llo o v e rf lo ' , v , n o u n d e rf lo w
llote that the weigtrt of Co is zeroi
Co is pro<iucr:dby t'addllion" of C.r,

p. 3

signed arithmetic

l,i.th rveight +lr and Bo tdt'h weight -4.

Ao = 1i

Cir, = 1;

F.

Bo = 1

0OO

1 i. O

-2

AdCition of ti*o small negative

111

-1

n u , ' n b e rs .

101

-3

No u n d e rf lo v t rn o o v e rf lo w
Again Cr* neutralizes
sign bits.

one of the

The o+,her sign bit

re:pPears as 5o.
fn sumnary:
1.

If

is produced, but no carry-out

carry-in

1s generated, theri

overflotv has occurred.

2.

If

is procluced 'vrithout help from a carry-in,

a carry-out

then

underfLow occurred.
3.

If

no earries

are generated, neit,her overilool nor underflot* occurred.

l+.

ff

a carry-in

produces a carry-out,

this

of the posj-tive lveight of the carry-in

one of the si-gn bits,
5.

operations.

by the negative i+eight of

I{either overflow nor urjderflou has occurred.

l.lhenever overflovl or underflor.r oecus,

to ma}:e S suitable

annountsto neutralization

So must be compLernented,

as input to the adder for further

Co,rr=0, M must

Cooi=l, l4 must be decrenented; if

If

arifhmetic

be incremented.
fn logical

terms, spill-out

the spilI-ouf
l'ihen all

is given b/ Co,rt,

additions

have been rnade, we should combine the spill-out

counter with the S legister

the. end result

can be deteeted as Crr, 0 Corrt, The slgn of

to make a double-length bit

of the spll1-oub
into posifions

renresenting

in tr.rors conplernen| format" llorv there are !t,,'o bit

with an acsolute treight of 4; the lor,r-oz'der sign bit,

the vacafed bit

string

counter, l'{r. These tvro bits

position

must be climinated

corresponcling to their

positions

So, and the LSB

rnust be cornblned, and then

to shift

ihe high order bits

assigned weight,

slrll{s 3cNlrulrJlu
lu.
H Xl0NSddv

TTL REFEREI'ICESHXET #1

7402

7474
!Bl

FUI\ICTIONTABLE

LH XX

HL

H LXX

LH

LLXX
H H T II

HL

lr u
t..ilil

hh

LH

7490 DECADECOT'NTER

i
|

i
I

2!
.j r-

ooq

H H LX

ill
lr!
lf\

2q

:rF

oo

H H IL

7408

lcx

G"I Gi' 1-r5

OUTPU'S

INPUTS
PR ESET C LEAR C LO C X

7t+04

!!t
il

I
i

7432
II I J _ r l-

'.I_
---.

t7
lL

I
I

6CD COUNT SEOUNCE

(S.. t{otc Al

8095 TRI-STATE BUFFER

Gz

ya

16

15

COUIYT
Oo

Qc

Oa

IASLE

FESE',/COUN''RUTH

OUTPU'
R0(il

Oa

R ESTT N PU T S

O U rp U r

Ror2l

Q6

i
R9{',il F9{21 Q6

LLLL

LLLH

LLHL

t{

LLHH

X
L

LLLI
LLLL
HLLH
COUNT
COUNT
COUNT

COUNT

LHLL

LHLH

LHHL

LHHI{

HLLL

r.r

r,{

74L38

1-OF-8 DECODER

INPUTS

EN AELE
GI
XH

INPUTS

oo

OG
L

Ll{

HL

X
H'
qt

OUTPUTS

os

60

high laval, L - low lavat. X

irrrlavrnr
- thr level ol O bato.! th. high-tg.low rr.6.ltion

06

0
I

G?'

OUTPU'S

SELEC T
Yl

Y2

c 8A

YO

xxx
xxx

HHHHHHI{H
HHHHHHHH

LX
| tL

LLL

LHHI.IHH}IH

HL

LI.H

HLHHHHHH

HL
HL
HL

LHL

HTILHTIHHH

LHH

HHHLHIIHH

HLL

IIHHHLHHH

HT

IILH

IIHHHHLHH

HL

HHL

HHHHHHLH

HL

HHH

HHHHHHHI

ol G

.Gt- G ?A.G r E

Y3

Y4

Y5

Y6

Y7

Oa

TTL REFERENCE
SHEET#2
74148 PRIORITY E.NCODER
74L53 MUI.TIPI"EXER
-^-

Gno

sTqoBf :E
IG sLct

oa?a rttuts

TAALE

FUilCTTOil
SELEC"

sTnoSE ouTn r

OATA I'I?I'TS

INPUTS

!trrgtt

DArA lN?lrls

A
stRcgf
vcc
lG stlEcr

co

ct

cil

c:l

x
x
x
x
x

x
x
x
x

L
L

L
H

*l

idgur!
S.rH
hi$ fi.f,
H
-

x
x
x
x
x
x

tl

x
x
x
x
x
x
x

x
x

x
x

lo bolh
c066on
A afrd La
i.rdffi
X'
ld
lst,
t
-

tatalrtaraa

L
L

outrur3

$tPt Ts
H

EI

xx

A2

AI

AO

(;:3

t{

l"l

ll

tl

HH

tl

xx
xx
xx
xx
xx
xx

x
x
x
x
x

x
x
x
x

x
x
x

l{

XL

L
L
L

tt

clisr

ll

L
il

|l

lt

t{
t{
t{
H
H

DUAL PERIPI1ERATDRTVERS 300 trA'' 20 V

rtt

tt

7545L

75453

75452

RS-232C- rTL CoTWERTERS

REI"AY DRTVERS

+v

75454

-v

.d l r r d q a
- r .d 6 r a a

d r yl d
DC

DS3686

DS36E7

L489

1488

L
L
L
L

tl
x

H
X

!!

st3ltHsA0010NHc3r
SoH
I xtoNtddv

PRELIifiIIUABY

OATA

H
moa

SHEET

TE Gf{X OLOOY . t X C.

MAY. 19?6

vAtltv foncE co8ponArECEtrtR {21t|$6.rtt0

pA. t9a0t
950BrTTtlfi0usR0A0.ftonRtsTowil.

MC$6500
iilCROPF0CE||So
BS
TheMC$6500,Microprocesor
FamilyConcept
--The l-1CS6500
Series Microprocessors represent the first totally software compatible
r nic r o p ro c e s s o r fa n i l y .
T h i s f ani Ty of products i ncl udes a range of softw arL com pat ible
m ic r o p ro c e s s o rs w h i c h p ro v i d e a sel ecti bn of addressabl e nenory range, i nterrupt input
oP t io n s a n d o n -c h i p c l o c k o s s c i l l ators and dri vers.
A l l of the mi croprocessors in t he
II{CS6500
grouP are software cornpatibl.e within the group and are bus compatible with the
M 680 0p ro d u c t o ffe ri n g .
T he f a mi l y i n c l u d e s fi v e m i c ro processors w i th on-board cl ock osci l Lators and dri v er s
and f o u r m i c ro p ro c e s s o rs d ri v e n by external cl ocks. The on-chi p cl ock versi ons a r e
ained a t h i g h p e rfo rma n c e , l o w cost appl i cati ons w here si ngl e phase i nputs, crysr al
ur . ' RU rrrp u L s p rl u v i r.-l eL l re L i u re base. The er.ternal cl ocl : versi ons arc geared for the
nult i p ro c e s s o r s y s te m a p p l i c a ti ons w here naxi num ti ni ng control i s mandatory. All
v er s io n s o f th e m i c ro p ro c e s s o rs are avai l abl e i n 1 MH z and 2 MH z (" A t' suffi x
on product numbers) rnaxinun operating frequencies.

of theMCS6500
Features
Family
S ingl e fi v e v o l t s u p p l y
N c ha n n e l , s i l i c o n
g a te , d eplet io n
l o a d te c h n o l o g y
E ight b i t p a ra l 1 e 1 p ro c e s s i ng
56 I n s tru c ti o n s
Deciural and binary arithmetic
T hir t e e n a d d re s s i n g m o d e s
True indxing capability
Progranmable stack pointer
V ar lab l e l e n g th s ta c k
I nt er r u p t
c a p a b l l i ty
Non-maskable interrupt
Use with any type or speed memory
B i- dire c ti o n a l
D a ta B u s

Instructi on
decodi ng and control
Addressable memory range of up to
65K bytes
"Ready" input
Direct memory. acce.ss capabillty
Bus compatible with MC6800
C hoi ce of external or on-board cl oc ks
IJl{dz and 2tl}lz operation
On-the-chl.p cLock optlcns
* External elngle clock input
* RC time base input
* Cryetal tine base lnput
40 and 28 pln, package veraions
P i pel i ne archi tecture

Members
of the Family

Microprocessors with
On-BoardClock 0sci1 lator

Microprocessors with
External Two Phase
Clock Input

MCS6s02

|- ucsosrz

MCS6s03

l-"rrur*

I
f-r'rcsosr+

MCS6s04
MCS6505

I
l- ucsosrs

MCS6s06
L 1 -l

on the DataSheet
Comments

to review first
the basic "Comnon Characteristics"
- th o se
Th e da ta sheet is c ons t r uc t ed
Subsequent to a
whic h ar e c om m on t o t he g e n e r a l f a m i l y o f m i c r o p r o c e s s o r s .
fea ture s
wl1l be sections devoted to each member of the group
c har ac t er is t ic s
review of t he f anily
of eac h.
f eat ur es
with sp ecif ic

COMMO
N CHAHACTERISTICS

.-

CONTROL SECTION

RgctsT[RsEcTtoN

Pg

rtrq rta

ABO

A8 |

AB2

ABJ

A8,l

AB5
IN5TRUCTION
DECODE
A86

A8?
ADDRESS
BUS
AB'I

A I}.,

grrrrrI

A 810

e r {t n r

MC S 6512,13,14.15

ABI I

aroa* I
MC S 6502,3,4,s ,r
rNPr.r
J

A8t2

f1 oUr
ABI]

fi:-

ABI4

ABI 5

DB'
D BI
DA2
oB3
D84
D B'
lr86
D61

fl =,,,,,,n,
|

= r nr r r - r r ir

No te : l. Clo ck (l enerator i s not i ncl uded on MC S 6512'13'l 4,l S

2 . Ad d r e ssi ngC apabi l i ty and control opl i ons vary w i th each
o f th e Mcs6500 P roducts.

re
Arehitectu
| nternal
MC56500

'1,.1-2

OATA
8US

HISTICS
COMMON
G}IARACTE

INSTRUCTION
SET_ ATPHABETIC
SEOUEHCE
ADC
AN!)
ASL

Add HeBrry io Accumulator plr.h Carry

"iL\u" Mcnrrry with Accumulnt(,r
Slrlf!
Ieft On B1t (Memort or Accumulstor)

DIC
oEX
DIY

ECC
BCS
BEQ
Btl
BMI
8NF:
lrPt.
BRK
BVC
8VS

Ilrdurll
granch

on Cdrry C I ear
0n C arry set
lirdnch o0 R esui! Zero
Test IJ.its in }{ercrt wlth Accumulncor
Branch on Result Hlnus
Br,rDch on R esult not Zero
Brailclr oo Result Plus
Forcc Break
Erench on overflou
C1(ar
IJLdnch un Overflou
S(t

UOR "lixc1!sive-or'r

CLC
C!-D
CLI
C,,V
CMP
CPX
CPI

Ciear
Clear
Clear
(llear

Carry FlaS
DeciMl
Hode
Interrupt
D.isable 8i.t
Overflou
llag
Conpare Hemcrt and AccuDulator
Conpar(' !lem(,r! rnd lndx X
Cohpare ilemry
and lndex Y

Decrenent
Decrehent
Dcrenenl

ln_C Increnent
Ir_X Incranenc
Il{Y Incremett

lretury by Ooe
Index X by one
lndex Y by One
Menory rith

?LP
ROL

Rotste

Otrc Blt

ROR

Rotate
Retulo
Return

Gre Bit Righ? {Venor)'

floD Inlerrupt
fron Subrou!lne

Accuhulatot

Menory by 01e
Index X by 0n
Inde}: Y hy One

{Tt

RTS

s8c

JMP
JSR

Junp to Neu Locatton

Jump !o Nea Locatlon

LDA
LDX
LDY
LSR

Lo6d Accunulator
uith Memory
Load Indea X wlth Mercr)'
Load Index Y sith llemort
Shift ooe 8ir Rlghr (Itercry or Accwulator)

liOP

lio operatlon

Savlng

on S:ack
Acc@ulator
Proceasg! Status on Scack
froh stack
Acc@slator
Proceesor Status fron Stack

Pusb
Puah
Pull
Pull

FHA
PHP

Relurn

Address

STA
STY

Accuulator

rxA
TXS

(Ue@ry

or
or

Accuelator)
Accuhulator}

Mesory flcm -Accunuletoillth

Ssbtract
set Csrry FIag
set Decl@t Uode
Dl.sable ststs
set IntefruPt
Store Accumulator ln He@rY
Slore Index X la MehorY
lodct
Y ln ltemrt
Stole

TAX Transfer
TAY trrnafer

oF.A "OR Menory elth

L.f!

Tlaasfer
franfer
TranEfer
Trsafer

!u fndet x
Accmulalor
to lndex Y
Accaslator
to Index x
Stack Polnter
Index X to AccuNlator
Indcx X to Stack Polnter
lnd.a Y to Accdqlator

MODES
ADORESSIilG
A u c U ! 4 U L A TUlt
ADDRESSING
o f a ddres6i ng l s repreaenred w l th
- lh ls.fo r m
op e r a lio n o n th e a ccu m u la to r ,

a one byte l natructl on'

IMMEDIATEADDRESSING- In lmredlate sddresslng,

the operand 1s confalned
uith n o fu r th e r m e n o r y a d d r e ssl ng requi red.

ln

l rnpl ytng an

the second byte of ghe instructloR'

ABSOLUTE
apecl fl es the l ght 1o* ordc r
A DDRESSINC
- In a b so lu te a d d r e s si ng, rhe second byte of the l nstruct{on
T hus ' th
blts o f th e e ffe ctlve
a d d r e ss nhLl e rhe thl rd byte epc{fl ee the el ght hl gh order bl tE .
eb so lu te a d d r e Be ln g m o d e a 1 lo ws acceeE to the entl re 65K bytee of addreaesbl e nemory.
zERo PACE ADDRESSING- The zero page lnstructlone
allord for ehorter code l.ld excstlon tlns
C areful
th e e e co n d b yte o f th e ln str u ctl on
and aseunl ng a zero htgh addreee byte.
pa g e ce n r e e u lt ln slg n iflca n t
l ncrease l -n code effi cl ency.

by only fetchtng
use of the z ero

INDEXEDZEROPAGE ADDRESSING- (X, Y indexlng) - Thls forur of addresalng 18 u6d ln conjunctton ttlth the lndex
eddrese i s eal c ul ated'
re g iste r a n d ls r e fe r r e d to a s "Zei o P age, X " orttzero P age, \".
The effectl ve
S l nce thl e l e a forn of "Zero P age"
by a d d ln g th e o e co n d b yte to the contenrs of the l ndex t.l l "t"r.
due to
A ddl tl onal l y
ad d r e se in g , th e e o n te n t o f th e second byce references a l ocagi on l n page zero.
che "Zero Page" addreesing nature of this node, no carry la edded to the hlgh order I blts of ntet:ory
a n d cr o se ln g o f p a g e b o u n d a r le s doe6 not occur.
.
INDEXEDABSOLUTEADDRESSINC- (X, Y lndexing) - This form of addresslng lB used ln eorijuoction with X end Y
addre ae l s
ln d e x r e g le te r a n d ls r e fe r r e d to as rrA bsol ute, X rr, and "A baol ute, Y 'r, ?he effectl ve
formed by addlng the content.s of x or Y to the addrese contalned 1Ir the gecond and thlrd bytes of the
ln str u ce lo n .
T h ls m o d e a llo we the i .ndex reg{ster to concai n l he l ndex or count vaX uc and t he l nreff,e$clng and
structlon
to contaln the base address.
Thls type of Lndexlng a1lo!r8 any locetlon
th e in d e x to m o d i.fy m u ltip le ft el ds resul ti ng In reduced codl ng and executl on tl fte.
I H P L I E D A DDRESSING
- In th e lm p lie d a d d r eesl ng mode, the addresB contal nl ng
ln th e o p e r a tlo n co d e o f th e ln8tructl on,
R E L A T I V EA DDRESSING
- Re la tlve a d d r e sa ln g i s used onl y w i th
fo r th e co n d ltlo n a l
b r a n ch .

the operand 18 l npl l cl tl y

branch l nstructl ons

rnd asrabl l shes

ttl ted

a der tl ns t{ on

[Offlct't
sdded !o qhc contentd of
The second byte of the lnetruction
becones the operand rhlch la .n
The
th e lo we r e lg h t b lts o f th e p r ogran counter w hen the counter l s set at th next l ni tructf*fl "
r a n g e o f th e o ffse t 1 g - 1 2 8 Eo +L27 bytes from the next l nE tructl on,
I N D E X E DI N DIRECTADDRESSINC
the geeon d by te of
- In in d e xe d l ndi rect addresei ng (referred to as (Ind{rec!,X )),
'
Th a re8ul t
th e in str u ctlo n
is a d d e d to th e contents of the X l ndex regl ater,
dl rcardl ng the earry.
o f th ls a d d ltlo n p o ln cs to a h emory l ocal i on on page zero nhose contents l s tha Lol r ordcr el ght bl te
bltr
of the effective
address.
The next menory location in page zero contalns the high order ltht
o f th e e ffe ctlve
a d d r e ss.
Bo th nemory l ocatl ons specl fyl ng the hl .gh and l on order bytes of the
e ffe ctlve
a d d r e ss m u st b e 1 n p age zero.
(Indl rcg)rY ),
thc t.coad by t.
I N D I R E C T I NDEXEDADDRESSING
l ndexed addres8tng (referrcd to..
- In ln d lr e ct
p o ln ts to a $emory l ocatl on l n page zero.
of th e ln r tr u ctio n
thc contcnta of ghl s aql ory l oc atl on
ia a d d e d to th e co n i n t8 o f r h e Y l ndex regi srcr,
i he rerul t bol ng th6 l ol t order el tht bl tt of tha
effe ctlvc
r d d r e ss.
T h e ca r r y from thl s addl tl on 1g addrd to thc contcnta of th. naxt prS c ti ro
eddr.l r'
n.n o r y lo cr tio n ,
th e r a su lt b e lng the hl gh ordar el ght bl tr of thr rffctl vc
ABSOLUTEINDIRECT - The tccond byce of the inatrucrlon
contalna thc low ordrr Gttht bltc of r ttremory locatlon'
Th e h lg h o r d e r e lg h r b its o f r har memory l ocarl on l e contai ned l n the thl rd byte of the l nst ruc tLon'
addr.ee'
Th e co n ce n ts o f r f,e fu lly sp e clfl ed mernoryl ocatl on Ls the l ow order byte of the effectl ve
rddrcst rhl ch l s l oeded
Th e n e xt m e m o r y lo ca tlo n co n ta lns the hl gi order byte of thc cffectl ve
in to th e slxtce n b ltr o f th e p rogram counter.
1r ,

Eorroq

I c0MM0N UHARACTERTSTTCS
I
PHOGNAMMING
MOOET
PROCESSOASTATTJSf.ic

r--T-:-_l

ACCUMULATOR

r---;------l

INDEX REGISIER
I = RESUL; ZEBO

INDEX REGISTER

PROGFA[,?COUNTEB
8l

r.r_l+
lr
I I " Jl

IRO DIS,ABLE

]=DISASL

DECIM.AL I!4ODE

1= TRUE

BRK COMMAND

- .l

S-IACK FOJNTER

OVRFLOW

NTGATIVE

ltusrBusrlslu
sET- sp sODEs,
fxecution
Time"
Mennory
Requlrements
rNSttwTtdE

t
,t

i
;
t

f
TSX
it

YI

u)

aoo

rzr

Aoo 1 t c
Aoo,
lo

{!r

CAir Y

1 ro

N. rr pac6
r"
N

NOT,

touN06y

: s c F o s s {D

r: tFANch
occ!nt
to tAtuja raa
anANCH OCCUFS ?O OrraiF!r
'f
3OAfiOw

ri6!
4

A( r r 'u L ;i ^ i i r e
i{ir

. rr (

[ . 1 -8

r l r r \i t

''

\fi

rr, ! Y

B'i

--*_-J

r 40

Vaa
RDY
61( OUT)
I RO,
N.C,
ttMl

RES
e Z(OUTI

s.o.

oq(ltr)

rt

f9

N.C.
N. C.
R/W
0 Bo
o8r
o82
D8 5
DB4
o B5
DB6
DA7
a 8 t5
ABI4
AAr 3
ABI 2

20

2l

v3S

6!5

s Yl{ c
Vcc
480
A8l
482.

93?
ro
5l
il30

AB3
484
aa5
A8 6
a87
a8s
AB
AEtO
ABII

t6
t7

2a
24

* 65K Addressable Bytes of Memory

* mf Interrupr
't IRa Interrupt
* On-the-chip Clock
/ TTL Level Single Phase Inpur
/ RC Tlme Base Input
/ Crystal Time Base Input
?t SYNC Signal
(can be used for single instruction
executlon)
* RDY Signal
(can be used for single cycle
executlon)
x Two Phase Output Clock for
Tining of Supporr Chips

M CS650 2

Feafiresof il{C$6b02

R-3

t2

Vcr

227

m6'
NMI
Vc c
A BO
AB I
AA ?
A B3
A B4
A B5
A8 6
AB 7
A B8

425
5?4
623
722
821

rol
ill8

t2
t3
l4

O2(a0Tl
oq( lN)
R /W
080
DBI
DB2
o B3
D84
D85
D86
D ts 7
t7 A BI I
16 A B IO
A B9
l

MC S 6 5 0 3

* 4K Addressable Bytes of
Memory (A800-A'811)
* On-the-chlp

CLock

* EQ' tnterrupt
't m

Interrupt

* 8 Bit Bi-Dlrectional-

Data 8us

Featurss
ot [tCS6503

MGS6504
- 28 PinPackage
RE
Vss

Ir
l2

TFT 3
Vc c
AB O
AB I
A82
A B3
AB 4
A8 5
AB 6
A B7
A88
A89

6
7
I
9
lo
ll
12

t3
t4

?8
27
26
23
24
23

z2
2ll
201

rel
r8l

t7l
16l
t5l

MC S 6 3 0 4

o2@UTl
O O (lN,

R/W
080
DBI
oa2
083
DB4
DB5
o86
oa7
AB12
ABII
ABIO

* 8K Addressabl-e Bytes of
Memory (A800-A812)
* On-the-chip

Clock

* TEQ.rnterrupt
* 8 Btt Bl-Dlrectlonal Data

Featuruof MCS6504

ItlCS6505
- 28 PinPackage

RE

bZ@UTl
0 9 (l N )
R /V t
DBO
DBI
082
D83
D84
085
D B6
DB7
AB II
A8 to
489

Vss
RDY

rm

Vc c
A BO
A BI
A B2
483
A B4
A85
A86
A B7
A8 8

4K Addressable Bytes of
Memory (A800-A811)
On-the-chip Clock
TQ

rnterrupr

RDY Signal
8 Bit

Bi-Directional-

MCS 6505

Data Bus

of &tiG$$505
Features

ryqqq506
- 28 PinFackage
R ES
vs5
O r (O UT)

tRc
Vcc
AB O
ABI
A B2
AB 3
AB 4
A B5
486
AB7
AB 8

I
z
3
4
E

6
7
t

28
27
26
25
24
23
22
2l
2A
t9
t8
t..

t5

a2(aUTl
9o(lN)
R/w
0Bo

4K Addressable Bytes of
Memory [A800-A811]
0n-t he-chip Clock

DBI
082
DB3
D B4
D B5
D86
oa7
AB II
AB IO
/t B9

m0Interrupt
Trrrophases off
8 Bit

MCS 6506

Bi-Directional

Data Bus

sf MS$6506
Feetuyes

MCS65I1-40 PinPackage

6 5 K Addressa!:1eBytes of Memor,v

TN'E
Interrupt

mnInterrupt
RDY Signal
8 Bit

Bi-Directi"onal

Dat a Bus

SYNCSignal
Two phase input
Data Bus Enable
of MS$S51f
F*at$res

Lt- 10

MCS65|3
- 28PinPackage
Vss
A1

rF-o
ffii

Vcc
A80
AB I
AB ?
AB 3
A84
A85
A8 6
A A7
A B8

2
?

4
5
6
7
I
9

ro
tl
t2
,3
t4

28
27
26
?5
24
23
22
?l
20
l9
t8
t7
t6
t5

RES
A2
R /W
DBO
DBI
D82
o B3
D B4
D85
oB6
0 ts 7
A BI I
Ats IO
A99

4K Addressable Bytes of
Menory (A800-AB11l
* Tvo phase clock input
* TRQ Interrupt
* ffi

Interrupt

* B Bit Bi-Directional

MCS 65 | 3

Data

Features
of lbtCS65f3

ll,lg$0514
- 28 PinPackase
Vsg
A1

iRE
Vc c
ABO
ABI

AAz
AB3
A8 4
A85
AB6
AB 7
A B8
A A9

HE3

tza
227
3
425
524
6?3
722
azl
920
lo
l{
12
t3
t4

26

19
r8
t7
16
15

O2
R /W
080
DBI
D82
DB3
084
085
D B6
0 ts 7
AB Iz
AB II
AB IO

* 8K Addressable Bytes of
Mennory(A800-A812)
* T\+ophase clock input
* IIQ Interrupt
* 8 Bit Bi-DirectionaL Data Bus

of MC$65N4
Fcatures

M CS 65 t4

MCS6515
- 28PinFackage
Vs s
RDY
O1
I.FN
Vcc
A BO
ABI
ABE
A83
AB 4
A85

128
227
326
425
524
623
722
a2l
920
ro
il
t2
t3
14

19
t8
t7
t6
t5

RES
6Z
R /W
080
DBI
DA2
D B3
DB4
085
D86
087

4K Addressable Bytes of
Menory (A800-A811)
* Troophase cLock input
* TIQ Interrupt
* I Bit Bi*Directional

MCS 65r 5

of MC$6515
Fosturss
Il -11

Data Bus

TIMEtsASEGEf{EhnTIfiNffiF;ru$}g.r
OLCIrK
trl|CS6502

MC$6SSS,
M$$65SS
ry.g$gLff?,
ryf;$q504,

sYsTEil{
02
S Y S TF[,IC ,

0o (l N )

0: (ourl

fl cnvsrnl

r'Rvsrnl

MCS6502 Paralle! Mode Crystal Contrclled'Oscillator

MCS 65 03,4, 5, 6 Parailet Mode Crv stdl
Cont"clleC Osillator

SYST EM O ]

@ ,, ( l N )

O: (OUT)

MCS6502 Series Mode Crystal Contolled

Oscillator
MCS 65 A3_,4,5,6 S eries M ode Crystat
Controlled Oscillator

S Y S TE MOJ

SYSTF,M

0,' (l N )

0: (ouT)

MCS6502Time BaseGenerator_ RC Network

MC56503, lttcs6S04, MCS6S0S, M56506

Time BaseGeneration
RC Network

PROCIUCT

lBl&$
rtcl tB N o LooY.

not

ANiTOUNCEMETUT
BUU-ETtt

tltc.

v^rtEy FofiGtcoRpoRAT
ctxTER(2ll) 6c8.t9t0
tto RrrTtf,flousE
R0A0.flonnlsTor,t.pA. t9a0r

Ig?S
SEPTEMBEB,

MCE652OPERIPHERALADAPTER

9ESCRTPTTON
The MCS6520Peripheral Adapter is designed to solve a broad range of peripheral
control problens in the inplementation of microcomputer systerns. This device allows
a vety effective
trade-off
between software and hardware by providing significant
l{hen coupled with the power and
capability
and flexibility
in a low cost chip.
speed of the MCS6500family of rnicroprocessors, the MCS6520allows inplementation
of very conplex systems at a nininum overall
cost.
through two 8-bit bi-direcControl of peripheral devices is handled prinarily
tional ports.
Each of these lines can be prograrmed to act as either an input or
atr output.
ln addition,
four peripheral contnol/interrupt
input lines are provided.
these lines can be used to interrupt
the processor or for rhand-shakingrr data
between the processor and a peripheral device.

High perfornance replacenent for

Mot o ro I a,/AlrlI /liOSTE K/H i t ach i p e ri phe ral
adapter.
N channel, depletion
single +5V supply.
Completely Static
CttllS conqratible

load technology,

MCS652O

and TTL conpatible.

peripheral

control

lines.

Fully automatic ?thand-shake'r allows very

positive control of data transfers between
processor and peripheral devices.

f",,,

I I,ATAlus
MtcnoPnocEssoRs
I

Hcr6snx

?TIPIIEn^L
..
DEVTCES

1
|

OAPLAYS.ETC,
'RINTERg.

-r.r.o,

vss
PAg
PAl
PA2
PA3
PA4
PA5
PA6
PA7
PB9
PBI
PB2
PB3
PB4
P85
P86
P87

cBt
cB2

vcc
Sosic NC5653o

Intcl\<'(

Dioglaa

4A
39
38

5
6

36

34

I
9
l0

31

1t
ll

JU

72
13
14
15
l6
1'7

l8
TY

2A

LJ

28
aa
at

26
25
.,4

CA1
wnL

rm,-A
i RiiB
RSg
RSl
RES

D9
D1
D2
D3
D4
D5
D6
D7
02
CSi

csz
CSfi
R/ft'

SUMMARYOF MCS652O
OPERATION
See MOS TECHNOLOGY MicrocomputerHardwareManualfor detaileddescriptionof MCS6520operation.

cAl/CBt CONTROT_
cR4 tc_RB)
B it I

IRQA (IRQB)

Act i ve T r a - n si ti o n
o f In p u t Sig n a l*

Bi r 0

l":s::gPlqgg:E

n e g a tive

D i sabl e--renrai n

n e g a tive

E nabl e--goes l ow w hen brt 7 i n C R A (C R B ) i s

acti ve t.ransi ti on
of si gnal on C A I (C B l l

p o sitive

Oi sabl e--remai n

p o sitive

E nabl e--as

*Note:

Bit
^l tr r dl^>r
. ^1

7 o f CRA ( CRB) will

b e set to a l ogi c
T h is is jn d e p e n d e nt of the state

Bir 4

set

hi gh

expl ai ned

above

i by an acti ve transi ti on
of B i t 0 i n C R A (C R B ).

of

the C A _t

Bit 3

rRQA(lRQB)
Interrupt Output

Active T r a n siti on
o f In o u t Sicnal *

00 0

n e g a tlve

i )i sabl e--remai ns

00 1

n e g a tive

E nab1e--goes l ow w hen bi t 6 i n C R -A(C R B ) i s

acti ve transi ti on
of si gnal on C A 2 (C B 2)

0 t0

p o sitive

D i sabl e--renai ns

0 11

p o sitive

E nabl e--as

* Note :

Bit 6 of CRA iCRB) will b e set to a l ogi c

s ignal.
This is in d e p e n d e n t of thc state

Bit

hi gh
set

by

hi gh

expl ai ned

above

1 by an acri ve transi ti on
of B i t 3 i n C R A (C R B ).

of the C A 2 (C tsZ)

CAz OUTPUTMODES

CRA
Bit

by,

cA2lCBz II\|PUTMODES

CRA (CRB)
Bit 5

hi gh

Bit

Mo<ie

!:-:Jl:1:igl

Pu lse Ou tp u t

C A 2 goes l ow for one cycl e after

Thi s pul se can be used to si gnal
data w as taken.

M a n u a l Ou tp u t

C A 2 set

M a n u a l Ou tp u t

C A 2 set hi gh

"ila n d sh a ke "
o n Re a d

C A 2 i s set hi gh on an acti ve transi ti on

oF the C nl tl l rc rrupt
t'R ead A D ata"
i nput si gnal and set l ow by a mi croorocessor
operati on.
Thi s al l ow s posi ti ve
corl trol of data transfers
from the peri pheral
devi ce to the mi croprocessor.
a "R ead A D atari orrerati o n.
the peri .pheral devi ce that

l ow

CBz OUTPIJTMODES
CRB
Bit 5

Bit 4

Bit 3

t0 0

Mode
' r Ha n d sh a ke "
o n Wr itc

Il es cri pt i on
C B 2 i s set l ow on ni croprocess<.rr "l {ri te
B D atai l operati on
and
i s set hi gh by an acti ve transi ti on
of the C B I i nterrupt
i nput si gnal .
l hi s
al i ow s posi ti ve
control
of data trans fers
from the mi croprocessor
to the peri pherai
devi ce.

Pu l- se Ou tp u t

C B 2 goe.s l ow for
D ata[ opr:rati on.
devi ce i hat. data

M a n r r a l Ou tp u t

C B 2 set

l ow

M a r r u a l Ou tp u t

C B 2 set

hi gh

tn1

t.L'2

one cycl e after

a mi croprocessor',Wri te
ts
Thi ,s can be used to si gnal the 1;eri pheral
i s avai l abl e.

M AXIM UMRAT INGS

Ra tin .g

S ymbol

V al ue

su p p ly vo lta g e

V cc

-0-3 to +7,0

vdc

In p u t Vo lta g e

Vin

-0.3 to +7.0

V d.

o p e r a tin g

T4

T e n Pe r a tu r e Ra tr g e

Sto r a g e T e m Pe r a tu r e Ra n se

Trtg

U ni t

0 to +70

oC

-55 to +l s0

oc

Thi s devi ce contai ns ci rcu i try

to protect l he i nputs aga i ns t
danage due to hi gh stati c
vol tages, how ever, i t i s
advi sed that normal preca uti ons
bc taken to avoi d annl i cati on
of any vol tage hi ghei than
naxi mun rated vol tages to thi s
ci rcui t .

ST AT IC D.C. CHARACT ERIST ICS

(V C C = 5.0 V + 5%, V S S = 0, TA = 25oC unl ess otherw i se noted)
Characteri sti c
In p u t
In p u t
In p u t
In p u t
vin

S ymbol

Hig h Vo lta g c ( No r n a l Operati ng Level s)

L o w Vo lta g e ( No r m a I Operati ng Level s)
T h r e sh o ld Vo lta g e
L e a ka g e Cu r r e n t
= o to 5 .0 Vd c

Mi n
+2.0
-0.3
0.8

vtH
V IL
V tt
I It't

N0 T F :

Ne g a tive sig n in d ica te s

outw ard current

FIGU R E

1 _ R EAD

fl ow ,

TIM IN G

Max

vcc
+.8
2.0

'i H

+2.0

+ l0

pA d c

-100

-250

uA d c

_1.0

- 1.6

nA d c

IIL

vott
1A

+0.4

Vdc

IoH
-100 -t000
-1.0 -2.5

pA d c
mAdc

l0
500

mA dc
uAdc
mW
PF

IoL
l off
P9
ci n

1.6
-

1.0
2OO

IU

7.0
1A

C out

posi ti ve

l0

i ndi catcs.i nw ard

fl ow .

2.4 V
Oai6

2.4 V
Ortr Bur
0.4 v
2,4 v
o.a v
z,a v
cal
o.a v
2,4 V
aav

t.L3

Vdc

Vol

o.4 v

CA?
(ri."d Shrr.)

v dc
V dc
V dc

+2.5

C H AR AC TER ISTIC S

ca2
(Puts Out)

Uni t

pAdc
.1.0

R /l { ,R e s e a ,R S o,R S r,cso,csr,eS Z,cl r,c}t,o2

Irs t

T h r e e - Sta te ( Off Sr a te In p u t C urrent

( Vin - .: 0 .4 to 2 .4 Vd c, V6 6 = rnax) D 0-D 7,P B 9-?B 7,C B 2
_
In p u t Hig h Cu r r e n t
( .Yy1 = 2 .4 vd c)
pA [-pA 7,C A z
In p u t L o w Cu r r e n t
( vr l = 0 .4 Vd c)
P A 1-P A 7,C A }
Ou tp u t Hig h Vo lta g e
( VCC = m in , IL o a tl = - I0 0 p A dc)
Ou tp u t L o w Vo lta g e
IVCC = n in , llo a d = 1 .6 m Adc)
Ou tp u t Hig h Cu r r e n t ( So u r cin g)
( vo n = 2 .4 Vd c)
( VO = 1 .5 Vd c, th e cu r r e n t for dri vi ng other than
T T L , e .g ., Da r lin g to n B ase) p}g-pB 7.,C B 2
Ou tp u t L o w Cu r r e n t ( Sin kin g .l
( vo L = o - 4 Vd c)
Ou tp u t L e a ka g c Cu r r cn t { Uff Statc.)
I& a-A -,InaE
Po wcr Dissip a tio n
In p u t Ca p a cita n ce
( Vin - o , T A = 2 5 o c, f = i.0 Ml .tz)
D9 - D7, PA0 - qA 7,P B 4-P B 7,C A z,C B 2
R/ti,Re sct, kS0,R S l ,C S O,r;S l ,C S 2,
( ;AI ,CBI ,
Ou tp u t Ca p a ci ta n ce
'2
( Vin - 0 , T n = 2 5 o C, f = 1 .0 MH z)

Typ

l)F

FIGURE 2 - W F IT E T IM T N G C H AF AC T ER IST IC S

Addrss

o.4 v
2-a v
Rod/Write

o.4 v
2.4 V

oab

Bus

o.4 v
_

TPDw

_vcc_

30%
2.4 V

Priph6ral Data

o.4 v
2-4 V

cB2
(Pul* Outl

o.4 v
2.4 V
cBl
o.4 V

rnsz
?.1v

cB2
( Hand

Shrko)

o.4 v

A . C . C H A M CT ERIST ICS
Read Timing

Ch a r a cte r istics

( F ig u r e

.1, Lcadi ng

f30 pF and one TTL l oad)

Syrnbol M1n Typ

Ch a r a cte r r stics
transi ti on
D e l a y T i m e, Ad d r e ss va lid to En a b le p osi ti ve
tr a n sitio n
to D ata val i d on bus
D e l a y T i n e , En a b le p o sitive
Da ta Se tu p T in e
Peripheral
D a t a B u s Ho ld T in e
to C A 2 negati ve transi ti on
D e L a y T i m e , En a b le n e g a tive tr a n sitio n
to C A 2 posi ti ve
D e l a y T i n e , En a b le n e g a tive tr a n sitio n
transl tl on
R i s e a n d Fa ll T im e fo r CAI a n d CA2 in p ut si .gnal s
D e l a y T i m e fr o n CAI a ctivc tr a n sitio n
to C A 2 posi ti .ve transi ti on
R i s e a n d Fa ll T iin e fo r En a b le in p u t

Write

Timing

Ch a r a cte r istics

( F ig u r e

Max Unlc
-ns
395

ns

TnS t
tr,tf
TR S Z
trE ,tfE

-ns
1.0
1.0
1.0
2.0
25

us
us
us
us
us

Synbol M i n 't y p

Max Unit

TnfW
180
TE Oq
TP D S U 300
TH n
l0
'IC A .Z

2)

Cha r a ct e r i st i cs
E n a b l e P u l se Wid th
D e l a y T i r n e, Ad d r e ss va lid to En a b le p o si ti ve
transi ti on
D e l a y T i n e , Da ta va lid to En a b le n e g a tive transi ti on
D e l a y T i m e , Re a d /l{ r ' ite n e g a tive tr a n sition
to E nabl e posi ti ve
transition
D a t a B u s Ho ld T im e
D e l a y T i r n e , En a b le n e g a tj.ve tr a n sitio n
to P eri pherdl
D ata valici
D e I a y T i m e , En a b le n e g a tivc tr a n sitj.o n
to P eri pheral
D ata Valid,

(vcc - 30e,)
cMos
PA0- P A 7 ,C A z
Dela y 'lime, Enable pos it iv e t r ans it ion t o C B 2 n c g a t i v e t r a n s i t i o n
0e iay Tirn e, Per ipher al Dat a v alid t o CB z n e g a t i v e t r a n s i t i o n
Dela y Tine , Enable pos it iv e t r ans it ion t o C B 2 p o s i t i v e t r a n s i t i o n
Rise a nd Fall Tine f or CB. l and CB2 inpu t s i g n a l 5
De lay Timc, CBI ac t iv e t r ans it ion r a C8 2 p o s i t i v e t r a n s i t i o n

1.2-4

TF

Terw
Tosu
Twe
Ttll,l
TpOW
TCMOS
TCAI
TOC
TRSi
t1,tf
TRSZ

a.470
180
300
130

25

us

l t5

10

-ns
I 'o
2,O

us
us

I .0
1.5
1.0
I .0
2.0

lis
us
us
lrs
us

-ns

PBELIf,IIIUARY

rB&@ffi

xo a

r*c}|i l o l -(D ov,

OATA
SHEET

lr c.

ilARCH,tt73

vAu.EvfoRGcoffrofiATE
ccfirtF (2r51
66c-t9t0
t50 ElTTfr{}rousE
80A$, r088rsT0!Yfl.
PA. rtaSl

(MEMORY,I/0,
MCS653(!
TIMERARRAY}
The MCS6530is designed to operate in conjunction with the MCS650XMicroprocessor
Farnily.
It is comprised of a mask progranmable L024 x 8 ROM, a 64 x B static
Ml"t,
software
controlled B bit bi-directional
two
data ports allowing direct interfacing
between the microprocessor unit and peripheral devices, and a software programmable
interval
timer with interrupt,
capable of riming in various intervals
from
L co 262,L44 cLock periods.
x 8.bit bi*directional
D ata Bus for direct
with the microprocessor

communication

*1024x8ROM
x 64 x 8 static
* Two 8 bit

RAM

bi-directj-onal

daLa ports

* Two prograrunable I/O Peripheral

Timer

* Programmable Intervai

Timer Interrupt

* Peripheral

pins with

Direet

lnterface

Daca Dlrectlon

* Programmable Interval

* TTL & CMOScompatible peripheral

for

to peripherals

Regist.ers

lines

TranslsLor Drive Capabillty

* High Impedance Three-StaEe Data Pins

* Allows up to 7K contiguous bytes of ROMwith no external
P AO

DATA
C O NT RO L
R E GI S T E R
A

OATA
BUS
BUF F E R

P47

PERI PHE R A L
DATA B U F F E R

A O D R E SS
D E C OD ER

decoding

INTERVAL
TI ME R

P E R IP H E R A L
D A TA B U FFE R
B

C H IP
S E LE C T
R /W

A9 CSr CSz 02 R/W R.Fs

Figrrre
1. MCS6530Block0iagranr

MAXIMUMRATINGS

Supply Voltage

-. 3 ro + 7 . 0

I nput / O ut pu t

-.3

O per aLing
S t or age

Vo l ta g e

T e m p e ra tu re

Te m p e ra tu re

to +7.0

Range

Range

-55 to +150

A11 inputs contain protection circuitry

to prevent damage due to high
static charges. Care should be exercised to prevent unnecessary
application
of voltage outside the specification
range.

(VCC= 5.0v+ b%,VSS= 0v,T4 = 25'Cl

ELECTRICAL
CHARACTERISTICS
CHA RA CT ER IST IC
I nput

High

I nput

Low Vo l ta g e

STMBOL

VolLage

VtH

vrr.
rru

Vt' = VsS + 5v02, pB6*, pB5rr

rnput Leakage Currenti

A0-A9, RS., R/w, m,

_
Input Leakage Current for High Impedance StatE
(Three Stare)i VIH = .4v to 2,4v; D0-D7
Input High Currenr; VIN = 2.4v
PA6-PA7, PB6-PB7
Input Low Current; VIN = .4v
PAa-PA7, PBa-PB7
O ut put

rrs

out,pur LowCurrenr (Sinking); VoL .4vTHll:Eg

'
I nput

I nput

Capaci ta n c e

O ut put

C a p a c i ta n c e

Capa c i ta n c e

P ower Dis s ip a ti o n

r.3-2

IJNIT
\/
It

1.0

2.5

PA

t1 .0

r1 0 . 0

uA

-3 0 0 .
-1 . 0

UA
-1.6

MA

Vott

v
vss+2.4
VSS+1.5

1ot
rot
cctt

v s s + .4 v
-100
-3 . 0

-1000
-5 . 0

UA
UA

1.6

MA

30

pf

ctt't

10

pf

cout

10

pf

Po

*W hen pr og ra mme d a s a d d re s s p i n s
A 1l v alue s a re D .C . re a d i n g s

I'{N(.

vcc
v s s+ .4

vot

Output High Current (Sourcing);

vo[ a 2.4v (PAo-PA7,PB0-PB7,D0-D7)
I t.5v Available for other rhan TTL
(Darlingtons) (PL6,PB0)
Cloc k

-1 0 0 .

rri,

High Vo l ta g e

TYP.

vss+2.4
vsr-'3

rttt

vcc = MrN, rroao 1 -rooul(pA0-pL7,pBo-pBT

rDa-D7
ItOnn : -3 I',tA(pA0,pB6)
O ut puE Low V o l ta g e
V CC = M IN , IIOR O < 1 .6 MA

MIN .

500 1000

MW

ISTICS
WRITE TIMINGCHARACTER
CHARACTERISTIC

SYMBOLMIN. TYP. l,IAt(. I]NIT

Cioc k

Tcvc

Pe ri o d

Ris e

& Fal1

Times

TR, TF

Cloc k

Pu l s e

Wi d th

T\J

R/ W v al i d
A ddr es s

p o s i ti v e

b e fo re
valid

b e fo re

Dat . a B u s v a l i d

b e fo re

Data Bus Hold

p o s i ti v e

of

valid

NS

470

NS
NS

of

TACW

180

NS

TDCW

300

NS

10

NS

transi ti on

negati ve

25

180

cl ock

of

cl ock

THI{
a fte r

uS

TWCW

transi tj -on

n e g a ti ve

10

cl ock

Time

P er iphera l
d a ta
of c l o c k
P er ipher a l
of clock

tr ansi ti on

transi ti on

d a ta v a l i d
a fte r
negati ve
transi ti on
dri-ving
CMOS (Level=VCC-302)

TCPW

uS
uS

TCMOS

READTIMINGCHARACTER
ISTICS
CITAMCTERISTIC
R/ W v ali d
A ddr es s

p o s i -ti v e

b e fo re
valid

P er iphera l
of c lo c k

b e fo re

d a ta

Dat a B u s v a l i d
Data

SYI''IBOL MIN .

Bus Hold

valid

a fte r

tra nsi ti on

p o s i ti -v e
b e fo re

p o s i ti v e

cl ock

TWCR

180

NS

of

TACR

180

NS

transi ti on

TPCR

300

NS

of

TCDR

of

transj -ti on
posi ti ve

transi ti on

cl ock

cl ock

Tine

EQ (fttt.rval
Timer Interrupt)
valid
positive fransition
of clock

TYP. MAX" IJNIT

before

Loading = 30 pf + 1 TTL load for pAg-PA7, PB'-PB7

=130 pf + 1 TTL load for D0-D7

I.3-3

395

NS

THR

10

NS

TIC

200

NS

Tcyc

l*-"

CL O C K INP UT

Twcw
R/W

2 . 4V

o.8v

o.4v

Tncw
?.4 V

ADDRE
SS

o.4 v
THw
2 . 4V

D ATA BUS
o.4 v

Tcpw

Tocw

Vcc

- 3 0 o /"

2.4 V

PERIPHE RA L
DATA

o.4v

Tcuos
WHITETIMINGCHARACTERISTICS
Figure
2

CL O C K IN PUT

R/W
Twcn
T
AD D RE SS
Tpcn
PE R IPH ERA L
DATA

Tcon
2 .4 V

DATA BUS

o. 4v

PB7(TRO)

2 . 4V
o.4 v

B E A DT I MI NG
CHA RA CT E B I S T I CS
Figure3
t.3-4

INTERFACESIGIVALOESCRIPTION
( BES)
Eeset
a Logic "0" on the RES input will cause
During system initialization
This in turn will eause aLJ' I/O
IIO
registers.
four
of
all
a zeroLng
buses to act as inputs Ehus protecting external comPonents from possible damage
and erroneous data while the system i; being configured under software control'
Interrupt
The Data Bus Buffers are puE int-o an OFF-STATEdtttttg Reset'
The RES signal must be held
is disabled with the REF signal.
capability
low for at least one clock Period when reset is required'
Input Clock
The input clock is a system Phase Two clock which can be either a
Urr, > 2.4', or high level clock (VtL < 0'2.
low level g.lgck (Vtl .0.4.

Vr H= v " " l ' j ) .

Read/Write ( R /W )
The R/W signal is supplied by the nicroprocessor atray and is used to
control the transfer of data to and from the microProcessor atray and the
MCS6530. A high on Ehe R/I,I pin al1ows the processor to read (with proper
addressing) the data supplied by the MCS6530. A low on the n/W pin allows
a write (with proper addressing) to the MCS6530.
InterruptRequest(lRO)
This same pin'
The IRQ pin is an interrupt pin from the interval timer.
(PB7). When
pin
I/O
can be used as a peripheralif not used as an interrupt,
data directlon
by
the
used as an interrupE, the pin shouLd be set up as an i-nput
from
interrupt
an
The pin will be normally high with a low indicating
register.
if
colleccor-OR'd
the MCS6530. An external pull-up device is not required; however,
with other devices, the internal pullup may be omitted with a mask option'
0ata Bus ( D0-07)
data pins (D0-D7). These pins
The MCS6530has eighr bi-directional
connect to the systemt" a"ta lines and allow transfer of data to and from
The output buffers remain in the off state except
the microprocessor attay.
when a Read operation occurs.

P_egghelq!
DataPorts
[iaclt
't'l rtrMCS6530lras I6 yrlns av{rllablc for perlpheraL I/A operatlonc.
or
8n
lnpur
an
pln is lncllvldually e<.rftwareprogrammable to act as ellher
PB0-P87.
'l'he 16 plns are divlded lnto 2 B-bit ports' PAO-PA7and
ourpur.
pB5, PlJ6 and PB7 also have other uses which are dlecussed 1n later aectlone.
The pins are set up as an input by writing a "0" lnto the corresponding blt
A rrlrt inEo Che data dlrection reglster w111
of the data direction regi-ster.
Wtren in the input mode, the
cause its corresponding Uit to be an output.

r.3-5

per ipher al
o u tp u t b u ffe rs
a re i n the " 1" state and a pul l -up
devi ce acts a s
data l i nes.
On a R ead operati on,
les s E han o n e T T L l o a d to th e p eri pheral
pi n.
u n i t re a d s the peri pheral
W hen the peri .pheral
t he m ic r opro c e s s o r
fro m th e MC S 6530 i t recei ves data stored
dev ic e geL s i n fo rm a ti o n
i n the
T h e mj -c ro p ro c e s sor w i l l
dat a r egis te r.
read correct
i nformati on
i f the
per ipher al
lines
a re g re a te r
th an 2.0 vol ts
for a " 1" and l ess than 0.8
pi ns are al l TTL compati bl e.
P i ns P A O
f or a " 0 " a s th e p e ri p h e ra l v olt s
and P B O are a l s o c a p a b l e o f s o urci ng
3 na at 1.5v, thus maki ng then capable
of Dar lingt o n
d ri v e .

L ines(A 0- A 9)
Ad d r e ss
In addi ti on
to these 10, there i s the
T her e a re 1 0 a d d re s s p i n s .
The above pins,
A0-A9 and ROM SELECT, are always used as
ROM SELECT pin.
pins.
pi ns w hi ch are mask prograrnmabl e
T h e re a re 2 a ddi ci onal
addr es s ing
individually
or together as C H IP S E LE C TS . They are
and c an be u s e d e i th e r
pins P B 5 a n d P B6 . Wh e n u s e d a s peri pheraL
data pi ns they cannor be used a s
c hip s elec ts .

INTERNAIOBGANIZATION

A block diagram of the internal

architecture
is shorvn in Figure l.
The MCS6530 is divided into four basic sections, RAll, ROl"l, I/O and TII.{ER.
The RAI'Iand ROMinterface
directly
with the microprocessor through the
system data bus and address lines.
The I/O section consists of 2 8-bit
Each half contains a Data Direction Register (DDR) and an I/0
halves.
Registe r.
HOMlK Byte(8K Bits)
The BK ROMis in a L024 x 8 configuration.
Address lines A0-A9, as
well as RSO are needed to address the entire ROM. With the additlon of CSl
and CS2, seven MCS6530's may be addressed, gi-ving 7168 x 8 bits of
contiguous ROM.
RAM-64 Bytes(512 Bits)
A 64 x 8 static RAM is contained on the MCS6530. It is addressed
by A0-A5 (Byte Select), RS0, A6, A7, A8, A9 and, depending on rhe number
of chips in the system, CSl and CS2.
Registers
InternalPeripheral
There are four internal registers,
thro data direction registers and
tvo peripheral r/o data registers.
The two data directlon registers
(A side and B slde) conErol the dlrectton of the data into and out of
t lte perlplreral plns.
A r'1'r wrl t ten tnto the Data Di rect lon Regl ster sets
up the corr espondlng perlpheral buffer pln as arr output.
Therefore, anythlng
then written l-nto the I/O Reglster wl11 appear on ttrat corresponding perlpheral

r.3-6

rr0 rt w ri t.te n
pin.
i n to the D D R i nhi bi ts
A
the output buffer
from trans r nit t ing
d a ta to o r fro m th e I/0 R egi ster.
For exampl e, a " 1" l oaded int o
dat a d i re c ti o n
pi n P A 3 as a n
re g i -s te r A , posi ti on
3, sets up peri pheral
out put .
If a " 0 " h a d b e e n l oaded, P A 3 w oul d be confi gured
as an i nput
and r e ma i n i n th e h i g h s ta te.
The tw o data I/O regi sters
are used ro
lat c h d a ta fro m th e D a ta Bus duri ng a W ri te operati on
unE i l the peri pher al
dev ic e c a n re a d th e d a ta s uppl i ed
by the mi croprocessor
array.
D u ri n g a re a d o p e ra ti o n
i s noE readi ng the I/O
the mi croprocessor
Regis t e rs
For the
b u t i n fa c t i s re adi ng the peri pheral
data pi ns.
per iphe ra l
d a ta p i n s w h i c h are programmed as outputs
the rni croprocessor
The onl y way
will
re a d th e c o rre s p o n d i n g
data bi ts
of the I10 R egi ster.
W ri te oper at ion.
t he I / 0 R e g i s te r
d a ta c a n b e changed i s by a mi croprocessor
pins.
T he I / O R e g i s te r
i s n o t a ffe cted
by a R ead of the data on the peri pheral

!nleryglljrnet
Th e T i rn r:r r;c c L .i o n o f th e )fC S 65 30 contai nn f h ree bas i c parts :
pr elim in a ry
and
programmabl e B -bi t
divide
d o w n re g ister,
regi ster
int er r up t
T h e s e a re i l l ustrated
1ogic.
i n Fi gure 4.
T h e i n te rv a l
ti m e r c a n be prograul rned to count up to 255 ti me i nterval s
w here T
E ac h t i m e i n l e rv a l
1T, B T, 64T or LO24T i ncrements,
c a n b e e ither
i' s t he s y s te m c l o c k p e ri o d .
h' hen a fu11 count i s reached, an i nterrupt
f lag is s e t to a l o g i c
fl ag i s set the i ntern al
A fter
the i nterrupt
" 1 ."
c loc k b e g i n s c o u n ti n g
d o v m to a maxi -mumof -255T.
Thus, after: ti te
int er r up t
fl a g i s s e t, a R ead of the ti mer w i l l
te1l how l ong si nce th e
f lag w a s s e t u p to a ma x i mu m of 255T.
T h e 8 b i t s y s te m D a ta Bus i s used to transfer
data to and from the
r- he
I nt er v al
T i me r.
I-f. a c o u n t at 52 ti me i nterval s
w ere to be counted,
i nto Ehe
pat t er n
0 0 1 I C I 0 0 v i o u l d be put on the D ata B us and w ri tten
I nt er v al
T i me re g i s te r.
Ti mer, Lhe
to the Interval
A t E h e s a me ti m e th a t data i s bei ng w ri tten
c ount ing
i n te rv a l s
o f 1 , B, 64, 1-024T are decoded from address l i ne:; A0 an<. i
the i nter r upt
A 1.
D u ri n g a R e a d o r Wri te operaE i on address l i ne A 3 conLrol s
IRQ on
c apabili ty
o f P B7 , i .e .,
A" = 1 enabl es IR Q on P B 7, A " = 0 dl sabl es
ti m er
i nterval
P B 7.
W h e n P B7 i s to b e u s d d as an i nterrupt
fl ag w i td-E he
it s hou l d b e p ro g ra mme d a s a n i nput.
If P B 7 i s enabl ed by 43 and an
to the
int er r up t
g o 1ow . W hen the ti mer i s read pri or
o c c u rs P B7 w i l l
remai ni ng w i l .l be
int er r up t
fl a g b e i n g s e t, th e number of ti ure i nterval s
/+
9
,
r ead, i .e .,
e tc .
5 1 , -5 0 ,
W h e n th e ti m e r h a s r:o u nted dow n to 0 0 0 0 0 0 0 0 on the next count
t im e an i n te rru p t
will
< -rc r.c urand the < :ounter w i l L read I I I I I I I I
by " 1" ral c ( ) f
A f t er i n E e rru p t,
th e i t.i m e r r egi str:r
decrements at a di vi de
t he s y ste m c l o c k .
fJ : a fc e r i nterrupt,
the Li mer i s read and a val ue tlf
l he val ue re ad
1 I 1 0 0 I 0 0 i s re a d , ttre ti me si nce i nterrupt
i s 28T.
is in tw o ts c o m p l e me n c .

Valueread=11100100
Complement=00011011
ADD 1.

= 0 0 0 I I r 0 0 = 28.

a t th e to ta l
el apsed ti me, merel y do a tw ors compl ement add
T hus , Lo a rri v e
ti m e w ri tte n
i nto the ti mer.
A gai n, assume ti me w ri tten
as
t o t he o ri g i n a l
W i th a di vi de by 8, total
ti me to i nterrupt
is
0 0 1 I 0 1 0 0 (= 5 2 ;.
( 52 x 8) + 1 = 4 L 7 T .
T o ta l el apsed ti me w oul d be 416T + 28T = 444T, ass um i n te r rupt
w as I l i l
0 0 1 0 0.
ing t he v a l u e re a d a fte r
th e i n te rru p t,
w h enever the ti -ngr i s w rl tten
After
or read the i nterr upt
However, the reading of the timer at the same tirne the interrupt
is reset.
n o t re s e t th e i n te rrupt
fl ag.
W hen the i nterrupt
fl ag i s read on
oc c ur s w i l l
(D BO thru D B 6) go to tr0r' .
DB 7 aLL o th e r D B o u tp u ts
F ig u re
R/W

5 i l l u s tra te s

a n exarpl e

of

i nt' errupE .

D 7 D6 D5 D4 D 3D 2U

A3

DO

R/W

AO

D IV ID E

PR O GR A MMA E LE
R EGIS TE R

IRQ

AI

D OW N

D6 D5 D4 D3 D2 DI DO

4
B A S IC
0S
F I NT E RV ATt I ME R- F is u re
E LE ME N T

Jt'n-l'- L/-"t--J.'1

02 tN
WRITET

rRo
5
Figure
1. Data written

inEo interval

timer

ls 0 0 1 1

2, Data i.n Interval timer is 0 0 0 I 1 0 0 1 =

52-213-l=52-26-7=25
8
3. Data in Interval timer is 0 0 0 0 0 0 0 0 =
52-4L5-l=52-51-1=0
8
4. Interrupt has occurred at 0Z puLse ll416
Data in Interval tlmer = I 1 I 1 1 1 1 1
timer is 1 0 I 0 1 1 0 0
twots comptement is 0 1 0 I 0 1 0 0
84+(SZx8)=5001s

5. Data in Interval

0 I 0 0 = 5219
25to

oro

= 84to

an i nterrupt,
W hen re a d i n g th e ti me r a ft er
43 shoul d be l ow so as to
T h i s i s done so as to avol d fuE ure Lnterrtrpts
t h e IR Q p i n .
unti l
dis able
al' t er ano th e r Wri te Ei m r:r tl D e r i rtl -on.

r.3-8

ADI}RESSING

A d d re s s i n g
many vari ati ons
o f th e MC S6 530 offers
to the user for
gr eat er
fl e x i b i l i ty .
T h e user may confi gure
hi s system w i th R A M i n l ower
m em or y , R OM i n h i g h e r m e m o r y, and I/O regi sters
w i th i nterval
ti mers b et ween
(A 0-A 9).
E he ex Ere me s .
In addi ti on,
T h e re a re 1 0 address l i nes
there is
t he po s s i b i l i ty
o f 3 a d d i ti o n al
address l i nes
to be used as chi p-sel ects
and t o d i s ti n g u i s h
Tw o of t he
b e tw e e n R OM, R A M, I/O and i nterval
ti mer.
addit ion a l
I and 2 (C S 1 and C S 2).
The chi p-sel ect
lines
a re c h i p -s e l ects
pins ca n a l s o b e PB 5 a n d PB 6.
W hether E he pi ns are used as chi p-sel ects
or
per iphe ra l
w hen orderi n g
f/O p i n s i s a m a sk opti on and must be speci fi ed
t he pa rt.
B o th p i n s a c t i n dependentl y
of each other i n that ei ther
or bot h
pi- ns m a y b e d e s i g n a te d
a s a chi p-sel ect.
The thi rd
addi ti onal
address line
is RS O . T h e MC S6 5 0 2 a n d MC S 6530 i n a 2-chl p systern w oul d use R S O to d ist inguis h
b e tw e e n R O M a n d n o n* R OM seC ti urrn of uhe I' {U S 6530. W i th E he
addr es s i n g
pins available,
a total
of.7K conti guous
R OM may be addresse d
wit h no e x te rn a l
decode.
B el ow i s an exampl e of a l -chi p
and a 7-chi p
M CS 653 0 A d d re s s i n g
Sc -h e i n e .
0ne- C h i pAd d re s s i n g
F ig u re

6 i l l u s L ra te s

a l -chi p

system

decode for

the MC S 6530.

s're!-c$p-.1Al!!1esr!s
I n th e 7 -c h i p s y s te m th e obj ecti .ve w oul d be to have 7K of conti guous
ROM, with RAI'I in low order memory.
The 7K of ROM could be placed between
addr es s e s 6 5 1 5 3 5 a n d IA2 4 .
For E hi s case, assume A 13, A 14 and A 15 are all
1 when addressing
ROM, and 0 when addressing
RAM or I/0.
This would place
t he 7K R O M b e tw e e n Ad d re s s e s 65,535 and 58,367.
The 2 pi ns desi gnated
as c hip-s e l e c t
pi ns.
o t I/O w o u l d be rnasked programmed as chi p-sel ect
P in RSO w o u l d b e c o n n e c te d to address l i ne A 10.
P i ns C S l and C S 2 w oul d
be c onn e c te d to a d d re s s l i n e s A l 1 and A 12 respecti vel y.
S ee Fi gure 7.

The two examples shown would allow addressing of the ROMand MI"I;
however, once the I/O or timer has been addressed, further decoding is
necessary to select which of the I/O registers are desired, as well as
the coding of the interval
timer.
l/0 Register
- TimerAddressing
Figure B illustrates
the address decoding for the lnternal
elements and timer programming. Addrese llnes A2 dlatlngulshes L/O
registers from the tinter.
l,JhenA2 is high and I/O tlmer select is hlgh, the
l/o registers are addressed. Once the I/O reglsters are addressed, address
lines A1 and A0 decode the desired register.
W he n th e ti me r i s s e l e c te d
A 1 and A 0 decode the
T his de c o d i n g i s d e fi n e d
i n Fi gure 8.
In addi ti on,
us ed t o e n a b l e th e i n te rru p t
fl ag E o P B 7.

di vi de
by macri x.
A ddress 43 i s

IN T. T IME R S E L.
A3
IN TE R V A L
AI

TIME R

A9

I/O T IM ER SEL .

r/o sEL.
Al

uo

A9

R A M S E L.

rI

A5

I
I
I
I
I
I
I
I
I

I
I

44
A '3
A2
AI
A9

R OM SE L.

A9

A8

A7
A6
A6
A5
A4
A3
A2
AI
A9

A.

X indicatesmaskprogramming
i.e. ROM select= eSloRSO
RAM select = gSloRSObA9.A7.A6

I/O TIMER SELECT = ffi.p5g.A9.A8.A7.A6

B. Noticc that A8 is a d<,rn't
carefor
RAM select
C. CS2can be usedaspB5 in this example.

MCS6530
0neChipAddresEncoding
Diagram
Figure
6

r.3_10

RAM

T h e a d d re s s i n g
would

of

th e R OM sel ect,

R A M sel ect

and I/O

Ti mer

sel ect

lines

b e a s fo l l o w s :

MCS6530/11,

v1cs6530ll2,

M C S6 s30
/i3,

M CS6s30/t4,

MCS6530/15,

MCS6530/16,

MCS6530//7,

* RAMselect

cs2

csl

Rso

A72

A11

A10

A9

A8

A7

A6

ROM SELECT

0 0 lx

XX

]1'

RAM SELECT

0000

00

I/O

0001

00

ROM SELECT

010x

XX

RA,MSELECT

0000

00

I/O

0001

00

ROM SELECT

0 1 lx

XX

RAI'{ SELECT

0000

01

I/O

0001

01

ROM SELECT

100x

XX

RAI.{ SELECT

0000

01

I/O

0001

01

ROM SELECT

1 0 lx

XX

RAI.{ SELECT

0000

10

I/O

0001

10

ROM SELECT

110x

XX

RAM SELECT

0000

10

I/O

0001

10

ROM SELECT

111X

XX

RAM SELECT

0000

T1

I/O

0001

11

T IM ER

TII'fiR

T Im R

T IM ER

T IME R

T IM ER

T IME R

for MCS6530lt5 would re a d = A 1 2 . A 1 1 . A 1 0 . e g . e.eN. A 6

MCS6530
Seven
GhipAddressing
Scheme
Figure
7
I.3"1I

AD D R E S S IN G OE C OD E
R O M SE L EC T R A M S E LE C T
RE A D RO M
W RI T E RA M
RE A D RA M
W RI T E O DRA
RE A D DDRA
W RI T E DDRB
RE A D DDRB
W RI T E P E R.R EG.A
RE A O P E R. RE G .A
W RI T E P E R.R EG.B
RE A D P E R.RE G .B

o
o
o
o
o
o
o
o
o
o

I
I

o
o
o
o
o
o
o
o

o
o
o
o

o
o
o
o

o
o

o
o

I/O TIME R S E LE C T

o
o
o

A3

AI

A2

AO

xxx

XXX
XXX

xoo
xoo
xol
xot
xoo
xoo
xol
xol

o
o
o
o

) ( to

o
I

o
I

o
I

o
I

X
I
I
I

W RI T E T I M E R

+lr
+87
+ 647
+ to24T
READ TIMER
READINTERRUPT
FLAG
*

A s = | E n o b l e s IR Q to P B7
A 3 = O Di s o b l e sIR Q to PB 7

o
o
o
o

t (lo
* rl

xrr
x
x

tffi";J
ltrcLrt sss

.6OOmox.
(15.24mm)
I

td-

-T-

Vss

40

PAO

39

PA2

o2

38

PA3

RSO

37

PA4

A9

36

PA5

35

PA6

A8
,l 55 mox.
(3 93mm)
.l 90 mox.
(4.82mm)

.3lOmor.
(7.87mm)

( r .6 5 ).o 6 5
i l .o r ) .o4 0

.l OOml n.
(2.54mm)

( . 551 , O 22
( . 45) . O r 8

A ddrcrsi ng Occode tor | /O R cA i ster ond Ti mcr

FIGU R E 8

lOomor.

2 .O 2 O m o x .
(5 1 .3 0 m m )

.Ol Omi n.
(.25mm)

A7

M
c34

A6

633

PA7

s
6

l/w

5
o

A5
A4

DBO

32
3l
30

o8'2
D83

f328

AI

t4

AO

f326

DB7

FEs

f625

PBO

IRQ/PS7
cst/ PB6
cs2l PB5
Vcc

t2

t7

29

DB4
DB5

27

DB6

24

PBI

19

?2

PB3

20

2l

PB4

P8?

f823

P IN D E S IGN A TION

t.3-12

D8l

A3
A2

P in N o .I i r i n l o w c r l c fl c o rn cr w tcn
s y m b o l l z o ti o n i s i n n o rmo l o rl c n foti on
PA C K AGE O U T L IN E

PAI

PROOUCT

fl

ro l

m
w

T C cl .tH o loov.

AililOUNCEMENT
BULLETIN

txc.

vAtrty fonc C0Rp0RATI

CEtrrfs{?r5}6661950
pA t9401
050RrrTtiH0ustRoA0.il0RBtsToryt.

SEPTEMEER
, 1976

MCS6532 RAM/IO/INTERVAL TIMER CI.IIP

T h e M CS6 5 3 2 is d e sig n e d to o p e r a te i n conj uncE i on w i th the MC S 650X Mi croprocessor

Fami l y.
lt is
c o m p r ise d o f a 1 2 8 x 8 sca tic
data ports
RA.f,l ,rw o soft.w are controLLed 8 bi t bi -di recti onal
a l l o win g
devi ces, a sofc w are
d ir e ct
in te r fa cin g
b e Ew een the mi (:roprocessor uni t and peri pheral
p r o g r a r n m a b le in ce r va l
from I c o 262,
tim e r with i nterrupt,
capabl e of ci mi ng i n vari ous j .nterval s
1 4 4 clo ck p e r io d s,
a n d a p r o g r a m abl e
edge deteci : ci rcui t.
* 8 b it

b i- d ir e ccio n a l

* Ed g e Se n se In te r r u p t
* I2 8 x I sEa tic
* T wo 8 b it

D aca B us for

di rect

w i th

coruruni caE i on

(P crsi .ti ve or l .{egati ve E dge:

the mi croprocessor

P rogrammabl e)

Ra m
daca porrs

b i- d ir e ctio n al

* T wo p r o g r a m m a b le

I/0

P eri pheral

for

i ncerface

D ata D i recti or

to perl P heral s

R egi srers

* Pr o g r a m m a b le ln te r va l' Ii m(.r
* Pr o g r a m m a b L e ln te r va l

Ti mer

* T T L & CM OSco m p a tib le

peri pheral

t Pe r ip h e r a l

p in s

with

D i rect

* HiSh lm p e d a n ce T h r e e - S taLe

l nl errupt
l i nes

Transi sror

D ri ve

C apabi l l E y

D ata P i ns

Vss

MCS6532INTERFACEDIAGRAM

I
IRAM

TO
PROCESSOR

I
I

TO
PIRI PTIERAL
DEVICES

4U

2
3
4
5
6
7
8
9
10
1i
t2

39
.3 8
37
36
55

A5
A4
A3
A2
AI
AO
PAO
PAI
PA2
PA3
PA4
PA5
PA6
PA7
P87
PB(r
PB5
PI}4

14
l5
l(;
t7
t8
i9

22

vcc

zt)

?l

/\o

62
CSl
LJ Z

F5
R/iv
l (l ; )

s3
32
3t
30
:v

28
27
26
l5
24

DBO
DBl
DB2
I)11.5
UIJ4
Dll5
t)l]6
DltT

na

PBO
Pr]I
Pt]2
PB3

MCS6522VERSATILEINTERFACEADAPTER

Thc ttl0STcchnology, Inc. lfCS6522is a second-gneration pcriphcral adapter dcsigned to

bring increased capability to the nicrocouputer systen designer for the solution of pcripheral
control and systen tining problens. It conbines thc gencral purposc pcripheral ports, handrlth a pair of very flexiblc interval tiaers
shaking, intc"rupt handling, etc. of the !1CS6520
In addition, thc chip is organized to sirplify the
shift rcgister.
and a scrial-out/scrial-in
software involvcd in controlling the nany functions provided by thi.s deyicc.

Sorneof the iuportant

fcatures

of the MCS6522axe as follows:

Coupatible uith

Eight-bit

Tno eight-bit

'

Data Direction
output.

Interrupt
intcrrupt

Flag Register allors

vcry conveniently.

Interrupt
chip.

Enable Register allows very convenient control

Handshake control

CllOS-compatible rrArrand "8" peripheral

Data latching

Two fully-programable

Eight-bit

Shift

'

Forty-pin

plastic

the MCS650Xand MCS6SlXfamily of nicroprocessors.

bi-ditcctional

data bus for cormunication with the nicroprocessor.

ports for interface

bi-directional

Registers allou

logic

each peripheral

to peripheral

pin to act as eithcr

the microprocessor

to deternine

for input and output peripheral

on pcripheral

ports.

ports.

interval

timers.

Register for serial

interface.

or ceramic DIP package.

t.4-2

devi.ces.
an input

or an

the source of an

of interrupts

data transfer

within

the

operntlons.

Arfdvu0otlsts
ulrndilocou3ru,
r iloNltddu

BU GB OOKrII
by Rony, Larsen, & T it u s
published
by X. & L. Instruments

b o o k $ 1 5. 0 0

A complete inLroduction
prograrlming and
to operation,
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of an 8 0 8 0 b a s e d mic ro c o mp u t e r"
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the use of the E. & L. IvlD-I microcomputer,
but is a very
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reference
for all seeking hardware information
about
8080 based systems .
BUGBOOKV and BUGBOOKVI
by Rony, Larsen, a n d T it u s
published
by E. & L. Instruments

books

A complete and novel treatment

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of microprocessors
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digital
8 0 8 0 o rie n t e d
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Howard W. Sams
I977

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Howard W. Sams
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INTEL EOBOASSEMBLYLANGUAGEPROGRAMMING
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obtain from--fnteI
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SYSTEMSUSER'S }IANUAL
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*Volume I - Basic Concepts #20AL
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MICROCOMPUTER
APPLICATI0NSHANDBOOK
by David J. Guzeman
Iasis Inc.
815 W. Maude Avenue
Sunnyvale, CA 94085
A complete deseription
of hardware and software
Iaslsts single borad microcomputer.

M I C R 0 C 0MP UDTEESRIGI,I
by Donald P, Martin
7976
pp. 400
Martin Research
3336 Comnerci.al Avenue
Northbrook, IL 60062
'

handbook

for

book $25.00

A conprehensive treatment of hardware and software for

snall- microcomputer systems uslng the 8008 and 8080 microprocessors,
This ls the only book givlng detailed i.nformatlon on the 8008.

M i C R 0 C 0 MP UATNEDRMIC R 0 P R OCESS0R
by Hilburn and Julick
Copyrlght 1976 by Prentice
pp. 375

book

Ha11, Inc.

Ttre book ls intended for all persons involved in the

deslgn, use, or mainLenance of digltal
systerns using microThe book is written at a leve1 r,rhich can be
computers.
understood by persons with 11ttle prevlous experience.

'

Topics include: digital

1ogic, nurnber systems and codes,
mi crocomputer architecture,
software, interfacing
and peripheral
devlces, microcomputer systems [4040, 8080, 8008, 5800, IMP-4, PPS4, COSMAC,
PPS-8, PACEI design methodology and applications.

& MICROCOMPUTERS
MICROPROCESSORS
by Branko Soucek
Wiley-Intersc j.ence
1976
pp. 607

b o o k $ 2 3 . 00

A general lntroducclon
to digltal
systems and mlcroconputers
nlth detalled descripElons of popular 4,8112 and 16 bit rnicroprocessorg lncludlng
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J-2

'MICR0PR0CESSORS:
NI}'J DIRECTI0NSFOR DESIGNERS
Edited by Edward A. Torrero
L97 5
PP. 135
seleeted

artlcles

reprinted

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by John G. Wester and Wi11lam D. Simpson

197.6 by Texas Instrument Inc.
copyright
PP. 372
order from: Texas Instruments
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Dal1as, TX 75285
people
to assist Eechnical and non-technieal
Book was wriiten
with
mircroprocessors
steps toward designing
in taking their first
Topics range from basic binary numbers Eo
and related software.
Book was written
eomplex examples of microcgmputer applications.
or no prograrnrning experience but
prinarily
for those with littl-e
exampl-es which should be of
application
it conEains excellent
seasoned
to
even
interest
Programmers.
reference

TTL C00KB00K
by Don Lancaster

book

$8.95

r974
pp. 335
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r efer ence book s8'9s

T V T YP E b J R ITCE0R0 K B 0 0 K
by Don Lancaster
L976
publlshed by Howard W. Saurs& ConrpanyrInc.

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GIISSARY OF COMMONI,Y
USEDI,ECNOPROCESSOR
TER,}4S
ABSOLUTEADDRESSI}Xi -

SEE DIREC? ADDRESSING

aBSOLirtE rNDExm TDDRLSSTNG- the effective

address is formed by
adding the index regi.ster (x or T) to the second and third byte
of the instruction.
Acctil'ltILATOR - A register
that holds one of the operands and the
result of aritbnetic
and logic operations that are perforned
by the central processing unit.
Also cor'uronly used to hold
data tna.nsfemed to or fron I/O devi.ces.
AccuMUr.lftOn.rDDRESsrNc acsuuulator.

ore byte instructioa

operating

on the

ACIA - fs an Asynchronous Corumrnications Interface Adapter.

This
is an NMOSI,SI device produced by Motorola for interfa.ciag
Seria-l. ISCII cievices to a micro*processor systen.
ADDRESS-

A nunber that designates a memory or T/o rocatj-on.

ADDRESS
BUS - A multiple-bit
from the CPUto the rest

output Bus for

of the system.

transmittir

AIS0RfT$'I - The sequerEe of operatj.ons which defines

to a problem.

an ad.dress

the solutj.on

ALFHANID{xnrc - Pertainjng to a character set that contains both

letters a:rd numerals and usually other characters.
AIU (AnIfiS'IETIc/I.r,cTG I'IIIT)
- The unit of a computing system that
perfcnms arittrmetic and logic operations.
A^SCII CODE- the America-n Standard Code for Infornati.on
.a seven-bi.t character code without the parity bit,
bit character code with the parity bit.

Interchange.
or an eight-

.0.ssn'IBLER- a program tha.t traaslates symbolic operation codes into

machine languager syurbolic addresses to memory addresses and
assigns values to all progran symbols. rt translates source
prograns to objeet prograns.
.[9SF.I4BLY
DIRECffgE - A nnenonic that nodifles the assenbler operation
but does not produce an object code (e.g,1 a pseudo instruction).
A.ssn'lBLr tAl[cuAGE - A corlection
of symbolic IabeIs, mnemonics, and
data which are to be translated into binary machlne codes by the
assembl-er.

K-1

&SI-NCi{R0N0US- Not occurring at the sane time,

a constant repetltion rat'e; irregular.
BesE _

or not exhibiting

'rsEE R.S,DIX!r.

BCD - Binary Code Decj.nal-. A means by wirich decjma.L nunbers are

represented as binary values, where j-:rtegers i-:r the raage 0-!
are represented by the four-bit
binary codes from 0@0-1001,
BIDIRECTIONALDATABUS - A data bus in which digital
be transferred in either direction

information

can

BIN.C.Hf - The base two nunber systems. All nunbers are eryressed as
polrers of two. ls a consequeneer only two symbols (0 & 1) are
requ,ired to represent any nunber.
BIT

- the smallest unit of jrtformation which can be represented.

A bit may be in one of tro states, represented by the binary
digits 0 and 1,

BIOCK DIAOR.AI,I- A diagrarn in rhlch the essential units of any

systen are drawn in the forn of blocks, and thejr relationship
to each other is indicated by appropriately connected lines.
that causes a program Jump to a
BR.II'ICHINSTRUCTION - i" lnstructi.on
specified address and execution of the instruction
at that address.
During the executicar of the br.neb instruction,
the central processor replaces itre contents of the progran counter with the specified
address.
i.nstruction digit,
BREAKP0INT - Pertaining to a type of instruction,
or other condition used to intenupt
or stop a computer at a
particular place i-u a prugram. A place in a program where such
occurs or can be made to oecur.
an iaterrupticn
digital
circuj.t elenent that uray be used to
BUFTER - .[ noniaverting
hanile a large fan-out or to invert i-nput and output levels.
A storage derj.ce used to corpensate for a difference irr rate
of flow of data, qr time of occurrence of events, when transraitting
data from one devi.ce to another.
BITE

- .{ seqrrence of eight
unit.

adJacent binary diglts

Clr.L

- A special type of junp il which the central processor is

logical.ly requJred to rrremembernthe contents of the progran
counter at the time that the junp occurs. ltris "]lous the
processor later to res@e execution of. the main program, when
it is flnished rlth the last instruction
of the subroutlne.

K-2

operates upon as a

:i
, .,'-'1

--/

in uhi-ch
CASC.A'TE
- An arra.ngement of two or more similar circuits
provides the input of ihe next.
the cutput of one circuit
CLOCK - A device ctr a part of a device that generates all the timing
system. System clocks
pulses for the coorciination of a digital
usually generate i:wo or more clock phases. Each phase is a separate square wave pulse train output.
CODI}IG - ?he prccess of pnepari;rg a prograln from the flow ehart
defining an algorithm.
COIIPILER - A language translator wh.ich converts individual- source
A compiler
statements into multipie machine instructions.
translates the entire progialn before it is executed,
CCMPLII{EbIT
- Re'rerse aIL binary bii
becomeones).

values (ones become zerosr zeros

CONDITIONAI- In a. conrputer, subject to tire result

made during computation'

of a comparison

L{STBUCTION - A conditional jump instructj.on

coNDITIOltAt BREAKPOINT
tha'r, c4tlses a computer to stop if a specified switch is sef,
The routine then mqy be allswed to proceed as coded, or a jump
may be forced.
An
C0IIDfTIONAIJUI,IP - AIso caLled conditional transfer of control.
of
prsper
one
instruction
to a computer which will cause the
two (or more) addresses to be used ir.r obtaining the next instructicn, depending on someproperty of one or more nunerical exFressions or other conditions.
CONTAC?
tsOmfcE - The unconirolled ma.king and breakirg of a. contact
An important
when the switch or relay contacts are closed.
where bounces can aet as clock pulses.
probl-em i:r digi'tal cjrsuits,
pR0CE$SINGUNIT) - The r:nit of a. cornputing system that
CPU (3E[,ITRAI,
lncldes
and executicn of j:rstructions;
csrtrols the interpretation
the AJ,U.
DATABUS - A multi-li,ner para1le1 path over which digital daLa is
0n1y one transfer
transferred, fron any of several destinations.
of infcrmation can take place at any one tine.. While such brans.fer is taking p1ace, aIL other sources that are tied to the bus
rmrst be disabled.
DEBUO -

Detect, lccate,

end correct problens

DEBOUNCED
- Refers to a switeh or relay that
tact bor:nce.

K-3

tn

a program or hardnare.
longer exhibits

con-

DECODER/DRffER - A code eonversion device that can also has sufficient

voltage or current output to drive an external device such as a
di.splay or a lamp monltor
DE4IILTIPLE$R - A digital
device that directs infornation
from a s5.ng1e
i.aput to one of several outputs.
Information for output-channel
selection us-ually is pesented to the device in binary weigh,ted
forn a.nd is decoded internally.
lhe deyice also acts as
singlepole rnrltipositi.on
sodtcb that passes digital
i-nfca"raation" in a
di.rection opposite to tbat of a rnultiplexer.
DESIINATION - Register, memory location or I/A devlse shich can be
used to recei.ve dat,a during instruciion
execution"
DEVICESE[,EC?PUI,SE - A softr+are-generated positlve or negative
clock pulse frora a ccmputer ihat is used to strobe the operation
of one or nore I/0 devices, includirg i-ndividual integrated
circuit chips.
DInEgI ADDRESSISrcbyte of the instruction
used.

The second and third

contain the address of operand to be

DD,fA(DI&ECT MW0RI ACCESS) - Suspension of processcrr operatioa to

a'l'low peripheral units exberaal to the CPU to exercise control
of nencry for botlt RE.ADand l,RIlE rithout
the lnterna1
altering
state of the processor.
DINAMIC8.Al'{ - .d random access nemory that uses a capaciti're
for storing a data bit.
They reqrira REISBSH.

element

EECDIC - The Extendeo Binary Coded Decirnal Interclusrge Cocie, a

diitaJ- code prinari.ly used by Sli[. It c]osely resenbles t]re
half-.A,SCII code.
mGE

fror logic 0 to logic

- The transition
to logic 0, in a cLock pulse.

EDIIOR - A program used foc preparing

progran or other fiJe by additlon,
EflFECTM iDDRESS
memory, usually

1, or from logic

and modifying a sourc

deletion or change.

The actual address of ihe desired location

derived by smre forn of calculation.

Ln

a sequence of operations
ilP.tl{SION - The process of inseriing
representea bI a macro nane when the macro nagre is refereneed
in a trrrogran.
FALL TIME - The tirne requi.red for an output voltage of a digital
clrcult to change from a loglc I to a logic 0 state'

K*ll

FAII-OU? - The nunber of para]le1 loads uifhin a given logic f anily

that caa be drlven fron one output mode of a logic cjrcuit.
FETCH - One of tim twc functional parts of an instruction
cycIe.
fhe collectj.ve actions of acquiring a mencry a<idress, and then
cr data byte from nemory.
an instnuctisn
FTT:T.D FTr.n

An area of an instruction
A collection

mnenonic.

of data reeords treated

as a single u-nit.

ruFO (I'IRST IN, F'IRSI 0UT) - ?he terrn applies to the sequence of
enteriag data into and retri.eviag dat,a from data storage"
data entered is the first
The flrst
data obtaiaable wi.th FIFO.
FT,AG - A status bit which indicates that a certaln condition has
arisen during the cource af aritlmetic
or logical marriprrlations
or data transmission between a pair of digi.tal. electronj.c
devices" $ome flags uray be tested and thus be used for determfnlr subsequeat, actlons"
ELlo RffiISTER -

A reglster

consisting

ELOWCHIRf - A symbolie representation

solve a problear"

of the flag

flip-flops.

of tbe algorithn

required

to

FRQUENCY - fhe rnrnber of recumences of a perlod,ic phenornenonin

a unii of tirne. Electrical
frequency is specified as so neny
cycles per second, 3r llertz.
FUIL DUPLEX - A <iata transnission mode which provides
and independent transm:i,ssion and reception.

simultaneous

HALF-.ASCfi - A 6l+-character A,SCII code that contalnsttre code rords

for nusleric d5gits, alphabetie characters, and symbols but not
keyboard operatlons"
HAIF DUPLE{ - 4 data tnansnnlsslon mode which provides both transmlsslon and reception but not simultaneously.
conmr:nicatlon betrreen two system conponents,
zuNDSHAKE - Interactive
such as betseen the CPU and a peripheral;
often required to prevent
of
loss
data.
HeRDI'tlRE - Physical equS.pmentnechanical,
devices

eleetrlcal.,

or electronic

HH$DECII,IAI - A nunber system based upon the radlx-16,

ln whlch the
declmal nunbers 0 ttnough 9 and the letters A through F represent
the slxteen distlnct
states ln the code.

K-5

BYTE - ?he eight most si.gn-ificant

HIGH .ADDRESS
memory address wtrd.
*bbreviated H or E.
Ic

bits

in ttre 15-bit

* (f)
(wrmaetnn
elRcuII)
A conrbination of i:rterconaected
circui.t elements inseparably associated on or rj.t&1n a con(a) ^Anyelectronic derrice in which botb
tjrmous substrate.
active and passi.ve elements ae contained in a single package.
In dii.ta: el"e*tronies, tire term ehiefly applies io circuits
c ontaisliag senriconductor eleraents.

IMMEDIJITEADDaESSE'I* instruction,
rather

lbe operand is the second byte of Lbe

tha:i its address.

that stipulates
IMPilm .ADDRESSI]&3- A one-byte instruction
an
operation i:rternal t,o the processor.
DOESNOTrequire ary
addltlonal" operand"
INCRET{E$IT- ?o inerease the value of a binary
to iacrease the vaiue by 1,

word"

Typically,

INDE@ ATDRESS - SJaind*xed address is a m,enory address forned

by adding lmnediaie daia j.ncluded rith the i-nstruction
to the
contents of sorqeregister or menory location.
Il$DF:lm) $IDIP,$CT ADDRE*9G{G - The secq:d byte of the inst'ru.ction
d.lscardfulg
is added to the eontents of the rtXrt indx register,
the earryu tc forrn a aero-Fae effectlve address"
INDIRECT AESAIU"IEAIDRESSISIS - ?he secsrd a::d third bytes of the
con?,ei:l the address for the first
of ilro bytes ln
insirucii"*n
tha,t,
s*ntsin
ihe
effective
*
nemor-v
address
IllDIRneT mFElmD IDDRF"SSfiffi - fhe second byt,e of tluis insiructlon
is a aero-pege adfu*ss.
fhe eontents of this a*ro*pege address
are added to the ilYil ind.ex reglster to fcrn the lcr*er I Uits
of the effective acidress. Then the caruy (:f any) is added
to the conteats of the nexi aero-page address to form the
h"lgher I bits of ile effective address"
that indlcates
INDIRECT ADDRE$S - An ad.dress used. rnith an instructlon
or a register
that ln turn conta:i.ns the actual
a nanory locatim
address of an operand" ?he i.ndirect address may be lncluded with
(regl.ster indirect
contalned ln a register
the j-nstruction,
or
conta-3::ed
address)
ist a memqry locatlon (menory directed
iadj-z'*ct address)
IIITERfAC:IiG - The jot"nSng nf members of a group {suci: ae people,
instn*neats n eac " ) ::l su.cb a ray that they are able ta
fuaction 1n a r:ompat*ble and coordlaated fEnh{ oR,

*-o

INSTRU0TI0$ * A statement t'hat specifies

or locaii"ons of its operaoreis.
INSTRUCTIOHCCSS * A rxri.que binary
tha.i a comp:,ter can grerform"

an operation

and the values

nus&er that encodes an operation

INSTRUC?IO}ICYCLE - A s::ccessive groep of mach:ine cyclese as few

as on or as many as sesen, whlch together perforn a single
miers_socess<>:rj.nstruetion lrithjn ilie rnicroprcces$tr chip.
n'lSTAUCfI0l{ FECSDER - A de*oder withi-n a 6?U that deeodes the
lnstrucilorr
code rnta a series of actions ihat ihe conputer
performs*
INSTBUffiIG$ f-{SGi$mR code.

The resister

that contaLms the instruction

INTERPRETffi * A language translaior

whj.ch converts indieidua1 source
statements ilto mul"tiple machj$e instruetions
and
by translating
executlag each staieraent as it is encountered. Can not be used
to generate ohje*t code.
INISERUPT - In a compr:.ter, a break in the normal fl"on of a system
or routine such that the flow ca.n be resusred frqrr that polnt
at a ]ater tj"me" ?he soulce of the lnternupt nay 1:e-.internal
cnr external"
I/0

DEVICE - input/output, devi,ce - any *igii.ta-l device, 1-neludiag

a si.lrgle i-ntegrated. circuit
chip, ihat transnits data on strobe
prlses i.s 8, *npuhe:: ar receises ciata or sirabe puSses from a
e cEnpui*r -

JUMP - (1) To cause the next instructioa

to be seleesed from a
specified storage location in a computer " (2) A ciev-iation
fron the acrmal $equence of execution of instructions
ia a
coraputer
L{FEL - One or more characters that, serve ta define an i.tem of
data or the location of an instructlon
or subroutine.
A
character is cne symbol of a set of elementary symbols, such
as those corresponding to typewriter keys
I,ATCH - & simple logic st,orage element. A feedback loop used ln
a q'nmnetrical d.igital e!'cu-it,
to retai.n
such as a flip*fJ-op,
4^

^+^+^
DU(LUq.

LnaDING mGE

the transi"tion

of a oulse ihat

K-7

oecurs first.

t@

(LIGIIT-S{ITTEG DIoDE) - A pn junction

biased in the forward direction.

that

ernits light

LEVEL-IRIGCERED - The state of the clock inputr bebg

O or logie I carries out a transfer of i.nformation
an action.
tffo

when

either logi.c
or completes

(UtsT S, FInST oUT) - The latest data entered is the first

data obiainable frcrn a LIFO stach or nemory section.

I.SB (IJ.LST SIGNITIC.ANTBIT)

nnber.
1u a binary

Tlre digit

with the lowest weight,ing

TISTING - An assenbler output containlng a listing

of prograrn
mnemoa-ics, the nachine code produced, and diagnostics,
i.f an;r.
ItrfC

and
- (1) The science deal.ing wlth the basic princlples
gatlng, etc.
(2) See
applications of truth tables, orltchingl
Icglcal Deslgn. (3) 41so called symbolic logic.
A nathenatical
approach to the soluti-on of complex situations
by the use of
spnbols to defile basic concepts. The three basic logic syrnbols
l{hen u,sed in Boolean algebrap these synbols
are AND, oR, and [gt.
(L) fn
are somewhat analogous to addition.and nultiplication,
conrputers and fufornation-processing
networks, the systematic
nethod ttrat governs the operati.ons perforned on lnformatlon,
(5)
usually with each step influencing
the one that follows.
The systenatlc plan that, defines the iateractions
of slgnals
in the design of a system fe automatic data processlng.

of a computer to make a cholce

tGICeI, DECISIOII - The ability
between tro alternatives;
basically,
the ability
to ansner
yes or no to certain fundanental questions concerrring equality
and relative
magnitude.
LOGIC.0LDESEIV ,- fhe syntheslzing of a network of logical elements
to perforrr a specifi.ed fuoction.
h digltal
electronics,
these
logical- elements are digltal
electronic devlces, zuch as gates,
flip-flops,
decoders, counters, etc.
IOGICAI ELEMENT - Iio a computer cr data-pnocessing system, the
saral'lest buildiag blocks which operators can represent in an
gpical
appropriate system of symboJ.ic Iogic.
logical. elements
are ttre IND gate ard the nflip-flopn.
IOOP - A sequease of instructlons
that is repeated unti-L a ccnditicaral exit situatloa
is met.
I,0i{ ADDRESS
BIYIE - The eight least slgn'l ficant
memory address rord.
Abbreviated L or LO.

K-B

bits

ln the 16-blt

LSI (tAmE scALE tr{TSGe"egIS:{}

cornplex functions"
gates "

..Iategrated circuits

Such chips usually

contain

tirat perforro

l"0O to 2r0O0

MACHI$5C0.18 * A binarp c,;de that a computer deco<ies to execute a

specific fu::.*tion"
MACHINECYULE * A subdlv'ision of an instructj.on
cycle dr:ring r*hich
ti.rne a relaied gr*up of ac',ions occur nithj-a ttre microprocessor
chlp"
In the 8080 ruicroproeessor, t,here exi.st aine different
glacirJ"ne*ycles"
.&}tr i-nstructions are combinations of one e
more ef tbese maehi.aecycles.
MACRC,qFSSm'mLffi* rh assembler routi:re capable of assembli-ng
progra&s whj"ch seata*i"n and referen e raaero instructions"
I4ACROINSfRIJC?TO$ - 3 s"ombcl that is used to represent
seque&ceof sor:rc* instx"uetions.

a specifled

I,UGNETICC0S,E - .{ iype of eonputer storage whi.ch empl-ays a core of

magnetic unator*aL trj"Lir i*ires threa'Jed Llu.uugh lt.
the core can
be magnetized to represent a biaary I or 0.
M.AONETIC
DRUl,t - A storage device coasisting of a rapidly rotating
cylinder, the su"rface of whieh can be easlly magnetlzed and
strlch tri.Il retain the data.
Infornation is stored in the form
of,nagneti"zed spots (or nc spots) on the drugr suface,
M.AOIIETIC
DtrSC - *1 f,lat eircr.[ar plate wittr a magnetic surface on
**hich data can be sterei by selective magneij.zation of portions
of the flat surface"
MIG$EEI0 ?iFH - ,t siorage system based on the" use of magnetic
spots {Ut*s} cn meta: cr coated-plastic tape, The spots are
arranged so that the d,es*red code is rea.d out as the tape
travels past the read-write head.
MA,SKII{$ - A proeess that uses a bit pattern to select
a data byte for use jrr a subseqrrent operation.

bits

from

I,IEI{0RI - "kry derrice that can store logic 1 and logic C bits ln such
e ma:rner the.t a singj.e bit or group of bits can be accessecl
and retrieved*
M$,{OBI IDDRFSS - A 16-bit bJ"nary number that speclfies
the precise
menory location of a nemory wcrd among the 65,536 different
possible memory locations.
MEMORICEIJ. - A singl* storage element of memory, capable of storing
one bi"t of digieal jnformation.

!r _Q

MICROCOI{PUIER
- A courputer system based oa a nicroprocessor and
contains al1 the memory and interface hardware necessary to
perforrn calculat,ions and specified j-nformation transformations.
MICROPBOCESSOR
- A central
integrated circuit.

processing rrnit fabricated

as one

MICROP8OGRAM
- A cwrputer progran written i^n the most basic
iastructions
or subcoumands that can be executed by the
cwrprter.
tr?eguently, it is stored in a read-only nenory.
MNEONIC - Syabols representing
to allcm easy identification

designed
machine instructions
of the functions represented.

UODIILO - The nodulo of a counter is simply ne the number of distinct states the counter goes ttrough before repeatLng.
A
fos-611
biaary counter has a rnodulo of 16; a decade counter
has a uodulo of 10; arrd a divide by-? corrnter has a nodrrlo
of 7" In a varia.ble urodulo cor:nter, n can be a-qy value within
a ranae of values
UONIIOR - Sofbcare or hardware that observes, supervises,
. or verifies
sysLem operation.

coatrols,

UOIIGTABLEMIII,?IVIBRAIOR - AIso called one-shot multivibrator,

single-shot nulti-rribrator,
or start-stop multivibrator.
A
circuit
havfg oaly one stabl'e statel fron whi.ch'it can be
triggered to change the state, but only for a predeternal-aed
interval,
after which it returns to the orlgi-aal state.
usl

(umui$ scal,E INIERdTIoN)

that perfornr
- Iategrated circuits
simple, seJf-con1,a'ined logic systemsl such as couaters and
fllp-flops.

llsB (uosr srcNffrc.$rr)

binary iu:mber.

* rhe dlglt

rith

ttre |righest weightlng in a

llutllPlalrER - a dlg:ital devlce that can select one of a nunber of

lnput,s aira pass the logic 1evel of that input on to the output,
Information for iaput-channel selaction usually is presented to
the device in binary weighted forrr and decoded lnternal)y.
The devj.ce acts as a single-pole nrrltiposition
$ritch that
passes digital lnfornatlon 1n one direction only.
ilHiA?fYE EDOE pulse.

The transLtion froa logic 1 to log:i.c 0 ln a elock

NgiATfqE-EDOE ?nl(nEnm
- Fansfer of infomation
negative edge of the clock pulse.

occurs on ttre

NmATIitE IOOIC - A forn of logic in rltrich the more positive voltage

level represents logic 0 and the more negati.ve ievel rElresents
Ioglc 1..
NESTII\E - .4, sequentiaL calling
to the main pnogra.un,

of srrbroutines

K-10

wlthout

retr:rning

half a byie, is
NIBBLE - A sequsr:.ceef fcu:r acija*ent bits,
ribble"
*, hex*-decimal- m FCF ciieit can be represented ilr
a s:ibbl"e.

NON-OVEEI.AFFSIG
TI{#*FHA$Hel,(]Str *
clock pulses of *I:e indiv-idual

A, tr.ro*phase cloc}t i-a nh1ch the

phases do not overlap.

NON-VOLA?II&tffilfiRY - A semieonduc'i;cr nenory devi.ce in wirj.ch the

stored d*glt'*3 data j.s not lost when the power is removed.
OCTAL
A nrmber: sysi*m based upon the radix 8, fu which the
decisral snmbers 0 through f represent ihe eight distinet
states "
0IIE-BYTE-INSfffJC?IC31 - An jrstructicn
that ccarslsfs of eight
contigu,cus hits oc*upging one successive location.
OPSI-COIJ,ECTOR
Ct?fF:JT * *n outlrut, frst an integrated circult
device in r,rirlcS: ihe f*nal ttpu1l-upn resistor
in the ou+.put
transi,stor fry the Cesiee is nissing and imsi be provided
j.s cmiple*"ed.
by tirc user before the cjrcuit
0PEA.A],ID- Eata wh*eh is, or wllI beo operated upon by an arlthnetic/
logic i:r,structj"on; usually identified
by the address portion of
explic*tJ"y or implicitly.
an instruction,
OPEAAIIOS - Moving or manS.pulating data ln tbe CPU or betrceen the
CPUand periphe'aJs.
P.AGE - A page consists of aJJ the locations that can be addressed
Uy 8-U1ts (a- total at 256 Locatj.ons) startiag ai 0 and going
through ?55" iix,e address witiein a page is determined by the
lorer 8-Alts of the adCress and the page nunber i0 tiraugh
255) is determined. by ihe higher B-bits of a i5-bit
address.
PARITY - "4,metleed.*f checking the accuraey of binary nr-rilbers, tf
even parity is used, the sun of all the 3t s in a nunber and
its cerespondS-ng partty bi-t is always evoo If odd parlty.
is used, the sum cf all the lrs alrd the parity bit is always odd.
PiRTITIONII'& - The Froeess of assiguing specified. portions of a
systen respcnsibi.lity
for perform:ing specified fi:nctions"
PC -

See TTPAGRAM
e0U$?ERtt

PIe
PERIPHER"AI,- A devi*e sr subsystem external
additional sysiem capablliti.es.

to the 0PU rha*" prwldes

POLLINC - Pe:'iodlc interrcgation

of each of the devices that share
a cormrunications l-i^ne to deternlne r*hether it reqrires servlcirtg.
the mmlttplexer er *ontrol statlon sends a po}l tirat has the
effect of asklng the selected devlce, ttDo you havo anything
to transrlt?fr
POP -

Retrieving

ciaf."afron a stack.

PORT
A device or netnork through wh-ich data raay be transferred
sr where device or network variables may be observe<i or measured.
The tnansition

POSI?fVE EDGE
pulse.

fronr logic

0 to logtc

POSfTfqE-mCiE TRIGGERED- I?ansfer of infornation

positive edge of the clock pulse.

1 in a clock

occurs on tbe

voltage
POSITfYE IOOIC - A feur of logic irt rhich the more positlve
level represents logic 1 and the nor negative 1evel represents
logic 0.
PRIORIIY - A preferentiaL ratlng.
Pertains to operati.ons that
given trrreferenc
otheq system operations.
PROCESSOR-

are

Shorthand word for nicroprocessor

PRqiR.A$ - A group of ilstructdons

form a specified furction.

rhtch

causes the compute,r to per-

contedniry the address of the next

P86R"A!,1O0UIITER - A register
instruetion
to be executed.
It ls automatically lncrenented
each time progran instructions
are executed,
PRGzu!{ ljIBEL

A strrnbol w}tlch is used to repesent

Pn@{ (Pn*zu},lM4BLg RE0MNIJr MneBI)

fJ.eJ:d:programnable. by, fhe,. lrEFr

a memory address.

.C,read-or'}y..nenortrr,that:.is

PROP.{GATION
DETAI
A measure of t'he tlme required fe a logi.c
slgnal to travel thnough a logic devlce or a seri-es d J.ogic
devices. It occurs as the result of four types of cLrcult
delays - storagep riser fe]], srd turn-gn-delay - and is
the tir:e betseen when the inprrt signal crosses the threshold voltage point aad when the responding voltage at the output
crosses the same voltage point.
PSEIIDO-INSTRUCTION A mnemonic that modifies
t'j.on but does not produce an object code.

the assenbler

opera-

connected to the positlve supply

PULL-IIP RESIST0B - A resistor
voltage to the outgut coLJ-ector of open-collector
logic.
Also
used occaslonally rith nnechanical slriiches to insnre the
voltage of one or more swi.tch positlons.
P{ILSEWIDXtI - .A,lso called pulse length.
between
lhe td.ue lnterval
tile polnts at whLch the lnstantaneous vslue on the leading and
t'ra"lling edges bears a specifled relatlonship
to the peak prrlse
ar:Plltude.

K-T2

Puiii
eiJIX

Fut,t--r:g ia:;

j-nlc a st,ec<,

marks
fire tot,al nwrber of ii.siinct
- Aisc cal-led the base.
since the
o:" e;'rnbcls usec i-n a n';ilberi-'rg sysiern" For exarple,
c.ecirnaL nun'oe:'xlg systen uses ten synbois, *,he raciix j.s lC.
in tne bi-nar-v n';rbe:i-ng systenr the radi.x is 2, because there
a:.e onry iwc na.:'ks cr synboL" (O ana t).
In lhe octal numberllg systen, ihe raiix
is 8, anci in the hexaciecimaJ" nunibering
< r r cto n

eJ J ev r .r ,

+v .^vh e

f a
s r dtd :X
!

iS
+J

16.
:v.

R.,U,i(R&\Doi.I ACCESSt{il"{ORY) - A semiconiuctor

logic 0 anq lesic I srates can be r,ritten
read o:-u agai"n (retrieved).
P.El',

mmory inic which

(sterei)
and ihen

in semiconciuctcrs:
To transmit da+.a frcm a semiconductor
memory to sone othe:' digital
device"
electronic
fhe term,
frreaCfl aisc applies lo computers and other types of memory
I
cievices.

REFRESH - The process by which dynamic R.AJtr

cells recharge the
ca.pacitive node io r'raintaln the stored j.:rformailon.
The
chargeci nodes discharge ciue t,o leakage cwrents
and tq'ithout
refresh,
Lhe siored data wouici be 1ost.
thi.s process must
reoccur every so na-ny microseconCs.
fhe R4M
Durlng refresh,
car.::ot be accesseci.
REFP.ESH
L6IC
- The logic
signals ano r,ining.
FEGiSTEP -

required

to generate

all

A harciware eleraent used to temporarily

ihe refresh

store

data.

F-Ei,riTM }TDRF^SS - A rela.iive

anCness i.s a memory adciress formed
r*'
vJ
-;;i-i
:he i"nmeciia.te date. incluCed with the ir:sLrucii"on to
Gu!i6

the ecntents of ihe prograa counter or some otLrer registei'.

RESET - A conputer system input lha,t j-nitiaLizes and sets up
certa-r regisNers in fhe CPUand throughout the computer
sysiern. One of the i:rj"lializationsl
is to load a speciflc
acidress into the Prog:'an Coun,',er. The two bytes of i-nforma.+.ion
L4 that ald the succeeciing a.<ioressis the starting a-ddress
for the systen progran (for the MOSTECIfl0LOGIprocessors) "
PJTUzu{- Aspecial i,ype of jurap in which the central processor
resumes execution of the ma.in progran at, the contents of the
program counter a't ',,he time that the jmp occured.
RIPPLI COUIITER
- A binary caunting systen irr wli:ich flip-flops
connecteciilt seri-es.

are

RISE TIl,lE - The t,ime required for an ou.tput voliage of a digital

clrcuit to change frcm a logic 0 io a Loglc I stater
ACM (Rg.AD-OliLY
tfri,loRf) - A ser,rj-conctuctcrmemory from which digital
data can be repeatedly reaci ou'r,, but, earnot be vrritten 1nto,
as is the case for a RA)4.
K-

| (

ROIITIIIE - A group od lnstructi-ons

that causes tbe courputer to
perforrn a specified frrnction, eogr Lprogran.
SCRA?CHP.AD- the temr applies to nemory that
by the CPUto store i.:etermedi.ate results.

is used tenporarily

SE'IIEII-SEG]{BI?DISPTAI - ln electroni.c display that contains seven

lines ot segnents spati-a.Lly arranged in such a manner that
the digits O through 9 can be represented through tJre selective
laghtiq
of certain segnents to form. the diglt.
S${IC0NDUCTOR
MEMOFf- A diital. eLectronic memory d,evice ln nhich
lrs and Ors are stored, that ls a product of semiconductor
marrufacturlng"
SUIF? RE0ISISR - A digltal
storage cjrcuit
in which infomatlon
is
slui:flted from one f]ip-f1op
of a chain to the adjacent flip-flop
rryon appllcation fo each clock puIse. Data may be shtfted
several places to the rigbt or left,
depending on addltlonal
gatjlg and the nunber of clock pulses applled to the 3'pgi s!s1'.
Depead:ing oa the nunber of positions shifted,
the rightmost
characters are lost ln a right shift,
and the lef,tnrost characters are lost i.n a left shifb.
S$flIt.{IOR
coryuter

A progran whicb re,presenbs ttre finctioruing

systern
a.rcther coqruter system.
ltilizi-ag

of one

SOflfmRE - fhe means by which any defined grocedure is speclfied

for conputer execution"
SOURCE- Register, memory locatioa or T/O device whtch can be
used to supply data for use by al instruction.
PRGR.AI{
.* group of statenents confor&ing
SOURCE
requiremrents of a language processor.

to the syntax

SFLIT D^{IA BiF - Is two data buses, one for lncoming commutdcations aBd one for outgoing corrunulrications. An 8-bit data bus
in split data bus system talces 16 llles.
STACK - A speclfied section of sequential neaory Locations used
as a LIFO (fast T.a, !'irst Out) file.
The last elenent entered
is the fjrst
one agaiLabLe for output,. A stack is used to store
program datae subroutine return arlrt'ess6s, processor statusl etc.
Sti0f

rh-i.ch contains the address of the

POINTER(S)
- A register
system read/write
menory used as a stack.
It is autoruatlcalty
increnented or decremented as instructions
penforrn operations
H:ith tbe stack"

f-Ir

ST.AIEMA{I -

An instruction

ia source language.

STATIC R"Att - A rqrdom access memory tbat uses a flip-f1op

storlng a binary daia bit.
Does not require reibesh.
STRINO

A series

fcn

of values.

$fBBOUTINE - A routine that causes the execution of a specified

firnction and uhJ.ch also provides fc transfer of control back
to the ca-ll5ng routine upon sompletj.on of the function,
SIlBOf,
lny character
or data constant"

string

used to represent

a Iabel,

menonic,

SYI'lBOtfC ADDRESS - Also caaled floaiing

a.ddressn In digita1 co6puter prograrndngr a 1abe1 chosen in a routine to ideatify
a
particular
word, function, or other informatj-on that ls independent of the location of the information w'it}.in the routine"
STI,IBOTICCOD8 - A code by which programs are exFressed ln source
language; that is, storage locations
and machine operations
are referred to by sprboli"c nanes and addresses that do not
depend upon their hardware-deterzrjned nanee and addressso
S$4BOIJCCODING - In digital conputer programring, aq cod,fng
systen usfug symbolic rather tttan actual conputer addresses"
Sgl{C}lRChlOUS- Operatipn of a s:*itchiag network by a clock pulse
generator"
.Lll cjrcuits
in the netlrork sritcb sjmuLtaneously,
and all actions take plaee synchronously rdith the clock"
SWT.AXERROR - An occurrence in the source progran of a label
e4pression, or conditj.on that does not meet the .f,orrnat
requirernents of the assembler program.
TABLE
A data structure used to contaj.nr sequences of lnstructions, addresses, or data constants.
TR{IIING EDGE
of a pulse that occurs last,
The transition
as the hlgb-to-low transltion
of a posi.tive clock pulse.
IAAIISITIOI{
state.

The jrstanee

of chang"jng fbon one state

such

to a second

IIiREE-STATE DEVICE or IRI-STATE DEVICE

A serricqrductor logic
(1)
device j.n wbich there are three possible output, states:
nlggC.c
ttlog:Lc
0n state, (Z) a
a
ltt state, or (3) a state irr
i.n rhicb the ouSut is, jn effect, disconnected frorn the rest
of the circrrlt
ard has no j.nfluence upon it.

K-l:5

ITIREE-BEfE INSTRIICTION - An instruction

that, conslsts of trentyfour colrtiguous bits oecupying tbree successive nemory locations.
TBUIU TIBLE
that shows the relati.on of all output
A tabulation
loglc levels of a *igitaf. circuit
to all possible conbinatj.ons
of iaput logi-c levels in such a lray as to charactenize tbe
circuit
fi:nctioas c crryletely.
1'IfO-BIITEINSTRUCTION - 4n instructLon
that consists of sirtdeti
contlguous bits occupying tro successive nemory locations.
IWO-PHASECLOCtr
A tro-outpu'b tinine
device that prorides trlo
continuous series of timing pulse from the second serles
alrays foll.ocing a siagle clock pulse frcn the first
series.
Depending on the type of two-phase clock, the pulses in the
first
and second series nay or nay not orerlap each other.
Usually i.derrbified as Phase'I & Phase 2.
ITNCOMiITIONAI
llot srrbject to conditLons external
c ornputer jlstructi-on .
ttilCOl\DIfIONAI CALL -

A ca]]

Lustructlon

that

to the speclfic

is uncondltional.

ItNcqilErrro$.qr, fiffP
I connputer instruction
tbat iaterrupts
the
normaL process of obtai-njng the inst,ructlons
in an ordered.
sequence and specifi.es the address frosr whlch the ne:cb
instruction
must be taken.
:r
UNCOIIDITIOilALRE'IIAN nsl

A retrrrn

instructlon

that

ls unconditional.

(VERT tAncE-scAla I}IImRATIoN)

Monolithlc dlglta-l integrated
chips rith a typtcal conplexJ.ty of tro thousard or nore
circuit
gates or gate-equivalent circuits.

VOIATIIE I{El"l0RI
A seniconductor memory derrLce ln lrhich t}p
digital
data is lost when the power is remwed.

stored

IIEIGIITING - ltost corrnters in the 71100serles of integrated cjrcult

chips are weighted counters, that is, re can asslgn a nelghted
value to each of the fl:ip-flop
outputs tn the counter.
By
nm*ng the product of the logic state times the relghtln-g
value for each of the fllp-flops,
re cur conpute tlre courter
For exanple, the weighting factcs
state.
fe a h-bit binary
' cornter are D neight of 8, C = weight of l+,
B . relght of 2,
=
ard A weight of 1. The binary output, DCBA= 1101A, frm a
lr-Uit binary counter would therefone be 13.
#',
I{IRED-OR CIRCUIT - A clrcuit
consistlng of two or more sernlconductor
devlces wittr cpen.colLector outputs ln rhj.ch the outputs are
rlred together.
The output frcn tbe circuLt is at a logtc O
if devlce A or device B or derrice C or . . . . " is at a loglc
:O state.

K-16

WORD - lre naxilmn ntnber of bjoary dlgits that can be stored ira a
sLngle addressable nemory locatlon of a given conputer system.
fAnS

In semiconductors and ot}er types of menory derices - to

transmit data lnto a nrnory device frsr some otlrer digital
electrmtc
device.
To l{RIlE ls to SICIRE.

ZERO-P{}E
The lonest 256 address locations ln neuory. Where
the highest 8-bits of address are alrays Ots and the loner
onlY
8-bits identif,y any location flour O to 255. lbereforer
a single byte is needed to address a locatiou in zero-Page.
ZUnO-f.Cg .|DDBEIISING - I.he second byte of the instruction
taLns a zero-page address.

con-

ZEnO-P.CCE
INDEXEDOnnbSSUqi - The second-byte of the Lnstaruction
(X or I) to form a zeto-page
is added to ttre index register
is drcpped.
effective
address. The carry (i-f
"tqf)

K-I7