An Analytical Method for Selecting Dc-Link-Capacitor of a Voltage Stiff Inverter

M. N. Anwar

Mehrdad Teimor

Member, IEEE

Member, IEEE

Advanced Vehicle Electrical Systems

Visteon Corporation, Technical Center
17000 Rotunda Drive, Dearborn, MI 48120
Email: manwar9@visteon.com; mteimor@visteon.com

Abstract-- The scope of this paper is to develop an analytical

method for selecting dc-link-capacitor of a voltage stiff inverter
(VSI). The method employs simple small signal ac analysis of a
VSI to come up with a simplified equivalent circuit of it. The
objective is to select an appropriate dc-link-capacitor to
maintain a required amount of dc-line current ripple. Phasor
algebra and Fast Fourier Transform (FFT) helped solve the
equivalent circuit. The method addresses the proper selection of
component parameters, which strongly depend on the operating
conditions. The analytical method has been applied to select
VSI dc-link-capacitor of an automotive application, for which
simulation results have been provided. Some experimental
results have also been given to verify the efficacy of the method.
Keywords- Dc-link-capacitor, Voltage stiff inverter and Electric
vehicles.

NOMENCLATURE
Cc
Rc
Lc
Zc
Tcan
Ta
Rth(c-a)
Ri
Li
Icap
Icrms
Ip
Ic1- c6
Iq1, Id1
Ibat, Vbat
Iinv, V12
ia, ib, ic
%Irms
V12
Pi, Pf,
,T

f
s, D

= Capacitance of the dc-link-capacitor (F),

= Equivalent series resistance (ESR) of the capacitor (),
= Equivalent series inductance (ESL) of the capacitor (H),
= Impedance of the capacitor, [(Rc2+(Lc-1/Cc)2] (),
= Working can-temperature of the capacitor (0C),
= Ambient temperature (0C),
= Thermal resistance between the can and the ambient ((0C/W),
= Internal resistance of the battery and dc-bus (),
= Stray inductance of the dc-bus (H),
= Dc-link-capacitor current (A),
= Dc-link-capacitor rms current (A),
= Peak of the output load current (A),
= Six IGBT (together with diode) collector currents (A),
= Switch (Q1) and diode (D1) currents (A) [refer to Fig. 1],
= Dc-line current (A) and battery voltage (V),
= Inverter dc-link current (A) and voltage (V),
= Sinusoidal output load currents (A),
= Rms dc-line current ripple in percentage,
= Inverter dc-link voltage ripple (V),
= Input power (W), load power factor and inverter efficiency.
= Angular frequency (rad/sec) and operating temperature (0C),
= Fundamental ac load current frequency (2..Ff) (rad/sec) and
= PWM switching frequency (2..Fs) (rad/sec) and duty ratio.

I. INTRODUCTION
The dc-link-capacitor is a load-balancing energy storage
element between the dc (battery) and ac (load) sides of a VSI.
This component is connected parallel to the battery in order

to maintain a stiff dc-link voltage across the VSI. In other

words, a required amount of dc-line current ripple is needed
to suppress the generated electro-magnetic interference (EMI)
caused by pulsed inverter current and stray inductance and
resistance of the dc-bus. Therefore, the selection of an
appropriate dc-link-capacitor is necessary for desired
electrical performance of the inverter-drive systemespecially for automotive applications like electric and hybrid
electric vehicles. For these applications, an under-designed
dc-link-capacitor may cause possible EMI with other
electrical circuitry. On the other hand, an over-designed
capacitor is not a cost effective solution.
An electrolytic capacitor, mostly used for automotive and
industrial applications, offers greater capacitance per unit
volume compared to film capacitors. The trade-off here is its
much higher Rc (ESR) and an inability to withstand a reverse
voltage of significant value. The size of this dc-link or filter
capacitor depends on the amount of ac energy it must absorb
to maintain a required amount of current ripple at the dc-line
and the level of rms current it can tolerate because of ESR
heating. The values of the Cc, Rc, as well as Lc of the dc-linkcapacitor are functions of operating temperature and
frequency. Typically, the ESR decreases with increasing hotspot temperature and frequency [1]. Depending on the
inverter switching strategy, the capacitor current contains
several harmonics. These are comprised of the sinusoidal
output load current's fundamental frequency and the pulse
width modulated (PWM) switching frequency and their
harmonic contents. The waveshape of inverter dc-link current
Iinv as well as the capacitor rms current Icrms depends on the
PWM modulation depth (D) and the amplitude and power
factor of the inverter output current. These are the facts
considered in developing the analytical method for selecting a
dc-link-capacitor.
Authors of [2]-[3] talked about dc-line current ripple and
rms current stress on the dc-link-capacitor of PWM inverters.
Approaches for selecting a capacitor for a power distribution
system are reported [4]-[5]. However, a comprehensive
analytical methodology for selecting dc-link-capacitor for a

0-7803-7420-7/02/$17.00 2002 IEEE

803

1 of 8

Iinv (A)

Ip

Ia, Ic1, Ic4, (A)

VSI, employing any switching strategy and above-mentioned

objectives, does not exists in the literature. The analytical
method presented here is intended to fulfill these
requirements, which can be used during the VSI design
process. Small signal ac analysis followed by phasor algebra
and FFT are used here, which is being verified through
simulation and experimental results to select dc-linkcapacitor for an automotive inverter-drive system.

(a)
1/Ff

1/(6.Ff)

Ic1
Ic4

(b)

Id1 (A)

(c)

(d)

Ibat (A)

Fig. 1 below shows the circuit diagram of a VSI using

IGBT (together with free-wheeling diode, FWD) as power
semiconductor switches. The current and voltage components
of this power circuit are as mentioned in the nomenclature.
The inverter converts dc battery power into sinusoidal ac
power at the load. However, the waveshapes of Ibat, Iinv, Icap
and Ic1 .Ic6, as well as their frequency components, depend
mainly on the switching strategy, load power factor and
PWM duty ratio. These frequency components and their
relative strengths (magnitudes) should be identified in
choosing an appropriate dc-link-capacitor, as discussed
earlier.

Iq1 (A)

II. POWER CIRCUIT ANALYSIS

(e)

a. Switching Strategy and Load Power Factor

time (s)

S5

Iinv (A)
Ia, Ic1, Ic4, (A)

S3

Ip

(a)
1/Ff

1/(6.Ff)

Ic1
Ic4

D1

Iq1 (A)

Id1

ia
Ph-a
Ph-c

ib

(c)

(d)

Ph-b
Ic4

S4

(b)

Id1 (A)

Iq1

Ic5

Fig. 2: General waveshapes of- (a) Iinv, which follows the envelop of
absolute ia, ib and ic, (b) ia, Ic1, Ic4 and iarms, (c) Id1 and Id1rms, (d) Iq1 and
Iq1rms, and (e) Ibat with a load power factor of 0.5 for PWM switching.

Ic6

S6

Ic2

ic

Load

Ibat (A)

S1

Dc-link-capacitor

Battery

Icap

Q1

Ic3

Leg-c

Iinv

Leg-a

Ibat

Ic1

Leg-b

Figs. 2 and 3 show general waveshapes of Iinv, Ibat, ia, Ic1,

Ic4, Iq1 and Id1 employing PWM switching strategies for two
different power factors at the load side. Figs. 4 and 5 show
these waveshapes for six-step switching strategies. It is clear
from these figures that, although the switching strategy is the
same, the current waveshapes (refer to Iinv) vary with the load
power factor [2]. The fact of the matter is that, load power
factor determines the amount of current flows through the
FWD compare to the IGBT. At zero power factor the inverter
generates only reactive power where FWD and IGBT shares
the rms current equally. And no power is supplied from the

(e)

S2
time (s)

Inverter
Fig. 1: Circuit diagram of a voltage stiff inverter (VSI) showing IGBTs (with
free-wheeling diode), battery, dc-link-capacitor and 3-phase load.

804

Fig. 3: General waveshapes of- (a) Iinv, which follows the envelop of
absolute ia, ib and ic, (b) ia, Ic1, Ic4 and iarms, (c) Id1 and Id1rms, (d) Iq1 and
Iq1rms, and (e) Ibat with a load power factor of 0.065 for PWM switching.

2 of 8

Iinv (A)

dc link (harmonic power components are neglected). On the

other hand, at unity power factor purely active power is
generated by the inverter where IGBT carries the total rms
current. And maximum current is supplied by the dc link. For
example, in Fig. 2 with PWM switching at Pf of 0.5 IGBT
caries 75% of the rms phase current, whereas in Fig. 3 at Pf
of 0.065 IGBT carries 53% of the current. A general
relationship between power factor and relative conductivity
(in other words current sharing) of IGBT and FWD is
depicted in Fig. 6 [6] for a sine-PWM voltage source inverter
(VSI). It is shown that during the motoring mode of inverter
operation, the conductivity of IGBT increases from 0.5 as the
Pf reaches unity. The conductivity of FWD decreases in this
mode. The relative conductivity of the IGBT and the FWD
does just the opposite during generating mode of inverter
operation.

(a)
1/Ff

Ic1

Ic4

(b)

Iq1 (A)

Ic4

Id1 (A)

(c)

b. Fundamental & Switching Frequencies and Duty Ratio

Ibat (A)

(d)

It is obvious from Figs. 2 to 5 that the fundamental

frequency of Iinv, as well as Ibat and Icap, is six times the
frequency Ff of sinusoidal output load current. Additional
frequency components on currents in Figs. 2 and 3 appeared
due to their PWM switching. Again, the variation of input
voltage ripple with modulation index or duty ration of PWM
switching depends on the load power factor [2]-[3]. At unity
power factor, the variation follows a second order quadratic
function with a peak at around 0.5 modulation index.
Whereas, at zero power factor, the relationship is a sort of
linear. This is because of the fact that, power factor being
constant, the duty ratio D effects the relative strengths or
magnitudes of the frequency components (including the
harmonics) present in Iinv as well as in Ibat and Icap. The next
section will provide an example regarding this.

(e)
time (s)

(a)

Ic4
Ic4

1/Ff

Ic1

1/(6.Ff)

Ic1

III. DESCRIPTION OF THE METHOD

The circuit diagram of Fig. 1 can be simplified as in Fig. 7,
replacing the inverter with a current source. The current wave

(b)

1.0

Iq1 (A)

Ia, Ic1, Ic4, (A)

Iinv (A)

Fig. 4: General waveshapes of- (a) Iinv, which follows the envelop of
absolute ia, ib and ic, (b) ia, Ic1, Ic4 and iarms, (c) Id1 and Id1rms, (d) Iq1 and
Iq1rms, and (e) Ibat with a load power factor of 0.6 for six-step switching.

(c)

Power Factor, Pf

Id1 (A)

0.5

Ibat (A)

(d)

0.0

-0.5
(e)
time (s)

IGBT Conductivity,
CQ

FWD Conductivity,
CD
Motoring

Ic1

0.1
Generating

Ia, Ic1, Ic4, (A)

1/(6.Ff)

0.2

0.3

0.4

0.5

0.6

0.7

0.8 0.9 1.0

Conductivity

Control Rate = CQ+CD = 1

-1.0

Fig. 5: General waveshapes of- (a) Iinv, which follows the envelop of
absolute ia, ib and ic, (b) ia, Ic1, Ic4 and iarms, (c) Id1 and Id1rms, (d) Iq1 and
Iq1rms, and (e) Ibat with a load power factor of 0.09 for six-step switching.

Fig. 6: Relationship between load power factor and average conductivity of

IGBT and FWD for a sine-PWM voltage source inverter.

805

3 of 8

Vbat

Cc
Ibat

Normalized Rc

-550

10
-400
1.0

25
850

0.1

102

10
Normalized Zc

Rc

Current source

Iinv

Lc

Ri

100

Dc-link

Li

Dc-link-capacitor

Battery

Dc-line

Icap
2

1.0

As explained in Section II, Iinv contains the impact inserted

by Pf, D, Fs and Ff of the inverter. In solving the circuit of
Fig. 7, both the time and frequency domain analyses of Iinv
are thus necessary in selecting the dc-link-capacitor.
a. Circuit Analysis
The Fast Fourier Transform (FFT) of Iinv provides the
frequency components exist on Iinv as well as on Icap and Ibat.
Figs. 9(a) and (b) show the FFT of Iinv at two different Pf
employing PWM switching strategies. In this case, Ff and Fs

806

Normalized Cc

105

104

105

104

105

-400
250

0.1

850
102

103

1.0

-shape of this source is Iinv as shown in Fig. 2 for PWM

switching. The analytical method for selecting dc-linkcapacitor is developed based on this equivalent circuit of Fig.
7. This circuit represents the dc-link-capacitor as a series
combination of Rc, Lc and Cc and the dc-bus as a constant
voltage source Vbat in series with Ri and Li. The capacitor
equivalent circuit may contain an equivalent parallel
resistance of anode oxide film across Cc. However, this is too
small to be considered. The capacitor being an energy
balance component between the dc (battery) and ac (3-phase
load) sides of the inverter, the capacitance value Cc should be
sufficient enough to maintain a required amount of current
ripple (%Irms) at the dc-line in order to maintain a stiff
voltage across the dc-link (V12) and to suppress the generated
EMI. The current flowing through the capacitor causes
Icap2.Rc loss (converts to heat) on its ESR, which imposes the
maximum limit on the rms ripple current capability of the
capacitor itself. Again, the parameters Rc, Cc, Lc, of the dclink-capacitor, are functions of operating temperature and the
frequency components exist on the current flows through the
capacitor. These factors are considered in selecting an
appropriate dc-link-capacitor for the application as analyzed
in the following sections. The dependencies of capacitor
parameters on the temperature and frequency can be found on
the manufacturer data sheet [1], one generic of which is
presented in Fig. 8. This figure shows the values of Rc, Zc and
Cc of an aluminum electrolytic capacitor normalized with the
corresponding values at 250 C and 120 Hz.

104

-550

0.01

Fig. 7: Equivalent circuit diagram for the VSI of Fig. 1 replacing the power
switches with a current source.

103

-550

0.66

850

250
-400

0.33
0.0

102

103
Frequency (Hz)

Fig. 8: Dependency of Rc and Zc of a dc-link-capacitor with temperature

and frequency.

6.Ff

2.Fs

Fs

12.Ff

(a)

Fs

2.Fs
6.Ff

(b)

Fig. 9: Frequency domain representations (FFT) of dc-link current Iinv at - (a)

Pf = 0.5 (time domain plot in Fig. 2) and (b) Pf = 0.065 (time domain plot in
Fig. 3) employing PWM switching strategy.

are 133 Hz and 10 kHz, respectively, for which the frequency

components are 6.Ff, 12.Ff, ..., Fs, 2.Fs, , other than the dc
component. The magnitudes of these components, given in
percent (%) of their dc component, depend mainly on Ip, Pf
and D as well as on Ff and Fs. The dc component of Iinv for
Fig. 9(b) is very low compared to Fig. 9(a) because of the fact

4 of 8

that its Pf is 0.065, which demands mainly reactive power

from the battery. One more observation for Fig. 9 (b) is that
the sub-harmonic components of Fs are very significant,
whereas harmonic components of Ff are almost negligible. It
is obvious that, the FFT of Iinv of Figs. 4 and 5, for six-step
switching strategy, will contain only the 6.Ff, 12.Ff, ...
components, beside the dc component.
As stated in Section II (b) that duty ratio D effects the
relative strengths or magnitudes of the frequency components
(including the harmonics) present in Iinv, Table I shows the
magnitudes of frequency components on Iinv as a percent (%)
of the its dc-component (DC) at different duty ratios (D). The
results are taken for sine-PWM switching when Ip is 100 A at
Pf of 0.5, Fs of 10 kHz and Ff of 133 Hz.
Solving Kirchoff's current and voltage laws (KCL and
KVL) on the equivalent circuit of Fig. 7 provides the
following equation

(1)

inv dc

( (

(2)

Fundamental
12.Ff
1.4
1.4
1.4
1.4
1.4

where,

I ()
bat
ac

Fs
22
47
73
127
151

2.Fs
20
38
43
44
46

.100

(4)

I
bat dc

It is noteworthy to mention that Ibat|dc depends on Pi and Vbat.

Fig. 10 shows general waveshapes of Iinv( )|ac and Ibat( )|ac
with couple of their frequency components as stated in Eqs.
(2) and (3). This is for PWM switching, FFT shown in Fig. 9
(a), with Ff and Fs at 133 Hz and 10 kHz, respectively. The
component magnitudes in Fig. 10 are scaled for visual
purposes.

Icrms = Rms

() = Rms
cap

PWM switching
18.Ff
0.6
0.6
0.6
0.6
0.6

(3)

Performing the similar circuit analysis as in Eqs. (2) to (4),

rms current through the dc-link-capacitor can be expressed as

Magnitude of frequency component as a percent (%) of

dc-component (DC)
6.Ff
5.7
5.7
5.7
5.7
5.7

I ()
= . sin( 6. .t + ) + . sin( 12. .t + ) +..........
..
bat
f1
f
f1
f2
f
f2
,
ac

Rms

Table I: Magnitudes of frequency components on dc-link current Iinv as a

percent (%) of its dc component (DC) at different duty ratios (D).

86
77
67
48
38

Eq.(2) should be solved for each frequency component

(6.f, 12.f, , s, 2. s, ) applying phasor algebra. The
dc-line current Ibat is then the superposition of all the
individual solutions as

%Irms =

A () + j.B () ,
I ( )
= I ()
.

bat
ac inv
ac C () + j.D ( )

90
80
70
50
40

= Frequency components for s

and their corresponding magnitudes.

B () = .R ().C ();
c
c

Eq. (1) reflects the fact that for a particular temperature,

the capacitor parameters Rc, Lc and Cc are also functions of
frequency as mentioned in Fig. 8. As far as the dc-line current
ripple is concerned, ac small signal analysis of Fig. 7 boils
Eq. (1) into

DC

s, 2. s, , Ms1, Ms2,

Therefore, the rms dc-line current ripple in percentage can

be defined as

C () = 1 2. L () + L .C () and D () = . R () + R .C ().
c
i c
c
i c

Duty
ratio,
D (%)

6.f, 12.f, , Mf1, Mf2, = Frequency components for f

and their corresponding magnitudes and

s1, s1, ., s1, s2, . = Magnitudes and phase angles at

frequencies of s, 2. s, .

(summation of dc and ac components);

+ I ( )
inv
ac

A () = 1 2 .L ().C () ;
c
c

+ M . sin( .t) + M . sin( 2. .t) + M . sin( 3. .t) + .....

s1
s
s2
s
s3
s

f1, f1, ., f1, f2, . = Magnitudes and phase angles at

frequencies of 6. f, 12.f, . and

where,
I inv () = I

I ()
= M . sin( 6. .t) + M . sin( 12. .t) + M . sin( 18. .t) + ...
inv
f1
f
f2
f
f3
f
ac

+ . sin( .t + ) + . sin( 2. .t + ) + ..........

...............
s1
s
s1
s2
s
s2

A () + j.B ()
Ibat() = Iinv().

C () + j.D ()
,

V .C ()
bat c

+
2. R () + R .C () + j.. L () + L .C ()
c
i c
c
i c

where,

3.Fs
19
25
10
42
32

A () + j.B ()
() .
1
inv
ac C () + j.D ()

. (5)

b. Objective Function
As stated in Section I, the objective of putting the dc-linkcapacitor is to maintain a required amount of dc-line current
ripple (%Irms calculated by Eq. 4), which is set down by the

807

5 of 8

Start

Iinv()|ac
Mf1.sin(6.f.t+0)
Mf2.sin(12.f.t+0)
Ms1.sin(s.t+0)

Inputs: Pi, Pf, , D, Ip

Variables: Ff, Fs, Vbat, T, Ri, Li
Select a capacitor having 'Cx' Farad:
(to meet dimensional, voltage and
temperature requirements)
Parameters: Cc, Rc and Lc

(a)
time(sec.)

Look-up table:
Find Cc, Rc and Lc = f (, T)

1/(6.Ff)
Ibat()|ac
f1.sin(6.f.t+f1)
f2.sin(12f.t+f2)
s1.sin(s.t+s1)

Calculation:
Solve Eqs.(4) and (5)

Plots:
%Irms vs. # of 'Cx' with Ri, Ff, T
etc. as constants.
Output: # of 'Cx' capacitor = 'x'

f1

(b)

No

time(sec.)

%Irms within limit?

Fig. 10: General waveshape of the ac ripples on - (a) Iinv(A) and (b) Ibat(A)
with couple of their frequency components for PWM switching.

Plots:
Icrms vs. # of 'Cx' with Ri, Ff, T
etc. as constants.
Output: # of 'Cx' capacitor = 'x'

No solution found
within constraints

Yes

EMI requirement of the inverter. This is needed to suppress

the electromagnetic interference generated by pulsed inverter
current and stray inductance and resistance of the dc-bus.
Again, there is a maximum rms current capability (Icmax) of
the capacitor, provided by the manufacturer, which is a
constrained in determining its thermal stability and demanded
working life. The second objective in selecting the dc-linkcapacitor is to make sure that the rms current (Icrms calculated
by Eq. 5) is less than the Icmax. This is required not to exceed
the maximum allowable hot spot temperature of the
electrolytic capacitor beyond which the electric strength of
the dielectric material is lowered due to additional chemical
reactions between the electrolytic material and the aluminum
oxide of the anode foil. The working temperature of the With
Icrms from Eq. (5), the working can-temperature of the
capacitor can simply be determined as
2
Tcan = Ta + I crms
.Rc .Rth ( c a ) ,

FFT of Iinv:
Find magnitudes and
frequencies of significant
components

(6)

with the parameters stated in nomenclature.

As explained in [6], this can-temperature Tcan together with
the operating voltage inserts significant influence on the
working life of the electrolytic capacitors. From the rule of
thumb [2], for each 100 C working temperature decrease from
the rated value, the typical working life is doubled. This is
due to the fact that at lower temperature, the diffusion of the
gaseous parts of the electrolyte through the end seal is
reduced and thus the drying out of the capacitor is delayed.

808

No
Icrms Icmax ?
Yes

End
Fig. 11: Flowchart explaining the selection of dc-link-capacitor for a voltage
source inverter (VSI).

c. Selection of the Capacitor

The procedure for selecting dc-link-capacitor, keeping the
above-mentioned objective functions, is stated in the
flowchart of Fig. 11. The process starts with some required
inputs and variables. The first step is to select a capacitor of
'Cx' Farad that will meet the dimensional, voltage and
temperature requirement of the application. Having known its
characteristic parameters from the manufacturer data sheet,
%Irms and Icrms are plotted using Eqs. (4) and (5). The
objective here is to find out the number of 'Cx' capacitor 'x' to
fulfill the dc-line current ripple constraints. The capacitor is
selected going through a couple of iterations as shown in the
flowchart. Fig. 12 plots %Irms and Icrms with Ri as a variable
for an example simulation. From this figure, if only one
capacitor of 'Cx' Farad is selected, %Irms will vary from 1~3
%, and the Icrms will not exceed Icmax. This checking should
meet both these requirements simultaneously. The similar
judgment should be carried out for the other variables too.
IV. EXPERIMENTAL RESULTS
Experiments has been carried out on a '42 Volt System'
test-bench set-up to verify the efficacy of the proposed
analytical method. The dc-line current ripple and the current

6 of 8

Line current ripple %Irms (A)

(a)

Ibat: 100 A/div

ia: 150 A/div

(b)
Number of capacitor, each having 'CX' Farad

Each capacitor current Icrms (A)

(c)

Icap: 200 A/div

Icmax

Fig. 13: Plots of (a) Ibat (A), (b) ia (A) and (c) total Icap (A) with time
(4ms/div) with 4x16 mF capacitance (Cc) at 88 Hz (Ff).

Number of capacitor, each having 'CX' Farad

Fig. 12: Plots of %Irms and Icrms vs. number of capacitors with
Ri as a variable.

through the dc-link-capacitor were monitored for two

different capacitance values. Figs. 13 and 14 show the
corresponding plots of Ibat, ia and Icap. The first set was run
with four 16 mF dc-link-capacitors (Cc) in parallel, whereas
during the second set-up another 45 mF was added in parallel
with those four capacitors. The experimentally obtained
results together with the analytical results obtained following
the method described in Section III are shown in Table II.
The nomenclature of Ierms is the rms current through each 17
mF capacitor, whereas, Itrms is the total rms current through
all the capacitors in parallel. During this comparative
analysis, the inverter was operated at the following operating
condition:
Battery voltage Vbat 42 V,
Output phase current ia 138 A (rms),
Input battery current Ibat 120 A (dc),
Fundemental frequency Ff 88 Hz and
PWM switching frequency Fs 10 kHz.

Experimental result

Ibat: 50 A/div

ia: 75 A/div
(b)

(c)

Icap: 100 A/div

Fig. 14: Plots of (a) Ibat (A), (b) ia (A) and (c) total Icap (A) with time
(4ms/div) with (4x16 + 45) mF capacitance (Cc) at 88 Hz (Ff).

Table II: Comparison of experimental and analytical results on two

different capacitor values.
Capacitance (mF)

(a)

Analytical result

(4 x 16)= 64

%Irms
30%

Ierms
10

Itrms
40

%Irms
28.5%

Ierms
9.85

Itrms
39.4

(4 x 16 + 45)=109

18%

6.35

41.28

18.1%

6.2

40.3

V. CONCLUSIONS
The development of an analytical method for selecting dclink-capacitor for voltage stiff inverter (VSI) is discussed.
The effects of frequency, temperature, parasitic impedances,

809

load power factor, PWM duty ratio as well as voltage

variations are anticipated during the selection procedure.
Experiments on a '42 Volt System' test-bench have also been
carried out to justify the effectiveness on predicting dc-line
current ripple and capacitor current using the developed
method for a certain operating condition of the inverter. As
seen on Table II, the results obtained from the analytical
method closely resemble those of the experimental results.
With the increase of capacitance from 64 to 109 mF, the
percent dc-line current ripple (%Irms) has decreased in a
fashion as depicted in Fig. 12. The rms current through each
capacitor (Ierms) has also decreased in the second case (with
more capacitance), although the total current requirement

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(Itrms) has increased slightly. As seen from Figs. 13 and 14,

the waveshape of Ibat is swinging at a low frequency (but
higher than Ff), the reason for which requires further
investigation on the experimental set-up. The waveshape of
Iinv could not be captured because of the packaging
arrangement of the inverter.
REFERENCE
[1] Technical data sheet for large aluminum electrolytic capacitors,
United Chemi-Con, Lansing, NC 28643.
[2] J. W. Kolar, T. M. Wolbank and M. Schrodl, "Analytical calculation
of the RMS current stress on the dc link capacitor of voltage dc link
PWM converter systems.", IEE Conference on Electrical Machines
and Drives, pp 81-89, 1999.

810

[3] P. A. Dahono, Y. Sato and T. Kataoka, "Analysis and

minimization of ripple components of input current and voltage
of PWM inverters.", IEEE Trans. on Industry Applications, pp
945-950, vol 32, no 4, July/Aug., 1996.
[4] T. S. Chung and H. C. Leung, "A generic algorithm approach in
optimal capacitor selection with harmonic distortion
considerations.", Electric Power and Energy Systems 21, pp
561-569, Elsevier Science Ltd, 1999.
[5] Y. Baghzouz and S. Ertem, "Shunt capacitor sizing for radial
distribution feeders with distorted substation voltages.", IEE
Trans. Power Delivery, pp 650-656, 1990.
[6] Technical data sheet for IGBT modules, Fuji Electric, Collmer
Semiconductor, Dallas, TX 75370.

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