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RMS-to-DC Converter
AD637
FEATURES
BUFF
OUT
25k
VIN
DEN INPUT
ABSOLUTE
VALUE
SQUARER/
DIVIDER
RMS OUT
CAV
25k
dB OUTPUT
OUTPUT
OFFSET
BIAS
COMMON
AD637
CS
00788-001
High accuracy
0.02% maximum nonlinearity, 0 V to 2 V rms input
0.10% additional error to crest factor of 3
Wide bandwidth
8 MHz at 2 V rms input
600 kHz at 100 mV rms
Computes
True rms
Square
Mean square
Absolute value
dB output (60 dB range)
Chip select/power-down feature allows
Analog three-state operation
Quiescent current reduction from 2.2 mA to 350 A
14-lead SBDIP, 14-lead low cost CERDIP, and 16-lead SOIC_W
Figure 1.
GENERAL DESCRIPTION
The AD637 is a complete, high accuracy, monolithic rms-to-dc
converter that computes the true rms value of any complex
waveform. It offers performance that is unprecedented in
integrated circuit rms-to-dc converters and comparable to
discrete and modular techniques in accuracy, bandwidth, and
dynamic range. A crest factor compensation scheme in the
AD637 permits measurements of signals with crest factors of
up to 10 with less than 1% additional error. The wide bandwidth of the AD637 permits the measurement of signals up to
600 kHz with inputs of 200 mV rms and up to 8 MHz when the
input levels are above 1 V rms.
As with previous monolithic rms converters from Analog
Devices, Inc., the AD637 has an auxiliary dB output available to
users. The logarithm of the rms output signal is brought out to a
separate pin, allowing direct dB measurement with a useful
range of 60 dB. An externally programmed reference current
allows the user to select the 0 dB reference voltage to correspond to
any level between 0.1 V and 2.0 V rms.
A chip select connection on the AD637 permits the user to
decrease the supply current from 2.2 mA to 350 A during periods
when the rms function is not in use. This feature facilitates the
addition of precision rms measurement to remote or handheld
applications where minimum power consumption is critical. In
addition, when the AD637 is powered down, the output goes to a
high impedance state. This allows several AD637s to be tied
together to form a wideband true rms multiplexer.
Rev. K
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
AD637
TABLE OF CONTENTS
Features .............................................................................................. 1
Specifications..................................................................................... 3
dB Calibration............................................................................. 13
ESD Caution.................................................................................. 5
Chip Select..................................................................................... 8
Optional Trims for High Accuracy ............................................ 8
REVISION HISTORY
2/11Rev. J to Rev. K
Changes to Figure 15...................................................................... 11
Changes to Figure 16...................................................................... 12
Changes to Evaluation Board Section and Figure 23................. 16
Added Figure 24; Renumbered Sequentially .............................. 17
Changes to Figure 25 Through Figure 29.................................... 17
Changes to Figure 30...................................................................... 18
Added Figure 31.............................................................................. 18
Deleted Table 6; Renumbered Sequentially ................................ 18
Changes to Ordering Guide .......................................................... 20
4/07Rev. I to Rev. J
Added Evaluation Board Section ................................................. 16
Updated Outline Dimensions ....................................................... 20
10/06Rev. H to Rev. I
Changes to Table 1............................................................................ 3
Changes to Figure 4.......................................................................... 7
Changes to Figure 7.......................................................................... 9
Changes to Figure 16, Figure 18, and Figure 19 ......................... 12
Changes to Figure 20...................................................................... 13
4/05Rev. F to Rev. G
Updated Format..................................................................Universal
Changes to Figure 1...........................................................................1
Changes to General Description .....................................................1
Deleted Product Highlights .............................................................1
Moved Figure 4 to Page ....................................................................8
Changes to Figure 5...........................................................................9
Changes to Figure 8........................................................................ 10
Changes to Figure 11, Figure 12, Figure 13, and Figure 14....... 11
Changes to Figure 19...................................................................... 14
Changes to Figure 20...................................................................... 14
Changes to Figure 21...................................................................... 16
Updated Outline Dimensions....................................................... 17
Changes to Ordering Guide .......................................................... 18
3/02Rev. E to Rev. F
Edits to Ordering Guide ...................................................................3
12/05Rev. G to Rev. H
Updated Format..................................................................Universal
Changes to Figure 1.......................................................................... 1
Changes to Figure 11...................................................................... 10
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 17
Rev. K | Page 2 of 20
AD637
SPECIFICATIONS
At 25C and 15 V dc, unless otherwise noted. 1
Table 1.
Parameter
TRANSFER FUNCTION
Min
AD637J/AD637A
Typ
Max
VOUT =
avg (VIN )2
CONVERSION ACCURACY
Total Error, Internal Trim 2
(Figure 5)
TMIN to TMAX
vs. Supply
+VIN = 300 mV
vs. Supply
VIN = 300 mV
DC Reversal
Error at 2 V
Nonlinearity 2 V Full Scale 3
Nonlinearity 7 V Full Scale
Total Error, External Trim
ERROR VS. CREST FACTOR 4
Crest Factor 1 to 2
Crest Factor = 3
Crest Factor = 10
AVERAGING TIME CONSTANT
INPUT CHARACTERISTICS
Signal Range, 15 V Supply
Continuous RMS Level
Peak Transient Input
Signal Range, 5 V Supply
Continuous RMS Level
Peak Transient Input
Maximum Continuous
Nondestructive
Input Level
(All Supply Voltages)
Input Resistance
Input Offset Voltage
FREQUENCY RESPONSE 5
Bandwidth for 1%
Additional Error
(0.09 dB)
VIN = 20 mV
VIN = 200 mV
VIN = 2 V
3 dB Bandwidth
VIN = 20 mV
VIN = 200 mV
VIN = 2 V
Min
AD637K/AD637B
Typ
Max
VOUT =
avg (VIN )2
Max
Unit
avg (VIN )2
VOUT =
1 0.5
0.5 0.2
1 0.5
mV % of
reading
3.0 0.6
2.0 0.3
6 0.7
30
150
30
150
30
150
mV % of
reading
V/V
100
300
100
300
100
300
V/V
% of
reading
% of FSR
% of FSR
mV % of
reading
0.25
0.1
0.25
0.04
0.05
0.02
0.05
0.04
0.05
0.5 0.1
0.25 0.05
0.5 0.1
Specified accuracy
0.1
Specified accuracy
0.1
Specified accuracy
0.1
1.0
1.0
1.0
25
25
25
0 to 7
0 to 7
15
0 to 4
6
15
0 to 7
15
0 to 4
6.4
AD637S
Typ
Min
9.6
0.5
6.4
15
V rms
V p-p
6
15
V rms
V p-p
V p-p
9.6
0.5
k
mV
0 to 4
6
15
9.6
0.2
6.4
% of
reading
% of
reading
ms/F CAV
11
66
200
11
66
200
11
66
200
kHz
kHz
kHz
150
1
8
150
1
8
150
1
8
kHz
MHz
MHz
Rev. K | Page 3 of 20
AD637
Parameter
OUTPUT CHARACTERISTICS
Offset Voltage
vs. Temperature
Voltage Swing,
15 V Supply, 2 k Load
Voltage Swing,
3 V Supply, 2 k Load
Output Current
Short-Circuit Current
Resistance
Chip Select High
Resistance
Chip Select Low
dB OUTPUT
Error, VIN 7 mV to 7 V rms,
0 dB = 1 V rms
Scale Factor
Scale Factor Temperature
Coefficient
Min
5
1
AD637J/AD637A
Typ
Max
0 to 12.0
0.05
13.5
0 to 2
2.2
1
0.089
0 to 12.0
0.04
13.5
0 to 2
2.2
Min
AD637S
Typ
0 to 12.0
0.04
13.5
0 to 2
2.2
0.5
0.056
Max
Unit
1
0.07
mV
mV/C
V
20
0.5
20
0.5
20
0.5
mA
mA
100
100
100
0.5
0.3
0.5
dB
3
+0.33
3
+0.33
3
+0.33
mV/dB
% of
reading/C
dB/C
A
A
0.033
20
80
100
VS to (+VS 2.5 V)
0.8
2
108
0.13
5
1
0.033
20
0.5
2
108
2
10
+5
0 to 10
25
0.2
80
100
VS to (+VS 2.5 V)
0.13
20
1
5
20
AD637K/AD637B
Typ
Max
Min
0.033
20
5
1
VS to (+VS 2.5 V)
0.8
2
108
1
5
+5
0.13
20
1
5
30
0.5
20
0 to 10
25
0.2
80
100
V
2
10
+5
20
1
5
30
0.5
0 to 10
25
0.2
20
30
0.5
10
0
10 + ((25 k) CAV)
10 + ((25 k) CAV)
10
0
10 + ((25 k) CAV)
10 + ((25 k) CAV)
10
0
10 + ((25 k) CAV)
10 + ((25 k) CAV)
3.0
2.2
350
18
3
450
3.0
2.2
350
18
3
450
3.0
2.2
350
18
3
450
mV
nA
mA
mA
MHz
V/s
V
k
mV
A
A
s
s
V
mA
A
Specifications shown in bold are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels.
All minimum and maximum specifications are guaranteed, although only those shown in boldface are tested on all production units.
2
Accuracy specified 0 V rms to 7 V rms dc with AD637 connected, as shown in Figure 5.
3
Nonlinearity is defined as the maximum deviation from the straight line connecting the readings at 10 mV and 2 V.
4
Error vs. crest factor is specified as additional error for 1 V rms.
5
Input voltages are expressed in volts rms. Percent is in % of reading.
6
With external 2 k pull-down resistor tied to VS.
Rev. K | Page 4 of 20
AD637
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
ESD Rating
Supply Voltage
Internal Quiescent Power Dissipation
Output Short-Circuit Duration
Storage Temperature Range
Lead Temperature (Soldering 10 sec)
Rated Operating Temperature Range
AD637J, AD637K
AD637A, AD637B
AD637S, 5962-8963701CA
Rating
500 V
18 V dc
108 mW
Indefinite
65C to +150C
300C
ESD CAUTION
0C to 70C
40C to +85C
55C to +125C
Rev. K | Page 5 of 20
AD637
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
14
BUFF OUT
NC 2
13
VIN
12
NC
COMMON 3
AD637
BUFF IN 1
COMMON 3
OUTPUT OFFSET 4
OUTPUT OFFSET 4
CS 5
RMS OUT
dB OUTPUT 7
CAV
DEN INPUT 6
dB OUTPUT 7
00788-002
DEN INPUT 6
NC = NO CONNECT
16 BUFF OUT
NC 2
NC 8
15 VIN
AD637
14 NC
13 +VS
TOP VIEW
(Not to Scale) 12 VS
11 RMS OUT
10 CAV
9
NC
NC = NO CONNECT
00788-003
BUFF IN 1
Pin No.
1
2, 12
3
4
5
6
7
8
9
10
11
13
14
Pin No.
1
2, 8, 9, 14
3
4
5
6
7
10
11
12
13
15
16
Mnemonic
BUFF IN
NC
COMMON
OUTPUT OFFSET
CS
DEN INPUT
dB OUTPUT
CAV
RMS OUT
VS
+VS
VIN
BUFF OUT
Description
Buffer Input
No Connection
Analog Common
Output Offset
Chip Select
Denominator Input
dB Output
Averaging Capacitor Connection
RMS Output
Negative Supply Rail
Positive Supply Rail
Signal Input
Buffer Output
Rev. K | Page 6 of 20
Mnemonic
BUFF IN
NC
COMMON
OUTPUT OFFSET
CS
DEN INPUT
dB OUTPUT
CAV
RMS OUT
VS
+VS
VIN
BUFF OUT
Description
Buffer Input
No Connection
Analog Common
Output Offset
Chip Select
Denominator Input
dB Output
Averaging Capacitor Connection
RMS Output
Negative Supply Rail
Positive Supply Rail
Signal Input
Buffer Output
AD637
FUNCTIONAL DESCRIPTION
FILTER/AMPLIFIER
BUFF OUT 14
1
BUFFER
AMPLIFIER
A5
24k
A4
I4
I1
24k
Q4
Q1
Q2
6k
Q5
Q3
BIAS
I3
A3
12k
125
CAV
11
+VS
RMS
OUT
dB
OUTPUT
COMMON
CS
DEN
INPUT
OUTPUT
OFFSET
10
VS
24k
A2
VIN 13
AD637
A1
00788-004
BUFF IN
ONE QUADRANT
SQUARER/DIVIDER
V 2
V rms = Avg IN
V rms
Figure 4 is a simplified schematic of the AD637, subdivided
into four major sections: absolute value circuit (active rectifier),
squarer/divider, filter circuit, and buffer amplifier. The input
voltage (VIN), which can be ac or dc, is converted to a unipolar
current I1 by the active rectifiers A1 and A2. I1 drives one input
of the squarer/divider, which has the transfer function
2
I4 =
I1
I3
I4 =
I 12
I4
I4 = |I1|
The denominator current can also be supplied externally by
providing a reference voltage (VREF) to Pin 6. The circuit operates
identically to the rms case, except that I3 is now proportional to
VREF. Therefore,
I 4 = Avg
I 12
I3
and
VOUT =
VIN 2
VDEN
I 2
I 4 = Avg 1 = I 1 rms
I4
and
VOUT = VIN rms
Rev. K | Page 7 of 20
AD637
20
AD637
1 BUFF IN
2 NC
+VS
4.7k
(OPTIONAL)
SQUARER/
DIVIDER
+VS
5 CS
25k
VS
DEN
6 INPUT 25k
11
10
+VS
VS
VOUT = VIN2
+ CAV
CAV 8
00788-005
7 dB OUTPUT
5
10
15
SUPPLY VOLTAGE DUAL SUPPLY (V)
18
CHIP SELECT
VIN
NC 12
BIAS
10
VIN 13
3 COMMON
15
BUFF
OUT 14
NC
ABSOLUTE
VALUE
OUTPUT
4 OFFSET
00788-006
STANDARD CONNECTION
The AD637 includes a chip select feature that allows the user
to decrease the quiescent current of the device from 2.2 mA to
350 A. This is done by driving CS, Pin 5, to below 0.2 V dc.
Under these conditions, the output goes into a high impedance
state. In addition to reducing the power consumption,
the outputs of multiple devices can be connected in parallel
to form a wide bandwidth rms multiplexer. Tie Pin 5 high to
disable the chip select.
Rev. K | Page 8 of 20
AD637
5.0
EO
IDEAL
EO
AD637K MAX
2.5
INTERNAL TRIM
DOUBLE-FREQUENCY
RIPPLE
00788-009
ERROR (mV)
AVERAGE ERROR
AD637K
EXTERNAL TRIM
TIME
0.5
1.0
INPUT LEVEL (V)
1.5
2.0
00788-007
5.0
1 BUFF IN
2 NC
OUTPUT
OFFSET
TRIM
+VS
R1
50k
VS
BUFF
OUT
ABSOLUTE
VALUE
3 COMMON
R2
1M
+VS
OUTPUT
4 OFFSET
4.7k
SQUARER/
DIVIDER
5 CS
R4
13 147 VIN
NC
12
VS
25k
DEN
6 INPUT 25k
1
in % of reading
0.16 + 6.4 2 f 2
14
NC
VIN
+VS
BIAS
11
10
+VS
VS
VOUT = VIN2
100
50
in % of reading where ( > 1 f )
6.3 f
10
PEAK RIPPLE
1.0
DC ERROR
0.1
10
100
1k
SINE WAVE INPUT FREQUENCY (Hz)
10k
00788-010
00788-008
CAV
7 dB OUTPUT
+ CAV
Figure 10. Comparison of Percent DC Error to the Percent Peak Ripple over
Frequency Using the AD637 in the Standard RMS Connection with a 1 F CAV
Rev. K | Page 9 of 20
AD637
+ CAV
FOR A SINGLE-POLE
FILTER SHORT RX
AND REMOVE C3
00788-011
C2
24k
100
1k
INPUT FREQUENCY (Hz)
100
0.1
0.01
10
100
1k
INPUT FREQUENCY (Hz)
0.1
10k
0.01
100k
100
100
10
10
R
RO
R
ER
O
%
R
01
ER OR
0.
R
R
ER RO
ER
1%
0.
5%
Figure 13. Values of CAV, C2, and 1% Settling Time for Stated % of Reading
Averaging Error* for 1-Pole Post Filter (see * in Figure)
1%
R
O
R
R
ER
O
R
%
01
R
ER
0.
O
R
1%
R
0.
ER RO
ER
10
5%
10
100
1%
0.01
100k
Figure 12. Values for CAV and 1% Settling Time for Stated % of Reading Averaging
Error* Accuracy Includes 2% Component Tolerance (see * in Figure)
10k
RX
24k
10
00788-012
0.1
00788-013
CAV 8
0.1
0.1
0.01
0.1
10
100
1k
INPUT FREQUENCY (Hz)
10k
7 dB OUTPUT
1.0
0.01
100k
Figure 14. Values of CAV, C2, and C3 and 1% Settling Time for Stated % of
Reading Averaging Error* for 2-Pole Sallen-Key Filter (see * in Figure)
Rev. K | Page 10 of 20
00788-014
VS
DEN
6 INPUT 25k
10
1.0
VS
25k
+VS
+VS 4.7k 5 CS
11
RO
ER
+VS
O
R
ER
BIAS
C3
10
RO
ER
NC 12
SQUARER/
DIVIDER
10
+
%
10
OUTPUT
4 OFFSET
VIN
1%
3 COMMON
RO
ER
VIN 13
ABSOLUTE
VALUE
RMS OUT
%
01
0.
BUFF
OUT 14
1%
0.
2 NC
100
100
AD637
1 BUFF IN
AD637
Table 5. Practical Values of CAV and C2 for Various Input Waveforms
Input Waveform
and Period
Absolute Value
Circuit Waveform
and Period
1/2T
Minimum R CAV
Time Constant
1/2T
1% Settling
Time
181 ms
0.82
2.7
325 ms
10 (T T2)
6.8
22
2.67 sec
10 (T 2T2)
5.6
18
2.17 sec
0V
Symmetrical Sine Wave
B
0V
Sine Wave with dc Offset
T2
T2
0V
T2
0V
T2
FREQUENCY RESPONSE
10
7V RMS INPUT
2V RMS INPUT
Rev. K | Page 11 of 20
1V RMS INPUT
1%
0.1
0.01
10%
3dB
1k
10k
100k
INPUT FREQUENCY (Hz)
1M
10M
00788-015
VOUT (V)
AD637
1.5
1.0
0.5
0.5
POSITIVE INPUT PULSE
CAV = 22F
1.0
1.5
Vp
100s
e0
eIN(RMS) = 1 V RMS
CAV = 22F
1
CF = 10
0.1
5
6
7
CREST FACTOR
10
11
1.8
1.6
1.4
1.2
1000
00788-017
CF = 3
CF = 10
1.0
0.8
CF = 7
0.6
0.4
0.2
0
10
100
PULSE WIDTH (s)
2.0
10
0.01
CF = 3
0
0.5
1.0
VIN (V RMS)
1.5
2.0
00788-019
100s
= DUTY CYCLE =
T
CF = 1/
00788-016
00788-018
Figure 19. Error vs. RMS Input Level for Three Common Crest Factors
Rev. K | Page 12 of 20
AD637
dB CALIBRATION
Refer to Figure 20:
Set VIN = 1.00 V dc or 1.00 V rms
Adjust R1 for 0 dB out = 0.00 V
Set VIN = 0.1 V dc or 0.10 V rms
Adjust R2 for dB out = 2.00 V
Any other dB reference can be used by setting VIN and R1
accordingly.
R2
33.2k
SIGNAL
INPUT
dB SCALE
FACTOR
ADJUST
5k
+VS
BUFFER
AD637
1 BUFF IN
R3
1k*
BUFF
OUT 14
60.4
2 NC
ABSOLUTE
VALUE
3 COMMON
OUTPUT
4 OFFSET
+VS
4.7k
BIAS
SECTION
+VS
25k
5 CS
VS
+VS
10
9
7 dB OUTPUT
VS
VOUT
+
FILTER
COMPENSATED
dB OUTPUT
+ 100mV/dB
VS
11
DEN
6 INPUT 25k
AD707JN
VIN 13
NC 12
SQUARER/DIVIDER
1F
CAV
10k
NC = NO CONNECT
+VS
R1
500k
+2.5 V
AD508J
00788-020
0dB ADJUST
*1k + 3500ppm
SEE TEXT
Rev. K | Page 13 of 20
AD637
V+
1F
3.3M
BUFFER
2 NC
3 COMMON
+VS
OUTPUT
OFFSET 50k
ADJUST
VIN 13
AD548JN
2
FILTERED
V RMS OUTPUT
SIGNAL
INPUT
6.8M
NC 12
BIAS
SECTION
OUTPUT
4 OFFSET
1M
+VS
VS
ABSOLUTE
VALUE
1F
BUFF
OUT 14
AD637
1 BUFF IN
3.3M
SQUARER/DIVIDER
25k
5 CS
4.7k
+VS
VS
25k
11
10
+
FILTER
CAV 8
VS
VOUT
6 DEN
INPUT
7
dB OUTPUT
1000pF
+VS
100F
VIN2
V RMS
499k 1%
CAV1
3.3F
00788-021
NOTES
1. VALUES CHOSEN TO GIVE 0.1% AVERAGING ERROR @ 1Hz.
2. NC = NO CONNECT.
VECTOR SUMMATION
VOUT = VX 2 + VY 2
This concept can be expanded to include additional terms by
feeding the signal from Pin 9 of each additional AD637 through
a 10 k resistor to the summing junction of the AD711 and
tying all of the denominator inputs (Pin 6) together.
If CAV is added to IC1 in this configuration, then the output is
VX 2 + VY 2
If the averaging capacitor is included on both IC1 and IC2, the
output is
V X 2 + VY 2
Rev. K | Page 14 of 20
AD637
EXPANDABLE
BUFFER
1
BUFF IN
IC1
AD637
ABSOLUTE
VALUE
2 NC
3 COMMON
14
VXIN 13
NC 12
BIAS
SECTION
OUTPUT
4 OFFSET
SQUARER/DIVIDER
25k
5 CS
+VS
VS
11
10
4.7k
VOUT
25k
6
DEN
INPUT
7
+VS
VS
9
100pF
FILTER
dB OUTPUT
BUFFER
1 BUFF IN
2 NC
IC2
AD637
ABSOLUTE
VALUE
3 COMMON
+VS
BIAS
SECTION
DEN
6 INPUT
BUFF
OUT
14
VYIN
AD711K
13
10k
NC 12
SQUARER/DIVIDER
25k
5 CS
4.7k
CAV
10k
10k
OUTPUT
4 OFFSET
5pF
+VS
VS
25k
11
+VS
10
20k
VS
VOUT
100pF
7
dB OUTPUT
FILTER
VOUT =
Rev. K | Page 15 of 20
VX2 + VY2
00788-022
+VS
BUFF
OUT
AD637
EVALUATION BOARD
amp, and is configured on the AD637-EVALZ as a low-pass
Sallen-Key filter whose fC < 0.5 Hz. Users can connect to the
buffer by moving the FILTER switch to the on position.
DC_OUT is still the output of the AD637, and the test loop,
BUF_OUT, is the output of the buffer. The R2 trimmer adjusts
the output offset voltage.
00788-123
Rev. K | Page 16 of 20
00788-124
00788-127
AD637
00788-125
00788-128
00788-129
00788-126
Rev. K | Page 17 of 20
AD637
VS
+VS
+ C2
10F
25V
VS
+VS
FILTER
BUF_IN
1
2
OUT
5
3
6
IN
BUFF OUT
BUFF IN
16
2
3
+VS
R1
1M
R2
50k
+VS
4
R3
4.7k 5
VS
6
7
NC
Z1
AD637
COMMON
NC
OUTPUT
OFFSET
+VS
CS
VS
DEN INPUT
dB OUTPUT
DB_OUT
8
VIN
RMS OUT
CAV
NC
NC
R4
24.3k
15
RMS_IN
14
CIN
22F
16V
RMS_IN
13
12
11
BUF_OUT
C3
0.1F
C4
0.1F
+VS
VS
DC_OUT
DC_OUT
+ CAV
10
22F
16V
+ CF1
R5
24.3k
47F
25V
00788-130
+ CF2
47F
25V
PRECISION DMM TO
MONITOR VOUT
Rev. K | Page 18 of 20
00788-131
POWER
SUPPLY
AD637
OUTLINE DIMENSIONS
0.005 (0.13) MIN
14
1
PIN 1
0.310 (7.87)
0.220 (5.59)
0.100 (2.54)
BSC
0.765 (19.43) MAX
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.060 (1.52)
0.015 (0.38)
0.320 (8.13)
0.290 (7.37)
0.150
(3.81)
MIN
SEATING
PLANE
0.070 (1.78)
0.030 (0.76)
0.015 (0.38)
0.008 (0.20)
PIN 1
0.310 (7.87)
0.220 (5.59)
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.320 (8.13)
0.290 (7.37)
0.060 (1.52)
0.015 (0.38)
0.150
(3.81)
MIN
SEATING
0.070 (1.78) PLANE
0.030 (0.76)
15
0
0.015 (0.38)
0.008 (0.20)
Rev. K | Page 19 of 20
AD637
10.50 (0.4134)
10.10 (0.3976)
16
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
0.75 (0.0295)
45
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
8
0
0.33 (0.0130)
0.20 (0.0079)
1.27 (0.0500)
0.40 (0.0157)
03-27-2007-B
ORDERING GUIDE
Model 1
5962-8963701CA
AD637AQ
AD637AR
AD637ARZ
AD637BQ
AD637BR
AD637BRZ
AD637JD
AD637JDZ
AD637JQ
AD637JR
AD637JR-REEL
AD637JR-REEL7
AD637JRZ
AD637JRZ-RL
AD637JRZ-R7
AD637KD
AD637KDZ
AD637KQ
AD637KRZ
AD637SD
AD637SD/883B
AD637SQ/883B
AD637-EVALZ
1
2
Notes
2
Temperature Range
55C to +125C
40C to +85C
40C to +85C
40C to +85C
40C to +85C
40C to +85C
40C to +85C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
0C to 70C
55C to +125C
55C to +125C
55C to +125C
Package Description
14-Lead CERDIP
14-Lead CERDIP
16-Lead SOIC_W
16-Lead SOIC_W
14-Lead CERDIP
16-Lead SOIC_W
16-Lead SOIC_W
14-Lead SBDIP
14-Lead SBDIP
14-Lead CERDIP
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
14-Lead SBDIP
14-Lead SBDIP
14-Lead CERDIP
16-Lead SOIC_W
14-Lead SBDIP
14-Lead SBDIP
14-Lead CERDIP
Evaluation Board
Rev. K | Page 20 of 20
Package Option
Q-14
Q-14
RW-16
RW-16
Q-14
RW-16
RW-16
D-14
D-14
Q-14
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
D-14
D-14
Q-14
RW-16
D-14
D-14
Q-14