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ESE Online Test Series : 2016

Conventional Paper
EE : ELECTRICAL ENGINEERING
Test No. 8 | Analog Circuits
Date: 01-02-2016 |

Subjectwise Test

Duration: 1 hrs.

Maximum Marks: 100

Read the following instructions carefully

1. Candidate should attempt any FOUR questions out of five. Each question carries 25 marks.
2. Marks carried by each subdivision of a question is indicated at the end of subdivision.
3. Answers must be written only in ENGLISH.
4. Assume suitable data, if necessary, and indicate the same clearly.
5. Neat sketches may be drawn, wherever required.
Copyright : MADE EASY

Electrical Engineering Analog Circuits

Q.1 (a) Draw the pin diagram of the 555 timer.

A 555 timer is connected for Astable operation with VCC = 12 V. The component values are selected
as RA = 10 k, RB = 2.3 k and C = 0.1 F.
Calculate
(i) Output frequency
(ii) Duty cycle
(iii) Average power dissipated if 1 k resistive load is connected between source and the output pin.
[5 + 5 + 5 marks]
(b) Design the Zener voltage regulator shown below to meet the following specification.
Load voltage = 6.8 V
Source voltage = 20 V 20%
Load current = 30 mA 50%
The Zener requires a minimum current of 1 mA to breakdown and maximum current of 10 mA diode D
has a forward conducting voltage of 0.6 V.
RS
+

VS

RL

VL

[10 marks]
Q.2 (a) For the operational amplifier shown below, find the expression for output voltage after switch S opened.
Also sketch Vout for 50 msec after opening of the switch.
S
iin

Vin = 5 V
40 k

C = 0.2 F
Vout

3V

[15 marks]

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ESE Online Test Series 2016 : Conventional Paper

(b) Consider the transistor circuit shown below, where VCC = 22.5 V, RC = 5.6 k, RE = 1 k, R2 = 10 k
and R1 = 90 k, = 55, VBE = 0.6 V. The transistor operates in the active region. Determine the operating
point of the transistor and the stability factor.
VCC
RC

R1

V0

R2
RE

[10 marks]
Q.3 (a) Explain the operation of the circuit shown below. What type of signal does it produce? Determine the
frequency of the output signal. How can we change the frequency of the signal to 10 kHz?
C

+
OPAMP1
56 k

R1
22 k
R2

0.022 F

V0

OPAMP2
18 k
R3

[15 marks]
(b) An amplifier has gain A =100 180, upper cut off frequency of 100 kHz and lower cut off frequency
of 1 kHz. A negative feedback of = 0.1 is added. Which one of the following is not correct?
(i) Gain becomes 100/11
(ii) Lower cut off frequency becomes (100/11) Hz
(iii) Upper cut off frequency becomes 1.1 MHz
(iv) dB of feedback is 20 log10 11
[10 marks]

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Electrical Engineering Analog Circuits

Q.4 (a) The figure below shows a source follower using n -channel MOSFETs. Assuming that M1 and M2 both
are in saturation and have different transconductance parameters K 1 and K 2 where
Ki =

n Co x W
i i = 1, 2 and symbols have their usual meaning. Derive an expression for Vout, in
2 L

terms of Vin, VDD, Vs, VB, Vth and K1, K2. Find out the small signal voltage gain.
+VDD
Vin

M1
Vout

VB

M2

fixed
DC

VSS

[15 marks]
(b) For the circuit shown, neglecting base currents find I 0 and I 1, I 2, I 3.
+6 V

I1

I2

I3

10 k
I0

1.4 k

Ro

R1

300

R2

400

R3

500

6 V

[10 marks]
Q.5 (a) Consider the circuit shown in figure. Suppose the operational amplifier is A 741 op-amp. Model the
operational amplifier as an ideal op-amp. Determine how the output voltage, v0, is related to the input
voltage, vs.
i1
v1
v2
Rs
vs +

i0

i2
RL

output V0
+
vL

For A 741, vsat = 14 V, isat = 2 mA

SR = Slew rate limit = 5 105

V
s

Supply voltages +15 V and 15 V.

[15 marks]

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ESE Online Test Series 2016 : Conventional Paper

(b) Analyze the circuit of figure to determine the drain current and the drain voltage. Assume that the
depletion type MOSFET has Vt = 1.0 V, k = 0.5 mA/V2, RD = 1 k and = 0.
10 V
RD

10 M

ID

VD

10 M

[10 marks]

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