EC/EI 1505 ANALOG AND INTEGRATED CIRCUITS

Module I
Introduction to operational amplifiers Op-amp parameters - ideal op amp Frequency response,
frequency compensation. Slew rate and its effect; Input bias current offset - drift - compensating
networks CMRR, SVRR, finite gain bandwidth and its effect in opamp circuits performance.
Open loop configurations Op amp in closed loop configuration: Different feedback
configurations- Voltage series feedback and voltage shunt feedback - concept of virtual groundlinear circuits: Summer- Subtractor, Integrator and differentiator voltage follower - V/I
converters, I/V converters and its applications - Differential amplifiers with one op amp and 3 op
amps- Use of offset minimizing resistor (ROM) and its design. Instrumentation amplifier IC and
its application.
Previous year questions
List the characteristics of an ideal op-amp.

(July 2009)

1. Explain current to voltage converter using op-amp.

(July 2009)
2. Define the following parameters as applied to an op - amp.
i) Input bias current
ii) Input offset current
iii) Input bias voltage
iv) Input offset voltage
v) CMRR
(Nov 2009, July 2009)
3. Explain the working of op - amp inverting amplier. Derive the expressionfor its voltage
gain.
(July 2009)
4. a) Explain the working of Instrumentation amplier. Derive the gain equation.
b) Explain the concept of virtual ground with respect to an op amp.
(July 2009)
1. Draw the circuit of a symmetrical emitter coupled difference amplier and derive an
expression for the difference mode gain Ad and common mode gain Ac.
(June 2008)
2. a) What is a current mirror circuit? Explain its operation with neat diagram.
b) For a differential amplier circuit operated from ilOV , assume matched pair of
transistors with V35 of 0. 7 V . The collector resistance for each is 47k Q. Calculate the value
of RE so that the quiescent collector emitter voltage for eachtransistor is 8.6V.
Assume hfe = 100.
(June 2008)
3. a) Explain the working of Op-amp inverting amplier. Derive the expression for its voltage
gain.
b) Compare inverting and non-inverting amplier.

c) For the circuit shown in gure, nd the closed loop gain, input impedance, common mode
rejection ratio and maximum operating frequency. Op-amp parameters are :ACM = 0.001,
AOL = 180, 000, Z, =1mo, zwm) = 80Q.(max), Slew rate = I 0.5V /Jus
(June2008)
4. a) Explain the working of instrumentation amplier. Name two applications of the same.
b) Dene the following parameters as applied to an op-amp.
i) Input bias current ii) Input offset current
iii) Input offset voltage
iv) GMRR
v) SVRR
(June 2008)
8. Draw the circuit diagram of an instrumentation amplier. Derive the expression for its
output voltage. What are the advantages of instrumentation amplier.
(July 2009)
1. (a) What is meant by input bias current in an op-amp? How it is compensated?
(b) Explain op-arnp differentiator and derive the equation for output voltage.
10. (a) What is meant by input bias current in an op-amp? How it is compensated?
(b) Explain op-arnp differentiator and derive the equation for output voltage. (July 2009)
11. Dene the term virtual ground in an op amp. How is it different from ordinary ground. (Nov
2008)
12. Dene the term slew rate. Also derive the expression for slew rate in an op amp. (Nov 2008)
13. Explain the working of integrator using op - amps.
(Nov 2009)
14. (a) Draw the circuit of an op- amp inverting amplier. Derive the expressions I for voltage
gain and input impedance. (b) Explain virtual ground concept.
(Nov 2009)
15. Derive the expression for gain in an instrumentation amplier.
(Nov 2009)

Questions
1. Explain the working of basic differentiator and derive its expression with neat diagram.
2. Describe practical differentiator with frequency response graph.
3. What are the frequency compensation techniques used, explain with neat diagrams.
4. Explain negative feedback in op-amp. Differentiate various feedback configurations with
block diagram. Also write the effects of feedback on input resistance and output
resistance.
5. Describe the working of differential amplifier with one op-amp.
6. What is the significance of offset minimizing resistor(ROM

Module II
Op amp applications- Log amplifier- Antilog amplifier- Comparators: zero crossing- using
voltage reference- regenerative (Schmitt trigger) comparators, window detector application
2

OPAMP as comparators - Astable and monostablemultivibrators- Triangular and saw tooth wave
generators- - RC phase shift and Wien bridge oscillators-Sample and hold circuit- Peak detector
circuit. Precision rectifiers.
Previous year questions
1. (a)Explain a log amplier and show how saturation current and temperature compensationare
achieved.
(b) Explain the concept of simulated inductance with neat diagram.
(July 2009)
2. a) Explain the working of op amp Schmitt trigger.
b) Draw and explain half wave precision rectier circuit.
(July 2009)
2. a) Explain the working of R.C. phase shift oscillator using op amp.
b) Explain with neat circuit diagram the working of monostablemultivibrator using op- amp.
(July 2009)
3. Explain a peak detector using neat sketches.
(July
2009)
(Nov (2009)
4. Draw the transfer characteristics ofa Schmitt trigger and explain. What is hysterics? (July
2009)
5. Explain the working of a monostablemultivibrator using op-amp with diagram. (july 2009)
6. Draw the circuit of a half wave rectier using op amp and explain its working withrelevant
wave forms.
(Nov 2008)
5. Draw and explain the circuit of an astablemultivibrator.
(Nov 2009)
6. Explain the working of RC phase - shi oscillator using op - amp. Derive the expression for
frequency of oscillation and gain.
(Nov 2009)
7. Explain the working of Schrnitt trigger and plot the transfer characteristics. (Nov 2009)
8. Explain the working of triangular and saw tooth waveform generators.
Questions
1. Desin a monostablemultivibrator with trigger pulse shaping which will drive a LED on
for 0.5 sec each time it is pulsed.
2. Design a square wave wave oscillator for f=1 KHz .The opamp is a 741 with supply
voltages 15 V.
3. (a) In the Schmitt trigger circuit vo = 8V, VUT= 4 V, and VLT = 3 V. Calculate R1/R2 and
Vref. (b) Calculate the value of Vref so that VLT is negative. (c) Calculate the Vref for
VUT = - VLT
4. What is the difference between a sawtooth wave and triangular wave.
5. What is hysteresis? What parameter determine hysteresis,
6. Explain how do you measure the phase difference between two signals.?
3

7.
Module III
Filters: Transfer functions - LPF, HPF, BPF, BRF Approximation methods - Butter worth Chebyshev -Active Filters - I order and II order filters, Quality factor-Design Gyrator Negative Impendence Converter - Filter using Simulated Inductance - Universal Active Filters All Pass filters. Switched Capacitive Filters. ADC and DAC - performance specification weighted, R-2R, successive approximation, flash, integrating.
Previous year questions
1. a) Explain the operation of second order low pas Butterworth lter.
b) Derive the expression for cut-off frequency.
(July 2009)
2. a) Compare Butterworth and Chebyshev lters.
b) Write notes on:
i) Universal active lters
ii) All pass lters
(July 2009)
3. List the important specications of ADC/DAC.
(July 2009)
4. With the help of a circuit, explain a 2nd order high pass Butterworth filter and hence
derive its transfer function.
(July 2009)
5. Explain a 3 bit ash type analog to digital converter. Discuss its advantages and
disadvantages.
(July 2009)
6. What o/p voltage would be produced by a 4 bit DAC whose 0/p voltage range is 0 to
10V and input binary number is 0111?
(July 2009)
7. Design a rst order LPF with a cutoff frequency of l KHZ and pass hand gain of 2. (Nov
2008)
8. Explain the working of Flash type ADC.
(Nov 2009)
9. Explain the working of all pass lter.
(Nov 2009)
10. Explain direct type and integrated type ADCs.
Questions
1.
2.
3.
4.
5.
6.
7.

Define an electric filter. Classify filters.

Discuss the disadvantages of passive filters. Why are active filters prefereed?
What is roll off rate of first order filter?
What is a Sallen- Key filters?
Define a notch filter.
Define a state variable filter
Design a first order low pass filter for a high cut off frequency of 2 KHz and pass band
gain of 2.
4

8. Determine the order of butterworth low pass filter so that w=1.5 w(3db),the magnitude
response is down by atleast 30dB.
9. Design a HPF at a cut off frequency of 1KHz and a pass band gain of 2.
10. Give the circuit of a switched capacitor low pass filter.
Module IV
Specialized ICs and applications: Voltage regulator IC 723, current limiting, short circuit
protection, Thermal protection -555 timers Functional block diagram- AstableMultivibrator,
MonostableMultivibrator and its applications.- 566 VCO chip- Phase locked loop (PLL) - block
diagram, Mathematical Derivation of capture range, lock range and pull in time capture and lock
range- 565 PLL - PLL applications: Frequency multiplication and division- AM demodulation FM detection - FSK demodulation Analog multiplier circuits and applications.
Previous year questions
1. a) Explain in detail about frequency compensation applied to operational ampliers.
b) What is a current mirror? Explain with neat circuit diagram. (July 2009)
2. Draw the block diagrarn of a 566 VCO and derive an expression for the VCOoutput
3.
4.
5.
6.
7.

frequency. (July 2009)

Explain the working of PLL. Explain in detail FSK demodulation using PLL. (July 2009)
Explain the current limiting technique in a 723 voltage regulator. (July 2009)
Compare monolithic and hybrid ICs and also mention about its application area.(July 2009)
Explain the fabrication of monolithic bipolar npn transistor.(July 2009)
What are the features of a 555 timer IC. Draw its functional block diagram and explain. (July

2009)
8. Explain astablemultivibrator using 555 timer. Also give applications. Explain any two.
9. Dene the terms a) lock-inrange
b) capture range
c) pull-in-time (Nov 2008)
10. How can a PLL be used as a frequency translator. (Nov 2008)
11. Draw the block diagram of PLL and explain each block. (Nov 2009)
12. Explain the functional block diagram of 555 timer. How it can be
asmonostablemultivibrator. (Nov 2009)
13. (a) Explain the working of low voltage regulator using 723 IC.
Questions
1. What are the modes of operation of a timer?
2. Discuss some application of timer in monostablemultivibrator
3. Discuss the operation of a FSK generator using 555 timer.
5

used

4. In the astablemultivibrator Ra= 2.2 K,Rb = 6.8 K and C= .01F. Calculate (i)tHIGH
5.
6.
7.
8.

(ii) tLOW (iii) free running frequency (iv) duty cycle D

Design a monostablemultivibrator using 555 timer to produce a pulse width of 100ms.
What is the difference between digital and analog PLLs
List the applications of PLL
In the VCO calculate he change in output frequency if the supply voltage is varied
between 9V and 11V .Assume Vcc = 12V, RT = 6.8 K, CT = 75pF, R1 = 15K and R2

= 100 K.
9. Calculate output frequency f0 lock range fL and capture range

fc of 565 PLL if

RT =10 K,CT = 0.01F and C= 10 F

EC/EI 1506 DIGITAL SIGNAL PROCESSING

Module I
Discrete Time Fourier Transform (DTFT) Properties - Discrete Fourier Transform (DFT)
Properties circular convolution Linear convolution Efficient computation of DFT : Fast
Fourier Transform (FFT) Decimation in Time (DIT) Decimation in Frequency (DIF)
practical considerations - Discrete Hilbert transforms - Introduction to Discrete Hilbert
Transforms, DCT, STFT, Wavelet Transform.
Previous year Questions
1.
2.
3.
4.

Explain wavelet and discrete cosine transform.

Compare N point circular convolution with linear convolution.
Write short notes on Hilbert transform. Mention its applications
Explain any five properties of DFT.

n
5. Find 4-point DFT of x(n) = cos 2

()

6.
7.
a.
8.
a.
9.

(2011).(2012)
(2012)
(2011)(2014)
(2012)
.(2014) (2009)

Write short note on (i) in place communication (ii) bit reversal.

(2014)
Draw a signal flow graph for 8 point DFT using DIF (decimation in frequency) FFT
algorithm. Obtain its computational complexity.
(2012)
Draw the signal flow graph for 8 point DIT FFT. Hence calculate the DFT
of x[n] = [l 2 3 4 5 67 8].
(2010)
By means of DFT and IDFT, perform circular convolution of the following two sequences
x1(n) = (2,1,2,1) and x2(n) = (1,2,3,4).

(2012)
6

10. Whether the system defined by the impulse response h(A) = 2"u(-n) + 2 "u(n) is causal?
Justify your answer.
(2012)
11. Explain the overlap add method of block convolution.
(2013)
12. Derive the DIT FFT algorithm and find the DFT of x(n) = {1,2,3,4,4,3,2,1} using the same
FFT algorithm.
(2013)(2009)
13. Develop DIT FFT algorithm for decomposing the DFT for N = 6 and draw the flow diagram
for N = 2.3.
(2013)
14. Given x(n) = 2" and N = 8. Find x(k) using DIT FFT algorithm.
(2011)
15. Explain Radix-2 decimation is frequency FFT algorithm.
(2011)
16. Find the output y(n) of a filter whose impure response is h(n) = {1,1,1} and input signal x(n)
= {3,-1,0,1,3,2,0,1,2,1} using

(i)overlap - save method

(ii)overlap - add method.

(2011)
17. Find out the output of an LTI DSP system with impulse response h(n)={1,2,3,4,5},excited by
an input x(n) = {1,-2,1,-3}using FFT algorithm.

(2014)

Module II
Finite Impulse Response (FIR) Filters Basic structures direct, cascade, linear phase,
frequency sampling and lattice - Design of FIR filters Fourier series truncation Windowing:
Rectangular, Bartlett - Blackman Hanning - Hamming Frequency Sampling Finite register
length effects - Application of FIR filters.
Previous year Questions
1. Explain the window method for FIR filter realization. What is the disadvantage of
rectangular window?
2. Explain the finite word length effect of FIR filter.
3. A low-pass filter has the desired response as given below:
Hd ( e jw ) = 1 0< w< / 2
0 / 2 w

(2013)
(2013)

Determine the filter coefficients h(n) for M = 7 using type 1 frequency sampling technique.
(2013)
4. Explain the Fourier series method of the FIR filter design.
(2013)
5. What is Gibb's phenomenon? What are the desirable features of windows used in windowing
method?

(2012)
7

6. What is the effect of filter coefficiencies on a digital filter? How do you minimize this effect?
(2012)
7. Explain the frequency sampling method of FIR filter design in detail.
(2012)
8. (h) Why digital filters frequency range is restricted to -z to +z radian.
(2012)
9. What are the advantages and disadvantages of FIR filters?
(2011)
10. Determine the direct form realization system function. H(z) = l + 2z-1 -3z-2 -4z-3 +5z-4 (2011)
11. Obtain the cascade realization of system function. H(z) = (1 + 2z-1 -2z-2)(1 + z-1-z-2). (2011)
12. The desired frequency response of a low pass filter is
e
( jw )= e 3 /4< w<3 /42
03 /4 lwl .
Hd

jw

Design using hanning window for N=7

(2014)

13. The desired frequency response of a low pass filter is

e
( jw )= e 3 /4< w<3 /42
0 3 / 4 lwl .
Hd

jw

Design using hamming window for N=7

(2011)

Module III
Infinite Impulse Response (IIR) Filters Basic structures : Direct form I & II , cascade and
Parallel Design of IIR Filters Butterworth Chebyshev - Impulse Invariance Bilinear
Transformation Frequency transformations Finite register Length effects Applications of
IIR Filters Dual Tone multi frequency generation and detection.
Previous year Questions
1. Compare FIR and IIR filters. Write application of FIR filter and IIR filter.
(2012) (2011)
2. Explain the two kinds of limit cycle behaviour in DSP.
(2011)
3. Write short notes on:(i) Matched z transform (ii) Finite word length effects in IIR
filter design
(2011)
4. What is the effect of filter coefficiencies on a digital filter? How do you minimize this effect?
(2012)
5. Explain the impulse invariant transformation.
8

(2013)

6. Convert the analog filter with system function

s+ 0.1
H(s) = ( s+ 0.1 )2+ 9 .into a digital IIR filter using bilinear transformation. The digital filter
should have a resonantfreq of wr= /4.
(2011)(2013)
7. Design a chebyshev filter with a maximum pass band attenuation of 2.5 dB at
Qp = 20rad/sec and the stop band attenuation of 30 db at Qs = 50rad/sec.
(2012)
8. For the constraints
jw
0.8<|H( e )|<l 0 w 0.2z
jw
|H( e )|<0.2

0.6 z w zwith T = 1 sec. Determine system function H(z) for a

Butterworth filter using bilinear transformation method, Take sampling period 2ms.
(2012)(2014).
9. Determine the direct form II, cascade and parallel form realizations for the system
y(n) = 0.25x(n) - 0.14x(n - 2) + 0.65 y{n - 2)-0.3y(n-l).
(2012)
10. Design an ideal high pass filter with a frequency response
jw
11. Hd( e ) = 1 for <|w
= 0 for w/2

Find the values of h(n) for N = 11

.(2013)

12.

(2011)
13. Obtain the direct form I, direct form II, cascade and parallel form realization for the
following system.
y(n) = -0.1y(n-1) + 0.2y(n-2) + 3x(n) +3.6 x(n -1) + 0.6x(n - 2) (2011)
14.

(2011)
1

15. Realize the system

1+ 0.1 z
0.72 z2
0.7 (13.6 z2) using
H ( z )=

(i) direct form I

(iii)cascade form

(ii) direct form II

(iv) parallel form

(2014)

Module IV
General and Special purpose Digital Signal Processors Harvard architecture Pipelining
Hardware Multiplier Accumulator -Special Instructions - Fixed and Floating Point Processors
TMS320C54X Architecture Instruction set - Addressing modes - TMS320C67X
Architecture - Instruction set Addressing modes .
Previous year Questions
1.
2.
3.
4.
5.

Compare the fixed point and floating point arithmetic processor.

(2014)(2011)
Explain the application of DSP in image processing.
(2011)
Explain the general features of DSP architecture.
(2011)
Explain the feature of fixed point processor.
(2012)
Explain the architecture of the TMS 320C4X processor with the help of a neat block

diagram.
(2010)
6. What are the features of share processor?
(2009)
7. Write short notes on: (i) Pipe lining (ii) Extended parallelismCompare and contrast general
purpose microprocessor and DSP.
(2010)(2011)
8. Explain the data addressing modes of TMS 320 C54X fixed point processor. Briefly explain
the architecture of TMS 320C processor.
(2014)
9. Compare Harvard architecture used by the TMS 320 DSP family with that of a standard von
Neumann processor.
10. With block diagram,explain the architecture of TMS320C67X processor.

10

(2013)
(2014)