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Hex inverter
Rev. 4 3 August 2012
1. General description
The 74HC04; 74HCT04 is a hex inverter. The inputs include clamp diodes that enable the
use of current limiting resistors to interface inputs to voltages in excess of VCC.
3. Ordering information
Table 1.
Ordering information
Type number
74HC04N
Package
Temperature range
Name
Description
Version
40 C to +125 C
DIP14
SOT27-1
40 C to +125 C
SO14
SOT108-1
40 C to +125 C
SSOP14
SOT337-1
40 C to +125 C
TSSOP14
SOT402-1
40 C to +125 C
DHVQFN14
74HCT04N
74HC04D
74HCT04D
74HC04DB
74HCT04DB
74HC04PW
74HCT04PW
74HC04BQ
74HCT04BQ
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
4. Functional diagram
1
1A
1Y
2A
2Y
3A
3Y
4A
4Y
11
5A
5Y
10
13
6A
6Y
12
11
10
13
12
mna343
mna342
Fig 1.
5
5
Logic symbol
Fig 2.
mna341
Fig 3.
1A
terminal 1
index area
14 VCC
5. Pinning information
1Y
13 6A
1A
14 VCC
2A
12 6Y
1Y
13 6A
2Y
04
11 5A
2A
12 6Y
3A
10 5Y
2Y
GND(1)
3A
10 5Y
3Y
3Y
4A
GND
4Y
8
4Y
9
7
11 5A
GND
04
4A
001aac442
001aac441
Fig 4.
74HC_HCT04
Fig 5.
2 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
Pin description
Symbol
Pin
Description
1A
data input
1Y
data output
2A
data input
2Y
data output
3A
data input
3Y
data output
GND
ground (0 V)
4Y
data output
4A
data input
5Y
10
data output
5A
11
data input
6Y
12
data output
6A
13
data input
VCC
14
supply voltage
6. Functional description
Table 3.
Function table
H = HIGH voltage level; L = LOW voltage level
Input
Output
nA
nY
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
IIK
IOK
IO
output current
25
mA
ICC
supply current
50
mA
IGND
ground current
50
mA
Tstg
storage temperature
65
+150
DIP14 package
750
mW
500
mW
Ptot
Conditions
Max
Unit
0.5
+7
[1]
20
mA
[1]
20
mA
[2]
74HC_HCT04
Min
3 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
[1]
[2]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C.
For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
Conditions
74HC04
74HCT04
Unit
Min
Typ
Max
Min
Typ
Max
VCC
supply voltage
2.0
5.0
6.0
4.5
5.0
5.5
VI
input voltage
VCC
VCC
VO
output voltage
VCC
VCC
Tamb
ambient temperature
t/V
40
+25
+125
40
+25
+125
VCC = 2.0 V
625
ns/V
VCC = 4.5 V
1.67
139
1.67
139
ns/V
VCC = 6.0 V
83
ns/V
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
Min
Typ
VCC = 2.0 V
1.5
Min
Max
Min
Max
1.2
1.5
1.5
74HC04
VIH
VIL
VOH
HIGH-level
input voltage
LOW-level
input voltage
HIGH-level
output voltage
74HC_HCT04
VCC = 4.5 V
3.15
2.4
3.15
3.15
VCC = 6.0 V
4.2
3.2
4.2
4.2
VCC = 2.0 V
0.8
0.5
0.5
0.5
VCC = 4.5 V
2.1
1.35
1.35
1.35
VCC = 6.0 V
2.8
1.8
1.8
1.8
IO = 20 A; VCC = 2.0 V
1.9
2.0
1.9
1.9
IO = 20 A; VCC = 4.5 V
4.4
4.5
4.4
4.4
VI = VIH or VIL
IO = 20 A; VCC = 6.0 V
5.9
6.0
5.9
5.9
3.98
4.32
3.84
3.7
5.48
5.81
5.34
5.2
4 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
Table 6.
Static characteristics continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
25 C
Conditions
Min
VOL
LOW-level
output voltage
Typ
Max
Min
Max
Min
Max
VI = VIH or VIL
IO = 20 A; VCC = 2.0 V
0.1
0.1
0.1
IO = 20 A; VCC = 4.5 V
0.1
0.1
0.1
IO = 20 A; VCC = 6.0 V
0.1
0.1
0.1
0.15
0.26
0.33
0.4
0.16
0.26
0.33
0.4
II
input leakage
current
VI = VCC or GND;
VCC = 6.0 V
0.1
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
20
40
CI
input
capacitance
3.5
pF
74HCT04
VIH
HIGH-level
input voltage
2.0
1.6
2.0
2.0
VIL
LOW-level
input voltage
1.2
0.8
0.8
0.8
VOH
HIGH-level
output voltage
4.4
4.5
4.4
4.4
IO = 4.0 mA
3.84
4.32
3.84
3.7
VOL
LOW-level
output voltage
0.1
0.1
0.1
IO = 5.2 mA
0.15
0.26
0.33
0.4
II
input leakage
current
VI = VCC or GND;
VCC = 5.5 V
0.1
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
20
40
ICC
additional
supply current
120
432
540
590
CI
input
capacitance
3.5
pF
74HC_HCT04
5 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
25 C
Conditions
40 C to +125 C Unit
Min
Typ
Max
Max
(85 C)
Max
(125 C)
25
85
105
130
74HC04
propagation delay nA to nY; see Figure 6
tpd
[1]
VCC = 2.0 V
VCC = 4.5 V
17
21
26
ns
VCC = 5.0 V; CL = 15 pF
ns
14
18
22
ns
VCC = 2.0 V
19
75
95
110
ns
VCC = 4.5 V
15
19
22
ns
13
16
19
ns
21
pF
10
19
24
29
ns
VCC = 6.0 V
transition time
tt
[2]
see Figure 6
VCC = 6.0 V
power dissipation
capacitance
CPD
ns
[3]
74HCT04
propagation delay nA to nY; see Figure 6
tpd
[1]
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
transition time
tt
power dissipation
capacitance
CPD
ns
[2]
15
19
22
ns
per package;
VI = GND to VCC 1.5 V
[3]
24
pF
[1]
[2]
[3]
74HC_HCT04
6 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
11. Waveforms
VI
VM
nA input
VM
GND
t PHL
t PLH
VOH
90 %
VM
VM
nY output
10 %
VOL
t THL
t TLH
mna722
Fig 6.
Table 8.
Type
Input
Output
VM
VM
74HC04
0.5VCC
0.5VCC
74HCT04
1.3 V
1.3 V
VI
negative
pulse
tW
90 %
VM
VM
10 %
GND
tr
tf
tr
VI
positive
pulse
GND
tf
90 %
VM
VM
10 %
tW
VCC
G
VI
VO
DUT
RT
CL
001aah768
Fig 7.
74HC_HCT04
7 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
Table 9.
Test data
Type
Input
Load
Test
VI
tr, tf
CL
74HC04
VCC
6.0 ns
15 pF, 50 pF
tPLH, tPHL
74HCT04
3.0 V
6.0 ns
15 pF, 50 pF
tPLH, tPHL
74HC_HCT04
8 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
SOT27-1
ME
seating plane
A2
A1
c
e
w M
b1
(e 1)
b
MH
14
pin 1 index
E
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b1
D (1)
E (1)
e1
ME
MH
Z (1)
max.
mm
4.2
0.51
3.2
1.73
1.13
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
2.2
inches
0.17
0.02
0.13
0.068
0.044
0.021
0.015
0.014
0.009
0.77
0.73
0.26
0.24
0.1
0.3
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.087
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT27-1
050G04
MO-001
SC-501-14
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-13
9 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
SOT108-1
A
X
c
y
HE
v M A
Z
8
14
Q
A2
(A 3)
A1
pin 1 index
Lp
1
detail X
w M
bp
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
D (1)
E (1)
HE
Lp
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.16
0.15
0.010 0.057
inches 0.069
0.004 0.049
0.05
0.244
0.039
0.041
0.228
0.016
0.028
0.024
0.01
0.01
0.028
0.004
0.012
8o
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
10 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
A
X
c
y
HE
v M A
Z
8
14
Q
A2
(A 3)
A1
pin 1 index
Lp
L
7
detail X
w M
bp
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
D (1)
E (1)
HE
Lp
Z (1)
mm
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
0.65
7.9
7.6
1.25
1.03
0.63
0.9
0.7
0.2
0.13
0.1
1.4
0.9
8o
o
0
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT337-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-150
11 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
c
y
HE
v M A
14
Q
(A 3)
A2
A1
pin 1 index
Lp
L
7
e
detail X
w M
bp
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
D (1)
E (2)
HE
Lp
Z (1)
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.72
0.38
8o
o
0
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT402-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
12 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
SOT762-1
14 terminals; body 2.5 x 3 x 0.85 mm
A
A1
E
detail X
terminal 1
index area
terminal 1
index area
e1
e
2
y1 C
v M C A B
w M C
Eh
e
14
13
9
Dh
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A(1)
max.
A1
0.05
0.00
0.30
0.18
D (1)
Dh
E (1)
Eh
0.2
3.1
2.9
1.65
1.35
2.6
2.4
1.15
0.85
e
0.5
e1
y1
0.5
0.3
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT762-1
---
MO-241
---
EUROPEAN
PROJECTION
ISSUE DATE
02-10-17
03-01-27
13 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
13. Abbreviations
Table 10.
Abbreviations
Acronym
Description
CMOS
LSTTL
ESD
ElectroStatic Discharge
HBM
MM
Machine Model
CDM
TTL
Transistor-Transistor Logic
Revision history
Document ID
Release date
Change notice
Supersedes
74HC_HCT04 v.4
20120803
74HC_HCT04 v.3
Modifications:
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
74HC_HCT04 v.3
20030723
74HC_HCT04_CNV v.2
74HC_HCT04_CNV v.2
19970826
Product specification
74HC_HCT04
14 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
Product status[3]
Definition
Development
This document contains data from the objective specification for product development.
Qualification
Production
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT04
15 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
74HC_HCT04
16 of 17
74HC04; 74HCT04
NXP Semiconductors
Hex inverter
17. Contents
1
2
3
4
5
5.1
6
7
8
9
10
11
12
13
14
15
15.1
15.2
15.3
15.4
16
17
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 15
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Contact information. . . . . . . . . . . . . . . . . . . . . 16
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section Legal information.