ELECTRONIC CIRCUIT

DESIGN [EC-683]
Saroj Mohan Institute Of Technology
(Degree Div)
Electronics and Communication Engineering
3rd year 2nd semester, 2009-2010.

Electronic Circuit Design| Lab Report 1

Electronic Circuit Design| Lab Report 2
Without the permission & help of our teachers it is impossible for us to do
this Seasonal lab in electronics circuit design. This lab gives us the opportunity
to gather very interesting & technical knowledge based on electronic circuit,
design parameters and its components. We hope that this lab will be very
helpful to us in our future, as we are students of Electronics &
Communication Engineering.

Further we express our heartfelt thanks to Samir Sir and Sayan Sir to provide
us with the essentials for this lab from the very beginning. They also give us
so many technical & practical knowledge on electronics system & electronic
circuit components.

It is undeniable that without the help of our other group members it will be
very hard to perform this lab, so we are grateful to our group mates also.

Name Roll no.

SOURAV DHAR 071680103001

SUDIP KUMAR PAL 071680103013

DEBAYAN CHAKRABORTY 071680103019

DEBASISH KUMAR BIT 071680103033

Electronic Circuit Design| Lab Report 3

 INDEX

SL ASSIGNMENT NAME DATE PAGE REMARKS

NO.
1 Design a DC power Supply 4-10

2 Design a square wave 11-15

generator for 650 Hz with the
help of an astable
multivibrator using NE555 IC
3 Design an audio frequency 16-21
amplifier for the gain of 60dB

4 To design a transistor 22-24

amplifier

5 Design a monostable 25-26

multivibrator using NE555 IC

6 To design Full Subtractor using 27-29

Multiplexer.

7 DATASHEETS of components ----------

used -

Electronic Circuit Design| Lab Report 4

 ASSIGNMENT NO.-1
 Assignment Name:-Design 12V regulated power supply to have a
maximum current of 500mA.
• Theory:-

There are many type of power supply. Most are design to convent high
voltage AC mains electricity to a suitable low voltage supply for electronic circuit
&other devices.

For example, a 5v regulated power supply

➢ Block diagram of a Reguleted power system

Power supplies made from these blockes are deseribed below:-

1. Transformer only.

2. rectifier.

3. smoother.

4. regulator.

➢ BLOCK DIAGRAM:::---

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1. Transformar : : An input voltage of 220 volt a.c is applied to the
transformer. The transformer steps down high voltage AC mains to low
voltage AC. Transformers convert AC electricity from one voltage to
another(220 volt to 6 volt)with little loss of power.

2. Rectifier: A rectifier is an electrical device that converts alternating

current (AC) to direct current (DC), and the process is known
as rectification

3. Smoothimg: Smoothing is performed by a large value electrolytic

capacitor connected across the DC supply to act as a reservoir, supplying
current to the output when the varying DC voltage from the rectifier is
falling. The diagram shows the unsmoothed varying DC (dotted line) and
the smoothed DC (solid line). The capacitor charges quickly near the peak
of the varying DC, and then discharges as it supplies current to the
output.

4. Regulator: A voltage regulator is an electrical regulator designed to

automatically maintain a constant voltage level and the process is called
regulation.

Electronic Circuit Design| Lab Report 6

 • Standard circuit:---

Full – wave rectifier circuit::--

• COMPENT REQUIRED:-

1.220V/18-0-18 1 Ampere centre- tapped transformer.

2. Vero board.

3. Diodes.

4. Capacitor.

5. C.R. O

6. Patch cord.

• SPECIFICATION:-

1. FULL-WAVE RECTIFIERS:- This is a classic circuit that can

accurately convert an AC signal to DC. At 40 Hz the input signal can be as
low as 0.05volts peak to peak.

2. Full wave rectifier operates to 200MHz:- This circuit used current

– feedback amplifiers to implement a wideband full – wave rectifier for
application such as Control /AGC system reference or as amplitude
indicator.

3. Full – wave Rectifier uses Current feedback amplifier:-

Doubling for rectifying or continuous wave signal by using diode bridges usually
causes problems with low input or at high frequency.

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 • CALCULATION:--

(Without Filter)--

The Ripple factor of a full wave rectifier is given by-

γ=√( (VrmsVdc)2-1)

Vdc=1/π0πVmsinωtd(ωt)

=Vm/π[-cos(ωt)]π0

Idc=Vdc/RL=2Vm/πRL=2Im/π

Irms=Im/2

The Rms value of the voltage at the load resistance is

Vrms=[1/π0πVm2sin2ωtd(ωt)]1/2

=Vm/2

γ=(Vm/22/(2Vm/π)2-1)

=(π/2)2-1

=0.482

Effiency η is the ratio of DC output power to AC input power

η =(DC o/p power)/(AC i/p power)

=Pdc/Pac

= (Vdc2/Rl)(Vrms2/Rl) =[2Vm/π]2/[Vm/2]2

Electronic Circuit Design| Lab Report 8

 =8/π2=81.2%

So the maximum efficiency of full wave rectifier is 81.2% .Transformer utilization

factor(TUF)is used to determine the rating of a transformer secondary. It is
determine by considering the primary and the secondary winding separately and it
gives a value of 0.693.

Form factor is defined as the ratio of the rms value of the output voltage to the
average value of the output voltage.

Form factor=((rms value of o/p voltage)/(avg value of the o/p voltage)

=(Vm/2)/(2Vm/2)

=π/22

=1.11

The peak factor is defined as the ratio of the peak value of the output voltage to the
rms value of the output voltage

Peak factor=(peak value of0/p voltage)/ (rms value of0/p voltage)

=Vm/(Vm/2)

=2

Peak inverse voltage for full wave rectifier is 2Vm because the entire secondary
voltage appears across the non-conducting diode

(WITH FILTER:::---)

➢ Ripple Voltage Triangular wave form

The charge it has acquired=Vrp – p*C

Electronic Circuit Design| Lab Report 9

The charge it has lost=Idc * T2

(Vrp – p *C) = (Idc *T2)

If the value of the capacitor is fairly large, or the value of the load resistance is very
large, then it can be assumed that the time T2 is equal to half the periodic time of
wave form.

T2=T/2=1/2f

Then Vrp – p=Idc/2fc

From the above assumption the ripple wave form will be triangular and its rms
value is given by

Vrms=(Vrp – p)/ 23=(Idc/(43fcRL)=(Vdc)/( 43fcRL) So,Idc=Vdc/RL

Ripple y=Vrms/Vdc=1/4√3fcRL, Idc= Vdc/RL

• APPROXIMATION::--

LOAD RESISTENCEr=2 k ohoms.

Load capacitanceC=10µF

RESULT:

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FIG: WITHOUT FILTER

FIG: WITH FILTER

TESTING:--

1.

Consider the first half cycle .When the source voltage polarity is positive(+) on
top and negative(-)on the bottom. At this time only the top diode is conducting
.The bottom diode in blocking current ,and the load ‘sees’ the first half of the sine

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wave. Positive on the top and negative on the bottom. At this time only the top
diode is conducting. Only the top half of the transformers winding carries current
during this half cycle.

2.

During the next half cycle ,the AC polarity reverses .Now the other diode and the
other half of the

transformer secondary winding carry current while the portions of the current
formely carrying current

during the last half cycle. The load still ‘sees’ half of the sine wave of the same
polarity as before; positive on top & negative on bottom.

• Conclusion:-

Rectification is the conversion of alternating current (Ac) direct current (Dc). A full
wave in a circuit that converts both half cycle of AC voltage waveform to an
unbroken series of voltage pulses of the same polarity. The resulting DC delivered
to the load doesn’t pulsate as much, so this are the thing we conclude at the end.

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 ASSIGNMENT NO - 02

 AIM: - Design a square wave generator by using Astable Multivibrator.

• THEORY:-

• 555 Timer:-

The 8-pin 555 timer must be one of the most useful that is ever made and is used in
many……

The input of the 555-timer as follows:-

1) TRIGGER INPUT: - when <1/3V3 (“active low”) this makes the output high
(+Vs). It monitors the discharging of the timing capacitor in an astable
circuit. It has a high input impedance >2MΩ.

2) THRESOLD INPUT: - When >2/3V3 (“active high”) this makes the output low,
it monitors the charging of the timing capacitor in astable & monostable
circuits. It has a high input impedance >10M Ω.

3) RESET INPUT:- When it is less than 0.7V(“active low”) this makes the output
low (…..). Overriding the other inputs when not required, it should be
connected to +Vs. It has an input impedance of about 10K Ω.

4) CONTROL INPUT:- This can be used to adjust the threshold voltage which is
set internally to be 2/3Vs. Usally this function is not required and the control

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 input is connected to ……..0v with a 0.01µf capacitor to eliminate electrical
noise.

• COMPONEMTS REQUIRED:-
1) 555 Timer IC
2) Two resistors
3) Two capacitors
4) Diode
5) C.R.O

• OPERATION PERFORMED:-

With the output high (+Vs), the capacitors CI is charged by current flowing through
R1 & R2, the threshold and trigger input monitor the capacitor voltage and when it
reaches 2/3Vs (threshold voltage) the output becomes low and the discharge pin is
connected to 0V. The capacitor now discharges with current flowing through R2 into
the discharge pin. When the voltage fails to 1/3Vs (trigger voltage) the output
becomes high again and the discharge pin disconnected, following the capacitors to
start charging again.

This cycle repeats continuously unless the reset input is connected to 0V

which forces the output low while reset is 0V.

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 • DUTY CYCLE:-

90% duty
cycle (Tm =4Ts)

Ts= 0.7*R2*C1
Duty cycle with diode = Tm/ (Ts+Tm) = R1/ (R1+R2)
• DESIGN:-
Vcc

4 8

RA 3
555 Output

7
Discharge

RB 6 Control
Threshold
2 5 Voltage
Trigger

C 1
C = 0.1µf (optional)
 Figure 2. The Basic 555 Astable Circuit

• DESIGN CONCIDERATION:-
1) Choose C1 to suit the frequency range we require.
2) Choose R2 to give the frequency (f) we require. Assume that R1 is much
smaller than R2.
3) R2=0.7/(f*C1)
4) Choose R1 to be about a tenth of R2 (1KΩ min) unless we went to mark time.

• CALCULATION:-
1) To calculate the frequency :-

F=1/0.693*(R1+R2)*C (in H2)

2) To calculate the on time:-

Ton= 0.693*(R1+R2)*C (in seconds)

3) To calculate the OFF time:-

TOFF= [0.693*R2*c]

4) To calculate the percent time high (%) :-

Duty cycle= (R1+R2)/ (R1+2R2) 100%

5) To calculate the percent time low (%):-

=R2/ (R1+2R2) 100%

Value Value Valu Output Output Output Output Output

of of e of time time Period(High Frequen Duty
R1(Ω R2(Ω) C1(µ High Low + Low) cy (Hz) Cycle
) F) (Second (Second (Seconds) (%)
s) s)

1000 10000 0.001 0.000007 0.0000069 0.0000014552 68714.35 52.3809

629 2

1000 10000 0.01 0.000076 0.000069 0.000145 6871.43 52.3809

1000 10000 0.1 0.00076 0.00069 0.00145 687.143 52.3809

10000 100000 0.001 0.000076 0.000069 0.000145 6871.435 52.3809

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10000 100000 0.01 0.000762 0.000692 0.0014553 687.1435 52.3809
3

10000 100000 0.1 0.007623 0.00692 0.014553 68.71435 53.3809

• APPROXIMATIONS:-

555 Astable Frequency.

555 ASTABLE
FREQUENCIES
C1 R2=10KΩ R2=100KΩ R2=1µΩ
R1=1KΩ R1=10KΩ R1=100KΩ
0.001ΩF 68KHz 6.8KHz 680Hz
0.01ΩF 6.8KHz 680Hz 68Hz
0.1ΩF 680Hz 68Hz 6.8Hz
1ΩF 68Hz 6.8Hz 0.68Hz
10ΩF 6.8Hz 0.68Hz 0.068Hz
•TESTING AND RESULTS:-
A timing interval starts when trigger input (“fr”) goes lower than 1/3 Vin or
3.33V. When this happens, the 555 output goes high, and the 555 waits for the
threshold input (“th”) to reach 2/3V or 6.67V. As the capacitor a charge, the
threshold input slowly raises until it reaches the required level. Then the timing
interval ends. The output goes low, and the capacitor is discharging through the
“dis” input. When the capacitor is discharged enough so that the trigger reaches
3.33V, then a new timing interval begins. The end result is a square wave.

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 • CONCLUSION:-
The 555 timer Ic is non figured to be as an astable multivibrator. As astable
multivibrator is a timing circuit whose “low” and “high” both states are unstable. As
such, the output of an astable multivibrator toggle between “low” and “high”
continuously, in effect generates a train of pulses. The circuit is therefore called
“pulse generator” circuit.

ASSIGNMENT NO - 03
 AIM:- Design a single stage audio frequency voltage amplifiers with BJT for a
given Av. Zin ,Zout and maximum symmetric output swing.

• THEORY:-
The term amplifier refers to any device that increases the amplitude of a
signal usually
Measured in voltage or current. Especially in audio technology, a wide range of
amplifier can be
Produced based on product specifications. Transistors are the most important part
of amplifier
Circuits, capable of controlling at output signal in comparison to an input signal. A
transistor can
Produce gain. In other words, the transistors are responsible for amplification
component of audio
amplifier.

Class B amplifier are generally used in synchronization. Class B push- pull

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Class AB is more efficient them class A with lower distortion than class B.

Another popular method of controlling amplifier distortion in negative

feedback. A portion of the
Amplifiers output is transferred back to the input.

At very high frequency, the gain becomes inversely related to frequency as

performance drop off.
This continues until the point that the gain drops with an increase in frequency. This
input is known as 3 dB point. For optimal performance, the 3dB point of an amplifier
should full beyond the amp’s active range of frequency.

• DESIGN:-

Electronic Circuit Design| Lab Report 19

 Fig: OUTPUT STAGE

• DESIGN SPECIFICATION:-
The design specifications are as follows:-
1) Our amplifier had to be able to amplify a signal from a portable music player
(0.8V-1.1V supply voltage load). In order to reach satisfactory amplitude. 1.7
times gain is necessary for each section of the input stage.
2) Class A designs are capable of this gain, and their high inefficiency was not a
major factor in the small scale of our experiment. However, these amplifiers
invert the input signal.

The designer need to increase the power gain in order to drive the speakers at this
output. Class AB amplifier are capable of producing power gain. Audio signals in the
modern music industry are now broadcast almost exclusively in stereo-sound. To
account for the dual signal amplification the entire circuit was repeated. The final
output of the amplifier was fed through a low power audio speaker, complete the
circuit.

• TESTING:-
There are three stages of our audio amplifier are as follows:-

First stage of audio Amplifier:-

The complicated set-up of the emitter leads to a new equation for determining the
resistance.

Electronic Circuit Design| Lab Report 20

 A=β*RL1 / [Rπ+βREL] where, A= gain
β∞400
RL1= sum of resistor in parallel
Re1
Rπ =β*Vt/Ic

Second stage of audio amplifier:-

The ideal voltage entering the base of the transistor was 3v. The current
increasing from 1µ amp in the first class A amplifier to 5µA in the second. Even
through this will result in different resistors values, the equations involved in the
calculating are the same in both resistance.

Output stage of our amplifier:-

Electronic Circuit Design| Lab Report 21

 • CALCUCATION:-
After the circuit was biased, we discovered the certain resistors required for our
circuit are arranged in table as follows:-

Theoretical resistor value Actual resistor value

5K 4.7K
180 200K
1.1 1.2K
280 270

• APPROXIMATION:-
The comparison of the theoretical simulated and actual values at different stage of
amplifier is as follows:-

Electronic Circuit Design| Lab Report 22

 Voltage Theoretical Simulated Actual ∆V
V b1 2.86V 2.84V 2.84V 0.02V

VE1 2.16V 2.18V 2.16V 0.00V

VC1 7.3V 7.77V 7.78V 0.48V

VB2 2.86V 2.77V 2.75V 0.11V

VE2 2.16V 2.07V 2.04V 0.12V

VC2 7V 7.64V 7.68V 0.69V

VB3 6V 6.01V 5.83V 0.17V

VE3 6.7V 6.57V 6.57V 0.13V

VE4 5.3V 6.46V 5.33V 0.03V

VE5 6V 6.03V 5.95V 0.05V

The comparison of the theoretical, simulated and actual given values of each stage
of amplifier:-

Stage Theoretical Simulated Actual ∆Gain

st
1 stage 1.7 1.55 1.56 0.14

2nd stage 1.7 1.65 1.56 0.14

Final 3.0 2.21 2.14 0.86

Output
RESULTS:-
The computer simulation play an important role in the process of building an audio
amplifier:-

Electronic Circuit Design| Lab Report 23

 • Time domains simulations as:-
1) First stage
2) Second stage
3) Output/Third stage
4) Input Signal.

• CONCLUSION:-
In our research, we observed that charging the value of the capacitor in the
negative feedback, loop alters the 3dB inversely charging the value of resistors in
the circuit can also alter the gain. Overall, the impact on the gain, but it was not
enough to prevent the amplifier from operating. We used the exact resistor value,
the gain produced was acceptable for our experiment and proved that we can
simplify sound.

Electronic Circuit Design| Lab Report 24

 ASSIGNMENT NO:-4
 AIM:- To design a transistor amplifier .

• THEORY:-
An amplifier with or without negative feedback having the greatest fidelity in
faithfully reproducing the input with the least distortion. Its however the least
efficient, in as much as the power delivered to the load is only a small percentage
of d.c. power used up in the amplification process.

The transistor amplifier must have the three characteristic mentioned below:-

1) Feedback:- This is where part of output signal is feedback to the input,

but 180o out of phase. If it were in phase feedback that we would have an
oscillator.

2) Fidelity:- This means many things to many people but to us it means the
output must be an exact replica of the input but only magnified or
amplified.

3) Efficiency:- The theoretical limit to this amplifier’s efficiency is 50%

meaning of every watt output. We will use up at least 2 watts of d.c power
input to the amplifier.

• DESIGN:-

Electronic Circuit Design| Lab Report 25

Fig1: Dc and Ac model Fig2 : Equivalent
A.C only model

• DESIGN CONSIDERATION:-
The design specifications are evaluated with ϷSPICE based simulator. Results
varied between the simulation and prototype measurements are as follows:-

1) 24% variation in efficiency.

2) 3% variation in amplifier’s dc power dissipation.
3) 31% variation in BJT power requirements.

The components required as follows:-

1) Resistors
2) Transistors
3) Capacitors
4) Power supply
• CALCULATION:-

Base voltage=[R2/(R1+R2)]*12v
e.g for 82k for R1 and 39k for R2

Base voltage=[39k/(82k+39k)]*12v= 3.78v

Electronic Circuit Design| Lab Report 26

 Current through the base resistors.

Ib = 12/(R1+R2)=12/(39k+82k)=0.1 mA

We have a base voltage of 3.87v and if 0.65v higher than the emitter then the
emitter is is (3.87-0.65) which is 3.22v.

Rc = 3.22/0.0007v= 4600Ω

• APPROXIMATION:-
The following approximations are required:-
1) Id= It is a silicon N PN general purpose type

2) Þd= 0.5w i.e. capable of dissipating 500 mw.

3) VCE = 40 V i.e. don’t use if above 20v dc supply.

4) Ic = 0.8A i.e. maximum collector current in 800mA.

5) Hfe = 100 i.e. amplification factor is 100.

• TESTING:-
In a transistor amplifier, we have two totally different set of condition. One set are
d.c condition and the other set are a.c or R.f conditions. In the d.c conditions, the
transistor amplifiers are turned on or have the base opened. To do this, the base
have to voltage applied to it which is approximately 0.65v higher than the voltage
amplifier at the emitter. In fact, using the property, allows a transistor to be used
as a simple switch. Bitter still, arranging about 20000.000 of them at the right way
around and get a Pentium.

• RESULTS:-
The resulting circuit for transistor amplifier is shown below:-

Electronic Circuit Design| Lab Report 27

The bandwidth increase with the increase of frequency of signal and the bandwidth
decreases with decrease in frequency.

• CONCLUSION:-
So, we conclude that transistor is mainly used as current amplifier, the current
amplifier is a device that is used to increase the amplitude of current in the signal.
ASSIGNMENT NO:-5
 ASSIGNMENT NAME : To Design A Monostable
Multivibrator Using 555 IC.

Electronic Circuit Design| Lab Report 28

THEORY: A monostable circuit produces a single output pulse when triggered.
It is called monostable because it is stable in just one state; i.e. the output low. The
output high state is temporary.

CIRCUIT DIAGRAM:

Fig1: 555 Timer ic Fig2: Simplified circuit of monostable 555 timer

OPERATION:
i) The timing period is triggered (started) when the trigger input (555 pin2)
is less than 1/3 Vs, this makes the output high (+Vs) and the capacitor C1
starts to change through resistor R1. Once the time period has starter
further triggering pulses are ignored.

ii) The threshold input (555 pin 6) monitors the voltage across C1 and when
this reaches 2/3 Vs the time period is over and the output becomes low.
At the same time the discharge (555 pin 7) is connected to 0 volt,
discharging the capacitor ready for next trigger.

iii) The reset input (555 pin 4) overrides all other inputs and the timing may
be calculated at any time by connecting the reset to 0V. This instantly
makes the output low and discharges the capacitor. If the reset function is
not required, the RESET pin should be connected to +V5, as for our
experiment.

CALCULATION & OUTPUT:

Electronic Circuit Design| Lab Report 29

 The duration of the pulse is called the time period (T). This is determined by
resistor R1 and capacitor C1.

Time Period T=1.1*R1*C1

T= time period in second(s);

R1= resistance in ohm

C1= capacitance in farads (F);

Here 1.1 coefficient comes because the capacitor charges to 2/3Vs= 67%. So it
is a bit longer than the time constant (R1*C1) which is the time taken to charge
to 63%.

First we have to choose C1 as there are relatively small numbers of values

available. Then we choose R1 to have the time period we need. R1 should be in
range of 1K ohm to 1u ohm, so we have to use a fixed resister of at least 1k ohm
in series if R1 is variable.

APPROXIMATION: As we know, the practical values of the capacitors one

limited. So a particularly selected time period, we may have theoretically calculated
values of R1 & C1, but those may not be available in market. So, we have to
choose from the nearest value available.

TESTING & RESULT: After completing the circuit, we give the supply (+Vcc) and
ground (0v) and apply a -ve pulse to the pin2 of the IC. Then we get +ve output
from pin3 with respect to ground (0v). We can see the output wave form in CRO.
The distortion in the output is due to circuit noise. Otherwise, the circuit met the
desired output result.

PRECAUTIONS:
i) Here electrolytic capacitors are used. Their values are not accurate, errors
of at least 20% is common.

Electronic Circuit Design| Lab Report 30

 ii) Electrolytic capacitors leak charge with substantially increase the time
period. For example, a circuit which should be maximum time period of
2665(4.5 min), can be extended to even 10 minutes while using these
electrolytic capacitors.

CONCLUSION:
This assignment shows how a 555 Timer IC is configured to function as a basic
monostable multivibrator. As it has only one stable O/P, it is also known as ‘ONE-
SHOT’. So, from calculation of other parameters required to complete the circuit, we
can construct the circuit on bread broad, then finally on Vero broad.

ASSIGNMENT NO:-6
 ASSIGNMENT NAME:-To design Full Subtractor using Multiplexer.
• Theory:-

Full subtractor:

A full subtractor is a combinational circuit that performs subtraction involving

three bits namely minuend bit, subtrahend bit and the borrow from the previous
stage.

Multiplexer:

The term “multiplex” means “many into one”.

Multiplexing is the process of transmitting a large number of information over a

single line.

A digital Multiplexer (MUX) is a combinational circuit that selects one digital

information from several sources and transmits the selected information on a
single output line.

A multiplexer is also called a “data selector”, since it selects one of many Inputs
and steers the information to output.

The multiplexer has several data input lines and a single output line. The
selection of a particular input line is controlled by a set of selection lines.

Electronic Circuit Design| Lab Report 31

 The selection lines decide the no. of input lines of a particular multiplexer. If the
no. of n input lines in equal to 2m , then m select lines are required to select one
of the n input lines.

➢ Truth Table Of A Full Subtractor:

INPUTS OUTPUTS

Minuend Subtrahen Borrow Difference(D Borrow

bit(X) d bit(Y) In(Bin) ) out(Bout)

0 0 0 0 0 0

1 0 0 1 1 1

2 0 1 0 1 1

3 0 1 1 0 1

4 1 0 0 1 0

5 1 0 1 0 0

6 1 1 0 0 0

7 1 1 1 1 1

• Calculation:-

Difference(D)= XY Bin+XYBin+XYBin+XYBin

00 01 11 10

0 11 12

1 14 17

D=∑m (1,2,4,7)-------------------1

Borrow Out(Bout)= XY Bin+XYBin+XYBin+XYBin

Electronic Circuit Design| Lab Report 32

 00 01 11 10

0 11 13 12

1 17

Bout=∑m (1,2,3,7)-------------------2

➢ CIRCUIT DIAGRAM:-

• Conclusion:-
By these experiments, we have learnt how a full subtractor can be designed
using two multiplexers.
Advantages of this circuit are:-

Electronic Circuit Design| Lab Report 33

1. Here, no additional gates are required.

&

2. It is faster than decoder.

Electronic Circuit Design| Lab Report 34