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EEE 531: Semiconductor Device Theory I

Instructor: Dragica Vasileska


(Notes provided by: Prof. Dieter Schroder)

Department of Electrical Engineering


Arizona State University

Topics covered:
Breakdown mechanisms
- Tunneling breakdown
- Avalanche breakdown
EEE 531: Semiconductor Device Theory I

(4) Breakdown Mechanisms


Junction breakdown can be due to:
v tunneling breakdown
v avalanche breakdown
One can determine which mechanism is responsible for the
breakdown based on the value of the breakdown voltage
VBD :
v VBD < 4Eg/q tunneling breakdown
v VBD > 6Eg/q avalanche breakdown
v 4Eg/q < VBD < 6Eg/q both tunneling and
avalanche mechanisms are responsible
EEE 531: Semiconductor Device Theory I

Tunneling breakdown:
Tunneling breakdown occurs in heavily-doped pnjunctions in which the depletion region width W is about
10 nm.
Zero-bias band diagram:

EF
EC

Forward-bias band diagram:

EFn

EFp

EV

EEE 531: Semiconductor Device Theory I

EC

EV

Reverse-bias band diagram:

Tunneling current (obtained by


using WKB approximation):
It =

EFp
EFn
EC

* 3

2m q FcrVA
4 2 h 2 E 1g / 2

4 2m* E 3 / 2
g
exp

3hqFcr

Fcr average electric field in


the junction
The critical voltage for
tunneling breakdown, VBR, is
estimated from:
I t (VBR ) 10 I S

EV

With T, Eg and It .
EEE 531: Semiconductor Device Theory I

Avalanche breakdown:
Most important mechanism in junction breakdown, i.e. it
imposes an upper limit on the reverse bias for most diodes.
Impact ionization is characterized by ionization rates n and
p, defined as probabilities for impact ionization per unit
length, i.e. how many electron-hole pairs have been
generated per particle per unit length:

Ei

i exp
qFcr

- Ei critical energy for impact ionization to occur


- Fcr critical electric field
- mean-free path for carriers
EEE 531: Semiconductor Device Theory I

Avalanche mechanism:

EFp
EFn
EC

EV

Generation of the excess electron-hole


pairs is due to impact ionization.
EEE 531: Semiconductor Device Theory I

Expanded view of the


depletion region

Description of the avalanche process:


Jn
J p + n J n dx

dx

J n + n J n dx

Jp

Impact ionization initiated by electrons.

Jn
J p + p J p dx

dx

J n + p J p dx
Jp

Impact ionization initiated by holes.

dJ p
dJ n
> 0,
<0
dx
dx
dJ p
dJ n
=dx
dx

J = J n + J p = const.

Multiplication factors for


electrons and holes:
J p ( 0)
J n (W )
, Mp =
Mn =
J p (W )
J n ( 0)

EEE 531: Semiconductor Device Theory I

Breakdown voltage voltage for which the multiplication


rates Mn and Mp become infinite. For this purpose, one
needs to express Mn and Mp in terms of n and p:
x

( n p )dx
W
1 1 = e 0
dJ n
dx

n
=

J
J

n n
p p
dx
Mn 0

dJ
x
(n p )dx
W
p = n J n p J p

1
dx
= pe 0
dx
1
M p 0

The breakdown condition does not depend on which


type of carrier initiated the process.
EEE 531: Semiconductor Device Theory I

Limiting cases:
(a) n=p (semiconductor with equal ionization rates):
W

1
1
1 M = n dx M n = W
0
n

1 n dx

W
1
1
1
= p dx M p = W
Mp 0
1 p dx

(b) n>>p (impact ionization dominated by one carrier):


W

n dx

Mn = e 0

1 + n dx
0

EEE 531: Semiconductor Device Theory I

Breakdown voltages:
(a) Step p+n-junction

For one sided junction we can make


the following approximation:

W = Wn + W p Wn

p+

Wp

Fmax

Voltage drop across the depletion


region on the n-side:

1
1
Vn = FmaxWn VBD FmaxW
2
2

Wn

Maximum electric field:


k s 0 2
qN DW
Fmax =
Fmax
VBD =
k s 0
2 qN D
Empirical expression for the
breakdown voltage VBD:

F (x )

VBD

Eg

60
1 .1

EEE 531: Semiconductor Device Theory I

3/ 2

ND
16
10

-3 / 4

kV
cm

(b) Step p+-n-n+ junction


Extension of the n-layer large:

VBD

1
= FmaxWm
2

Extension of the n-layer small:


Wp
Fmax

1
1
VP = FmaxWm F1 (Wm W1 )
2
2

W1 Wm

F (x )

Final expression for the punchthrough voltage VP:


F1

W1
W1

2
VP = VBD
Wm Wm

EEE 531: Semiconductor Device Theory I

Doping-dependence of the breakdown voltage VBD:


Width of the n-layer W1 increases

Log-scale

VBD

One-sided abrupt
junction
Tunneling breakdown

p+-n-n+
Log-scale

ND

Temperature dependence:
As temperature increases, lattice scattering increases which
makes impact ionization less probable. As a result of this,
the breakdown voltage increases.
EEE 531: Semiconductor Device Theory I

(c) Plane vs. planar or cylindrical junction


Plane junction:
Maximum electric field:
p+

Planar junction:

Fmax

Except for surface effects, this is an


ideal junction.
Maximum electric field:

rj
p+
W

qN DW
Q
=
=
k s 0
k s 0

Fmax

qN DW
W
=
1+
k s 0 2 r j

The smaller the radius rj, the larger


the electric field crowding.

EEE 531: Semiconductor Device Theory I

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