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Precision Switchmode
Pulse Width Modulation
Control Circuit
The TL594 is a fixed frequency, pulse width modulation control
circuit designed primarily for Switchmode power supply control.
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Features
MARKING
DIAGRAMS
16
PDIP16
N SUFFIX
CASE 648
TL594CN
AWLYYWWG
1
16
SO16
D SUFFIX
CASE 751B
TL594CDG
AWLYWW
1
16
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VCC
42
VC1,
VC2
42
IC1, IC2
500
mA
VIR
0.3 to +42
PD
1000
mW
Thermal Resistance
JunctiontoAmbient (PDIP)
JunctiontoAir (TSSOP)
JunctiontoAmbient (SOIC)
RqJA
TJ
125
Inv
Input 2
Tstg
55 to +125
C
C
Compen/PWN
Comp Input 3
Deadtime
Control 4
CT 5
C/W
80
140
135
TA
TA
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G = PbFree Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
Noninv
Input 1
40 to 85
45
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Maximum thermal limits must be observed.
TL59
4DTB
ALYWG
G
TSSOP16
DTB SUFFIX
CASE 948F
+
Error 1
Amp
+
2 Error
Amp
VCC
5.0 V
REF
0.1 V
Noninv
16 Input
Inv
15 Input
14 Vref
Output
13 Control
12 VCC
Oscillator
11 C2
RT 6
Q2
Ground 7
C1 8
10 E2
Q1
9 E1
(Top View)
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2005
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
TL594
RECOMMENDED OPERATING CONDITIONS
Characteristics
Symbol
Min
Typ
Max
Unit
VCC
7.0
15
40
VC1, VC2
30
40
IC1, IC2
200
mA
Vin
0.3
VCC 2.0
lfb
0.3
mA
lref
10
mA
Timing Resistor
RT
1.8
30
500
kW
Timing Capacitor
CT
0.0047
0.001
10
mF
Oscillator Frequency
fosc
1.0
40
300
kHz
0.3
5.3
Symbol
Min
Typ
Max
Unit
4.925
4.9
5.0
5.075
5.1
2.0
25
mV
REFERENCE SECTION
Reference Voltage
(IO = 1.0 mA, TA = 25C)
(IO = 1.0 mA)
Vref
Regline
Regload
2.0
15
mV
ISC
15
40
75
mA
IC(off)
2.0
100
mA
IE(off)
100
mA
VSAT(C)
VSAT(E)
1.1
1.5
1.3
2.5
IOCL
IOCH
0.1
2.0
20
100
100
200
200
40
40
100
100
OUTPUT SECTION
mA
tr
tf
ns
ns
VIO
2.0
10
mV
IIO
5.0
250
nA
IIB
0.1
1.0
mA
VICR
0 to VCC2.0
VIR(INV)
0.3 to VCC2.0
AVOL
70
95
dB
fC
700
kHz
65
deg.
CMRR
65
90
dB
PSRR
100
dB
IO
0.3
0.7
mA
IO+
2.0
4.0
mA
1. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.
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2
TL594
ELECTRICAL CHARACTERISTICS (VCC = 15 V, CT = 0.01 mF, RT = 12 kW, unless otherwise noted.)
For typical values TA = 25C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.
Characteristics
Symbol
Min
Typ
Max
Unit
VTH
3.6
4.5
II
0.3
0.7
mA
IIB (DT)
2.0
10
mA
DCmax
45
48
45
50
2.8
3.3
9.2
9.0
40
10
10.8
12
VTH
OSCILLATOR SECTION
Frequency
(CT = 0.001 mF, RT = 30 kW)
(CT = 0.01 mF, RT = 12 kW, TA = 25C)
(CT = 0.01 mF, RT = 12 kW, TA = Tlow to Thigh)
fosc
fosc
1.5
Dfosc (DV)
0.2
1.0
Dfosc (DT)
4.0
4.0
3.5
5.2
6.0
6.5
100
50
150
150
300
300
8.0
8.0
15
18
11
kHz
Vth
Hysteresis
TL594C,I
TL594M
VH
mV
TOTAL DEVICE
Standby Supply Current (Pin 6 at Vref, All other inputs and outputs open)
(VCC = 15 V)
(VCC = 40 V)
Average Supply Current (VPin 4 = 2.0 V, CT = 0.01 mF, RT = 12 kW,
VCC = 15 V, See Figure 11)
ICC
mA
mA
*Standard deviation is a measure of the statistical distribution about the mean as derived from the formula,
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3
N
(Xn X)2
n=1
N1
TL594
VCC
Output Control
13
8
6
D
Oscillator
RT
CT
0.12V
Q1
Q2 11
Deadtime
Comparator
Ck
+
4
Deadtime
Control
Flip
Flop
10
0.7V
+
1
Error Amp
1
PWM
Comparator
0.7mA
12
UV
Lockout
3.5V
15
Feedback PWM
Comparator Input
Reference
Regulator
16
14
Error Amp
2
Ref.
Output
Capacitor CT
Feedback/PWM Comp.
Deadtime Control
FlipFlop
Clock Input
FlipFlop
Q
FlipFlop
Q
Output Q1
Emitter
Output Q2
Emitter
Output
Control
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4
VCC
4.9V
7
Gnd
TL594
APPLICATIONS INFORMATION
Description
Functional Table
Input/Output
Controls
Grounded
CT = 0.001 mF
100 k
VCC = 15 V
0.01 mF
10 k
0.1 mF
1.0 k
500
1.0 k 2.0 k 5.0 k
10 k 20 k 50 k
100 k 200 k
RT, TIMING RESISTANCE (W)
1.0
Pushpull Operation
0.5
500 k
@ Vref
fout
fosc =
Output Function
500 k 1.0 M
120
110
100
90
80
70
60
50
40
30
20
10
0
1.0
VCC = 15 V
DVO = 3.0 V
RL = 2.0 kW
AVOL
10
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
0
20
40
60
80
100
120
140
160
180
1.0 M
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5
fosc
TL594
20
18
16
CT = 0.001 mF
14
12
10
8.0
6.0
0.01 mF
4.0
2.0
0
500 k
1.0 k
10 k
100 k
500 k
30
20
10
0
1.0
2.0
3.0
3.5
2.0
V CE(sat) , SATURATION VOLTAGE (V)
1.7
1.6
1.5
1.4
1.3
1.2
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
100
200
300
400
200
300
400
10
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
100
9.8
VCC = 15 V
VOC = Vref
1.C T = 0.01 mF
1.RT = 10 kW
2.C T = 0.001 mF
1.RT = 30 kW
1.8
40
1.9
1.1
50
5.0
10
15
20
25
30
VCC, SUPPLY VOLTAGE (V)
35
40
6.0
Turn On
5.5
Turn Off
5.0
4.5
4.0
5.0
10
15
20
25
30
IL, REFERENCE LOAD CURRENT (mA)
35
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6
40
TL594
VCC = 15V
+
Vin
VCC
Deadtime
Test
Inputs
Error Amplifier
Under Test
Feedback
RT
CT
(+)
()
Error
(+)
()
Output
Control
Gnd
Feedback
Terminal
(Pin 3)
+
Vref
150
2W
50k
150
2W
C1
E1
Output 1
C2
E2
Output 2
Ref
Out
Other Error
Amplifier
15V
15V
RL
68
C
Each
Output
Transistor
C
VC
Each
Output
Transistor
CL
15pF
Q
VEE
E
RL
68
90%
VEE
90%
90%
90%
CL
15pF
VCC
10%
10%
tr
Gnd
10%
10%
tr
tf
tf
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7
TL594
VO
Vref
To Output
Voltage of
System
Error
Amp
3
1
Vref
R2
Error
Amp
R1
VO = Vref
R2
R1
R1
R2
VO
To Output
Voltage of
System
R1
R2
VO = Vref 1 +
Output
Control
R1
Vref
Output
DT
CT
RT
R2
0.001
30k
CS
Vref
Output
Q
DT
4
RS
80
Max. % on Time, each output 45
R1
1 +
R2
C1
C1
QC
Q1
Q1
E1
Output
Control
1.0 mA to
500 mA
SingleEnded
Q2
E2
1.0 mA to 250 mA
PushPull
C2
0 VOC 0.4 V
E1
Output
Control
C2
Q2
QE
E2
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8
1.0 mA to 250 mA
TL594
Vref
RT
Master
CT
RT
CT
VCC
RS
12
Vref
1N975A
VZ = 39V
6
RT
5
Slave
(Additional
Circuits)
CT
5.0V
Ref
270
Gnd
7
12
1
2
1.0M
33k
0.01 0.01
47
VCC
C1
16
C2
Tip
32
TL594
Comp
15
T1
OC
13
VREF DT
14
CT
5
E1
RT Gnd
6
11
E2
Tip
32
L1
22
k
+
+
50
25V
47
10
50
35V
4.7k
1.0
1N4934
+
4.7k
4.7k
+VO = 28V
IO = 0.2A
1N4934
240
10
10k
15k
0.001
All capacitors in mF
Conditions
Results
Line Regulation
Vin = 10 V to 40 V
14 mV 0.28%
Load Regulation
3.0 mV 0.06%
Output Ripple
Vin = 28 V, IO = 1.0 A
65 mVpp P.A.R.D.
Vin = 28 V, RL = 0.1 W
1.6 A
Efficiency
Vin = 28 V, IO = 1.0 A
71%
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9
L1 3.5 mH @ 0.3 A
T1 Primary: 20T C.T. #28 AWG
T1 Secondary: 12OT C.T. #36 AWG
T1 Core: Ferroxcube 1408PL003CB
50
35V
TL594
1.0mH @ 2.0A
+Vin = 10V to 40V
+VO = 5.0V
Tip 32A
IO = 1.0A
47
150
12
8
VCC
47k
0.1
11
C1
C2
50
50V
TL594
CT
RT
13
E2
Vref
Comp
1.0M
5.1k
5.1k
14
15
16
+
500
10V
MR850
5.1k
10
50
10V
150
0.001
47k
0.1
Conditions
Results
Line Regulation
Vin = 8.0 V to 40 V
Load Regulation
Output Ripple
Efficiency
3.0 mV
0.01%
5.0 mV
0.02%
40 mVpp
P.A.R.D.
250 mA
72%
ORDERING INFORMATION
Operating Temperature Range
Package
Shipping
40 to 85C
SOIC16
48 Units/Rail
40 to 85C
SOIC16
(PbFree)
48 Units/Rail
40 to 85C
SOIC16
40 to 85C
SOIC16
(PbFree)
40 to 85C
PDIP16
25 Units/Rail
40 to 85C
PDIP16
(PbFree)
25 Units/Rail
TL594CDTBG*
40 to 85C
TSSOP16*
96 Units/Rail
TL594CDTBR2G
40 to 85C
TSSOP16*
Device
TL594CD
TL594CDG
TL594CDR2
TL594CDR2G
TL594CN
TL594CNG
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently PbFree.
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10
TL594
PACKAGE DIMENSIONS
PDIP16
N SUFFIX
CASE 64808
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
A
16
DIM
A
B
C
D
F
G
H
J
K
L
M
S
S
T
SEATING
PLANE
H
D
G
16 PL
0.25 (0.010)
T A
INCHES
MIN
MAX
0.740 0.770
0.250 0.270
0.145 0.175
0.015 0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
0_
10 _
0.020 0.040
MILLIMETERS
MIN
MAX
18.80 19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
SOIC16
D SUFFIX
CASE 751B05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
A
16
B
1
8 PL
0.25 (0.010)
X 45 _
C
T
SEATING
PLANE
M
D
16 PL
0.25 (0.010)
T B
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11
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
TL594
PACKAGE DIMENSIONS
TSSOP16
DTB SUFFIX
CASE 948F01
ISSUE A
16X K REF
0.10 (0.004)
0.15 (0.006) T U
T U
K1
2X
L/2
16
J1
B
U
SECTION NN
PIN 1
IDENT.
8
N
0.25 (0.010)
0.15 (0.006) T U
A
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE W.
M
N
F
DETAIL E
C
0.10 (0.004)
T SEATING
PLANE
H
D
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.193 0.200
0.169 0.177
0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.007
0.011
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0_
8_
DETAIL E
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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12
TL594/D