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Achronix Semiconductor is a privately held fabless semiconductor corporation based in

Santa Clara, California. We design high-performance, low-power FPGAs using Intels


22nm and 14nm 3-D Tri-Gate process technology.
Achronix is currently shipping its 22nm HD1000 FPGA, making us the only customer of
Intels custom foundry program to ship product, as well as the FPGA industrys processtechnology leader.
The core technology team at Achronix owns the reconfigurable fabric (look-up tables,
routing, configuration memory, carry chains, register files, multipliers, etc.) for our
companys FPGAs. Members of our team participate in all phases of the FPGA productdevelopment cycle, from architecture conception to circuit design and implementation to
high-volume manufacturing. New employees will have the opportunity to contribute to
all of these phases and work with the worlds most advanced process technology.
Position Profile Name: Senior Hardware Engineer
Type of Position: Regular, Exempt
Reports to: Vice President Hardware Engineering
Location: Santa Clara, CA
Contact: hr@achronix.com
Job Description and Responsibilities
The employee will work on the design, implementation, and characterization of fullcustom, high-performance digital logic in 22nm and 14nm. The employee will work as a
design lead on multiple blocks in our FPGAs reconfigurable logic fabric. His or her
responsibilities will include the following:

Own the design of several full-custom and RTL-based digital logic blocks
Collaborate with other members of the team to optimize our physical design and
verification methodologies to scale to a chip with over 10 billion transistors
Estimate the power, performance, and area of the custom and RTL blocks both
before and after physical implementation
Work closely with Intel foundry employees working on process development,
customer support, EDA, reliability, test, and qualification on the first customer
tapeouts in 22nm and 14nm
Develop automated processes for block-level and system-level verification
Mentor junior engineers

Skills and Qualifications:


Employee should be comfortable programming in a scripting language (e.g.,
Python or Perl) and writing programs with 5,000 20,000 lines of code.
Employee should have experience with digital VLSI design

Employee should be comfortable reading and writing RTL (e.g., Verilog)


Employee should be extremely well organized and have excellent communication
skills
Employee should be experienced with commerical CAD flows (LVS, DRC,
simulation, etc.)
Experience developing digital logic in current process nodes (28nm, 22nm,
20nm) is a plus
Familiarity with object-oriented programming concepts is a plus
Familiarity with revision-control systems (e.g., perforce, git) is a plus
BS/MS/PhD in electrical engineering or computer science + 5-10 years
experience

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