Aug01

14Aug01

Impact of Deep N-well

Implantation on Substrate Noise
Coupling and RF Transistor
Performance for Systems-on-aChip Integration
Click to edit Master title style Authors : K. W. Chew, J. Zhang,
K. Shao, W. B. Loh and S-. F. Chu
Presented by K. W. Chew

CHARTERED TECHNOLOGY FORUM 2001

Rev0.8
Rev0.6

Outline

1. Introduction
2. Deep Nwell Process Overview
3. Substrate Coupling Test Structures
4. S21 Isolation
5. Effect on RF Transistor Performance
6. Conclusions

Introduction

Source : IEEE Journal of Solid-State Circuits, Vol. 33, No. 3, pp. 314-323, Mar. 1998

Deep N-well Process Overview

STI formation
Deep n-well implant
N-well formation
P-well formation
Channel implants
Gate insulator and gate electrode
Pocket I/I + LDD I/I
Sidewall spacer and S/D I/I
Co salicidation
BEOL

Deep N-well Process Overview

Doping concentration (cm-3)

Deep N-well and P-well SIMS Profiles

CMOS with Deep N-well Technology

P+

STI

N+
N-Well

STI

P+

STI

N+

N+

STI

P-Well
Deep n-Well

p-substrate

Transistor Cross-Sectional View

P+

STI

N+
N-Well

STI

P+

Deep N-well RF Isolation Test Structures

(a) Typical Layout*

N+
with
DNW

P+

P+

P+

P+

(b) More Complex Layout*

DNW

DNW
N+
N+

P+

P+

P+

P+
GR

GR

* The authors would like to acknowledge Institute of Microelectronics (Singapore) VLSI department for the test structure layouts

Diode-Type Substrate Coupling Structure in

Deep N-well

GR

P+ STI

N+
N-Well

STI

P+ STI

N + or P+

STI P+ STI

P-Well
Deep n-Well

p-substrate

N+
N-Well

GR

STI P+

STI

P+

STI

Effect of Different Body Biasing Techniques on RF

Isolation for P+ Noise Generators
-30
G to S spacing : 280 m

-35

DNW Implant : P1E13/900KeV

-40

S21 Isolation (dB)

-45
-50
-55
-60
-65
-70
-75
-80

without DNW
with DNW + unbiased P and N + no GR
with DNW + unbiased P and N + grounded GR
with DNW + unbiased P + grounded N and GR
with DNW + unbiased P + grounded N + no GR
Background noise

-85
-90
-95
0.1

Frequency (GHz)

10

Effect of Different Body Biasing Techniques on RF

Isolation for N+ Noise Generators
-30
G to S spacing : 280 m

-35

DNW Implant : P1E13/900KeV

S21 Isolation (dB)

-40
-45
-50
-55
-60
-65
-70

with DNW + P and N tied to Vdd + grounded GR

with DNW + grounded P + N tied to Vdd + no GR

-75

with DNW + grounded P + unbiased N + grounded GR

-80
0.1

Frequency (GHz)

10

Effect of Different Body Biasing Techniques on RF

Isolation for N+ Noise Generators
-10
G to S spacing : 50 m
DNW Implant : P2E13/900KeV

-20

S21 Isolation (dB)

-30
-40
-50
-60
without DNW (P+ to P+)

-70

without DNW (N+ to P+)

with DNW + unbiased P and N + no GR
with DNW + unbiased P + N tied to Vdd + no GR

-80

with DNW + unbiased P and N + grounded GR

with DNW + unbiased P + N tied to Vdd + grounded GR

-90
0.1

Frequency (GHz)

10

Effect of Deep Nwell Dosage on RF Isolation for P+

Noise Generators
-30
G to S spacing : 280 m

-35

S21 Isolation (dB)

-40
-45
-50
-55
-60

with DNW P1E13/900KeV

with DNW P2E13/900KeV
with DNW P3E13/900KeV

-65

without DNW

-70
0.1

Frequency (GHz)

10

Thin-Gate Oxide MOSFETs in Deep N-well

DC Characteristics

1.00E-05

N-std0V

N-s td1.2V

N-s td1.8V 6.0E-04

N-DW0V

N-DW1.2V

N-DW1.8V

P-std0V

P-std-1.2V

P-std-1.8V

P-DW0V

P-DW-1.2V P-DW-1.8V

4.0E-04

Ids (A/um)

1.00E-07

Ids (A/um)

5.0E-04

1.00E-09

3.0E-04
2.0E-04

1.00E-11

-1.8

-1.2

1.00E-13
-0.6
0

Vg (V)

0.6

P-std

P-DW

N-std

N-DW

1.2

1.0E-04

1.8

-1.8

-1.3

-0.8

0.0E+00
-0.3

0.2

Vds (V)

0.7

1.2

1.7

Thick-Gate Oxide MOSFETs in Deep N-well

DC Characteristics

1.00E-04
1.00E-06

P-std0V

P-s td-2.1V P-s td-3.5V

N-std0V

N-std2.1V

P-DW0V

P-DW-2.1V P-DW-3.5V

N-DW0V

N-DW2.1V N-DW3.5V

N-std3.5V

5.0E-04
4.0E-04

Ids (A/um)

1.00E-08

Ids (A/um)

6.0E-04

1.00E-10

3.0E-04
2.0E-04

1.00E-12

-3.5

-2.5

1.00E-14
-1.5
-0.5

0.5

Vg (V)

P-std

P-DW

N-std

N-DW

1.5

2.5

1.0E-04

3.5

-3.5

-2.5

-1.5

0.0E+00
-0.5

Vds (V)

0.5

1.5

2.5

3.5

Effect of Deep Nwell on the RF Transistor AC

Characteristics Extracted from S-parameters
0.14

Capacitances (pF)

0.12

C gg

0.10
0.08

NMOSFET
Lgate = 0.25 m
W finger = 9.58 m

0.06

Nfinger = 8
Vds = 2.5V
Vgs = 1.0V

C gb

0.04
C gd

0.02

w/o DNW
w DNW

0.00
0

10

15

Frequency (GHz)

20

25

Effect of Deep Nwell on the RF Transistor AC

Characteristics Extracted from CV Measurements

N+/P-well Junction Capacitance

Area : 225 m2
Perimeter : 60 m
Frequency : 100 KHz
Dot: with Deep Nwell
Line: without Deep Nwell

Comparison of RF Transistor High Frequency

Characteristics with and without Deep N-well
Red : without Deep N-well

S11

S12

S22

H21

Blue : with Deep N-well

S21

Unilateral Gain

Effect of Deep N-well on RF Transistor Figures-of-Merit

70

Frequency (GHz)

60
50

NMOSFET
Lgate = 0.25 m
Wfinger = 9.58 m
Nfinger = 8
Vds = 2.5V

40

f max

ft

w/o DNW
w DNW

30
20
10
0
1.0E-02

1.0E-01

Ids per unit width (mA/m)

1.0E+00

Comparison of RF Transistor HF Noise

Characteristics with and without Deep N-well
Red : without Deep N-well

Blue : with Deep N-well

2.5

2.5

Saturation

Triode

2.0

1.5

NFmin (dB)

NFmin (dB)

2.0

NMOS Transistor
Lf=0.18m
Wf=5m
Nf=16
Vgs=1.2V
Vds=0.6V

1.0

w/o DNW
w DNW

0.5

1.5

NMOS Transistor
Lf=0.18m
Wf=5m
Nf=16
Vgs=1.8V
Vds=1.8V

1.0

w/o DNW
w DNW

0.5

0.0

0.0
1.8

2.4

3.0

3.6

4.2

4.8

Frequency (GHz)

5.4

6.0

1.8

2.4

3.0

3.6

4.2

4.8

Frequency (GHz)

5.4

6.0

Comparison of RF Transistor 1/f Noise

Characteristics with and without Deep N-well
1.00E-12

1E-12
with DNW

with DNW
w/o DNW

1.00E-14

1.00E-15

w/o DNW

1E-13

SId (A2/Hz)

SId (A2/Hz)

1.00E-13

NMOS Transistors
Lgate = 0.18m

1E-14

1E-15

NMOS Transistors
Lgate = 0.18m

Nfinger = 16

1.00E-16

Lfinger = 5m
Vds = 0.7V

Nfinger = 16

1E-16

Lfinger = 5m
Vds = 1.8V

Vgs = 1.8V

Vgs = 0.9V

1.00E-17
1

10

100

Frequency (Hz)

Triode

1000

10000

1E-17
1

10

100

Frequency (Hz)

Saturation

1000

10000

Vertical NPN Bipolar from the 0.18 m Deep N-well

Technology
1.0E+00
1.0E-01

(2)

1.0E-02
1.0E-03

VA = 22V

BVCEO = 6V

BVCBO = 17V

(1)

1.0E-04
1.0E-05
1.0E-06
1.0E-07
1.0E-08
1.0E-09

1.0E-10
1.0E-11

0
0

Vc (V)
20

1.0E-12
1.0E-13
0.0

-0.5

-1.0

-1.5

Veb (V)

18
16
14
12

Ic (mA)

Ib=100uA
Ib=200uA
Ib=300uA

Ib(1), Ic(2) (A)

Ib=50uA
Ib=150uA
Ib=250uA

N+

10
8
6

P+

N+

2
0
1.0E-12 1.0E-10 1.0E-08 1.0E-06 1.0E-04 1.0E-02 1.0E+00

Ic (A)

AE : 5X5 m2

-2.0

Conclusions

1. Deep n-well is effective in isolating substrate

coupling for NMOSFET
2. Maximum of 35 dB isolation at 100 MHz
obtained with deep n-well plus grounded nwell
and p+ guard ring, using deep n-well dose and
implant energy of P1E13 @ 900 KeV
3. Deep n-well process with optimum dosage and
energy will not impact the dc, ac, rf, and noise
performance
4. Vertical NPN bipolar with beta of 14 can be
obtained from the deep n-well technology