A New Generalized Discontinuous PWM For

Current Source Space Vector Inverter

AbstractThis paper presents a generalized discontinuous
method adopted for the current source inverters. After presenting
the current source inverter and its operation modes, the model of
that will be presented with some of the possible switching
patterns. Then the generalized discontinues operation of the
converter will be describe and finally the simulation and
experimental results for some selected control modes will be
presented
KeywordsCurrent
Source
Modulation; Switching Loss.

Inverters;Space

Vector

INTRODUCTION
Current Source Inverter (CSI) has been used in industry for
many years to drive large horsepower motors. Some of the
advantages of this converter are its sustained regenerative
capabilities [1-11], short circuit protection, and its buffering of
the drive output form supply voltage variations. Since its
inception CSI has gradually changed over the years.
In 1970s, the most popular form of CSI developed
was the auto sequentially commutated inverter (ASCI), which
used thyristors and produced quasi-square wave output line
currents. However, ASCI fed motor suffered from severe
torque pulsations at low speeds due to the harmonic content in
the line current. The need to correct this and other problems
spurred research into finding ways to improve the performance
of CSIs.
The most common method of reducing current
harmonics is to pulse width modulate (PWM) the CSI output
line currents. Therefore, with the advent of Power Bipolar
Junction Transistors (BJTs) and Gate Turn-off Thyristors
(GTOs), the ASCI have been gradually replaced by PWM CSI
[12, 33]. The use of gate turn-off thyristors and other power
semiconductor devices with an intrinsic turn-off capability is
making pulse width modulation (PWM) a reality for CSI.
Hombu et al. [14, 15] and Nonaka et al. [14, 15] have described
several schemes for implementing PWM strategies in current
source inverters. However, previous work on PWM CSIs has
been limited to constant modulation index operation and the
output current variation achieved by varying the input DC
current via rectifier control as seen in [12-15].
Like the voltage source inverter the current source PWM
inverter also suffers from the high harmonic distortion and high
switching loss. To reduce the switching loss one may need to
decrease the redundant switching operation. A well know
technique to do this is, The direct digital technique involves
utilization of space vector approach in which the duty cycles
for the switching inverter are calculated. The gating signals are
pre-sequenced and stored in a lookup table. In a converter the
active vectors divide the plane into different sectors depending

upon the number of active vectors and also the zero switching
vectors.

OPERATION OF A CURRENT SOURCE INVERTER

Similar to a VSI the CSI also has a three-phase bridge
circuit. In the case of CSI, the input side has a DC supply with
a very big smoothing reactor which removes the ripple in the
DC current. It has a three-phase bridge circuit as shown in
Fig. 1, which has two devices in each leg and has a diode in
series with each device. A switch thrown in the current source
converter can be realized as a bi-directional voltage blocking
and a unidirectional current carrying device. The output of the
bridge circuit has a three-phase capacitor bank to filter the
current harmonics and provide sinusoidal load voltages and
load currents. In case of a CSR it has a three-phase supply at
the input side and three-phase shunt capacitor bank at the AC
side to filter the current harmonics in the line current. It has a
three-phase bridge circuit with two devices in each leg and a
reverse blocking diode placed in series with the device. The
output of the bridge has an inductor to filter the ripples in the
DC current and a DC-link capacitor on the load side. The
PWM operation for the two converters, i.e., CSI and CSR will
be the same. In the case of a CSI the references signals will be
the normalized three phase currents that has to be synthesized
at the output side. For the rectifier the reference signals will be
the normalized three-phase input line currents. In modulating
the CSI or CSR the switching should be such that it satisfies
the Kirchhoffs voltage and current laws. So at each moment,
the constrains of (1) and (2) should be satisfied.

S ap .S bp 0 S bp .S cp 0 S ap .S cp 0
,

(1)

S an .S bn 0 S bn .S cn 0 S an .S cn 0
,

S ap S bp S cp 1 S an S bn S cn 1

(2)

Ldc

Vr ( S ap S an )van ( S bp S bn )vbn ( S cp S cn )vcn

(6)

Idc

Sap

Vdc

Vr

Sbp

Scp

The DC current also can be expressed as:

Output Filter v i
an
abcL

ia

ib

Sbn

LpI dc Vdc ( S ap S an )van ( S bp S bn )vbn ( S cp S cn )vcn

vcn

The load and filter capacitors also can be modelled as:

Co

Scn

C o pvan ia ial
C o pvbn ib ibl

Figure-1. The Current Source Inverter.

v an rL ial LL pial
vbn rL ibl LL pibl

ON Device

ON Device

S ap

S bn

Id

- Id

S ap

S cn

Id

- Id

ic

Id

II.

DIRECT SPACE VECTOR MODULATION

After transforming the currents of the Table. I to the stationary

reference frame, for each of the nine switching combination a
corresponding space vector can be derived according to Fig. 2.
Using this diagram each current reference in stationary

reference frame ( I qd ) can be synthesized using the two

closest active and at least one of the null vectors. According to
(10) we have:

S bp

S an

- Id

S bp

S cn

Id

- Id

S cp

S an

- Id

Id

S cp

S bn

- Id

Id

S an

S bp

S bn

ta + tb + t7 + t8 + t9 = 1 and t7 + t8 + t9 = t0

Scp

Scn

t7 = (1- ta - tb )

S ap

(9)

vcn rL icl LL picl

TABLE I. THE VALID MODES

ib

(8)

C o pvcn ic icl

Using the constrains of the equations 1 and 2 the valid

modes can be expressed as Table I. this table has 6 active
operating modes at the top and 3 null modes at the bottom. The
active modes are the modes in which the power transfers from
the DC link to the load and the null modes happen when one of
the converter legs is short circuited, the inductor is absorbing
energy from the dc voltage source and no power flows to the
load.

ia

(7)

vbn

ic

San

RL

Iqd* = Iqda ta + Iqdb tb + Iqd7 t7 + Iqd8 t8 + Iqd9 t9

Where:

t8 = (1- ta - tb )
The converter itself also can be modeled using the basic KVL ,
KCL constrains and switching functions. When the DC link
current is Id then for the phase currents of the inverter we have:

ia ( S ap S an ) I d

(3)

ib ( S bp S bn ) I d

(4)

ic ( S cp S cn ) I d

(5)

The DC link voltage also can be defined in terms of the phase

voltages of the capacitor fitters and switching functions as:

(10)
(11)
(12)

t9 = (1- ta - tb )

+ + = 1, = = = 0

(13)

Where ta, tb, t7, t8, t9 represents the normalized times (with
respect to the device switching period) and , , are the
weighting factors. However, to avoid short-circuiting the input
or output capacitor(s)only one converter leg can be shorted at
any time hence , , can either take values of one or zero.

TABLE II.

[ S cp , S bn ]

I 2Sectors

Map

[ S cp , S an ]

I3

2 [S

1
ap ,

S an]

I7

I8

[ S bp , S cn ]

ta
I 1tc

I
[ S cp , S cn] 9

[ S bp , S an ]

( ap )

c
[ S bp , S bn]

3
I4

NORMALIZED TIMES FOR WHICH THE DEVICES ARE ON.

5
5
I65

6
tc
tc

tc

tb tc

tc

ta tb tc

tb t c

ta tc

t a t b t c t

tc

ta tb tc

tc

tc

Mbn

( bn )

( bp )

Mcp

( cp )

Mcn

( cn )

t c

t a t b t c

tc

t b t c

t a t c

tc

t a t b t c

tc

tc

t a t c

tc

tb tc

I q I db I d 5I qb

t c

tc

ta tb tc

I qa I db I da6I qb

t c

tb t c

ta tc

tb

I6

Mbp

t a tc

Sector

ta

[ S ap , S cn ]

( an )

tb t c

Figure-2. The Space Vector Diagram For CSI.

A. Calculation of Switching
Timing in each Sector
Since, the magnitude of the
current synthesized by null
state is zero hence from (10)
term Iqd7 t7 + Iqd8 t8 + Iqd9 t9 can
be neglected and by separating
(10) into real and imaginary
parts the expressions for ta and
tb given as:

[ S ap , S bn ]

Man

(14)

modulation
signal
waveforms are possible by
selecting different values
for , , . Possible
combinations of , , are
listed in This Table.

In this study the DCM 4

and 6 are considered as the
simulation case. For them
the switching patterns are
shown in Fig.3 and 4
respectively.

I d I qa I q I da
I qa I db I da I qb

(15)

TABLE III POSSIBLE COMBINATION VALUES FOR , , .

Using the existence function of all the devices of the

inverter from (14) and (15) the expression for normalized
DCM 1
switching times for which the devices will be turned ON in
each sector is given. In other words it is defined as the duty
ratio for the active states and the null states. Theseinduty
ratios
sectors
3 and 6
for active and null states determine the time spend by a
reference vector to generate the given current. Thus
Table 1IIand 4
in sectors
expresses the normalized times for the device to be switched in
each sector. It observed that the average (the firstinterm
of the
sectors
2 and 5
Fourier series expansion) of an existence function is equal DCM
to
4
the sum of the normalized times each device is turned ON to
realize a reference current.
Expression for different Discontinuous Modulators (DCM) for
the device in all the six sectors is listed in Table III. It is
conspicuous from Table III that large sets of discontinuous

DCM 2

DCM 3

=1
in sectors 2 and 5
=1
in sectors 3 and 6
=1
in sectors 1 and 4
DCM 5

=1
in sectors 1 and 4
=1
in sectors 2 and 5
=1
in sectors 3 and 6
DCM 6

rs 3 and 6

rs 2 and 5

rs 1 and 4

=1
in sectors 2 and 5
=1
in sectors 1 and 4
=1
in sectors 3 and 6

=1
in sectors 1 and 4
=1
in sectors 3 and 6
=1
in sectors 2 and 5

Figure-5. The Modulation Indexes For DCM4.

Figure-3. Switching Pattern For DCM 4.

This modulation indexes also can be represented in terms of

the natural values of the reference currents. By transferring the
values in the Table II in to the natural quantities the
modulation indexes will be expressed as Table IV. Using this
table one can easily program a DSP to implement the
switching pattern.
TABLE IV THE MODULATION INDEXES OF DCM 4.

Figure-4. Switching Pattern For DCM 6.

From the switching patterns of Fig. 3 and 4 it can be seen

that in the DCM 6 the number of the switchings are
decreased so the same output wave forms can be generated
by less switching loss.
B. DCM 4
For DCM 4The total on time of each device which shows the
modulation index is shown in the Fig. 5.

Sector

Map

Man

Mbp

Mbn

Mcp

Mcn

ias

1+ibs

ics

II

-ias

-ibs

1-ics

III

1+ias

ibs

ics

IV

-ias

1-ibs

-ics

ias

ibs

1+ics

VI

1-ias

-ibs

-ics

6
4

Ampere

2
0

-2
-4

Figure-6. The Modulation Indexes For DCM6.

-6
0.2

Mbn

Secto
r
I

Map

Man

i bs

1i bs +i as1

II

i cs

i as

III

i cs

1+i bs i as0

i bs

IV

1+i bs i1as

i as

-ibs

i cs

i as

VI

i cs

1i bs +i cs1

III. SIMULATION RESULTS.

0.22

Sec

0.23

0.24

0.25

Figure-7. The Reference Currents For DCM6.

TABLE V THE MODULATION INDEXES OF DCM 6.

Mbp

0.21

Mcp

i as

Mcn
0

1+i asi cs1

i bs

The reference currents are shown in the Fig. 7 the three phase
balanced currents with the magnitude of the 5 amperes. To be
able to generate the space vector modulations this currents
need to be transferred to the stationary reference frame using
the matrix shown in equation 16.

[]

[ ]
1

1i as +i cs I q
2
0
Id = 0
3
Io
1
2

A. DCM 6
To confirm the analyses, the DCM 6 is simulated using
MATLAB Simulink Note that from the Fig. 3 and 4 this
method has minimum switching number which can result in
lower switching loss. The converter is modeled using the
equations 1-9 and the modulation signals are also generated
using TABLE V. The converter is feeding a RL load and the
converter parameters are listed in TABLE VI.

1
2
3
2
1
2

1
2 I
3 I a
b
2
1 Ic
2

[]

(16)

The q and d axis currents with the reference angle of them are
shown in the Fig. 8

TABLE VI THE CONVERTER PARAMETERS.

Parameter

V dc
Ldc
Co
RL
L
Switching Frequency

Value
120 (V)
0.01 (H)
0.0001 (F)
5()
0.05(H)
5(KHz)

Figure-8. The Reference Currents in the Stationary Reference Frame With the
Reference Angle.

Then using the equations 14 and 15 the normalized on times

are calculated as Fig. 9.

The DC Link Voltag

ta

0.4

The Capacitor Voltages

0.2
0
tb

to

0.002

0.004

0.006

0.008

0.01

0.2
0

0.002

0.004

0.006

0.008

0.01

0.25
0.2
0.15
0

0.002

0.004

0.006

0.008

0.01

200

0.4

100

Volt

-100
-200

Figure-9. The Normalized On Time For Switches.

0.105

Using the switching pattern of Fig. 4 to synthesize the

normalized times, the following results are generated. Fig. 10
shows the DC link current.

0.11

0.115

0.12

Figure-12. The Three Phase Load Voltages.

The Load Current

15
10

Three DC Link Current

6.1

Ampere

6.05

Ampere

0
-5
-10

-15

5.95

0.105

0.11

0.115

0.12

Figure-13. The Three Phase Load Currents.

5.9
1.466 1.468

1.47

1.472 1.474 1.476 1.478

SEC

1.48

1.482 1.484

Fig. 14 shows the DC link voltage. Again due to the boost

nature of the converter the voltages are greater than the DC
link voltage.
The DC Link Voltag

Figure-10. The DC Link Current.

400

Fig. 11 shows the output currents of the inverter. The currents

are in high frequency (Switching Frequency) and the
magnitude of them is equal to the DC link current. The
currents will flow to the filter capacitors and the main
component of them will be fed to the load.
Fig. 12 shows the load voltages. This measured across the
filter capacitors. It can be seen that the filter capacitors have
removed the high frequency component of the inverter
currents and generated a sinusoidal voltage for the load. Since
the converter is basically a boost type the load peak voltages
are greater than the DC link voltage Also the three phase load
currents are shown in the Fig. 13.
Three Inverter Currents

5
ia (Ampere) 0
-5
1.4

1.405

1.41

1.415

1.42

1.425

1.43

1.435

1.44

1.445

1.45

1.405

1.41

1.415

1.42

1.425

1.43

1.435

1.44

1.445

200
100
0
0.096

0.098

0.1

0.102

0.104

0.106

Figure-14. The DC Link Voltage.

B. Continuous Modulation in Over Modulation Region

DCM 4
In linear region of operation of the converter the value of
modulation index M 1, for which the normalized switching
timings are ta + tb 1. Hence the switching time is made equal
to 1 by making the null state to spend the remaining time as:
(17)

1.45

In the case of the over modulation where M 1 we have:

ic (Ampere) 0
-5
1.4

Volt

tc = 1- ta- tb

ib (Ampere) 0
-5
1.4

300

1.405

1.41

1.415

1.42

1.425

1.43

1.435

1.44

Figure-11. The Three Phase Output Currents of the Inverter.

1.445

1.45

ta + tb + ( + + ) tc 1

(18)

in over modulation region time for null states (t o) is made

zero. By implicitly removing the null states because null states
do not contribute in synthesizing the reference current.
Therefore having null time tc = 0 in the above equation and
get:
*

ta tb 1,

tc = 0

(19)

where t*a, t*b are the new values of the time duration in order to
synthesis the commanded reference vector. The values of the
new t*a, t*b are given as:

t *a

ta
t
t *b b
t a tb
t a tb

the desired currents. Also it is seen from the switching pattern

that it follows a minimum transition path, which reduces the
effective switching of the devices, that reduces the switching
losses.

(a)Sap

(b) Ias

(20)
(c)Idc

Equation (20) indicates that the actual times t a and tb are

proportionally normalized in order to attain the new values t *a
and t*b. This time duration are actually used to synthesize the (d)vap
commanded reference vectors in over modulation region. One
of the advantages of the over modulation is that maximum
utilization of the input DC voltage takes place. For the case of
M=1.25 the simulation results are presented here:
Fig. 15 shows the modulation indexes for the six switches.
(e) Vr

(f)

ia

Figure-17. Simulation Results for DCM 4. (a) Phase a Device Switching

Function, (b) Phase a Line Current, (c) Input DC Current (d) Phase a
Capacitor Voltage, (e) DC Voltage Across the Inverter, (f) Phase a Load
Current.
Figure-16. The Modulation Indexes For Switches in DCM 4.

From the Fig. 17-19 it is seen that a device completely clamps

the top DC rail for 60o and the bottom DC rail for 120o , in the
case of over modulation the devices are continuously clamped
to the positive DC rail for 60o and bottom DC rail for 180o.
From the close study of the switching pattern, it is seen that
there are no null states in the switching sequence, which says
that all the time is used by active states in order to synthesize

REFERENCES

Figure-18. The Experimental Results For DCM 4 Over Modulation, (a) Phase
a Device Switching Function, (b) Phase a Line Current, (c) Input DC
Current, (d) Phase a Capacitor Voltage.

Figure-19. The Experimental Results For DCM 4 Over Modulation, (a) Inverter
DC Bus Voltage, (b) Phase a Load Line Current.

IV . CONCLUSION.
In this paper, a new generalized Discontinuous PWM strategy
for CSI has been developed. This scheme is a direct approach
for developing a modulation strategy for the CSI. Modulation
of the CSI space vector approach has been presented.
Expressions for modulating signals required to synthesize
balanced three-phase reference currents were derived For
discontinuous schemes. For different values of introduced
weighting factors , , different sets of modulating signals
are obtained. The performance of some the possible
modulators was studied, and a new algorithm was developed
in order to satisfy constrains laid out for a CSI. This algorithm
automatically removes the shorting of the devices and also
sorts the null states to attain minimum switching. Simulation
and experimental results are deployed to demonstrate the
simplicity of the novel modulation methodology in both linear
and over modulation region.

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