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1. Introduction
Jan Beutel & Iuliana Bacivarov
based on material by Lothar Thiele
Swiss Federal
Institute of Technology
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Computer Engineering
and Networks Laboratory
Contents
What is an Embedded System ?
Levels of Abstraction in Electronic System Design
Typical Design Flow of Hardware-Software Systems
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Embedded Systems
Embedded systems (ES) = information processing
systems embedded into a larger product
Examples:
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Embedded Systems
external process
human interface
sensors, actuators
embedded system
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ACC
engine
control
ASR
powertrain
control
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Centralized
Systems
Networked
Systems
Large-scale
Distributed Systems
Internet
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Comparison
Embedded Systems
Criteria:
cost
average speed
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Design Challenges
Challenges in the design of embedded systems
increasing application complexity even in standard and large
volume products
large systems with legacy functions
mixture of event driven and data flow tasks
examples: multimedia, automotive, mobile communication
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Implementation Alternatives
General-purpose processors
Performance
Power Efficiency
Flexibility
Programmable hardware
FPGA (field-programmable gate arrays)
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Contents
What is an Embedded System ?
Levels of Abstraction in Electronic System Design
Typical Design Flow of Hardware-Software Systems
Swiss Federal
Institute of Technology
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Computer Engineering
and Networks Laboratory
Classification of models
Degree of abstraction, granularity
hardwarre: system, architecture, logic, transistor,
software: module, block/class, function/method, ...
View
behavior, structural, physical
Synthesis
Linking adjacent levels of abstraction (refinement)
Stepwise adding of structural information
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Institute of Technology
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and Networks Laboratory
Levels of Abstractions
Behavior
System
Architecture
Process/Module
Function
SW
Object Code
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HW
Gate-level models
Switch-level models
Circuit-level models
Device-level models
Layout models
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RTL
Structure
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and Networks Laboratory
Contents
What is an Embedded System ?
Levels of Abstraction in Electronic System Design
Typical Design Flow of Hardware-Software Systems
Swiss Federal
Institute of Technology
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Computer Engineering
and Networks Laboratory
System Design
Specification
System Synthesis
SW-Compilation
Instruction Set
Estimation
HW-Synthesis
Intellectual
Prop. Code
Intellectual
Prop. Block
Machine Code
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and Networks Laboratory
SW-Compilation
Instruction Set
Estimation
HW-Synthesis
Intellectual
Prop. Code
Intellectual
Prop. Block
Machine Code
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Institute of Technology
Net lists
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and Networks Laboratory
SW-Compilation
Instruction Set
Estimation
HW-Synthesis
Intellectual
Prop. Code
Intellectual
Prop. Block
Machine Code
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Institute of Technology
Net lists
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and Networks Laboratory
SW-Compilation
Instruction Set
Estimation
HW-Synthesis
Intellectual
Prop. Code
Intellectual
Prop. Block
Machine Code
Swiss Federal
Institute of Technology
Net lists
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and Networks Laboratory
System-Level Design
System-level design is a complex synthesis tasks
Major Components:
application specification
design space exploration and system optimization
estimation
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P2
P1
SW
(processors)
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dedicated HW
components
P4
P3
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Estimation
The principle of synthesis based on abstraction only makes
sense if there are powerful estimation methods available:
Estimate properties of the next layer(s) of abstraction.
Design decisions are based on these estimated properties: If
the estimation is not correct (or not accurate enough), the
design will be sub-optimal or even not working correctly.
Estimation of
lower layer
properties
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Design Space
Exploration
high
abstraction
Design Space
Exploration
...
Design Space
Exploration
low
abstraction
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Timeline
of
Design
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and Networks Laboratory