5

SOCKET-478
Note:
D

Do not include the schematic

when create netlist.

Host Bus

AGP BUS

AGP SLOT

AGP BUS

VGA

DDR SDRAM

DIMM1

SiS648FX
SIS661

DIMM2

PCI Slot 1
C

MuTIOL 1G

PCI Slot 2

LAN PHY

PCI Slot 3

AC'97
Audio Codec

1394

SiS964
IDE 1
IDE 2
B

SATAX2

PS/2

KEYBOARD
/MOUSE

Back Panel

Front Panel
B

USB 0

LPC Bus

USB 4

USB 1

USB 5

USB 2

FAN 1
FAN CONTROL

FAN 2

USB 3

VOLTAGE MONITOR

LPC Super I/O

ISA Bus

USB 6
USB 7

TEMPERATURE MONITOR

ISA ROM

IR

PARALLEL

COM

FLOPPY

TECHNOLOGY COPR.
Title

Topology

Document Number
Date:
5

Rev

661M05

Saturday, October 09, 2004

A
Sheet
1

of

42

VCCP

VCCP

NORTHWOOD
CPUPWRGD

VRD10/VRM9.X
VRMPWRGD

CPURST_

&
PWOK
CPUPWRGD
NBPWRGD

ATX
Power
PSON_

SiS648FX
SiS661FX

CPURST_

NBRST_

C
AGP 8X SLOT

SiS963/SiS963L
PCI Slot 1

SBPWRGD

PCI Slot 2
PCI Slot 3

NBRST_

PCIRST_

Front Panel

PSON_

RSTSW_

PWRBTN_

IDE CONN 1

SIORST_

IDE CONN 2

PWRBTN_

SIORST_

Super IO

SIORST_

Media
Interface

TECHNOLOGY COPR.
Title

Reset Map

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

of

42

14.318MHz

CPU
D

CPUCLK0

CPUCLK1

100/133/200 MHz

100/133/200 MHz

66 MHz

133 MHz
ZCLK0

SiS648FX

66 MHz
AGPCLK0

CLOCK GENERATOR

FWDSDCLK0

33 MHz
96XPCLK

DIMM 1-2

DDR CLOCK BUFFER

AGP 8x

AGPCLK1

DDRCLK

133 MHz

ZCLK1
48 MHz
UCLK48M
TXCLK
REFCLK

LAN PHY

RXCLK
33 MHz

SiS963L

PCI Slot 1-3

PCICLK1-3

AUDIO_CLK
32.768KHz

AC'97
24.576MHz/NC
48 MHz

Super I/O

SIO48M

TECHNOLOGY COPR.
Title

Clock Distribution

Document Number

R ev

661M05
Date:
5

Saturday, October 09, 2004

A
Sheet
1

of

42

DDR 2 DIMMS:

ATX SPS

5
V
S
B

5
V

3
.
3
V

+
1
2
V

VCC3

ATX
12V
P/S

1
2
V

SB5V

+
1
2
V

>
>

2.5V
REGULATOR
S3AUXSW-

VCC2.5_MEM

+12V

>

>

VRD 10

CORE_CPU_SYS

VCCVID

MIC5258

PWRG_ATX

5V_DUAL

>
>
>

VCC3

SB5V

6.00A

REGULATOR

AIC1086
VCC3

SB3V

AIC1084

PWRG_ATX

>
>

VCC1.8V

>

1.25V
REGULATOR

>

VCCP
1.1V~1.85V 70A
VCC_VID
1.2V 30mA

VCC3

SIS648FX

VCC3:
3.3V
108mA

VCC3_DUAL

VCC1.8V
1.8V
1389.5mA

VCC3_DUAL

VCC3_DUAL

VCC1.8V
VCCP

VDDQ:
AGP
1.5V 35.1/21.7mA

33.4mA
VCC2.5_MEM
2.5V
501.3mA

SB1.8V
1.8V
10mA

SB3V
3 VOLTS
BATTERY

> OR
>

VCC_RTC

>
>
>
>
>

> 1.25V
2A

SIS963L
VCC3:
3.3V

VCC_RTC

RTCVDD

VCC3

>

VCC5_DUAL

>
>
>

5V_SYS

VCC5
+12V
-12V
VCC3_DUAL
B

>
>
>
>
>

VCC3_DUAL

PCI PER SLOT:

3.3V
5V
12V
-12V
3.3Vaux
0.375A

7.6A
5.0A
0.5A
0.1A

VCC5

VCC5
PWRG_ATX

VCC5_DUAL

> LAN PHY

+12V

VCC3

AIC1084

VCC3
+12V
VCC5

VCC3_DUAL

VDDQ 1.5V

>
>
>
>
>

AUDIO
VREG

VCC5A

>
>

VCC3

AGP

VCCP

>
>

CLK_GEN
3.3V
300mA

SUPER I/O
VCC5_DUAL
5V
VCC3_DUAL

FWH

>
VCC5_DUAL

SB5V
VCC3_DUAL

VCC1.8V
1.8V

VCC3_DUAL

VCCP

VCC3

DDR VTT

DDR_VTT_STR

MPGA478

> 2.5V +/-100mv

VCC2.5_MEM

USB POWER
5V
PS2 KB/MS POWER
5V

AC' 97 AUDIO CODEC

A5V 70mA
3.3V 10mA

TECHNOLOGY COPR.
Title

Power Delivery Map

Document Number

R ev

661M05
Date:
5

Saturday, October 09, 2004

A
Sheet
1

of

42

9
HDJ[63..0]

HDJ[63..0]

HAJ[31..3]

HAJ[31..3]

9
U33A

U33B

HDBIJ0
HDSTBNJ0
HDSTBPJ0
HDJ16
HDJ17
HDJ18
HDJ19
HDJ20
HDJ21
HDJ22
HDJ23
HDJ24
HDJ25
HDJ26
HDJ27
HDJ28
HDJ29
HDJ30
HDJ31

9
9
9

HDBIJ1
HDSTBNJ1
HDSTBPJ1

G9
F8
F9
E9
D7
E10
D10
F11
F12
D13
E13
G13
F14
G14
F15
G15
HDBIJ1 G11
G12
E12

TBD
Pin
CRB
Pin
CRB

D23
0.7: test point TP_VCCPLL
AM5
0.7: test point TP_VID6

D00#
D01#
D02#
D03#
D04#
D05#
D06#
D07#
D08#
D09#
D10#
D11#
D12#
D13#
D14#
D15#
DBI0#
DSTBN0#
DSTBP0#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DBI1#
DSTBN1#
DSTBP1#

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DBI2#
DSTBN2#
DSTBP2#

G16
E15
E16
G18
G17
F17
F18
E18
E19
F20
E21
F21
G21
E22
D22
G22
D19
G20
G19

HDJ32
HDJ33
HDJ34
HDJ35
HDJ36
HDJ37
HDJ38
HDJ39
HDJ40
HDJ41
HDJ42
HDJ43
HDJ44
HDJ45
HDJ46
HDJ47
HDBIJ2

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DBI3#
DSTBN3#
DSTBP3#

D20
D17
A14
C15
C14
B15
C18
B16
A17
B18
C21
B21
B19
A19
A22
B22
C20
A16
C17

HDJ48
HDJ49
HDJ50
HDJ51
HDJ52
HDJ53
HDJ54
HDJ55
HDJ56
HDJ57
HDJ58
HDJ59
HDJ60
HDJ61
HDJ62
HDJ63
HDBIJ3

6
6

HVCCA
HVSSA

TP_VCCPLL

HVCCIOPLL

A23
B23
D23
C23

VCCA
VSSA
RSVD5
VCCIOPLL

VID0
VID1
VID2
VID3
VID4
VID5
TP_VID6

AM2
AL5
AM3
AL6
AK4
AL4
AM5

VID0
VID1
VID2
VID3
VID4
VID5
RSVD6

F28
G28

BCLK0
BCLK1

CPUCLK0
CPUCLK-0

TP11
TP12
TP13
TP14

9
9
9
9

HADSTBJ0

TP_LAG775_PIN_AH4
TP_LAG775_PIN_AH5
TP_LAG775_PIN_AJ5
TP_LAG775_PIN_AJ6

HADSTBJ1

TESTHI_0
TESTHI_1
TESTHI_11
TESTHI_12

L2
AH2
N1
AL2
M2

COMP0
COMP1
COMP2
COMP3

A13
T1
G2
R1

THERMDA
THERMDC

RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18

N5
AE6
C9
G10
D16
A20

VCCSENSE
VSSSENSE
VCC_MB_REG
VSS_MB_REG
Changed pin name
RSV
F29 from
RSVD9

RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24

E23
E24
F23
H2
J2
J3

TP_RSVD_CPU_N5
TP_RSVD_CPU_AE6
TP_RSVD_CPU_C9
TP_RSVD_CPU_G10
TP_RSVD_CPU_D16
TP_RSVD_CPU_A20

BOOTSELECT
LL_ID0
LL_ID1

Y1
V2
AA2

CPU_BOOT
LL_ID0
TP_LL_ID1

SKTOCC#

AN3
AN4
AN5
AN6

9
9
9

HIE RRJ

HBPRIJ
HDBSYJ
HDRDYJ
HITMJ

9
9
9
9

TP_BINITJ

INITJ
HLOCKJ
HTRDYJ
TP2

14
9
9

TP_EDRDYJ
TP_MCERRJ

U2
U3

TP_APJ0
TP_APJ1

F3
G3
G4
H5

HBR0J
TESTHI_8
TESTHI_9
TESTHI_10

J16
H15
H16
J17

TP_DPJ0
TP_DPJ1
TP_DPJ2
TP_DPJ3

H1

HGTLREF

should be 0.67*FSB_VTT
15 mils spacing
be within 1.5" of the GTLREF pin
placed near CPU pin

9
VTT_OUT_RIGHT
R813
100
+/-1%
R0603

HCPURSTJ 9

B3
F5
A3

HRSJ0
HRSJ1
HRSJ2

9
9
9

TBD

HBR0J
CRB 0.7: 220 ohm, 5%
DG 0.51: 62 ohm, 5%

HCPURSTJ
VTT_OUT_LEFT

Pin AK6, G6
refer to CRB 0.7

R817
R818

62
62

Dummy

TESTHI_0
TESTHI_2_7

TESTHI_2_7
RSVD_AK6
RSVD_G6

10 mils width
7 mils spacing
R815
100
R816
100

HCOMP2
HCOMP3

R819
R820

HCOMP0
HCOMP1

60.4
60.4

CPU_PWRG
PROCHOTJ
THERMTRIPJ

14
14
14

VTT_OUT_LEFT

1
3
5
7

HCOMP0
HCOMP1
HCOMP2
HCOMP3

R825
R826
R827
R828
R829
R830
R831

TBD
Pin N5 ~ Pin J3
CRB 0.7: connections ok?

R837
RN81
8
6
4
2

TP25

R821
R822
R823
R824

TESTHI_11
TESTHI_12
CPU_PWRG
HCPURSTJ
HBR0J
RSVD_G6
CPU_BOOT

R842

VID0

7
5
3
1

VID3
VID2
VID4
VID1

680
+/-5%

HIE RRJ
THERMTRIPJ
PROCHOTJ
FER RJ

62
62
130
62

+/-5%
Dummy

BC940
22pF
C0603

FSB_VTT

BC5
0.1uF
C0603

INTEL THERMTRIPJ, FERRJ PULL HIGH FSB_VTT

FSB_VTT

VTT_OUT_LEFT
R832
R833
R834
R835
R836
R838
R839
R840

56
56
56
56
56
56
56
56

A20MJ
STPCLKJ
CPUSLPJ
SMIJ
INITJ
IGNNEJ
INTR
NMI

BC6
0.1uF
25V, Y5V, +80%/-20%
C0603

BC8
0.1uF
C0603

BC7
1uF
C0805

NEAR CPU

TECHNOLOGY COPR.

VID5

680
+/-5%

680
R841
+/-5%
LL_ID0

62
62
100
62
62
62 DUMMY
62

TESTHI_9
TESTHI_8
TESTHI_10
TESTHI_1

VTT_OUT_RIGHT

TP22
TP23
TP24

BC4
0.1uF
C0603

VTT_OUT_RIGHT
RN80
8P4R0603
62
2
4
6
8

VTT_OUT_RIGHT

10 mils width
7 mils spacing
14

1 OF 7

FSB_VTT

CPUSLPJ

R814
210
BC938
BC939
+/-1%
1uF
220pF
10V,Y5V,+80%/-20%
50V,X7R,+/-10% R0603
C0603
C0603

Place at CPU end of route

TBD

Title

RSVD_AK6

Clock Distribution

Document Number
Date:

HDEFERJ 9
TP3
TP4
GTLREF voltage
12 mils width,
TP5
divider should
TP6
caps should be
HBR0J

G23

CPU_Socket
5

HADSJ
HBNRJ
HITJ
TP1

16V, X7R, +/-10%

SLP#
RSVD12
PWRGOOD
PROCHOT#
THERMTRIP#

TESTHI_0

TP_RSPJ

CPU_Socket

3 OF 7

SMI#
A20M#
FERR#/PBE#
LINT0
LINT1
IGNNE#
STPCLK#

AB6
W6
Y6
Y4
AA4
AD6
AA5
AB5
AC5
AB4
AF5
AF4
AG6
AG4
AG5
AH4
AH5
AJ5
AJ6
AC4
AE4
AD5

D2
C2
D4
H4
G8
B2
C1
E4
AB2
P3
C3
E3
AD3
G7
F2
AB3

25V, Y5V, +80%/-20%

TP_VCCSENSE
TP_VSSSENSE

VCC_SENSE
VSS_SENSE

TP17
TP18
7
7

HDBIJ3
HDSTBNJ3
HDSTBPJ3

F26
W3
P1
W2
F25
G25
G27
G26
G24
F24
AK6
G6

AL1
AK1

THERMDA
THERMDC

HAJ[31..3]

HAJ17
HAJ18
HAJ19
HAJ20
HAJ21
HAJ22
HAJ23
HAJ24
HAJ25
HAJ26
HAJ27
HAJ28
HAJ29
HAJ30
HAJ31

TESTHI00
TESTHI01
TESTHI11
TESTHI12
TESTHI02
TESTHI03
TESTHI04
TESTHI05
TESTHI06
TESTHI07
RSVD10
RSVD11

AE8

32
32

HAJ[31..3]

A03#
ADS#
A04#
BNR#
A05#
HIT#
A06#
RSP#
A07#
BPRI#
A08#
DBSY#
A09#
DRDY#
A10#
HITM#
A11#
IERR#
A12#
INIT#
A13#
LOCK#
A14#
TRDY#
A15#
BINIT#
A16#
DEFER#
RSVD1
EDRDY#
RSVD2
MCERR#
REQ0#
REQ1#
AP0#
REQ2#
AP1#
REQ3#
REQ4#
BR0#
ADSTB0# TESTHI08
PCREQ# TESTHI09
TESTHI10
A17#
A18#
DP0#
A19#
DP1#
A20#
DP2#
A21#
DP3#
A22#
A23#
GTLREF
A24#
A25#
RESET#
A26#
A27#
RS0#
A28#
RS1#
A29#
RS2#
A30#
A31#
A32#
A33#
A34#
A35#
RSVD3
RSVD4
ADSTB1#

25V, Y5V, +80%/-20%

P2
K3
R3
K1
L1
N2
M3

17
17

L5
P6
M5
L4
M4
R4
T5
U6
T4
U5
U4
V5
V4
W5
N4
P5
K4
J5
M6
K6
J6
R6
G5

25V, Y5V, +80%/-20%

SMIJ
A20MJ
FERRJ
INTR
NMI
IGNNEJ
STPCLKJ

VID0
VID1
VID2
VID3
VID4
VID5
TP16

9
9
9

HREQJ0
HREQJ1
HREQJ2
HREQJ3
HREQJ4

Pin AL2 PROCHOT#

CRB 0.7: pull up to VTT_OUT_RIGHT
DG/611A: example VR thermal monitor circuit

14
14
14
14
14
14
14

7
7
7
7
7
7

HDBIJ2
HDSTBNJ2
HDSTBPJ2

TBD

CPU_Socket

U33C

9 HREQJ[4..0]

9
9
9

B4
C5
A4
C6
A5
B6
B7
A7
A10
A11
B10
C11
D8
B12
C12
D11
HDBIJ0
A8
C8
B9

HD J0
HD J1
HD J2
HD J3
HD J4
HD J5
HD J6
HD J7
HD J8
HD J9
HDJ10
HDJ11
HDJ12
HDJ13
HDJ14
HDJ15

HAJ3
HAJ4
HAJ5
HAJ6
HAJ7
HAJ8
HAJ9
HAJ10
HAJ11
HAJ12
HAJ13
HAJ14
HAJ15
HAJ16

2 OF 7

Rev

661M05

Saturday, October 09, 2004

A
Sheet
1

of

42

C1206
BC946

C1206
BC947

C1206
BC948

C1206
BC949

C1206
BC950

C1206
BC951

C1206
BC952

C1206
BC953

C1206
BC954

C1206
BC955

C1206
BC956

C1206
BC957

BC958

6.3V,X5R,+/-10% Dummy
10uF

6.3V,X5R,+/-10% Dummy
10uF

6.3V,X5R,+/-10% Dummy
10uF

6.3V,X5R,+/-10% Dummy
10uF

6.3V,X5R,+/-10% Dummy
10uF

6.3V,X5R,+/-10%
10uF

6.3V,X5R,+/-10%
10uF

6.3V,X5R,+/-10%
10uF

6.3V,X5R,+/-10%
10uF

6.3V,X5R,+/-10% Dummy
10uF

6.3V,X5R,+/-10%
10uF

6.3V,X5R,+/-10% Dummy
10uF

6.3V,X5R,+/-10% Dummy
10uF

6.3V,X5R,+/-10% Dummy
10uF

10uF

* * * * * * * * * * * * * * * * * *

note: 7/6-change termination 49.9 to RN702 47

Place BPM termination near CPU

HBPM5J
HBPM4J
HBPM3J
HBPM2J
HBPM1J
HBPM0J

62
62
62
62
62
62

******

R843
R844
R845
R846
R847
R848

Intel Pull High RES 49.9Ohm.

C

VTT_OUT_RIGHT

R849
R850
R851
R852
R853

HTDO
HTMS
H TDI
HTCK
HTRSTJ

49.9
49.9
49.9
49.9
49.9

FSB_VTT
PLL Supply Filter
125mA
L12
L0805 10uH

HVCCIOPLL

HVCCIOPLL
BC959
1uF
10V,X5R,+/-10%
C0603

5
5

CPU_Socket

HVCCA
HVSSA

0805
+/-10%

R854
0
+/-1%
R0603

125mA
L13
L0805 10uH
0805
+/-10%
Notes:
1. Cap. should be within 600 mils of the VCCA and VSSA pins
2. VCCA route should be parallel and next to VSSA route
3. Min. 12 mils trace from the filter to the processor pins
4. The inductors should be close to the cap.
EC98
33uF
25V,+/-20%
CE20D50H110
ESL <= 5 nH, ESR < 0.3 ohm

HVC CA
HVSSA

CPU_Socket

CPU_Socket

VTT_OUT_RIGHT

+12V

FSB_VTT

11,13

NBRST-

AE1
AD1
AF1
AC1
AG1

HBPM0J
HBPM1J
HBPM2J
HBPM3J
HBPM4J
HBPM5J

AJ2
AJ1
AD2
AG2
AF2
AG3

ICH_SYS_RSTJ AC2
AK3
AJ3

BSEL0
BSEL1

FSBSEL0
FSBSEL1
R931
1K
+/-1%
R0603
DUMMY

G29
H30
G30

VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
BPM0#
VTT8
BPM1#
VTT9
BPM2#
VTT10
BPM3#
VTT11
BPM4#
VTT12
BPM5#
VTT13
VTT14
DBR#
VTT15
VTT16
ITPCLKOUT0
VTT17
ITPCLKOUT1
VTT18
VTT19
BSEL0
VTT20
BSEL1
VTT21
BSEL2
VTT22
VTT23
VTT24
VTTPWRGD

A29
B25
B29
B30
C29
A26
B27
C28
A25
A28
A27
C30
A30
C25
C26
C27
B26
D27
D28
D25
D26
B28
D29
D30
AM6

VTT_OUT1
VTT_OUT2
VTT_SEL

AA1
J1
F27

R855
10K
+/-5% VCC3
R0603

*
GTLREF_SEL

R856
249
+/-1%
R0603

Q95
G

TESTHI_0

TESTHI_0

R857
110
+/-1%
R0603

2N7002

*
BC960
0.1uF

17
17

4 OF 7

TCK
TDI
TDO
TMS
TRST#

HTCK
H TDI
HTDO
HTMS
HTRSTJ

BC1025
1uF
10V,X5R,+/-10%
C0603

U33D

VTT_OUT_RIGHT

*****

RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36

V1
F6
T2
Y3
AE3
W1
E7
B13
D14
E6
D1
E5

Place these caps. inside CPU socket

10uF/SDK caps. co-layout
C1206
BC945

VCCP

6.3V,X5R,+/-10%
10uF

GTLREF_SEL

D5
A9
D3
B1
B5
B8
AJ4
AE26
AH1
E29
V7
C13
AK24
AB30
L6
L7
AB29
M1
AB28
E8
AG20
AN17
AB27
AB26
AN16
M7
AB25
AB24
AB23
N3
AA30
F4
AG10
AE13
AF30
H28
F7
AF29
AF28
G1
AF27
AF26
AF25
AN28
AN27
AF24
AF23
AG24
AF17
AN24
H3
AN7
P24
AE20
AE17
E27
T7
R30
AJ27
AB1
AM4
V26
AA23
AL28
AF20
AG23

C1206
BC944

GTLREF_SEL

VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276

6.3V,X5R,+/-10% Dummy
10uF

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40

7 OF 7

VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210

C1206
BC943

C10
D12
AM7
C24
K2
C22
AN1
B14
K7
AE16
B11
AL10
AK23
H12
AF7
AK7
H7
E14
L28
Y5
E11
AL16
AL24
AK13
AL3
D21
AL20
D18
AN2
AK16
AK20
AM27
AM1
AL13
AL17
C19
E28
AH7
AK30
D24

H22
H21
H20
H19
H18
AB7
H17
AJ24
AM17
AC3
H14
P28
V6
AK2
P27
P26
AM28
AJ13
W4
P25
AJ20
W7
P23
AG13
AG16
AG17
C7
Y2
L30
L29
D15
AL27
Y7
L27
AA29
N6
N7
AA28
AN13
AA27
AA26
P4
AA25
AA24
P7
E26
V30
R2
V29
V28
R5
V27
R7
E20
AN10
V25
T3
V24
V23
T6
AL7
E25
U1
R29
R28
R27
R26
R25
U7
R24
R23
P30
V3
P29
AF16
AE10
AF13
H6
A18
A2
E2
D9
C4
A6
D6

6.3V,X5R,+/-10% Dummy
10uF

VCCP185
VCCP186
VCCP187
VCCP188
VCCP189
VCCP190
VCCP191
VCCP192
VCCP193
VCCP194
VCCP195
VCCP196
VCCP197
VCCP198
VCCP199
VCCP200
VCCP201
VCCP202
VCCP203
VCCP204
VCCP205
VCCP206
VCCP207
VCCP208
VCCP209
VCCP210
VCCP211
VCCP212
VCCP213
VCCP214
VCCP215
VCCP216
VCCP217
VCCP218
VCCP219
VCCP220
VCCP221
VCCP222
VCCP223
VCCP224
VCCP225
VCCP226

6 OF 7
VSS41 AL23
VSS42 A12
VSS43 L25
VSS44 J7
VSS45 AE28
VSS46 AE29
VSS47 K5
VSS48 J4
VSS49 AE30
VSS50 AN20
VSS51 AF10
VSS52 AE24
VSS53 AM24
VSS54 AN23
VSS55 H9
VSS56 H8
VSS57 H13
VSS58 AC6
VSS59 AC7
VSS60 AH6
VSS61 C16
VSS62 AM16
VSS63 AE25
VSS64 AE27
VSS65 AJ28
VSS66 AJ7
VSS67 F19
VSS68 AH13
VSS69 AD7
VSS70 AH16
VSS71 AK17
VSS72 E17
VSS73 AH17
VSS74 AH20
VSS75 AE5
VSS76 AH23
VSS77 AE7
VSS78 AM13
VSS79 AH24
VSS80 AJ30
VSS81 AJ10
VSS82 AF3
VSS83 AK5
VSS84 AJ16
VSS85 AF6
VSS86 AK29
VSS87 AJ17
VSS88 F22
VSS89 AH3
VSS90 AK10
VSS91 AM10
VSS92 F16
VSS93 AJ23
VSS94 F13
VSS95 AG7
VSS96 F10
VSS97 L26
VSS98 AD4
VSS99 H11
VSS100 L24
VSS101 L23
VSS102 AM23
VSS103 A15
VSS104 AH10
VSS105 H29
VSS106 B24
VSS107 L3
VSS108 H27
VSS109 A21
VSS110 AE2
VSS111 AJ29
VSS112 A24
VSS113 AK27
VSS114 AK28
VSS115 B20
VSS116 AM20
VSS117 H26
VSS118 B17
VSS119 H25
VSS120 H24
VSS121 AA3
VSS122 AA7
VSS123 H23
VSS124 AA6
VSS125 H10

U33F
AF9
AF22
AH11
AJ14
AH19
AH29
AH27
AG28
AL26
AM12
J24
J13
T28
W28
J12
J27
AG19
AL9
AD30
AF21
Y24
AK14
J9
M27
AF14
J30
AG18
AA8
AG8
AL29
AD29
W8
AH8
N24
AN22
J14
K26
AF19
N8
AF12
M28
AK9

C1206
BC942

VCCP93
VCCP94
VCCP95
VCCP96
VCCP97
VCCP98
VCCP99
VCCP100
VCCP101
VCCP102
VCCP103
VCCP104
VCCP105
VCCP106
VCCP107
VCCP108
VCCP109
VCCP110
VCCP111
VCCP112
VCCP113
VCCP114
VCCP115
VCCP116
VCCP117
VCCP118
VCCP119
VCCP120
VCCP121
VCCP122
VCCP123
VCCP124
VCCP125
VCCP126
VCCP127
VCCP128
VCCP129
VCCP130
VCCP131
VCCP132
VCCP133
VCCP134
VCCP135
VCCP136
VCCP137
VCCP138
VCCP139
VCCP140
VCCP141
VCCP142
VCCP143
VCCP144
VCCP145
VCCP146
VCCP147
VCCP148
VCCP149
VCCP150
VCCP151
VCCP152
VCCP153
VCCP154
VCCP155
VCCP156
VCCP157
VCCP158
VCCP159
VCCP160
VCCP161
VCCP162
VCCP163
VCCP164
VCCP165
VCCP166
VCCP167
VCCP168
VCCP169
VCCP170
VCCP171
VCCP172
VCCP173
VCCP174
VCCP175
VCCP176
VCCP177
VCCP178
VCCP179
VCCP180
VCCP181
VCCP182
VCCP183
VCCP184

AK12
AH22
T29
AM14
AM25
AE9
Y29
AK25
AK19
AG15
J22
T24
AG21
AM21
J25
U30
AL21
AG25
AJ18
J19
AH30
J15
AG12
AJ22
J20
AH18
AH26
W27
AL25
AN8
AH14
U27
T23
R8
AK22
AN29
AG11
AK26
J10
AJ15
AG26
AN9
AH15
AF18
AL15
J26
J18
J21
AG27
AK15
AF11
AD23
AM15
AF8
AK21
AG30
AJ21
AM11
AL11
AJ11
K30
AL14
AN30
AH25
AL12
AJ9
AK11
AG14
N29
AL30
AJ25
AH9
J29
J11
K25
P8
K23
AL19
AM8
T26
N28
AH12
AL22
AN15
AJ8
U26
AJ19
T27
AK8
AN12
AG9
N26

6.3V,X5R,+/-10% Dummy

VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24
VCCP25
VCCP26
VCCP27
VCCP28
VCCP29
VCCP30
VCCP31
VCCP32
VCCP33
VCCP34
VCCP35
VCCP36
VCCP37
VCCP38
VCCP39
VCCP40
VCCP41
VCCP42
VCCP43
VCCP44
VCCP45
VCCP46
VCCP47
VCCP48
VCCP49
VCCP50
VCCP51
VCCP52
VCCP53
VCCP54
VCCP55
VCCP56
VCCP57
VCCP58
VCCP59
VCCP60
VCCP61
VCCP62
VCCP63
VCCP64
VCCP65
VCCP66
VCCP67
VCCP68
VCCP69
VCCP70
VCCP71
VCCP72
VCCP73
VCCP74
VCCP75
VCCP76
VCCP77
VCCP78
VCCP79
VCCP80
VCCP81
VCCP82
VCCP83
VCCP84
VCCP85
VCCP86
VCCP87
VCCP88
VCCP89
VCCP90
VCCP91
VCCP92

U33G

VCCP

5 OF 7

C1206
BC941

AG22
K29
AM26
AL8
AE12
AE11
W23
W24
W25
T25
Y28
AL18
AC25
W30
Y30
AN14
AD28
Y26
AC29
M29
U24
J23
AC27
AM18
AM19
AB8
AC26
J8
J28
T30
AM9
AF15
AC8
AE14
N23
W29
U29
AC24
AC23
Y23
AN26
AN25
AN11
AN18
Y27
Y25
AD24
AE23
AE22
AN19
V8
K8
AE21
AM30
AE19
AC30
AE15
M30
K27
M24
AN21
T8
AC28
N25
AE18
W26
AD25
M8
N30
AD26
AJ26
AM29
M25
M26
L8
U25
Y8
AJ12
AD27
U23
M23
AG29
N27
AM22
U28
K28
U8
AK18
AD8
K24
AH28
AH21

C1206

VCCP
U33E

VCCP

R858
62
+/-5%
R0603

VTT_PWRGD 38
VTT_OUT_RIGHT
VTT_OUT_LEFT
R859
1

Dummy

VTT_OUT_RIGHT
VTT_OUT_LEFT
VCC3

Place at CPU end of route

FOXCONN PCEG

CPU_Socket
Title

LGA775 -2
Size
Date:
5

Document Number

Rev
A

661M05

Saturday, October 09, 2004

1

Sheet

of

42

dummy

1.5K
+/-5%
R0603

R885

BC976
1uF
16V, X7R, +/-10%
C0805

11

MSENSE

R886
620K
+/-5%
R0603

1 R887
2
BC978
10
1uF
+/-5%
R0603 16V, Y5V, +80%/-20%

12V_VRM

OS4

24

OS2

OUTSEN

23

OS1

OUT4

22

BGOUT

OUT3

21

OUT3

ERROUT

OUT2

20

OUT2
OUT1

GNDSEN

OUT1

19

FB

AGND

18

OFFSET/MSENSE OSCREF

17

VCC

PGOOD

16

10

VID4

VID5

15

11

VID3

VID0

14

12

VID2

VID1

13

D
S

*
1

DRN

BG

TO252_GDS
AOD412
S

Dummy

R872
1
+/-5%
R0603

VREG

8
1

R0805
0
G

BC3

2
TG

BST

CO

BC970
2.2nF
16V, NPO, +/-5%
C0603

CAP
C0603

VIN

VPN
5

+/-5%
R3

LOAD_LINE_SELECT 8

2 R0603
+/-1%

C0805

VIN

VIN

SC1211
SOP9JA

BG
8

TO252_GDS
AOD412

G
S

BC986
2.2nF
16V, NPO, +/-5%
C0603

Q100

BC2

Dummy

R891
1
+/-5%
R0603
BC983
2.2nF
16V, NPO, +/-5%
C0603

VIN
VIN

*
1

R896 +/-5%
2 1
100 R0603

BC992
2 C0603 1nF
50V, X7R, +/-10%

1
BG
2

BC1
C0603

CAP

Dummy

R897
1
+/-5%
R0603

AOD412
TO252_GDS

BC993
2.2nF
16V, NPO, +/-5%
C0603

If stuff JFET ,0 Ohm resistor is 560ohm.Do not need gate source resistor.
All MOS driver's gate pin trace width should be 25mils.

FOXCONN PCEG
Title

Voltage Regulator Down 10.1

Size
C
Date:

BC990
For EMI close to phase 3
0.1uF
C0603
Reserved

Q102
G

+/-5%
0

BC995
2.2nF
16V, NPO, +/-5%
C0603

2
1

Choke Coil 0.63uH

VREG
7

VPN

VIN
6

BC996
1uF
16V, X7R, +/-10%
C0805

L17

AUX3

R1
R0805

P N3

R894
1
2 +/-5%
2.2
R0603
SC1211
Enlarge trace width to 25mils,between MOS driver and MOS node
SOP9JA

PGND

BC994
0.47uF
16V, X7R, +/-10%
C0805

AOD412
TO252_GDS

BC989
4.7uF
16V, X5R, +/-10%
C1206

U37

DRN

4
CO

BST

R895
1
+/-5%
R0603

G
S

OUT3
1

BC991
4.7uF
16V, Y5V, +80%/-20%
C1206

Q101

1uF
C0805
16V, X7R, +/-10%

16V, +/-20%
CE50D100H300

2
1N4148W
SOD123

25V, Y5V, +80%/-20%

EC99
1800uF
CE50D100H300
16V, +/-20%

EC100 EC101
1800uF 1800uF
16V, +/-20%
dummy CE50D100H300

1 dummy 2

BC988
1
2

TG

D38

Choke Coil 1.2uH

R893
0
R1206
+/-5%

For EMI close to phase 2

CAP
C0603

VIN

FOR EMI ISSUE

50V, X7R, +/-10%

BC981
0.1uF
C0603

L16

CN3

R892
0
R1206
+/-5% dummy
1
2

ATX12V_2X2

BC982
2 C0603 1nF

100 R0603
R0805
+/-5%

BC985
1uF
16V, X7R, +/-10%
C0805

VREG

R890 +/-5%
2 1

R2

BC987
0.1uF
25V, Y5V, +80%/-20%
C0603

4
VPN

VIN

12V_VRM
BC984
0.47uF
16V, X7R, +/-10%
C0805

Choke Coil 0.63uH

25V, Y5V, +80%/-20%

L15

AUX2

PGND

VIN

P N2

R888
1
2 +/-5%
2.2
R0603
Enlarge trace width to 25mils,between MOS driver and MOS node

U36

17,38 VRMPWRGD

R889
1
+/-5%
R0603

CO

R930
10K
+/-5%
R0603

BC980
4.7uF
16V, X5R, +/-10%
C1206

OUT2

TO252_GDS
AOD412

SHORT/NA

Q99

1uF
C0805
16V, X7R, +/-10%

1N4148W
SOD123

VCC_SENSE 5

BC979
2

D37
1

12V_VRM

SHORT/NA

VSS_SENSE 5

SHORT/NA
JP27
2
1

JP26
2

JP25
2

VID5

BC964
21nF C0603
50V, X7R, +/-10%

BC963
For EMI close to phase 1
0.1uF
C0603
Reserved

Choke Coil 0.63uH

Q97

DRN

VID4

R871 100
1
2
1
+/-5% R0603

VID3

LOAD_LINE_SELECT

TG

VID2

L14

R879
1.5K
+/-5%
R0603
dummy

VID1

P N1

AUX1

C0805

VID0

R884 1
309K

G 0.47uF
C0805
16V, X7R, +/-10%

R878
20K
+/-5%
R0603

VCCP

TO252_GDS
AOD412

SC2646
SSOP24FA

3
2

OS3

BC962
4.7uF
16V, X5R, +/-10%
C1206

R867
1
2 +/-5%
SC1211
2.2
R0603
SOP9JA
Enlarge trace width to 25mils,between MOS driver and MOS node

BC973
2.2nF
BC972
16V, NPO, +/-5%
C0603
1uF
16V, X7R, +/-10%

Q96

U34

PGND

BST

R883
20K
BC975
+/-5%
47pF
R0603
50V, NPO, +/-5%
C0603
470pF
BC977
C0603
50V, NPO, +/-5%

R0603
+/-5%

R866
1
+/-5%
R0603

VIN

1uF
C0805
16V, X7R, +/-10%

OUT1

10K
25.5K +/-1%
R0603 +/-5%
dummy
BC974
1.5nF
C0603
1

R882
1.5K

VRM_EN

1
2

1
2

1
2

1
2

1
1
2

1 2
2

1
1

1 2

1
R0603
+/-5%

BAT54C

BC961
2

R877
1

25V, Y5V, +80%/-20%

LOAD_LINE_SELECT

RT3

U35

R881 1
0

+/-5% R0603

3.6K
R0603
+/-5%
dummy

2
1N4148W
SOD123

SOT23_GSD
R876
82K
2N7002
+/-5% 7.5m Ohm Vgs=10V
R0603
dummy
Q98
BC971
2
R0603

BC969
150pF
50V, NPO, +/-5%
C0603

25V, NPO, +/-10%

R880
1

10K

+/-5% R0603

1 2

R865

10K

D36

D3

BC968

R875
BC967 150K
8.2nF
+/-5%
C0603 R0603
50V, X7R, +/-10%

R864

10K
+/-5% R0603

R863

0.22uF C0603 16V, Y5V, +80%/-20%

P N1

+/-5% R0603

R874
BC966 150K
8.2nF
+/-5%
C0603 R0603
50V, X7R, +/-10%

50V, X7R, +/-10%

R873
BC965 150K
8.2nF
+/-5%
C0603 R0603

R870
24.9K
+/-1%
R0603

R862

R869
24.9K
+/-1%
R0603

+/-5% R0603

R868
24.9K
+/-1%
R0603

+/-5% R0603

AUX2

AUX1

R861

AUX3

R860

MSENSE
P N2

VIN

Close to driver SC1211

P N3

SB5V

12V_VRM

VCCP

Document Number

Rev
A

661M05

Saturday, October 09, 2004

1

Sheet

of

42

VCCP

SB5V

Dummy

EC107
560uF
CE35D80H200
4V, +/-20%

Dummy

EC108
560uF
CE35D80H200
4V, +/-20%

EC109
560uF
CE35D80H200
4V, +/-20%

Dummy

Dummy

EC106
560uF
CE35D80H200
4V, +/-20%

1 5

Q92
MMDT3946
SOT363V
dummy
3

Dummy

EC105
560uF
CE35D80H200
4V, +/-20%
Dummy

EC104
560uF
CE35D80H200
4V, +/-20%

BC935
0.1uF
25V, Y5V, +80%/-20% R804
C0603
2.7K
dummy
R0603
+/-5%
dummy
BC936
0.1uF
R805
25V, Y5V, +80%/-20%
10K
C0603
+/-5%
dummy
R0603
dummy

Put in Socket inside

R807
5

Output ECAP

LL_ID0

EC6

EC7

EC8

EC9

EC10

EC36

CE35_50D100H300

CE35_50D100H300

CE35_50D100H300

CE35_50D100H300

CE35_50D100H300

CE35_50D100H300

BC937
0.1uF
25V, Y5V, +80%/-20%
C0603
dummy

15K
R0603
+/-5%
dummy

* *3300uF
*3300uF
*3300uF
*3300uF
*3300uF
* *3300uF
6.3V, +/-20% *
6.3V, +/-20% *
6.3V, +/-20% *
6.3V, +/-20% *
6.3V, +/-20%
6.3V, +/-20%

EC5
120uF
2V, +/-20%
CTD

LOAD_LINE_SELECT 7
R806
10K
+/-5%
R0603
dummy

EC37

* *3300uF
6.3V, +/-20%

CE35_50D100H300

VCC3

SB5V

R812
22.1K
+/-1%
R0603

R808
10.7K
+/-1%
R0603
DUMMY
VRM_EN

VRM_EN

Q93
MMBT3904
SOT23_BEC

Q94
G

2N7002
S

R810
2.74K
R0603
+/-1%

R809
10K
+/-5%
R0603

VTT_OUT_RIGHT

R811
1.4K
+/-1%
R0603
DUMMY

For delay VRD_EN that after VTT_PWRGD is OK.

TECHNOLOGY COPR.
Title

Output CAP

Document Number
Date:
5

Rev

661M05

Saturday, October 09, 2004

A
Sheet
1

of

42

AAD[0..31]

HAJ[31..3]

ADSTBS[0..1]

V35
R35
U34
W34
U33
V33

ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#

HREQJ4
HREQJ3
HREQJ2
HREQJ1
HREQJ0

W35
Y33
W31
W33
Y35

HREQ4#
HREQ3#
HREQ2#
HREQ1#
HREQ0#

AG31
AA33

HASTB1#
HASTB0#

R36
HAJ31
HAJ30
HAJ29
HAJ28
HAJ27
HAJ26
HAJ25
HAJ24
HAJ23
HAJ22
HAJ21
HAJ20
HAJ19
HAJ18
HAJ17
HAJ16
HAJ15
HAJ14
HAJ13
HAJ12
HAJ11
HAJ10
HAJ9
HAJ8
HAJ7
HAJ6
HAJ5
HAJ4
HAJ3

AH33
AG33
AJ35
AF32
AJ34
AH32
AG35
AE31
AH35
AF35
AE35
AE33
AE34
AF33
AG34
AC33
AD32
AD33
AC35
AD35
AC31
AC34
AB35
AB32
AB33
AA35
AA31
Y32
AA34

VCCP

FSB_VTT

GTLREF_SEL

2N7002

R54
169
+/-1%

BC50
10nF

E3
F4
D2
F5
E4
B2
E6
B3
SBA7
SBA6
SBA5
SBA4
SBA3
SBA2
SBA1
SBA0

B6
F7
B5
Y5
W4
V2
W6
V4
U2
V5
U4
R2
T4
R3
T5
P2
R4
N2
R6
L3
L4
K2
L6
J2
J3
K4
J4
J6
H4
G3
H5
F2
G4
E2
G6
ST0
ST1
ST2
AAD0
AAD1
AAD2
AAD3
AAD4
AAD5
AAD6
AAD7
AAD8
AAD9
AAD10
AAD11
AAD12
AAD13
AAD14
AAD15
AAD16
AAD17
AAD18
AAD19
AAD20
AAD21
AAD22
AAD23
AAD24
AAD25
AAD26
AAD27
AAD28
AAD29
AAD30
AAD31

D22
C22
B22

AA26
W26
U26
R26
L20

19
19
19
19
19
19
19
19

APAR

N3

APAR

19

RBF#
WBF#

D7
B4

RBF
WBF

19
19

GC_DET#
ADBIH/PIPE#
ADBIL

C7
C4
D6

GCDETDBI_HI
DBI_LOW

19
19
19

SB_STB
SB_STB#

C2
D3

AD_STB0
AD_STB0#

T2
U3

ADSTBF0
ADSTBS0

AD_STB1
AD_STB1#

G2
H2

ADSTBF1
ADSTBS1

AGPCLK

D8

AGPCLK0

AGPCOMP_P
AGPCOMP_N
A1XAVDD
A1XAVSS

W2
Y2
B8
C8

AGPRCOMP
AGPRCOMN
A1XAVDD
A1XAVSS

A4XAVDD
A4XAVSS

A7
B7

A4XAVDD
A4XAVSS

AGPVREF

W3

AGPVSSREF

Y4

GCDETDBI_HI
DBI_LOW

14

SBSTBF
SBSTBS

19
19

AGPCLK0

17

AVREFGC

19

HNCOMP

R49 change from 100 to 120

120 HPCOMP

R49

R46

R48

648

20 1% 110 1%

648FX

14 1% 100 1%

661FX

14 1% 100 1%

AGP3.0 = 50 ohm
VDDQ
AGPRCOMN R50

51

AGPRCOMP R51

43.2

VCC3
A1XAVDD

HDSTBN3#
HDSTBN2#
HDSTBN1#
HDSTBN0#

D24
F30
G33
N31

HDSTBNJ3
HDSTBNJ2
HDSTBNJ1
HDSTBNJ0

HDSTBP3#
HDSTBP2#
HDSTBP1#
HDSTBP0#

E25
D30
H32
M32

HDSTBPJ3
HDSTBPJ2
HDSTBPJ1
HDSTBPJ0

HDSTBNJ3
HDSTBNJ2
HDSTBNJ1
HDSTBNJ0

5
5
5
5

HDSTBPJ3
HDSTBPJ2
HDSTBPJ1
HDSTBPJ0

5
5
5
5

BC48
10nF

A1XAVSS

VCC3

VCC3
C1XAVDD

A4XAVDD

BC49
10nF

A4XAVSS

VCC3

C4XAVDD

BC51
0.1uF

place this capacitor

19

R48

HOST

ADSTBS[0..1]

BC48, BC49 Change to 0.1uF?

HPCVERF = 2/3 VCCP HVREF

*
R54 change from 100 to 149

AREQ
AGNT
AFRAME
AIRDY
ATRDY
ADEVSEL
ASERR
ASTOP

661FX-1

R52 change from 49.9 to 100

R52
100
+/-1%
Rds-on(p) = 56 ohm

19

HDBIJ0
HDBIJ1
HDBIJ2
HDBIJ3

Q91

C6
E8
N6
M4
N4
L2
P5
M2

HDJ0
HDJ1
HDJ2
HDJ3
HDJ4
HDJ5
HDJ6
HDJ7
HDJ8
HDJ9
HDJ10
HDJ11
HDJ12
HDJ13
HDJ14
HDJ15
HDJ16
HDJ17
HDJ18
HDJ19
HDJ20
HDJ21
HDJ22
HDJ23
HDJ24
HDJ25
HDJ26
HDJ27
HDJ28
HDJ29
HDJ30
HDJ31
HDJ32
HDJ33
HDJ34
HDJ35
HDJ36
HDJ37
HDJ38
HDJ39
HDJ40
HDJ41
HDJ42
HDJ43
HDJ44
HDJ45
HDJ46
HDJ47
HDJ48
HDJ49
HDJ50
HDJ51
HDJ52
HDJ53
HDJ54
HDJ55
HDJ56
HDJ57
HDJ58
HDJ59
HDJ60
HDJ61
HDJ62
HDJ63

R803
619
+/-1%
R0603

661FX

HA31#
HA30#
HA29#
HA28#
HA27#
HA26#
HA25#
HA24#
HA23#
HA22#
HA21#
HA20#
HA19#
HA18#
HA17#
HA16#
HA15#
HA14#
HA13#
HA12#
HA11#
HA10#
HA9#
HA8#
HA7#
HA6#
HA5#
HA4#
HA3#

AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#

AGP

DPWR#

19

ADSTBF[0..1]

DBI3#
DBI2#
DBI1#
DBI0#

HADSTBJ1
HADSTBJ0

HADSTBJ1
HADSTBJ0

ST[0..2]

HADSJ
HITMJ
HITJ
HDR DYJ
HDB SYJ
HBN RJ

HCOMP_P
HCOMP_N
HCOMPVREF_N

RS#2
RS#1
RS#0

AJ36
AK35

AL36
AK34

R33
T32
U35

19

F26
B32
E34
R31

5
5

HLOCK#
DEFER#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#

K5
M5
P4
U6

HD63#
HD62#
HD61#
HD60#
HD59#
HD58#
HD57#
HD56#
HD55#
HD54#
HD53#
HD52#
HD51#
HD50#
HD49#
HD48#
HD47#
HD46#
HD45#
HD44#
HD43#
HD42#
HD41#
HD40#
HD39#
HD38#
HD37#
HD36#
HD35#
HD34#
HD33#
HD32#
HD31#
HD30#
HD29#
HD28#
HD27#
HD26#
HD25#
HD24#
HD23#
HD22#
HD21#
HD20#
HD19#
HD18#
HD17#
HD16#
HD15#
HD14#
HD13#
HD12#
HD11#
HD10#
HD9#
HD8#
HD7#
HD6#
HD5#
HD4#
HD3#
HD2#
HD1#
HD0#

HADSJ
HITMJ
HITJ
HDRDYJ
HDBSYJ
HBNRJ

T33
T35
V32
B23
F22
R34
U31

19

AC-BE[0..3]

FSB_VTT

AC-BE3
AC-BE2
AC-BE1
AC-BE0

AC/BE3#
AC/BE2#
AC/BE1#
AC/BE0#

C24
E23
B24
D23
D25
F24
C26
B25
B26
D27
D26
E27
B27
D28
C28
B28
E29
F28
B29
C30
B30
B31
C32
D29
C33
B33
B35
D32
B34
E31
D31
D33
D35
G31
C35
F33
E33
D34
E35
F32
J34
G34
H35
F35
J33
J31
G35
H33
J35
K32
N33
K33
L31
L33
K35
L35
M35
M33
P32
P33
L34
N34
N35
P35

HRSJ2
HRSJ1
HRSJ0

HRSJ2
HRSJ1
HRSJ0

CPUCLK
CPUCLK#

HVREF0
HVREF1
HVREF2
HVREF3
HVREF4

HLOCKJ
HDEFERJ
HTR DYJ
HCPURSTJ
CPUPW RGD_NB
HBPRIJ
HBR0J

5
HLOCKJ
5 HDEFERJ
5
HTRDYJ
5 HCPURSTJ
14 CPUPWRGD_NB
5
HBPRIJ
5
HBR0J

5
5
5
5
5
5

AJ31
AJ33

C4XAVSS
C4XAVDD

CPUCLK1
CPUCLK-1

CPUCLK1
CPUCLK-1

C1XAVSS
C1XAVDD

U6A

5
5
5

ADSTBF[0..1]

HREQJ[4..0]

5 HREQJ[4..0]

17
17

ST[0..2]

19

SBA-[0..7]

HAJ[31..3]

SBA-0
SBA-1
SBA-2
SBA-3
SBA-4
SBA-5
SBA-6
SBA-7

C1XAVDD
C1XAVSS

HDJ[0..63]

AAD31
AAD30
AAD29
AAD28
AAD27
AAD26
AAD25
AAD24
AAD23
AAD22
AAD21
AAD20
AAD19
AAD18
AAD17
AAD16
AAD15
AAD14
AAD13
AAD12
AAD11
AAD10
AAD9
AAD8
AAD7
AAD6
AAD5
AAD4
AAD3
AAD2
AAD1
AAD0
ST2
ST1
ST0

HDJ[0..63]

HNCOMP
HPCOMP

AC-BE[0..3]
HVREF

HDBIJ[0..3]

HDBIJ[0..3]
C4XAVDD
C4XAVSS

AAD[0..31]

SBA-[0..7]

C1XAVSS

BC54
0.1uF

*
C4XAVSS

BC53
0.1uF

TECHNOLOGY COPR.
Title

661FX-1 HOST & AGP

Document Number
under 661 solder side
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

of

42

MA[0..14]
CS-[0..3]
CKE[0..3]

DQM[0..7]

21,23

DQS[0..7]

21,23

MA[0..14]

21,23

CS-[0..3]

21,23

CKE[0..3]

21

VCC2.5_MEM

BC589
0.1uF
C0603

BC590
0.1uF
C0603

BC591
0.1uF
C0603

BC592
0.1uF
C0603

BC593
0.1uF
C0603

C
VCC2.5_MEM

BC594
0.1uF
C0603

BC595
0.1uF
C0603

BC596
0.1uF
C0603

BC597
0.1uF
C0603

BC598
0.1uF
C0603

2
VCC2.5_MEM

put bottom side

U6B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7

AN35
AP36
AK33
AM33
AN34
AK32
AR34
AN33
AR35
AP34
AM32
AL31
AR31
AL30
AN32
AR33
AN31
AM31
AR32
AP32
AP30
AR30
AM29
AL27
AN30
AN29
AL28
AN28
AL29
AR29
AP26
AN25
AR24
AL24
AL25
AR26
AM25
AN24
AP24
AR25
AN21
AP20
AN20
AL18
AM21
AR21
AL19
AM19
AL20
AR20
AL15
AL14
AN15
AR15
AN16
AM15
AN14
AL13
AP16
AR16
AM13
AL12
AL11
AR12
AP14
AR14
AN13
AP12
AN12
AR13
AL10
AR11
AM9
AR9
AM11
AN11
AP10
AN9
AN10
AR10

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB0#
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB1#
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB2#
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB3#
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB4#
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB5#
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB6#
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB7#

R56
150

R57
150

DDRVREFA

661FX-2

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
NC

AR23
AN23
AN22
AM23
AL23
AL26
AN26
AN27
AR27
AR28
AP22
AN18
AR22
AP28
AM27
AT14

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14

SRAS#
SCAS#
SWE#

AL17
AR19
AN19

SRASSCASSWE-

CS0#
CS1#
CS2#
CS3#
CS4#
CS5#

AM17
AL16
AN17
AR17
AP18
AR18

CS-0
CS-1
CS-2
CS-3

CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#

AL21

DRAMTEST

AL22

VCC2.5_MEM

R58
150

R59
150

DDRVREFB

*
/RSRAS/RSCAS/RSWE-

FWDSDCLKO

SB3V
CKE0
CKE1
CKE2
CKE3

R785
4.7K
+/-5%
R0603
S3AUXSW-

R60

22

BC56
10nF

21,23
21,23
21,23

AP4
AT3
AR3
AP3
AR2
AN4
AP2

FWDSDCLKO

BC55
10nF

VCC3
FB21
1

37 D DRAVDD

FWDSDCLKO

BC57
10pF

DQS[0..7]

21,23

FB L0603 47 Ohm
2

BC58
0.1uF

FWDSDCLKO 18

DDRAVSS
VCC2.5_MEM

DLLAVDD

AL35

DLLAVDD

DLLAVSS

AL34

DLLAVSS

DDRAVDD

AM35

D DRAVDD

DDRAVSS

AN36

DDRAVSS

DDRVREFA
DDRVREFB

AF16
AF23

DDRVREFA
DDRVREFB

TRAP2

AP1

DDRCOMP_P
DDRCOMP_N

AR8
AP8

DDRCOMN

DDRCOMP

R61

DQM[0..7]

MD[0..63]

40.2
VCC3
FB22
1

DLLAVDD
R62

MD[0..63]

40.2

FB L0603 47 Ohm
2

BC59
0.1uF

DLLAVSS

DDRCOMP
DDRCOMN

661FX

TECHNOLOGY COPR.
Title

661FX-2 DDR

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

10

of

42

Enable

ZSTB0
ZSTB0#

AE3
AF2

ZSTB1
ZSTB1#

AH5
AK2
AJ4
AJ6
AH2
AH4
AG3
AG6
AF4
AG2
AF5
AG4
AD2
AE6
AE2
AE4
AL3

ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16

ZVREF

AK4

ZCMP_N
ZCMP_P

AD5
AD4

Z1XAVDD
Z1XAVSS

AN1
AM2

Z1XAVDD
Z1XAVSS

AL2
AL1

Z4XAVDD
Z4XAVSS

BC60
0.1uF

Z4XAVDD
Z4XAVSS
VCC3

ROUT
GOUT
BOUT

B12
B13
A13

ROUT
GOUT
BOUT

20
20
20

HSYNC
VSYNC

A11
B11

HSYNC
VSYNC

20
20

VGPIO0
VGPIO1

E13
C11

DDC1CLK
DDC1DATA

20
20

INT#A

C10

INT-A

13,19,24,25

CSYNC
RSYNC
LSYNC

D12
E12
D11

CSYNC
RSYNC
LSYNC

VCOMP
VRSET
VVBWN

E15
D15
E14

VCOMP
VRSET
VVBWN

ZVREF

DACAVDD1
DACAVSS1

D13
C12

DACAVDD
DACAVSS

ZCOMP_N
ZCOMP_P

DACAVDD2
DACAVSS2

D14
C13

DACAVDD
DACAVSS

DCLKAVDD
DCLKAVSS

B15
C15

DCLKAVDD
DCLKAVSS

ECLKAVDD
ECLKAVSS

B14
C14

ECLKAVDD
ECLKAVSS

VGA

661FX-3
HyperZip

661FX

Z4XAVDD

17

BC64
0.1uF

38

NBPWRGD

6,13

NBRST-

14,36

AUXOK

NBPWRGD
AUXOK

** **

ZSTB1
ZSTB-1

REFCLK2

33
33

R64
R66

100 R67
100 R68

LSYNC

panel link

CSYNC

VB

RSYNC
ENTEST
LSY NC
CSYNC

RN6
1
3
5
7

RSYNC

R69

NBPWRGD

BC61

AUXOK

BC62

VCC3

8P4R0603
4.7K +/-5%
2
4
6
8

4.7K DUMMY

AJ2
AJ3

A15

DLLEN#
ENTEST

ZSTB1
ZSTB-1

ZSTB0
ZSTB-0

VOSCI

0.1uF
0.1uF

VCC3

DCLKAVDD

BC63
0.1uF

DCLKAVSS

E10
D9

R70
51.1

13
13

ZUREQ
ZDREQ

ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16

ZVREF

ZSTB0
ZSTB-0

AL4
AK5

TESTMODE2
TESTMODE1
TESTMODE0

R65
150

13
13

ZUREQ
ZDREQ

C9
B9
B10

ZUREQ
ZDREQ

ZCLK

TRAP1
TRAP0

VCC1.8V

13
13

AL6

F9
D10

ZAD[0..16]

ZCLK0

PCIRST#
PWROK
AUXOK

ZAD[0..16]

ZCLK0

AN2
AM4
AN3

13

17

VGA

**

U6C

Disable

RSYNC

VCC3
ENTEST

ECLKAVDD

Z4XAVSS

BC65
0.1uF

ECLKAVSS

BC66

0.1uF

VCOMP

BC67

0.1uF

* *

VVBWN

B
VRSET

VCC1.8V

R71
130

DACAVDD
VCC1.8V

BC70
0.1uF
DUMMY
R73

R72

+/-5%
R0603

+/-5%
R0603

56

ZCMP_N

56

ZCMP_P

VCC3

Z1XAVDD
BC71
0.1uF

BC68
0.1uF

BC69
1uF

DACAVSS

Put the cap bottom side

Z1XAVSS

A
TECHNOLOGY COPR.
Title

661FX-3 VGA & MUTIOL

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

11

of

42

VCC1.8V

AB24
AC13
AD14
AD16
AD18
AD20
AD22

PVDDM
PVDDM
PVDDM
PVDDM
PVDDM
PVDDM
PVDDM

D4
D5
AM5

L17
M17
N17
VDD3.3
VDD3.3
VDD3.3

AB12
AC12

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

AA1
AA2
AA3
AA4
AA5
AA6
AB1
AB2
AB3
AB4
AB5
AB6
AC1
AC2
AC3
AC4
AC5
AC6

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

L11
L12
L13
M11
M12
M13
M14
M15
M16
N11
N12
P12
R12
T12
U12
V12

IVDD
IVDD
IVDD
IVDD
IVDD

B16
C16
D16
E16
F15

661FX-4

NC4
NC5
NC6
NC7
NC8
NC9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

E11
F11
F13
AL33
AM34
A9
A3
A5
C1
C3
C5
E1
E5
E7
E9
F3
G1
G5
H3
J1
J5
K3
L1
L5
M3
N1
N5
P3
R1
R5
T3
U1
U5
V3
W1
W5
Y3

VSS
VSS
VSS
VSS

AE5
AG5
AJ5
AL5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A22
A24
A26
A28
A30
A32
A34
C23
C25
C27
C29
C31
C34
C36
E22
E24
E26
E28
E30
E32
E36
F34
G32
G36
H34
J32
J36
K34
L32
L36
M34
N32
N36
P34
R32

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

T34
U32
U36
V34
W32
W36
Y34
AA32
AA36
AB34

SB1.8V

IVDD, AUX_IVDD 1.8V

SB3V
VDDQ

SB1.8V

SB3V

BC72
0.1uF

BC73
1uF

VCC1.8V

FSB_VTT

VCC1.8V

BC74
10uF

BC75
1uF

BC76
1uF

BC77
1uF

VDDQ

BC78
10uF

BC79
1uF

BC80
0.1uF

C
BC81
0.1uF

VCC2.5_MEM

BC82
10uF
DUMMY

BC83
1uF

BC84
1uF

BC85
1uF

BC86
10uF
DUMMY

BC87
1uF

BC88
0.1uF

BC89
0.1uF

BC1027
10uF

BC1028
1uF

Place these capacitors under 660 solder side

VCC1.8V

VDDQ

BC93
0.1uF

BC94
0.1uF

BC95
0.1uF

BC96
10uF
DUMMY

VCC2.5_MEM

BC97
0.1uF

BC98
0.1uF

BC99
0.1uF

B
*

BC90
0.1uF

BC91
0.1uF

BC92
0.1uF

AT16
AT18
AT20
AT22
AT24
AT26
AT28
AT30
AT32
AT34
AL32

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
T14
T15
T16
T17
T18
T19
T20
T21
T22
T23
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
V14
V15
V16
V17
V18
V19
V20
V21
V22
V23
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23

NC1
NC2
NC3

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
IVDD
IVDD
IVDD
IVDD
IVDD
PVDD
IVDD
PVDD
IVDD
IVDD
IVDD
IVDD
PVDD
PVDD
IVDD
PVDD
PVDD
IVDD
IVDD
PVDD
PVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PVDD
IVDD
IVDD
IVDD

VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM

U6D

AUX_IVDD
AUX3.3

Power

AM10
AM12
AM14
AM16
AM18
AM20
AM22
AM24
AM26
AM28
AM30
AP9
AP11
AP13
AP15
AP17
AP19
AP21
AP23
AP25
AP27
AP29
AP31
AP33
AP35
AT8
AT10
AT12

AB25
AC25
AD12
AD25
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AE26
AF11
AF12
AF25
AF26

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM

AC32
AC36
AD34
AE32
AE36
AF34
AG32
AG36
AH34
AJ32

AL7
AL8
AL9
AM6
AM7
AM8
AN5
AN6
AN7
AN8
AP5
AP6
AP7
AR4
AR5
AR6
AR7
AT4
AT5
AT6
AT7

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VCC2.5_MEM

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23

L25
L26
M18
M19
M20
M21
M22
M23
M24
M25
M26
N25
P25
R25
T25
U25
V25
W25
Y25
AA25

VCC3

AH3
AJ1
AK3
AM3
W11
W12
Y11
Y12
AA12
AD3
AE1
AF3
AG1

VCC1.8V

VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ

VCC1.8V

A17
A18
A19
A20
A21
B17
B18
B19
B20
B21
C17
C18
C19
C20
C21
D17
D18
D19
D20
D21
E17
E18
E19
E20
E21
F17
F18
F19
F20
F21
N13
N14
N16
N18
N19
N20
N21
N22
N23
N24
P13
P24
R24
T13
T24
U24
V13
V24
W13
W24
Y13
Y24
AA24
AB13
AC24
AD13
AD15
AD17
AD19
AD21
AD23
AD24
N15
R13
U13
AA13

FSB_VTT

661FX

TECHNOLOGY COPR.
Title

661FX-4 Power

Document Number

R ev

661M05
Date:

Saturday, October 09, 2004

A
Sheet

12

of

42

VCC3
VCC3

5
7

8.2K
+/-5%
8P4R0603

C/BE-[0..3]

R334
4.7K
+/-5%
R0603
Dummy

40
25
24
24

PREQ-3
PREQ-2
PREQ-1
PREQ-0

PREQ-4
PREQ-3
PREQ-2
PREQ-1
PREQ-0

F1
F2
F3
F4
E1

PREQ4#
PREQ3#
PREQ2#
PREQ1#
PREQ0#

40
25
24
24

PGNT-3
PGNT-2
PGNT-1
PGNT-0

PGNT-3
PGNT-2
PGNT-1
PGNT-0

H4
G1
G2
G3
G4

PGNT4#
PGNT3#
PGNT2#
PGNT1#
PGNT0#

C/BE-3
C/BE-2
C/BE-1
C/BE-0

K3
M2
P1
U4

C/BE3#
C/BE2#
C/BE1#
C/BE0#

INT-A
INT-B
INT-C
INT-D

F5
E4
E3
E2

INTA#
INTB#
INTC#
INTD#

FRAMEIRDYT RDYSTOP-

M1
N4
N3
P4

FRAME#
IRDY#
TRDY#
STOP#

SERRPAR
DEVSELPLOCK-

P3
P2
N2
N1

SERR#
PAR
DEVSEL#
PLOCK#

W3
B3

PCICLK
PCIRST#

INT-A
INT-B
INT-C
INT-D

24,25,40 FRAME24,25,40 IRDY24,25,40 TRDY24,25,40 STOP-

24,25,40 SERR24,25,40
PAR
24,25,40 DEVSEL24,25
PLOCK17
19,24,25,26,40
28
6,11

96XPCLK
PCIRST-

96XPCLK
PCIRSTSIORSTNBRST-

17

ZCLK1

11
11

ZSTB0
ZSTB-0

11
11

ZSTB1
ZSTB-1

11
11

ZUREQ
ZDREQ

R301
R302
R303

***

24,25,40 C/BE-[0..3]

11,19,24,25
19,24,25
24,25
24,25,40

33
33
33

ZCLK1

AB26

ZSTB0
ZSTB-0

V24
W26

ZSTB0
ZSTB0#

ZSTB1
ZSTB-1

R25
T26

ZSTB1
ZSTB1#

ZUREQ
ZDREQ

Y24
Y23

ZUREQ
ZDREQ

VCC1.8V

AA24

ZCMP_N

SZCMP_P

AA25

ZCMP_P

R304
150
+/-1%
R0603

SZ1XAVDD
SZ1XAVSS

AC26
AB25

Z1XAVDD
Z1XAVSS

SZ4XAVDD
SZ4XAVSS

Y22
AA23

Z4XAVDD
Z4XAVSS

SZVREF

AA26
ZAD16 Y26

R305
49.9
+/-1%
R0603

BC880
0.1uF
25V, Y5V, +80%/-20%
C0603

IDE

964/964L -1

ZVREF
ZAD16

HyperZip

BC879
0.1uF
25V, Y5V, +80%/-20%
C0603

IDEAVDD
IDEAVSS

W1
W2

ICHRDYA
IDREQA
IIRQA
CBLIDA

AE15
AD14
AC15
AE16

ICHR DYA
IDEREQA
IDEIRQA
CBLIDA

IIORA#
IIOWA#
IDACKA#

AF15
AC14
AD15

IDEIOR-A
IDEIOW-A
IDACK-A

IDSAA2
IDSAA1
IDSAA0

AC16
AF16
AD16

IDESAA2
IDESAA1
IDESAA0

IDECSA1#
IDECSA0#

AE17
AF17

IDECS-A1
IDECS-A0

ICHRDYB
IDREQB
IIRQB
CBLIDB

AE22
AD21
AC22
AE23

ICHR DYB
IDEREQB
IDEIRQB
CBLIDB

IIORB#
IIOWB#
IDACKB#

AF22
AC21
AD22

IDEIOR-B
IDEIOW-B
IDACK-B

IDSAB2
IDSAB1
IDSAB0

AF24
AF23
AD23

IDESAB2
IDESAB1
IDESAB0

IDECSB1#
IDECSB0#

AF25
AE24

IDECS-B1
IDECS-B0

IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8
IDA9
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15

AF14
AD13
AF13
AD12
AF12
AD11
AF11
AF10
AE10
AE11
AC11
AE12
AC12
AE13
AC13
AE14

IDEDA0
IDEDA1
IDEDA2
IDEDA3
IDEDA4
IDEDA5
IDEDA6
IDEDA7
IDEDA8
IDEDA9
IDEDA10
IDEDA11
IDEDA12
IDEDA13
IDEDA14
IDEDA15

IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15

AF21
AD20
AF20
AD19
AF19
AD18
AF18
AD17
AC17
AE18
AC18
AE19
AC19
AE20
AC20
AE21

IDEDB0
IDEDB1
IDEDB2
IDEDB3
IDEDB4
IDEDB5
IDEDB6
IDEDB7
IDEDB8
IDEDB9
IDEDB10
IDEDB11
IDEDB12
IDEDB13
IDEDB14
IDEDB15

IDESAA[0..2]

ICHRDYA
IDEREQA
IDEIRQA
CBLIDA
IDEIOR-A
IDEIOW-A
IDACK-A
IDESAA[0..2]

IDECS-A[0..1]

26
26
26
26
26
26
26

26

IDECS-A[0..1] 26

IDESAB[0..2]

ICHRDYB
IDEREQB
IDEIRQB
CBLIDB
IDEIOR-B
IDEIOW-B
IDACK-B
IDESAB[0..2]

IDECS-B[0..1]

26
26
26
26
26
26
26

26

IDECS-B[0..1] 26

IDEDA[0..15]

26

IDEDB[0..15]

26

964

W24
W25
V22
V23
V26
U22
U25
U24
T22
U26
T23
R22
T24
R24
R26
P22

PCI

ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15

SZVREF

U25A

ZCLK

SZCMP_N

VCC1.8V

H3
H2
H1
J4
J3
J2
J1
K4
K2
K1
L4
L3
L2
L1
M4
M3
R4
R3
R2
R1
T4
T3
T2
T1
U3
U2
U1
V4
V3
V2
V1
W4

* 13

AD[0..31]

24,25,40 AD[0..31]

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

2
4
6
8

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

RN68
INT-A
INT-B
INT-C
INT-D

ZAD15
ZAD14
ZAD13
ZAD12
ZAD11
ZAD10
ZAD9
ZAD8
ZAD7
ZAD6
ZAD5
ZAD4
ZAD3
ZAD2
ZAD1
ZAD0

ZAD[0..16]

Analog Power supplies of Transzip function for 96X Chip.

VCC1.8V

VCC1.8V
JP24
2

VCC1.8V
SZ1XAVDD

BC882
0.1uF
25V, Y5V, +80%/-20%
C0603
SZ1XAVSS

SZ4XAVDD

BC883
0.1uF
25V, Y5V, +80%/-20%
C0603
SZ4XAVSS

SHORT/NA

R306
56
+/-5%
R0603

BC881
0.1uF
25V, Y5V, +80%/-20%
C0603
R307
56
+/-5%
R0603

11

SZCMP_N

TECHNOLOGY COPR.
SZCMP_P

Title

964_I
Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

0.6
A
Sheet

13

of

42

U25B

APIC

LAD[0..3]

*
C

LFRAMELDRQSIRQ

AD3
AE2
AF2

LFRAME#
LDRQ#
SIRQ

17,18,21 SMBDAT
17,18,21 SMBCLK

TXD0
TXD1
TXD2
TXD3
NC34
NC31
NC32
NC30

E11
D12
C12
E13
D13
E14
C14
D15

STXD0
STXD1
STXD2
STXD3

TXD0
TXD1
TXD2
TXD3

RXCLK

C13

RXCLK

RXDV

A12

RXDV

RXER

A13

RXER
RXD0
RXD1
RXD2
RXD3

RTCVDD

RXD0
RXD1
RXD2
RXD3
NC36
NC35
NC38
NC37

B12
A11
B11
C11
A10
C10
A9
B9

RTCVSS

NC33

A14

964/964L-2

C2
C1

OSC32KHO

BATOK
SBPWRGD

D4
D2

BATOK
PWROK

SMBCLK

TXEN

LPC

OSC32KHO

SMBDAT

TXEN

E10 STXEN

MII

OSC32KHI

AB1

GPIO20

AB2

GPIO19

TXCLK

35

TXEN

35

TXD0

35

TXD1

35

TXD2

35

TXD3

35

RN67
22
2+/-5% MDIO
MDC
4
TXD3
6
8

SMDIO
SMDC
STXD3

1
3
5
7

MCLK25O

RTC

35

RXDV

35

RXER

35

RXD0
RXD1
RXD2
RXD3

35
35
35
35

33
33

AC_RESETBIT_CLK

AB3
AC1

AC_SDOUT
AC_SYNC

AC_RESETBIT_CLK

B5
AC2

AC_RESET#
AC_BIT_CLK

OSC32KHI
X5

B14

COL

CRS

C15

C RS

MDC

C9

COL

35

CRS

35

MDC

35

AC_SDIN0
AC_SDIN1

SPKR

36
PWRBTN19,24,25,28,40 PME38
PSON11,36
36

REFCLK1
SENTEST
SPKR

AD2
D1
AD1

PWRBTNPMEPSON-

D5
A7
D8

PWRBTN#
PME#
PSON#

A3
B6

AUXOK
ACPILED

AUXOK
ACPILED

AUXOK
ACPILED

29

AC97

29
29
29

KBCLK

KBCLK

MDIO

E9

MIIAVDD
MIIAVSS

B7
A6

GPIO0/SPDIF

Y3

MDC

SMDIO

MDIO

MDIO

PME-

37

PMCLK

PMCLK

GPIO

Y4

THERM-

GPIO3/EXTSMI#

AA1

I D2

GPIO4/CLKRUN#

AA2

I D1

GPIO5/PREQ5#

AA3
AA4

GPIO14

GPIO7

A4

B8

GPIO8/RING

C6

GPIO15/KBDAT

GPIO9/AC_SDIN2

C5

D6

KBC

2
1

VCC3

VCC3

BC877
22pF
50V, NPO, +/-5%
C0603

GPIO17/PMDAT
GPIO18/PMCLK

C4

GPIO11/OSC25M/STP_PCI#

F6

GPIO12/CPUSTP#

E5

4.7K

R336
300
+/-5%
R0603

Q32
MMBT3904

THERMTRIPJ

R337
4.7K
+/-5%
R0603

Q33
MMBT3904

GPWAK-

VCC3

RING

15

THERM- R295
VCC3

GPIO11 R296

-KEYLOCK

SMBCLK R298

GPIO11

R333
4.7K
+/-1%
R0603
Dummy

SENTEST

4.7K
4.7K
4.7K
4.7K
R294
0
+/-5%
R0603

964
I D1

CPUPWRGD_NB 9

*
MMBT3904
Q31

1K B

Q31 change from 2N7002 to MMBT3904; Add R10

R331
4.7K
+/-1%
R0603
Dummy

TECHNOLOGY COPR.
Title

964_2

R300

*
GPWAK-

R299
470
+/-5%
R0603

Rev
0.6

Document Number
CPU_PWRG

STHERMTRIP-

SMBDAT R297

GPIO10/AC_SDIN3

R335
1K
+/-5%
R0603

THERM- 28

A5

VCC3

GPIO2/THERM#

GPIO6/PGNT5#

C8

4.7K

R776

-KEYLOCK

R332
4.7K
+/-1%
R0603
Dummy
INTRUDER

AE3

GPIO13

GPIO16/KBCLK

XTAL-32.768kHz
2

BC876
15pF
50V, NPO, +/-5%
C0603

R293

35

MIIAVDD
MIIAVSS

GPIO1/LDRQ1#

B2

A8

PMDAT

PMDAT

ACPI
/others

BC878
0.1uF
25V, Y5V, +80%/-20%
C0603

KBDAT

KBDAT

OSCI
ENTEST
SPK

R292
10M

33,38

REFCLK1

BC874
15pF
50V, NPO, +/-5%
C0603

SB3V
SMDC

I D2
17

OSC32KHO

SDATO
SYNC

E6
B4

SDATO
SY NC

2 X4

33
33

SDATI0

R291
1M
+/-5%
R0603

XTAL-25MHz
BC873
15pF
50V, NPO, +/-5%
C0603

COL

GPIO

RXCLK

SDATI0

MIIAVSS

BAT
33

BC872
0.1uF
25V, Y5V, +80%/-20%
C0603

MCLK25I

OSC32KHI

BC875 RTCVDD
0.1uF
25V, Y5V, +80%/-20%C3
C0603
D3

D10

SB1.8V

Analog power of MII

MIIAVDD

LAD0
LAD1
LAD2
LAD3

TXCLK

TXEN
TXD0
TXD1
TXD2

36
BATOK
17,38 SBPWRGD

AC4
AC3
AE1
AF1

OSC25MHO

MCLK25O

LFRAMELDRQSIRQ

LAD0
LAD1
LAD2
LAD3

MCLK25I

TXCLK

CPU_S

APICCK/LDTREQ#
APICD0/THERM2#
APICD1/GPIOFF#

D7
C7

28
28
28

STHERMTRIP-

AF26
AC25
AB24

INIT#
A20M#
SMI#
INTR
NMI
IGNNE#
FERR#
STPCLK#
CPUSLP#

OSC25MHI

**

28

PROCHOTJ

VCC3

AB23
AD26
AE25
AC24
AD25
AD24
AE26
AB22
AC23

22
2+/-5%
4
6
8

INITJ
A20MJ
SMIJ
INTR
NMI
IGNNEJ
FERRJ
STPCLKJ
CPUSLPJ

5
5
5
5
5
5
5
5
5

INITJ
A20MJ
SMIJ
INTR
NMI
IGNNEJ
FERRJ
STPCLKJ
CPUSLPJ
R290
10K
+/-5%
R0603

RN66
STXEN 1
STXD0 3
STXD1 5
STXD2 7

* ****

5
Date:

661M05

Saturday, October 09, 2004

Sheet

14

of

42

FB12

SB1.8V

SATACMPAVDD

FB L0603 80 Ohm

BC912
10nF
C0603

BC858
0.1uF
25V, Y5V, +80%/-20%
C0603
SATACMPAVSS

U25C

27

OC0123-

OC0123-

27

SB1.8V

UV0+
UV0UV1+
UV1UV2+
UV2UV3+
UV3UV4+
UV4UV5+
UV5UV6+
UV6UV7+
UV7-

UV0+
UV0UV1+
UV1UV2+
UV2UV3+
UV3UV4+
UV4UV5+
UV5UV6+
UV6UV7+
UV7-

OC4567-

BC862
10nF
C0603

OC4567-

BC863
0.1uF
25V, Y5V, +80%/-20%
C0603

C
VCC1.8V

FB13

BC864
10nF
FB L0603 80 Ohm
C0603

*
FB L0603 80 Ohm

17
17

VCC1.8V

BC867
10nF

C0603

CLK_SATAJ
CLK_SATA

SATATXAVDD
BC868
1uF
16V, Y5V, +80%/-20%
C0805
SATATXAVSS

C26
C24
D26
D25
D24
E24
E23
F22

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#
OC6#
OC7#

E18
E20
E22
F17
F18
F19
F20
F21
G22
H22

UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
UVDD18
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD

SATARXAVDD
SATARXAVSS

AF3
AD4

IVDD
VSS

SATATXAVDD
SATATXAVSS

Y2
Y1

FB9

UV0+
UV0UV1+
UV1UV2+
UV2UV3+
UV3UV4+
UV4UV5+
UV5UV6+
UV6UV7+
UV7-

AA6
AA7
AA8
AA9
AA10
AB6

BC865
1uF
16V, Y5V, +80%/-20%
C0805

SATACMPAVDD
SATACMPAVSS

SATACMPAVSS R281
SATACLKSATACLK

VCC1.8V

G26
G25
H24
H23
C21
D21
A22
B22
C19
D19
A20
B20
C17
D17
A18
B18

374

USB

R10

OSC12MHI

E25

OSC12MHI

OSC12MHO

E26

OSC12MHO

USBREF

A24

USBREF

USBPVDD18
USBPVSS18

F24
F23

USBPVDD1.8

USBCMPAVDD18
USBCMPAVSS18

A25
B24

USBCMPAVDD1.8
USBCMPAVSS1.8

USBCMPAVDD33
USBCMPAVSS33

D23
C23

UVDD33
UVDD33
UVDD33

G16
G18
H20

IVDD_AUX
IVDD_AUX

USB12M

USBCMPAVDD3.3

41
41
41
41
27
27
27
27
27
27
27
27
27
27
27
27

R277
127
+/-1%
R0603

33

0
R0603
+/-5%

BC860
0.1uF

SB3V

C0603
FB11

IVDD_AUX
IVDD_AUX

G21
H21

1
2
BC861
0.1uF
25V, Y5V, +80%/-20% FB L0603 80 Ohm
C0603

SB3V

964-3

R278
IPB_OUT0

STX1P
STX1N
SRX1P
SRX1N
STX2P
STX2N
SRX2P
SRX2N

IVDD
VSS

NC

AB4

AB5
AD5

IVDD
VSS

GPIO21/EESK
GPIO22/EEDI
GPIO23/EEDO
GPIO24/EECS

A16
A15
B16
B15
A26

NC
NC
NC

IPB_OUT0/PLLENN

IPB_OUT0

AC5
AE4
AF4

IPB_OUT1/ZCLKSEL

B25

IPB_OUT1

TRAP0

B26

TRAP1

C25

SATA_LED

IVDD_AUX

FDLL4148

HDDLED

26,36

BC870
10nF

FB L0603 80 Ohm
C0603

SATARXAVDD
BC871
1uF
16V, Y5V, +80%/-20%
C0805
SATARXAVSS

BC866
0.1uF
25V, Y5V, +80%/-20%
C0603

D15

SB1.8V
USBPVDD1.8
SB3V

**

Dummy

SB1.8V

R282

Dummy

4.7K

C
AD7
AC7
AF6
AE6
AD9
AC9
AF8
AE8

FB10

4.7K

R279
IPB_OUT1

NC
NC
NC
NC
NC
NC
NC
NC

SATA

USBCMPAVDD1.8
BC859
0.1uF
25V, Y5V, +80%/-20%
C0603
USBCMPAVSS1.8

**

4.7K

Dummy

4.7K

Dummy

R283

964
R284
22
+/-5%
R0603

R285
22
+/-5%
R0603

BC869
0.1uF
25V, Y5V, +80%/-20%
C0603

OSC12MHO

**

OSC12MHI

1
SATA1

8
9
SATA2

8
9

SATA1
2
3
4
5
6
7
SATA

STX1P
STX1N

C0603

SRX1N
SRX1P

R286
1M
+/-5%
R0603

X3
Dummy
2
XTAL-12MHz

BC913
10pF

1
2
3
4
5
6
7

Dummy

Dummy

BC914
10pF

VCC1.8V

C0603

Dummy

STX2P
STX2N
SRX2N
SRX2P

TECHNOLOGY COPR.
Title

964_3
Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

0.6
A
Sheet

15

of

42

VCC1.8V

P26
P21
R21
T25
V25
V21
W21
Y25
Y21

VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ

M21
N21
T21
U21
AB18
AB16
AB14
AB11
AA5
Y5
T5
R5
L5
G5

IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD

L21
AA21
AB19
AB13
U5
M5
H5

PVDD
PVDD
PVDD
PVDD
PVDD
PVDD
PVDD

K21
J21
AB20
AB17
AB15
AB12
AB10
W5
V5
P5
N5
K5
J5

OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD

AA22
AB21

VTT
VTT

VCC1.8V

VCC3

SB1.8V
BC830
0.1uF
25V, Y5V, +80%/-20%
C0603

FSB_VTT

BC918
0.1uF
25V, Y5V, +80%/-20%
C0603

BC833
0.1uF
25V, Y5V, +80%/-20%
C0603
VCCP
BC836
0.1uF
25V, Y5V, +80%/-20%
C0603

VCC3

BC832
0.1uF
25V, Y5V, +80%/-20%
C0603

BC831
0.1uF
25V, Y5V, +80%/-20%
C0603

BC841
0.1uF
25V, Y5V, +80%/-20%
C0603

BC840
0.1uF
25V, Y5V, +80%/-20%
C0603

BC837
0.1uF
25V, Y5V, +80%/-20%
C0603

BC835
0.1uF
25V, Y5V, +80%/-20%
C0603

964-4
Power

FSB_VTT
FSB_VTT

SB3V

BC843
0.1uF
25V, Y5V, +80%/-20%
C0603
VCC3

*
*
SB3V

BC854
0.1uF
25V, Y5V, +80%/-20%
C0603
Dummy
BC857
0.1uF
25V, Y5V, +80%/-20%
C0603

*
*

BC856
0.1uF
25V, Y5V, +80%/-20%
C0603
Dummy

BC850
0.1uF
25V, Y5V, +80%/-20%
C0603
Dummy
BC853
0.1uF
25V, Y5V, +80%/-20%
C0603

BC852
0.1uF
25V, Y5V, +80%/-20%
C0603
Dummy
BC855
0.1uF
25V, Y5V, +80%/-20%
C0603

BC848
0.1uF
25V, Y5V, +80%/-20%
C0603
Dummy
BC851
0.1uF
25V, Y5V, +80%/-20%
C0603

BC847
0.1uF
25V, Y5V, +80%/-20%
C0603

BC846
0.1uF
25V, Y5V, +80%/-20%
C0603
Dummy
BC849
0.1uF
25V, Y5V, +80%/-20%
C0603

SB3V

BC844
10nF
C0603

B10
B13
BC845
E7
0.1uF
E12
25V, Y5V, +80%/-20%
E15
C0603
F10
F11
F13
F7
G20
E8
F14

W22
P25
P24
P23
N26
N25
N24
N23
N22
M26
M25
M24
M23
M22
L26
L25
L24
L23
L22

IVDD_AUX
IVDD_AUX
IVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
OVDD_AUX
PVDD_AUX
PVDD_AUX

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
NC19

VSS
VSS
VSS
VSSZ
VSSZ
VSSZ

VCC1.8V

F9
F12
F15

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

L10
L11
L12
M10
M11
M12
N10
N11
N12
N13
N14
N15
N16
P10
P11
P12
P13
P14
R10
R11
R12
R13
R14
T10
T13
T14
U10
U13
U14
U15

VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ

P15
P16
R15
R16
T15
T16
U16

USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS

F25
F26
G23
G24
H25
H26
J23
J24
A23
B23
C22
D22
A21
B21
E21
C20
D20
A19
B19
E19
C18
D18
A17
B17
E17
C16
D16

USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS
USBVSS

L13
L14
L15
L16
M13
M14
M15
M16

AD10
AC10
AF9
AE9
AB9
AD8
AC8
AB8
AF7
AE7
AB7
AD6
AC6
AF5
AE5
T11
T12
U11
U12

AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA
AVSSSATA

D9
D11
D14
R23
U23
W23

SB1.8V

NC20
NC21
NC22
NC23
NC24
NC25
NC26
NC27
NC28
NC29

BC842
0.1uF
25V, Y5V, +80%/-20%
C0603

K26
K25
K24
K23
J26
J25
J22
K22
F16
E16

Put under 96X solder side

U25D

964

A
TECHNOLOGY COPR.

Title

964_4
Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

0.6
A
Sheet

16

of

42

VCC3

FB1
FB L0805 300 Ohm

U24

3D3V_CLKM

Q29
MMBT3904
Dummy

R261

B
E

475 38

14,38 SBPWRGD

R247
49.9
+/-1%
R0603

AGPCLK0
AGPCLK1

ZCLK0
ZCLK1

9
10

R251
R252

22
22

ZCLK0
ZCLK1

**FS_3/PCICLK6
**FS_4/PCICLK7
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
*FS2/PCICLK5

14
15
16
17
20
21
22
12

~**Sel24_48#/24_48MHz

2
3

** **

22
22

FS0
FS1

7
5
3
1

8 33
6
4
2
33
33

R262
R263
R264

8P4R0603 +/-5%

9
19

ZCLK0
ZCLK1

11
13

SIOPCLK
PCICLK3
PCICLK1
PCICLK2
96XPCLK
PCICLK_1394

28
25
24
24
13
40

REFCLK2
REFCLK1
AUDIO_CLK

11
14
33

AGPCLK1

BC813
10pF
50V, NPO, +/-5%
C0603
BC814
Dummy
10pF
50V, NPO, +/-5%
BC815
C0603
10pF
50V, NPO, +/-5% Dummy
C0603
Dummy
BC816
10pF

ZCLK1
AUDIO_CLK

BC821
10pF
50V, NPO, +/-5%
BC822
C0603
10pF
50V, NPO, +/-5% Dummy
C0603
Dummy

26

REFCLK1

VDDA

VSSA

SRCCLK
SRCCLK#

47
46

R266
R267
R9
R270

33
33

33R0603 +/-5%
22 CK_48M_SIO

USB12M
33
CK_48M_SIO 28

R269
49.9
+/-1%
R0603

R268
49.9
+/-1%
R0603

SMBCLK
SMBDAT

14,18,21
14,18,21

CLK_SATA
CLK_SATAJ

15
15
AUDIO_CLK

BC826
10pF
50V, NPO, +/-5%
C0603
BC827
Dummy
10pF
50V, NPO, +/-5%
C0603
Dummy

CK_48M_SIO

X1

27
25

R265

12_48MHz/SEL12_48#**
48MHz

ICS952017

35
34

37

SCLK
SDATA

** *

36

BC824
0.1uF
25V, Y5V, +80%/-20%
C0603

BC823
4.7uF
10V, Y5V, +80%/-20%
C0805

FB L0603 47 Ohm
CLK_PLLVCC
2

BC812
10pF
50V, NPO, +/-5%
C0603
Dummy

AGPCLK0

ZCLK0

SIOPCLK
PCICLK3
PCICLK1
PCICLK2
96XPCLK
PCICLK_1394
REFCLK2
REFCLK1
AUDIO_CLK

22
22
33

AGPCLK0
AGPCLK1

By-Pass Capacitors
Place near to the Clock Outputs

R248
49.9
+/-1%
R0603

R249
R250

FS3
FS4 RN55
33_PCI3
33_PCI1
33_PCI2
33_964 R784
R783
33_PCI_1394
FS2

9
9

REFCLK2
FB2
1

R246
49.9
+/-1%
R0603

31
30

**FS0/REF0
**FS1/REF1

Reset#

R245
49.9
+/-1%
R0603

AGPCLK0
AGPCLK1

IREF

VCC3

CPUCLK1
CPUCLK-1

X2

Q30
MMBT3904
Dummy

33
33

VttPWR_GD/PD#

R243
R244

VSSREF
VSSZ
VSSPCI
VSSPCI
VSS48
VSSAGP
VSSCPU
VSSSRC

R4
0
+/-5%
R0603
33

44
43

5
5

R253
1K
+/-5%
R0603
Dummy

CPUCLK1
CPUCLK#1

CPUCLK0
CPUCLK-0

R260
10K
Dummy

*
R38
1K
+/-5%
R0603
Dummy

33
33

VCC3

VCC3

VCCP

R241
R242

**

7,38 VRMPWRGD

40
39

5
8
18
23
24
32
41
45

CPUCLK0
CPUCLK#0

***

* * * * * * * * *

C0805
10V, Y5V, +80%/-20%

VDD_REF
VDDZ
VDD_PCI
VDD_PCI
VDD48
VDDAGP
VDDCPU
VDDSRC

** **

1
11
13
19
28
29
42
48

BC804 BC805 BC806 BC807 BC808 BC809 BC810 BC811

1uF
10nF 1uF
10nF 1uF
10nF 1uF
10nF

BC803
4.7uF

X2

VCC3

XTAL-14.318MHz
BC828
BC829
22pF
22pF
50V, NPO, +/-5%
50V, NPO, +/-5%
C0603
C0603

*
6

BSEL0
BSEL1

R271
10K
+/-5%
R0603

BSEL0

R273

BSEL1

R272
10K
+/-5%
R0603

R274
R275
10K
+/-5%
R0603
Dummy

* *

2.7K
2.7K

FS2
FS3

A
TECHNOLOGY COPR.
Title

Clock Gen

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

17

of

42

VCC2.5_MEM
FB14
1

CBVDD

FB L0603 47 Ohm

BC143
0.1uF
DUMMY

*
BC146
10nF

BC144
10nF

*
BC147
0.1uF

BC145
0.1uF

BC148
0.1uF

DDRCLK[0..5] 21
DDRCLK-[0..5] 21

47u

Clock Buffer (DDR)

U9
RTL680-627

VCC2.5_MEM

CBVDD

VDD
VDD
VDD

10

AVDD

11

AGND

7
22

SCLK
SDATA

CLK_IN

FB7
FB L0603 47 Ohm

3
12
23

10 FWDSDCLKO

SMBCLK
SMBDAT
FWDSDCLKO

0
0

BC150
0.1uF

BC151
10nF

DUMMY
R115
R116
DUMMY

18

NC1

20

FB_IN

CLK0
CLK1
CLK2
CLK3
CLK4
CLK5

2
4
13
17
24
26

DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK4
DDRCLK5

CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5

1
5
14
16
25
27

DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-4
DDRCLK-5

FB_OUT
NC3

19
21

R117

14,17,21 SMBCLK
14,17,21 SMBDAT

BC149
10uF
DUMMY

**

DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK4
DDRCLK5

21
21
21
21
21
21

DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-4
DDRCLK-5

21
21
21
21
21
21

BC152
10pF

*
NC2

close to clock buffer

6
28
15

GND
GND
GND

FB_OUT

A
TECHNOLOGY COPR.
Title

DDR Clock Buffer

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

18

of

42

SBA-[0..7]

ST[0..2]
9
9

AC-BE[0..3]
AAD[0..31]

9
9

ADSTBF[0..1]
ADSTBS[0..1]

SBA-[0..7]
ST[0..2]

VCC5

NOTE: This AGP slot support

both AGP3.0 display card
and SiS301 video bridge
card.

+12V

AC-BE[0..3]
AAD[0..31]

VDDQ

SB3V

ADSTBF[0..1]
ADSTBS[0..1]

VDDQ

GCDET- on card

AVREFCG

APERR

0V

0.35V

0V

1.47V

0.75V

1.5V

GND
OPEN

VCC3

VCC3

GCDET-

D
AGP

SBSTBF

SBA-0
SBA-2
SBSTBF
SBA-4
SBA-6

AAD31
AAD29
AAD27
AAD25
ADSTBF1
AAD23
AAD21
AAD19
AAD17
AC-BE2
9

AIRDY

AIR DY

B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66

DEVEL#
VDDQ
PERR#
GND
SERR#
C/BE1#
VDDQ
AD14
AD12
GND
AD10
AD8
VDDQ
AD_STB0
AD7
GND
AD5
AD3
VDDQ
AD1
VREF_CG

TRDY#
STOP#
PME#
GND
PAR
AD15
VDDQ
AD13
AD11
GND
AD9
C/BE0#
VDDQ
AD_STB0#
AD6
GND
AD4
AD2
VDDQ
AD0
VREF_GC

A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66

GCDET-

INT-A
PCIRSTAGNT

11,13,24,25
13,24,25,26,40
9

DBI_HI

WBF

SBSTBS

ST1
DBI_HI
W BF
SBA-1
SBA-3
SBSTBS

close to AGP SLOT

SBA-5
SBA-7

AAD30
AAD28
AAD26
AAD24

VCC3

VCC5

R119
10K

VDDQ

*
R120
10K

DBI_LOW

INT-A
PCIRSTAGNT

R121
54.9

RBF

GCDET-

ADSTBS1
AC-BE3

Q10

AAD22
AAD20

AAD18
AAD16

GCDET-

AFRAME

AFRAME

ATRDY
ASTOP
PME-

9
9
14,24,25,28,40

APAR

R123

4.3KB

R118
124
+/-1%
R0603

AVREFCG
R122
124

2N7002

BC153
10nF

RBF

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41

ST0
ST2
9

+12V
TYPEDET#
GC_AGP8X_DET
USBGND
INTA#
RST#
GNT#
VCC3.3
ST1
MB_AGP8X_DET
PIPE#
GND
WBF#
SBA1
VCC3.3
SBA3
SB_STB#
GND
SBA5
SBA7
DBI_HI
GND
RESERVEDA24
VCC3.3
AD30
AD28
VCC3.3
AD26
AD24
GND
AD_STB1#
C/BE3#
VDDQ
AD22
AD20
GND
AD18
AD16
VDDQ
FRAME#

Q11
MMBT3904
E

13,24,25
INT-B
17
AGPCLK1
9
AREQ

OVRCNT#
+5V
+5V
USB+
GND
INTB#
CLK
REQ#
VCC3.3
ST0
ST2
RBF#
GND
RESERVEDB14
SBA0
VCC3.3
SBA2
SB_STB
GND
SBA4
SBA6
DBI_LO
GND
VCC3_AUX
VCC3.3
AD31
AD29
VCC3.3
AD27
AD25
GND
AD_STB1
AD23
VDDQ
AD21
AD19
GND
AD17
C/BE#2
VDDQ
IRDY#

INT-B
AGPCLK1
AREQ

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41

ASERR

AC-BE1
AAD14
AAD12
AAD10
AAD8
ADSTBF0
AAD7
AAD5
AAD3
AAD1
AVREFCG

APAR
AAD15

R124
8.2K
APERR

APERR

ATRDY
ASTOP
PME-

Q12

AAD13
AAD11

2N7002

AAD9
AC-BE0

ADEVSEL

1
2
3

VDDQ
9

ADSTBS0
AAD6

R125
1K

AAD4
AAD2
AAD0
AVREFGC

1
2
3

AGP_SLOT_132P

BC154
0.1uF

close to 660

AGP CONNECTOR DECOUPLING

put CAP close to AGP slot each POWER PIN
VDDQ

BC155
10nF

BC156
10nF

VCC3

BC157
10nF

BC158
10nF

BC159
10nF

+12V

BC160
10nF

VCC5

BC161
10nF

SB3V

BC162
10nF

VDDQ

BC163
10nF

EC13
1000uF
6.3V, +/-20%
ce35d80h140

TECHNOLOGY COPR.
Title

AGP

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

19

of

42

VGA CONNECTOR

2
RN77
0
8P4R0603
+/-5%

F3
F1210_1.1A
Dummy

R126
2.2K

R127
2.2K

1
3
5
7

VCC5

2
4
6
8

VCC5

ET1206L
19ohm@100MHz?

11
11
11

ROUT
GOUT
BOUT

BC164
CONNECTOR
0.1uF
TOP VIEW
16V, Y5V, +80%/-20%
C0603

VGA
VGACON

ROUT

FB15

2 FB L0603 75 Ohm

GOUT

FB16

2 FB L0603 75 Ohm

DDC1DATA

BPUT

FB17

2 FB L0603 75 Ohm

HSYNC

R128
75

BC165
6.8pF

R129
75

BC166
6.8pF

VSY NC
R130
75

BC167
6.8pF

BC168
6.8pF

BC169
6.8pF

BC170
6.8pF

DDC1CLK

BC171
470pF
EMI

BC172
470pF
EMI

BC173
470pF
EMI

BC174
470pF
EMI

DDC1DATA

11

HSYNC

11

VSYNC

11

DDC1CLK

11

For EMI.

close to GND gap

B

TECHNOLOGY COPR.
Title

VGA

Document Number
Date:
5

Rev

661M05

Saturday, October 09, 2004

A
Sheet
1

20

of

42

MD[0..63]

MA[0..14]

10,23 MA[0..14]

VCC2.5_MEM

48
43
41
130
37
32
125
29
122
27
141
118
115
103

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC9

REQUIRED POWER
VDD=VDDQ
VDD!=VDDQ
MEMORY MUX TABLE:

MA11
MA12

59
52
113

BA0
BA1
BA2

97
107
119
129
149
159
169
177
140

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8

DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

9
10
101
102
173
167

NC1
NC5(RESET#)
NC2
NC3
NC4
A13

/RSRAS/RSCAS/RSWE-

154
65
63

RAS#
CAS#
WE#

CS-0
CS-1

157
158
71
163

S0#
S1#
NC6(S2#)
NC7(S3#)

10,23
10

CS-[0..3]
CKE[0..3]

CKE[0..3]

21
111

DDRCLK0
DDRCLK3
DDRCLK2
DDRCLK-0
DDRCLK-3
DDRCLK-2

137
16
76
138
17
75

CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#

addr =
1010000b

VDDID
WP
SCL
SDA

82
90
92
91

SA0
SA1
SA2

108
85
70
46
38
7
180
172
164
156
143
136
128
112
104
96
77
62
54
30
22
15
D DRVREF

181
182
183

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CS-[0..3]

CKE0
CKE1

VREF

MD4
MD2
MD3
MD5
MD0
MD1
MD7
MD6
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD63
MD60
MD61
MD62
MD59

WP
SMBCLK
SMBDAT

120
148
168
184

VDD
VDD
VDD
VDDSPD

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA13
MA14

48
43
41
130
37
32
125
29
122
27
141
118
115
103

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
NC9

MA11
MA12

59
52
113

BA0
BA1
BA2

97
107
119
129
149
159
169
177
140

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8

DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

5
14
25
36
56
67
78
86
47

Swap DATA for Layout

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

44
45
49
51
134
135
142
144

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

9
10
101
102
173
167

NC1
NC5(RESET#)
NC2
NC3
NC4
A13

/RSRAS/RSCAS/RSWE-

154
65
63

RAS#
CAS#
WE#

CS-2
CS-3

157
158
71
163

S0#
S1#
NC6(S2#)
NC7(S3#)

CKE2
CKE3

21
111

CKE0
CKE1

DDRCLK5
DDRCLK4
DDRCLK1
DDRCLK-5
DDRCLK-4
DDRCLK-1

137
16
76
138
17
75

CK0
CK1
CK2
CK0#
CK1#
CK2#

addr =
1010001b

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VREF

VDDID
WP
SCL
SDA

82
90
92
91

SA0
SA1
SA2

MD4
MD2
MD3
MD5
MD0
MD1
MD7
MD6
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD63
MD60
MD61
MD62
MD59

2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179

B
VCC2.5_MEM

R131
4.7K

D DRVREF

DDRVREF

WP
SMBCLK
SMBDAT
R132
8.2K

181
182
183

14,17,18
14,17,18

VCC2.5_MEM

DDR_DIMM

DDR_DIMM

18 DDRCLK[0..5]
18 DDRCLK-[0..5]

22

WP
SMBCLK
SMBDAT

/RSRAS/RSCAS/RSWE-

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

44
45
49
51
134
135
142
144

10,23
10,23
10,23

5
14
25
36
56
67
78
86
47

2
4
6
8
94
95
98
99
12
13
19
20
105
106
109
110
23
24
28
31
114
117
121
123
33
35
39
40
126
127
131
133
53
55
57
60
146
147
150
151
61
64
68
69
153
155
161
162
72
73
79
80
165
166
170
171
83
84
87
88
174
175
178
179

176
160
152
145
139
132
124
116
100
93
89
81
74
66
58
50
42
34
26
18
11
3

DDR
CS0
CS1
CS2
CS3
CS4
CS5
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA13
MA14

DIMM2

VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

108
85
70
46
38
7
180
172
164
156
143
136
128
112
104
96
77
62
54
30
22
15
VDD
VDD
VDD
VDDSPD

VDDID IS A TRAP ON THE DIMM

MODULE TO INDICATE:

DIMM1

VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
120
148
168
184

NOTE:

SDR
CS0
CS1
CS2
CS3
CS4
CS5
CSB0
CSB1
CSB2
CSB3
CSB4
CSB5
CSB6
CSB7

DQS[0..7]

VDDID
OPEN
GND

VCC2.5_MEM

DQM[0..7]

DQS[0..7]

10,23 DQS[0..7]

MA[0..14]

DQM[0..7]

10,23 DQM[0..7]

MD[0..63]

176
160
152
145
139
132
124
116
100
93
89
81
74
66
58
50
42
34
26
18
11
3

10,23 MD[0..63]

TECHNOLOGY COPR.
Title

DIMM1, 2

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

21

of

42

EMI

DDRVREF GEN. & DECOUPLING

VCC2.5_MEM

R133
75
+/-1%
R0603

BC175
10nF

VIN

R134
75
+/-1%
R0603

VCC5

VCC5

VCC5

BC176
10nF

DDRVREF

21

BC177
10nF

VCC3

VCC3

BC326
0.1uF
EMI

BC320
0.1uF
EMI

VCC3

BC327
0.1uF
EMI

BC321
0.1uF
EMI

BC322
0.1uF
EMI

VCC3

VCC3

BC329
0.1uF
EMI

VCC2.5_MEM

VCC5

VCC5

SB5V

VDDQ
C

D DRVREF

VCC5

BC323
0.1uF
EMI

VCC3

BC324
0.1uF
EMI

VCC3

BC331
0.1uF
EMI

BC325
0.1uF
EMI

BC342
0.1uF
EMI

-12V

BC341
0.1uF
EMI

BC343
0.1uF
EMI

+12V

BC344
0.1uF
EMI

BC345
0.1uF
EMI

VCC5

BC178
0.1uF

BC179
0.1uF

BC180
0.1uF

BC181
0.1uF

BC182
0.1uF

BC183
0.1uF

BC184
0.1uF

BC185
0.1uF

TECHNOLOGY COPR.
Title

Decouple

Document Number
Date:
8

Rev

661M05

Saturday, October 09, 2004

2

A
Sheet

22

of
1

42

SSTL-2 Termination Resistors

MD[0..63]
DQM[0..7]
DQS[0..7]
MA[0..14]

CS-[0..3]

MD[0..63]

10,21

DQM[0..7]

10,21

DQS[0..7]

10,21

MA[0..14]

10,21

CS-[0..3]

10,21

SDR
MD/DQM(/DQS)
MA/Control
CS
CKE

DDR

Rs
0/10/10
0

LV-CMOS
LV-CMOS
LV-CMOS
OD 3.3V

SSTL-2
SSTL-2
SSTL-2
OD 2.5V

Termination change 56ohm

RN13

MD2
MD1
MD0
MD4
RN15

MD7
MD3
DQS0
DQM0

2
4
6
8

MD9
MD8
MD5
MD6

RN19
2
4
6
8

MD11
MD10
MD15
MD14

RN22
2
4
6
8

MD17
MD16
MA14
MD20

* 13

MA4
DQM3
DQS3
MD25

2
4
6
8

MA0
MA1
MA2
MD31

RN30

MD27
MD30
MD26
MA3

2
4
6
8

* 13

* 13

5
7

47

5
7

47

RN23
2
4
6
8

MD55
MD50
MD54
DQS6
MD62
DQS7
DQM7
MD57

47

RN28

* 13

* 13

RN20
2
4
6
8

DECOUPLING CAPACITOR FOR SSTL-2 END TERMIANTION VTT ISLAND

0603 Package placed within 200mils of VTT Termination R-packs
1
3
5
7

* 13
5
7

5
7

RN27
2
4
6
8

MD63
MD59
MD58

* 13

47

2
4
6
8

47

RN25
2
4
6
8

MD36
MD32
MA12
MA10

MA5
MD23
MD19
MA8

A
10,21

/RSRAS-

10,21

/RSWE-

/RSRAS/RSWE-

2
4
6
8

* 13

47

RN38

RN36
2
4
6
8

* 13

* 13

47

5
7

2
4
6
8

BC188
0.1uF

BC189
0.1uF

BC190
0.1uF

BC191
0.1uF

BC192
0.1uF

BC193
0.1uF

BC194
0.1uF

RN29
2
4
6
8

* 13

* 13

DDR_VTT

5
7

47

5
7

BC195
0.1uF

BC196
0.1uF

BC197
0.1uF

BC198
0.1uF

BC199
0.1uF

BC200
0.1uF

BC201
0.1uF

BC202
0.1uF

BC203
0.1uF

DDR_VTT

10,21

* 13
5
7

47

RN33

MD46
MD42
DQS5
DQM5

5
7
/RSCAS-

/RSCASCS-0
MD41
MD45

RN35
2
4
6
8

2
4
6
8

* 13

5
7

47

5
7
RN37

47
CS-3
CS-2
CS-1

* 13

2
4
6
8

* 13
5
7

56

5
7

47

* *

DQM2
MA13
DQS2
MD21

BC187
0.1uF

47

RN32

2
4
6
8

BC186
0.1uF

5
7

DDR_VTT

MD29
MD28
MA6
MD24

* 13

47

5
7

RN31

47

DDR_VTT

* 13

47

MD61
MD56
MD60
MD51

5
7

RN34

47

5
7

2
4
6
8

RN16
2
4
6
8

* 13
MD53
MD52

5
7

2
4
6
8

MD40
MD44
MD35

5
7

DQM6

RN24

5
7

47

5
7

2
4
6
8

47

* 13

* 13

RN18

47

* 13

RN14

MD39
MA11
MD38
DQM4

Rtt
33
33
47

DDR_VTT

2
4
6
8

MD49
MD48
MD47
MD43

RN21

5
7

RN26

MD34
DQS4
MD33
MD37

47

2
4
6
8

47

* 13
5
7

1 47
3
5
7
RN17
2
4
6
8

1
3
5
7

47

MA7
MD22
MD18
MA9

47

DQM1
MD13
DQS1
MD12

2
4
6
8

Rs
10
0
0

A
47R135
47R137

TECHNOLOGY COPR.
Title

Termination

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

23

of

42

VCC5

-12V

+12V

17

PCICLK1

13

PREQ-0

INT-C
INT-A

PCICLK1
PREQ-0
AD31
AD29

AD27
AD25
C/BE-3
AD23
AD21
AD19
AD17
C/BE-2
13,25,40

IRD Y-

IRDY-

DEVSEL-

13,25,40 DEVSEL13,25
25,40

PLOCKPERR-

13,25,40

SERR-

PLOCKPERRSERRC/BE-1
AD14
AD12
AD10

AD8
AD7
AD5
AD3
AD1

VCC3

TRST#
+12V
TMS
TDI
+5V2
INTA#
INTC#
+5V4
RSV1
+5V5
RSV3
GND3
GND5
SB3V
RESET#
+5V6
GNT#
GND8
PCI_PME#
AD(30)
+3.3V1
AD(28)
AD(26)
GND10
AD(24)
IDSEL
+3.3V3
AD(22)
AD(20)
GND12
AD(18)
AD(16)
+3.3V5
FRAME#
GND14
TRDY#
GND15
STOP#
+3.3V7
SDONE
SBO#
GND17
PAR
AD(15)
+3.3V10
AD(13)
AD(11)
GND19
AD(9)
B50
B51
C/BE#(0)
+3.3V11
AD(6)
AD(4)
GND21
AD(2)
AD(0)
+5V9
REQ64#
+5V11
+5V13

PCI2

TRST-

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
B50
B51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

TRST

TMS
TDI
INT-B
INT-D

INT-B
INT-D

VCC5

1
3
5
7

FRAMEIRD YTRDYDEVSEL-

4.7K

SDONE2
SBO-2
SDONE1
SBO-1

RN42
2
4
6
8

RN40
2
4
6
8

2.7K

* 13
5
7

4.7K
DUMMY

PREQ64-2
PACK64-2
PACK64-1
PREQ64-1

RN43
2
4
6
8

* 13
5
7

2.7K
DUMMY

13,19,25
13,25,40

INT-D
INT-B

PCIRSTPGNT-0

PGNT-0

PMEAD30

PME-

13
14,19,25,28,40

AD28
AD26
AD24
AD22
AD20

FRAMETRDYSTOP-

17

PCICLK2

13

PREQ-1

PCICLK2
PREQ-1
AD31
AD29
AD27
AD25

R138
100
+/-5%
R0603

AD19

C/BE-3
AD23
AD21
AD19

AD18
AD16

AD17
C/BE-2
FRAME-

13,25,40

TRDY-

13,25,40

STOP-

13,25,40

SDONE1
SBO-1

IRD YDEVSELPLOCKPERRSERR-

PAR
AD15

PAR

AD13
AD11

13,25,40

C/BE-1
AD14
AD12
AD10

AD9
C/BE-0

AD8
AD7

AD6
AD4

AD5
AD3

AD2
AD0

AD1

PREQ64-1

VCC5
1
3
5
7

25
25

SB3V

PACK64-2

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
A50
A51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

PCI_SLOT

-12V
TCK
GND1
TDO
+5V1
+5V3
INTB#
INTD#
PRSNT1#
RSV2
PRSNT2#
GND2
GND4
RSV4
GND6
CLK
GND7
REQ#
+5V7
AD(31)
AD(29)
GND9
AD(27)
AD(25)
+3.3V2
C/BE#(3)
AD(23)
GND11
AD(21)
AD(19)
+3.3V4
AD(17)
C/BE#(2)
GND13
IRDY#
+3.3V6
DEVSEL#
GND16
LOCK#
PERR#
+3.3V8
SERR#
+3.3V9
C/BE#(1)
AD(14)
GND18
AD(12)
AD(10)
GND20
A50
A51
AD(8)
AD(7)
+3.3V12
AD(5)
AD(3)
GND22
AD(1)
+5V8
ACK64#
+5V10
+5V12

TRST#
+12V
TMS
TDI
+5V2
INTA#
INTC#
+5V4
RSV1
+5V5
RSV3
GND3
GND5
SB3V
RESET#
+5V6
GNT#
GND8
PCI_PME#
AD(30)
+3.3V1
AD(28)
AD(26)
GND10
AD(24)
IDSEL
+3.3V3
AD(22)
AD(20)
GND12
AD(18)
AD(16)
+3.3V5
FRAME#
GND14
TRDY#
GND15
STOP#
+3.3V7
SDONE
SBO#
GND17
PAR
AD(15)
+3.3V10
AD(13)
AD(11)
GND19
AD(9)
B50
B51
C/BE#(0)
+3.3V11
AD(6)
AD(4)
GND21
AD(2)
AD(0)
+5V9
REQ64#
+5V11
+5V13

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
B50
B51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

VCC3

TRSTTMS
TDI
INT-C
INT-A
SB3V

PCIRSTPGNT-1

PGNT-1

13

PMEAD30

AD28
AD26
AD24
AD22
AD20

R139
100
+/-5%
R0603

AD20

AD18
AD16
FRAMETRDYSTOPSDONE2
SBO-2
PAR
AD15
AD13
AD11

AD9
C/BE-0
AD6
AD4
AD2
AD0
PREQ64-2

VCC3
PREQ-0

R140

PREQ-1

R141

TDI
TMS
TCK
TRST-

**

RN39
2
4
6
8

TCK

8.2K DUMMY
8.2K DUMMY
VCC5

RN41
8
6
4
2

7
5
3
1

STOPPLOCKPERRSERR-

25

TMS
TDI

X1
X2

PACK64-1

VCC3

+12V

X1
X2

INT-C
11,13,19,25 INT-A

VCC5

-12V

PCI_SLOT

-12V
TCK
GND1
TDO
+5V1
+5V3
INTB#
INTD#
PRSNT1#
RSV2
PRSNT2#
GND2
GND4
RSV4
GND6
CLK
GND7
REQ#
+5V7
AD(31)
AD(29)
GND9
AD(27)
AD(25)
+3.3V2
C/BE#(3)
AD(23)
GND11
AD(21)
AD(19)
+3.3V4
AD(17)
C/BE#(2)
GND13
IRDY#
+3.3V6
DEVSEL#
GND16
LOCK#
PERR#
+3.3V8
SERR#
+3.3V9
C/BE#(1)
AD(14)
GND18
AD(12)
AD(10)
GND20
A50
A51
AD(8)
AD(7)
+3.3V12
AD(5)
AD(3)
GND22
AD(1)
+5V8
ACK64#
+5V10
+5V12

X1
X2

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
A50
A51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

TCK

VCC5

PCI1

13,25

PCI Slot 1 & 2

VCC5

VCC3

13,19,25,26,40 PCIRST-

TCK

C/BE-[0..3]
AD[0..31]

13,25,40 C/BE-[0..3]
13,25,40 AD[0..31]

25

X1
X2

2.7K
+/-5%
8P4R0603

TECHNOLOGY COPR.
Title

PCI 1, 2

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

24

of

42

PCI Slot 3
13,24,40 C/BE-[0..3]
13,24,40 AD[0..31]

C/BE-[0..3]
AD[0..31]

VCC5

VCC3

VCC5

-12V

+12V

PCI3

INT-A
INT-C

11,13,19,24 INT-A
13,24
INT-C

17

PCICLK3

PCICLK3

13

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
A50
A51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62

TCK

TCK

PREQ-2

PREQ-2

AD31
AD29

AD27
AD25
C/BE-3
AD23
AD21
AD19
AD17
C/BE-2
13,24,40

IRD Y-

IRDY-

DEVSEL-

13,24,40 DEVSEL13,24
24,40

PLOCKPERR-

13,24,40

SERR-

PLOCKPERRSERRC/BE-1
AD14
AD12
AD10

AD8
AD7
AD5
AD3
AD1

TRST#
+12V
TMS
TDI
+5V2
INTA#
INTC#
+5V4
RSV1
+5V5
RSV3
GND3
GND5
SB3V
RESET#
+5V6
GNT#
GND8
PCI_PME#
AD(30)
+3.3V1
AD(28)
AD(26)
GND10
AD(24)
IDSEL
+3.3V3
AD(22)
AD(20)
GND12
AD(18)
AD(16)
+3.3V5
FRAME#
GND14
TRDY#
GND15
STOP#
+3.3V7
SDONE
SBO#
GND17
PAR
AD(15)
+3.3V10
AD(13)
AD(11)
GND19
AD(9)
B50
B51
C/BE#(0)
+3.3V11
AD(6)
AD(4)
GND21
AD(2)
AD(0)
+5V9
REQ64#
+5V11
+5V13

TRST-

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
B50
B51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

TRST

TMS
TDI

24

TMS
TDI

INT-D
INT-B

INT-D
INT-B

24
24
13,24,40
13,19,24

SB3V

PCIRST-

PCIRST-

PGNT-2

PGNT-2

PMEAD30

PME-

13,19,24,26,40

13
14,19,24,28,40

AD28
AD26
AD24
AD22
AD20

R142
100
+/-5%
R0603

AD21

AD18
AD16
FRAMETRDYSTOP-

FRAME-

13,24,40

TRDY-

13,24,40

STOP-

13,24,40

SDONE3
SBO-3
PAR
AD15

PAR

13,24,40

AD13
AD11

AD9
C/BE-0
AD6
AD4
AD2
AD0
PREQ64-3

X1
X2

PACK64-3

VCC3

PCI_SLOT

-12V
TCK
GND1
TDO
+5V1
+5V3
INTB#
INTD#
PRSNT1#
RSV2
PRSNT2#
GND2
GND4
RSV4
GND6
CLK
GND7
REQ#
+5V7
AD(31)
AD(29)
GND9
AD(27)
AD(25)
+3.3V2
C/BE#(3)
AD(23)
GND11
AD(21)
AD(19)
+3.3V4
AD(17)
C/BE#(2)
GND13
IRDY#
+3.3V6
DEVSEL#
GND16
LOCK#
PERR#
+3.3V8
SERR#
+3.3V9
C/BE#(1)
AD(14)
GND18
AD(12)
AD(10)
GND20
A50
A51
AD(8)
AD(7)
+3.3V12
AD(5)
AD(3)
GND22
AD(1)
+5V8
ACK64#
+5V10
+5V12

X1
X2

24

A
PACK64-3
PREQ64-3
SDONE3
SBO-3

1
3
5
7

2
4
6
8

2.7K
DUMMY
+/-5%
8P4R0603

VCC3
PREQ-2

R143

VCC5
RN44

8.2K
DUMMY

TECHNOLOGY COPR.
Title

PCI 3

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

25

of

42

6
IDERST-

13

R144

IDEDA[0..15]

IDEDA[0..15]

33
+/-5%

IDEDA7

R145

5.6K +/-5%
PIDE
IDEDA7
IDEDA6
IDEDA5
IDEDA4
IDEDA3
IDEDA2
IDEDA1
IDEDA0

13
13
13
13
13
13

IDEREQA
IDEIOW-A
IDEIOR-A
ICHRDYA
IDACK-A
IDEIRQA

IDESAA1
IDESAA0
IDECS-A0

MIDESAA1
MIDESAA0
MIDECS-A0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
X

IDEDA8
IDEDA9
IDEDA10
IDEDA11
IDEDA12
IDEDA13
IDEDA14
IDEDA15

22
24
26
28
30
32
34
36
38
40

CBLIDA

IDESAA2
IDECS-A1

CBLIDA
IDESAA2
IDECS-A1

13
13
13

Header_2X20_20 (IDE)

13
IDESAA1
13
IDESAA0
13
IDECS-A0
15,36 HDDLED

D4

HDDLED

FDLL4148

R8
0
+/-5%
R0603

R147
4.7K
+/-5%
R0603
Dummy

R146
4.7K
+/-5%
R0603
Dummy

Q14
MMBT3904
Dummy

C
E

13,19,24,25,40 PCIRST-

B
R150
4.7K B
+/-5%
R0603
Dummy

Q13
MMBT3904
Dummy

13

IDERST-

IDEDB7

R149

IDEREQB
IDEIOW-B
IDEIOR-B
ICHRDYB
IDACK-B
IDEIRQB

IDEREQB
IDEIOW-B
IDEIOR-B
ICH RDYB
IDACK-B
IDEIRQB

IDEDB[0..15]

5.6K
+/-5%
SIDE
IDEDB7
IDEDB6
IDEDB5
IDEDB4
IDEDB3
IDEDB2
IDEDB1
IDEDB0

B
13
13
13
13
13
13

IDEDB[0..15]

R148
33
+/-5%
R0603

VCC5

VCC3

IDESAB1
IDESAB0
IDECS-B0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
X

22
24
26
28
30
32
34
36
38
40

IDEDB8
IDEDB9
IDEDB10
IDEDB11
IDEDB12
IDEDB13
IDEDB14
IDEDB15

CBLIDB

CBLIDB
IDESAB2
IDECS-B1

IDESAB2
IDECS-B1

13
13
13

Header_2X20_20 (IDE)

13
IDESAB1
13
IDESAB0
13
IDECS-B0
15,36 HDDLED

HDDLED

D5
1

2
FDLL4148

A
TECHNOLOGY COPR.
Title

IDE

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

26

of

42

35

PWFBOUT

PWFBOUT

SB3V

LTDN
LTDP
LRDP
LRDN

C0603

BC205
10nF

C0603

*
R152
0
+/-5%
R0603
L9

LTDN
LTDP
LRDP
LRDN

3
1
6
8

TDTD+
RD+
RD-

TXTX+
RX+
RX-

14
16
11
9

7
2

CTD
TDT

CTX
TCMT

10
15

4
5

NC_4
NC_5

NC_13
NC_12

13
12

0
DUMMY

RN45
75
8P4R0603
+/-5%

UV3UV3+

1
3
5
7

XFMR 350uH
SB3V
R154

41 R_USBPOWER

R_USBPOWER
UV2UV2+

BC31
1.5nF
50V, X7R, +/-10%
C0603

RJ45-1

10

RJ45-2

11

RJ45-3

14

RJ45-6

12

RJ45-4

13

RJ45-5

15

RJ45-7

16

RJ45-8

5
6

VCC2
D2-

7
8

D2+
GND2

1
2

VCC1
D1-

3
4

D1+
GND1

D6

BAT54C
2

LAN

18

GC

20

GA

19

CGND5
CGND6
CGND7
CGND8

25
26
27
28

YEL

GRN

R153

17

DYA
GRN
DGA

LED0/PHYAD0

LED2/PHYAD2

LED3/PHYAD3

UV2+
CGND3
CGND4

LED3/PHYAD3 35

LED0/PHYAD0 35

UV2-

Up USB

LED2/PHYAD2 35

DUMMY

510 3
DUMMY

23
24

UV2-

15

UV2+

15

Down USB
CGND1
CGND2

21
22

UV3-

USBX2_RJ45 10/100 Mbit LAN

UV3+

UV3-

15

UV3+

15

F1

CIS

F_USBPOWER
F_USBPOWER

7
5
3
1

F1813_2.6A
Dummy
2

8
6
4
2

VCC5_DUAL

RN4
0
8P4R0603
+/-5%

R151
510
DUMMY

NIC_USB

2
4
6
8

35
35
35
35

BC204
0.1uF

F_USBPOWER

EC110
470uF
10V, +/-20%
CE35D80H200
Dummy

BC819
0.1uF
25V, Y5V, +80%/-20%
C0603

FUSB2

1
3
5
7

FUSB1
1
3
5
7

2
4
6
8
10

UV6UV6+

15
15

2
4
6
8
10

UV5UV5+

15
15

UV4UV4+

15
15

Header_2X5_9

Header_2X5_9

UV7UV7+

BC909
0.1uF
25V, Y5V, +80%/-20%
C0603

10K
OC4567-

R327
560K
+/-5%
R0603

BC908
0.1uF
25V, Y5V, +80%/-20%
C0603

15

R_USBPOWER

R328

F_USBPOWER R326

15
15

EC12
BC911
470uF
0.1uF
10V, +/-20% 25V, Y5V, +80%/-20%
CE35D80H200C0603

10K
OC0123-

R329
560K
+/-5%
R0603

15

BC910
0.1uF
25V, Y5V, +80%/-20%
C0603

A
TECHNOLOGY COPR.
Title

USB & LAN PORT

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

27

of

42

BAT

R155

22
+/-5%
R0603

VCC5

VBAT
BC207
0.1uF

SB5V

VCC5

BC208
0.1uF

BC209
0.1uF

POWER ON TRAPS

BC210
0.1uF

31
31
31

FD[0..7]

FA[0..17]

FD0
FD1
FD2
FD3
FD4
FD5
FD6
FD7

7
8
9
10
11
12
13
14

FA0
FA1
FA2
FA3
FA4
FA5
FA6
FA7
FA8
FA9
FA10
FA11
FA12
FA13
FA14
FA15
FA16
FA17

16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33

FA0/VID_I0/GP20
FA1/VID_I1/GP21
FA2/VID_I2/GP22
FA3/VID_I3/GP23
FA4/VID_I4/GP24
FA5/VID_O0/GP25
FA6/VID_O1/GP26
FA7/VID_O2/GP27
FA8/VID_O3/GP30
FA9/VID_O4/GP31
FA10/VID_O5/GP32
FA11/VID_I5/GP33
FA12/GP34
FA13/GP35
FA14/GP36
FA15/GP37
FA16/GP50
FA17/GP51

34
47
48

FRD#/GP52
FCS#/SCIO/GP53
FWE#/GP54

42

PCICLK

38
39
40
41

LAD0
LAD1
LAD2
LAD3

36
37
45
46

LDRQ#
SERIRQ
LRESET#
LFRAME#

44

CLKIN

49
50
51
52

JSACX/GP40/FAN_TAC1S
JSACY/GP41/FAN_TAC2S
JSAB1/GP42/FAN_TAC3S
JSAB2/GP43/FAN_CTL3S

53
54
55
56

JSBCX/GP44
JSBCY/GP45
JSBB1/GP46/FAN_CTL1S
JSBB2/GP47/FAN_CTL2S

FRDJ
FCSJ
FWEJ

17
14

SIOPCLK
LAD[0..3]
LAD0
LAD1
LAD2
LAD3

14
14
13
14

LDRQSIRQ
SIORSTLFRAME-

17 CK_48M_SIO

14

THERM-

38

BEEP_SIO

LDRQSIRQ

CK_48M_SIO

4
35
99
VCC0
VCC1
VCC2

VCCH

FD0/GP10
FD1/GP11
FD2/GP12
FD3/GP13
FD4/IRQIN0/GP14
FD5/IRQIN1/GP15
FD6/IRQIN2/GP16
FD7/IRQIN3/GP17

PRPD[0..7]

U10
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0

116
115
114
113
112
111
110
109

PRPD7
PRPD6
PRPD5
PRPD4
PRPD3
PRPD2
PRPD1
PRPD0

STB#
AFD#
ERR#
INIT#
SLIN#
ACK#
BUSY
PE
SLCT

108
107
106
105
104
103
102
101
100

PSTB#
PAFD#
PRERR#
PINIT#
PSLIN#
PACK#
PBUSY
PE

30

VCC5
PSTBJ
PAFDJ
PRERRJ
PINITJ
PSLINJ
PACKJ
PBUSY
PE

30
30
30
30
30
30
30
30

VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7/TMPIN3

98
97
96
95
94
93
92
91

VIN0
VIN1
VIN2
VIN3

VREF

90

SIOVREF

TMPIN1
TMPIN2
TMPIN3/COPEN#

89
88
87

CIRRX/GP67
CIRTX/GP66

85
84

IRRX/MIDI_IN/GP65
IRTX/MIDI_OUT/GP64

83
82

PME#/GP63/SCPRES#

81

FAN_CTL3/GP62/SCPFET#
FAN_CTL2/GP61
FAN_CTL1/GP60

80
79
78

FAN_CTL1

32

FAN_TAC3/FA18/GP57
FAN_TAC2/GP56
FAN_TAC1/GP55

75
74
73

FA18
FAN_TAC2
FAN_TAC1

31
32
32

R156
22
+/-5%
R0603

VIN0
VIN1
VIN2
VIN3

PSLCT

32
32
32
32

DTRJ2
TD1
RTSJ1
DTRJ1
PSLCT

30

32

2
4
6
8

2.2K
+/-5%
8P4R0603

C
1.If use LPC ROM, pull down S4 ~ S7
and pull down S8 with 2.2Kohm.
2.If use Legacy 2MB flash rom, pull high
S4 ~ S7 and pull down S8 with 2.2Kohm.

SIOVREF

RN46

1
3
5
7

R157

2.2K
DUMMY

R158

2.2K

* *

TD2

DCD2#
RI2#
CTS2#
DTR2#/JP4
RTS2#JP6
DSR2#
SOUT2/JP5
SIN2

PRPD[0..7]

DTRJ2
RTSJ2

TD2

3.If use Legacy 4MB flash rom, pull high

S4 ~ S7 and pull high S8 with 2.2Kohm.
ITE8705 POWER ON TRAP

ITE8705

TMPIN1
32
TMPIN3
32
INTRUDERJ 36

S8
1-2 : 4M FLASH ROM ENABLE
(PIN 75 IS FA18)
2-3 : PIN 75 IS FAN_TAC3

IRRX
IRTX

IR
PME-

CONNECTOR

VCC5

14,19,24,25,40

BC211
0.1uF
16V, Y5V, +80%/-20%
C0603
DUMMY
IR
1
IRRX

3
4
5

IRTX

CHECK
GND_8705

GNDD1
GNDD2
GNDD3

31

126
127
128
1
2
3
5
6

15
117
67

DCDJ2
RIJ2
CTSJ2
DTRJ2
RTSJ2
DSRJ2
TD2
RD2

31

TD1

GNDD0

DTRJ1
RTSJ1

DCD1#
RI1#
CTS1#
DTR1#/JP1
RTS1#/JP2
DSR1#
SOUT1/JP3
SIN1

43

30
30
30
30
30
30
30
30

118
119
120
121
122
123
124
125

GNDA

DCDJ1
RIJ1
CTSJ1
DTRJ1
RTSJ1
DSRJ1
TD1
RD1

86

30
30
30
30
30
30
30
30

VBAT

76

77

DSKCHG#
WPT#
INDEX#
TRK0#
RDATA#
WGATE#
HDSEL#
STEP#
DIR#
WDATA#
DRVB#/SCCLK/FA19
DRVA#
MTRB#/SCRST
MTRA#
DENSEL#
ITE8705

72
71
70
69
68
66
65
64
63
62
61
60
59
58
57

DSKCHGJ
WPJ
INDEXJ
TRK0J
RDATAJ
WGATEJ
HEADJ
STEPJ
DIRJ
WDJ
DSBJ
DSAJ
MOBJ
MOAJ
RWCJ

Header_1X5_2
DUMMY

31
31
31
31
31
31
31
31
31
31
31
31
31
31
31

A
TECHNOLOGY COPR.
Title

SIO ITE8705

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

28

of

42

D
SB5V

8
6
4
2

SB5V

14

KBDAT

14

KBCLK

RN78
0
8P4R0603
+/-5%

1
3
5
7

10K
+/-5%
8P4R0603

7
5
3
1

2
4
6
8

RN47

F4
F1210_1.1A
Dummy
KB/MS

KBDAT

1
2
3
4
5
6

KBCLK

BC212
0.1uF
25V, Y5V, +80%/-20%
C0603

1
2
3
4
5
6

13

13

14

14

15

15

CONNECTOR VIEW

12
.
10
.

TOP VIEW
12
.

11
.

. . . .

9
.
8
.

11
.

10 8 7 9
6
.

7
.

5
.

. . . .
6
.
4
.

3
.
2
.

14

PMDAT

14

PMCLK

PMDAT

7
8
9
10
11
12

PMCLK

7
8
9
10
11
12
PS2-KBMS-2

BC213
470pF
EMI

BC214
470pF
EMI

BC215
470pF
EMI

BC216
470pF
EMI

For EMI.

16

16

17

17

4 2 1 3

5
.

1
.

NOTE:
SIS IS NOT RESPONSIBLE FOR
ANY ERRORS OR OMISSIONS IN
THESE SCHEMATICS. THIS IS
AN EXAMPLE ONLY.

A
TECHNOLOGY COPR.
Title

Keyboard Mouse

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

29

of

42

D7
1

VCC5

2
FDLL4148

7
5
3
1

7
5
3
1

RN51

RN50

1K

8
6
4
2

8
6
4
2

8
6
4
2

8
6
4
2

PRINT PORT
1K

1K

PRNT25-M

1K

PRN15
PRN14
PRN16
PRN17

PSTBJ
PAFDJ
PINITJ
PSLINJ

PRN1
PRN2
PRN3
PRN4
PRN5
PRN6
PRN7
PRN8
PRN9
PRN10
PRN11
PRN12
PRN13

PRPD7
PRPD6
PRPD5
PRPD4
3

28
28
28
28

PRERRJ
PACKJ
PBUSY
PE
PSLCT

BC217
180pF
BC226

BC218
180pF

180pF

EMI

EMI

BC227
180pF

BC228
180pF

EMI
EMI

EMI

BC219
180pF

BC220
180pF

EMI
EMI

BC221
180pF

BC229
180pF

BC230
180pF

EMI
EMI

BC222
180pF

BC231
180pF

EMI
EMI

D41

EMI

2 1
FDLL4148

D42
2

RI NG

R941
560K/1%
1
2

15

180pF

BC224
180pF

BC1026
28
28
28
28
28
28
28
28

100pF

BY EXPERIENCED

EMI

DCDJ2
DSRJ2
RD2
RTSJ2
TD2
CTSJ2
DTRJ2
RIJ2

+12V

-12V

28
28
28
28
28
28
28
28

RTSJ1
DTRJ1
TD1
RIJ1
CTSJ1
DSRJ1
RD1
DCDJ1
BC234

EMI

PRN13

+12V

16
15
13
19
18
17
14
12

DA1
DA2
DA3
RY1
RY2
RY3
RY4
RY5

RA9
RA3
RA4
DY1
DY3
RA2
DY2
RA1

9
4
7
5
8
3
6
2

GND

-12V

10

GD75232
EMI

Parallel Port

28
27
26

PRT

BC924
BC925

BC928
0.1uF
EMI

BC926

1
2
3
4
5
6
7
8
9
10

BC929

150pF
EMI
150pF
EMI
150pF
EMI
150pF
EMI

DCD 2J
DSR2J
RXD2
RTS2J
TXD2
CTS2J
DTR2J
XRIJ2

BC931
0.1uF
EMI

DCD2J
TXD2
RTS2J
XRIJ2

COM2
1
3
5
7
9

RXD2
DTR2J
DSR2J
CTS2J

2
4
6
8

HEADER_2X5_K10
BC930
BC932
BC933
BC934

RS232-9

VCC

11
0.1uF

PRN12

+12V

-12V

U11
20

PRN11

180pF

*
V+
RIN1
RIN2
RIN3
DOUT1
DOUT2
RIN4
DOUT3
RIN5
V-

PRN10

EMI

COM2

VCC
ROUT1
ROUT2
ROUT3
DIN1
DIN2
ROUT4
DIN3
ROUT5
GND

PRN9

1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

EMI

BC927
0.1uF
EMI
20
19
18
17
16
15
14
13
12
11

PRN8

BC233

EMI

GD75232
VCC5

PRN7

BC225
180pF

U32
R940
113K

FDLL4148

RING

XRIJ2 1

R939
560K/1%
2
1

BC232

EMI

VCC5

NR IA

BC223
180pF

PRN6

****

28

PRN1
PRN14
PRN2
PRN15
PRN3
PRN16
PRN4
PRN17
PRN5

****

28
28
28
28

RN49

PRPD3
PRPD2
PRPD1
PRPD0

RN48
R159
4.7K
+/-5%
R0603

PRPD[0..7]

7
5
3
1

28

7
5
3
1

150pF
EMI
150pF
EMI
150pF
EMI
150pF
EMI

11
NDCDA
NDSRA
NSINA
NRTSA
NSOUTA
NCTSA
NDTRA
NR IA

BC239 BC240
0.1uF 0.1uF

* *

EMI

BC235
150pF

BC241
150pF

BC236
150pF

BC242
150pF

BC237
150pF

BC243
150pF

1
6
2
7
3
8
4
9
5

BC238
150pF 10

BC244
150pF

COM1

Serial Port
TECHNOLOGY COPR.

EMI
EMI

EMI
EMI

EMI
EMI

Title

EMI
EMI

Date:
A

COM/PRT

Document Number

Rev

661M05

Saturday, October 09, 2004

A
Sheet
E

30

of

42

VCC5

ISA INTERFACE ROM

FD[0..7]
FA[0..17]

FD[0..7]
FA[0..17]

BIOSVCC

28
28

R162
15K
+/-5%
R0603

*
C

FA18
FWEJ

R237

*
*

28
28

R163

220

FC SJ
F RDJ

VCC3

R160
0
+/-5%
R0603

R161
0
+/-5%
R0603
Dummy

BIOSVCC

FA0
FA1
FA2
FA3
FA4
FA5
FA6
FA7
FA8
FA9
FA10
FA11
FA12
FA13
FA14
FA15
FA16
FA17

FWEBJ

BIOSVCC

U12
32
12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
30
22
24
1
31
16

VCC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
CE
OE
VPP
PGM
GND

O0
O1
O2
O3
O4
O5
O6
O7

13
14
15
17
18
19
20
21

FD0
FD1
FD2
FD3
FD4
FD5
FD6
FD7

FD0
FD1
FD2
FD3

FD7
FD6
FD5
FD4

RN73
2
4
6
8

* 13
5
7

4.7K
+/-5%
8P4R0603
RN74
8
6
4
2

7
5
3
1

4.7K
+/-5%
8P4R0603

PLCC-32P

28
28

FCSJ
FRDJ

FC SJ
F RDJ

2
4
6
8

VCC5

5
7
9
11
13
15
17
19
21
23
25
27
29
31
33

1
X
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34

330

FDC

FLOPPY
1

RN57

1
3
5
7

R164
330
+/-5%
R0603

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34

RWCJ

28

INDEXJ
MOAJ
DSBJ
DSAJ
MOBJ
DIRJ
STEPJ
WDJ
WGATEJ
TRK0J
WPJ
RDATAJ
HEADJ
DSKCHGJ

28
28
28
28
28
28
28
28
28
28
28
28
28
28

HEADER_2X17_3 (FDD)

FDD34MZO3

A
TECHNOLOGY COPR.
Title

BIOS/FLOPPY

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

31

of

42

Voltage Monitor

VCC5

FAN Input and Output

+12V

R165
6.8K
+/-1%
R0603

R166
30K
+/-1%
R0603

+12V

VCCP VCC3

Fan Header 2
For System
RN58

1
3
5
7

VIN0
VIN1
VIN2
VIN3

2
4
6
8

Header_1X3 (FAN3P)

+12V

10K
+/-5%
8P4R0603

R167
4.7K
+/-5%
R0603

FAN_TAC2

FAN1

D40
1N4148W

R933 27K
28

1
2
3

28
28
28
28

R0603 +/-5%

BC245
0.1uF
C0603
DUMMY

BC246
0.1uF
C0603
DUMMY

BC247
0.1uF
C0603
DUMMY

BC248
0.1uF

R934
10K
+/-5%
R0603

C0603
DUMMY
VCC5

R795

0
R0603
+/-5%
Dummy

4.7K
Dummy

R797

4.7K
B
Dummy

R7
0
+/-5%
R0805

+12V

C
4

R796

+12V
Q90
BCP69T1
Dummy
E

R794
4.7K
+/-5%
R0603

D35

2N7002
Dummy

Choosing method of measuring temperature by either thermistor or diode

*
28

SIOVREF

*
28

TMPIN3

28

TMPIN1

BC249
0.1uF
C0603

R171
10K
+/-1%
R0603

R170
30K
+/-1%
R0603

C0603

R0603
+/-1%
10K
RT1

R800
4.7K
+/-5%
R0603
R801 27K

1A

Add 0 ohm 0805 resister

28

THERMDA

THERMDC

SHORT/NA

BC252
3.3nF
50V, X7R, +/-10%
C0603
JP4
2

A
1

SHORT/NA

For System

FAN_TAC1

R802
10K
+/-5%
R0603

R0603 +/-5%

check CPU FAN

JP3
2

BC250
0.1uF

1N4148W

CPU_FAN
4 4
3 3
2 2
1 1

EC97
22uF
25V, +/-20%
CE20D50H110

FAN_CTL1

51 G
Dummy

Temperature Monitor

28

R799

Q40

For CPU

TECHNOLOGY COPR.
Title

FAN

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

32

of

42

C0603

BC254
0.1uF

C0603

BC255
0.1uF
C0603

AC_RESETBIT_CLK
SYNC
SDATI0
SDATO

AC_RESETBIT_CLK
S YNC
SDATI0
SDATO
PC_BEEP

JD2
JD1
CD_L
CD_GND
CD_R
MIC1
MIC2
LINE_IN_L
LINE_IN_R

34

SPDIF_OUT

BC259
BC260
BC261
BC262
BC263
BC264
BC265

1uF
1uF
1uF
1uF
1uF
1uF
1uF

IN

EC34
22uF
25V, +/-20%
CE20D50H110

BC257
1uF

DVdd1
DVdd2
AVdd1
AVdd2

3
2

XTL_OUT
XTL_IN

11
6
10
8
5

RESET#
BIT_CLK
SYNC
SDATA_IN
SDATA_OUT

12
13
14
15
16
17
18
19
20
21
22
23
24
47
48

PC_BEEP
PHONE
AUX_L
AUX_R
JD2
JD1
CD_L
CD_GND
CD_R
MIC1
MIC2
LINE_IN_L
LINE_IN_R
SPDIFI(EAPD)
SPDIFO

ALC655

4
7
26
42
49

34
34
34
34
34
34
34
34
34

*******

14
14
14
14
14

XTL-IN

AUDIO_CLK

+12V

LM78L05

OUT

U14

FRONT_OUT_L
FRONT_OUT_R
MONO_OUT
NC_33
Front-MIC1
SURR-OUT-L
NC_40
SURR-OUT-R
CEN-OUT
LFE-OUT
JD0(GPIO0)
XTLSEL

35
36
37
33
34
39
40
41
43
44
45
46

VREFOUT
VREF
AFILT1
AFILT2
VRDA
Front-MIC2

28
27
29
30
31
32

DVss1
DVss2
AVss1
AVss2
NC_49

17

BC256
0.1uF
16V, Y5V, +80%/-20%
C0603

U13
1

ALC655

EC14
EC15

* **

BC253
0.1uF

1
9
25
38

FB L0805 80 Ohm
2
1
DUMMY

VCC5A

VCC3

VCC5

R172
FB

GND

BC258

100uF CE25D60H110
100uF CE25D60H110
1uF

*
*

BC267
1uF

BC268
1nF

BC269
1nF

LINE_OUT_L
LINE_OUT_R

34
34

F_MIC

34

JD0

34

VREFOUT

34

BC266
4.7uF

BC270
0.1uF

BC271
4.7uF
DUMMY

R173
5.6K

BIT_CLK

JP1
2

SHORT/NA

BC272
1uF

BC273
100pF

PC_BEEP

BC346
22pF

R175
10K

SPKR

SPKR

14,38

R176
1K

A
TECHNOLOGY COPR.
Title

AC97 CODEC

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

33

of

42

6
JD2

AUDIOC

LINE IN

R177
10K
+/-5%
R0603

FB24
1

JACK_AUDX3 Vertical

BC275
100pF
C0603

VCC5A

FB L0603 47 Ohm
2

LINE_IN_L

33

FB L0603 47 Ohm
2

LINE_IN_R

33

BC276
100pF
C0603

33

BC274
3.3uF
6.3V, X5R, +/-10%
C0805
FB23
1

32
33
34
35

40

R180
22K
R0603

R179
10K

VCC5A
F_AUDIO

R181
22K
R0603

33

1
3
5
7
9

F_MIC

33

LINE_OUT_R

33

LINE_OUT_L

LINE_OUT_R
LINE_OUT_L

2
4
6

FRONT_OUT_R

10

FRONT_OUT_L

Header_2X5_8

*
VREFOUT
R182
4.7K

R184
10K

*
MIC IN

33

33

R183
4.7K

JD0
BC278
3.3uF
6.3V, X5R, +/-10%
C0805

BC277
0.1uF

AUDIOA
1
2
3
4
5

37
36

MIC1

33

MIC2

VCC5

33

JACK_AUDX3 Vertical

BC279
100pF

BC280
100pF
SPDIF_OUT
RN59

1
3
5
7

33 SPDIF_OUT

2
4
6
8

3
4

3
4

DUMMY

Header_1X4_2

22K
+/-5%
8P4R0603

LINE OUT
JD1

R185
10K

33

BC281
3.3uF

JST-CON4-2-Black
1
2
3
4

AUDIOB
38
39

FRONT_OUT_R

25
24
23
22

CD_L
CD_GND

33
33

CD_R

33

CD_IN

FRONT_OUT_L

JACK_AUDX3 Vertical

BC282
100pF

BC283
100pF

A
TECHNOLOGY COPR.
Title

AC97 I/O

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

34

of

42

27
SB3V

L11
Choke Coil 5uH

SB3V

LED0/PHYAD0
LED1/PHYAD1
LED2/PHYAD2
LED3/PHYAD3
LED4/PHYAD4

PWFBIN
DVDD33
DVDD33

11
17
45

BC292
0.1uF

DGND0
DGND1
DGND2

TPRX+
TPRX-

31
30

TPTXTPTX+

33
34

RTSET
ISOLATE
RPTR
SPEED
DUPLEX
ANE
LDPS
MII/SNIB/RTT3
RESETB

28
43
40
39
38
37
41
44
42

U17/pin48

LRDP

27

LRDN

27

R187
6.2K
+/-1%
R0603
8201 5.9K

TPTX CLOSED CHIP

TPRX COSED MAG

RN60
51
8P4R0603
+/-5%
BC289
0.1uF

* *

BC290
0.1uF
C0603

note: don't use resp

BC293
0.1uF
16V, Y5V, +80%/-20%
SB3V
C0603

RN61
5.1K
8P4R0603
+/-5%

1
3
5
7

2
4
6
8

SB3V

RN62
5.1K
8P4R0603
+/-5%

1
3
5
7

27
27

R188
5.1K
+/-5%
R0603
DUMMY

RN63

1
3
5
7

BC286
0.1uF
16V, Y5V, +80%/-20%
C0603

C0603

LED1/PHYAD1
LED2/PHYAD2
LED3/PHYAD3
LED4/PHYAD4

27

LTDP
LTDN

IP101

SB3V

27 LED2/PHYAD2
27 LED3/PHYAD3

NC1

PWFBOUT
AVDD33

U17/pin14

BC291
0.1uF

29
35

RTL8201BL
IP101

PWFBIN 8
14
48

AGND
AGND

8
6
4
2

BC288
22pF

9
10
12
13
15

32
36

PWFBIN
5uH
BC285
0.1uF
16V, Y5V, +80%/-20%
C0603

7
5
3
1

LED0/PHYAD0
LED1/PHYAD1
LED2/PHYAD2
LED3/PHYAD3
LED4/PHYAD4

PWFBOUT
AVDD33

Choke Coil
BC284
0.1uF
16V, Y5V, +80%/-20%
C0603

2
4
6
8

1
2
BC287
22pF XTAL-25MHz

MDC
MDIO
TXD0
TXD1
TXD2
TXD3
TXEN
TXC
RXDV
RXD0
RXD1
RXD2
RXD3
RXC
COL
CRS
RXER/FXEN
X1
X2

L10

Place C14, C15, L1 close to PWFBOUT and place C16

close to PWFBIN.

X1

25
26
6
5
4
3
2
7
22
21
20
19
18
16
1
23
24
46
47

2
4
6
8

MDC
MDIO
TXD0
TXD1
TXD2
TXD3
TXEN
TXCLK
RXDV
RXD0
RXD1
RXD2
RXD3
RXCLK
COL
CRS
RXER

MDC
MDIO
TXD0
TXD1
TXD2
TXD3
TXEN
TXCLK
RXDV
RXD0
RXD1
RXD2
RXD3
RXCLK
COL
CRS
RXER

Place L2, C17, C18, C19 as close to each power pin

as possible.

R186
5.1K
+/-5%
R0603

U15
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14

PWFBOUT

SB3V

PWFBOUT

27 LED0/PHYAD0

LED0/PHYAD0

5.1K
+/-5%
8P4R0603

SB3V

R189
5.1K
+/-5%
R0603

TECHNOLOGY COPR.
Title

LAN PHY

Document Number
Date:
A

Rev

661M05

Saturday, October 09, 2004

A
Sheet
E

35

of

42

VCC5

VCC3

R192
4.7K
+/-5%
R0603
DUMMY

SB3V
D8
2

HDDLED

38

RSTSW-

BC294
0.1uF

1
FDLL4148

2
4
6
8

ACPILED
PWRBTN-

Header_2X5_10

14
14

R193

15,26

FP1
1
3
5
7
9

SB3V

* R190 *
220

* R191
330

BC295
0.1uF

1K
+/-5%
R0603

AUXOK

R194
100K
+/-1%
R0603

AUXOK

11,14

EC16
22uF
25V, +/-20%
CE20D50H110

BAT

RTC
28 INTRUDERJ
NOTE!
1.The RTCVDD is 3V
2.Decoupling capacitor must be close to 96X RTCVDD pin.
3.RTC circuit must strictly follow SiS's recommended design
SiS is not responsible for RTC problems from foreign designs.

SB3V

D9

BAT

BAT54C

CASE OPEN

D10
3

1
FDLL4148

R195
10K
+/-5%
R0603

BATOK

14

Header_1X3

2-3: NORMAL
1-2: Clear CMOS

BC297
1uF

BC298
10nF

BC299
10uF
10V, Y5V, +80%/-20%
C0805

BC296
1uF

CLS_CMOS
3 3
2 2
1 1

R196
1K
+/-5%
R0603

CN2
2
1

RTCVDD

C
R932
1M
+/-5%
R0603

BAT1

Battery Holder

Decoupling Capacitor
Place close to 96X

A
TECHNOLOGY COPR.
Title

BTN/RTC Batt

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

36

of

42

5V DUAL CIRCUIT
SB5V

R779
4.7K
+/-5%
R0603

VCC5

S1 D1_1

G1 D1_2

S2 D2_1

G2 D2_2

PWOK R777

4.7K

R778

U17

4.7K
Dummy

R782
1K
+/-5%
R0603

2
4
6
8

VIN

R199
100K

VCC5
1
3
5
7

DDR_VTT

RN79
0
+/-5%
8P4R0603
Dummy

3
R200
100K

BC301
0.1uF
DUMMY

REFEN

VCNTL
VCNTL
VCNTL
VCNTL

8
7
6
5

VOUT

GND

RT9173

BC302
0.1uF

EC21
470uF

SB5V
G

S3AUXSW-

10

BC1020
1uF
BC330
16V, X7R, +/-10%
0.1uF
C0805
25V, Y5V, +80%/-20%
Dummy
C0603

Si4501DY

Q85
MMBT3904

B
E

PWOK

38

VCC3

VCC2.5_MEM

Q83

Q84
MMBT3904

VCC5_DUAL

SB5V

R780
4.7K
+/-5%
R0603

+12V

R781
4.7K
+/-5%
R0603

Q38
NTD40N03R

Q86
MMBT3904
E

SB5V

DDR 2.5V CIRCUIT

R904

Q107
MMBT3904

1K
R0603
+/-5%

VCC3

R937
4.7K
Dummy

+12V

EC94
1000uF
6.3V, +/-20%
ce35d80h140

R768

(2.64V)

NTD40N03R

PWOK

38

1K
R0603
+/-5%

R775

1
NDS7002A
Q82
Dummy
MMBT3904
LM431ACZ
R766
10K 1%
Dummy
2

Q79
MMBT3904

VCC2.5_MEM
U30

NDS7002A

Q81

B
R771
4.7K
+/-5%
R0603

Q78

D34
B120
2

R769
4.7K
+/-5%
R0603
Dummy

R770
4.7K
+/-5%
R0603

Q80

1K
R0603
+/-5%
Dummy

R774
220
+/-5%
R0603

SB3V

NTD40N03R

-KEYLOCK

R773
220
+/-5%
R0603

14

S
D

G
Q77

SB5V

SB5V

D33
BAT54C

R767

+12V

C
S3AUXSW-

B4.7K

10

R938

Q105
MMBT3904

R935
4.7K
+/-5%
R0603

SB5V

562
R0603
+/-1%

EC18
1000uF
6.3V, +/-20%
ce35d80h140

EC19
1000uF
6.3V, +/-20%
ce35d80h140

EC20
470uF
10V, +/-20%
CE35D80H200
DUMMY

TECHNOLOGY COPR.
Title

DDR 2.5V DDRVTT

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

37

of

42

VCC5

R201
2.7K

SB5V

PWOK

PWOK

*
R204
4.7K
+/-5%
R0603

BC306
0.1uF

FSB_VTT

2
1

28

R207
1K
+/-5%
R0603

R232 1

D11

R233
3 1
100

BEEP_SIO

NBPWRGD

BC1019
0.1uF
Dummy

Q26
MMBT3904

3
4

3
4

BC313
22pF
50V, NPO, +/-5%
C0603

Header_1X4_2

B
VCC5

VCC3

BC817
0.1uF
25V, Y5V, +80%/-20%
C0603

FSB_VTT

R791
4.7K
+/-5%
R0603
Dummy

R792
4.7K
+/-5%
R0603
Dummy

VTT_OUT_RIGHT
R215

620
R0603
+/-5%

BC818
0.1uF
25V, Y5V, +80%/-20%
C0603
Dummy

VTT_PWRGD 6

D
Q89
MMBT3904
Dummy

Q103
G
S

2
B
R0603
+/-5%

SPKJ

11

2N7002

C
B
E

4.7K
R0603
+/-5%
Dummy

2 33+/-5%
R0603

TO north-bridge

VTT_PWRGD 6

SPKR

SPEAKER

*
*

Q19

SB5V

R793

R231
10K
+/-5%
Dummy

36

BAT54C

Q18
MMBT3904

RSTSW-

R5
4.7K
+/-5%
R0603

4.7K
+/-5%
R0603

R205
100
+/-5%
R0603

14,33

C
R208

4
3
2

FAB B R231 Dummy for Beep volume.

R0603

VCC3

VRMPWRGD

7,17 VRMPWRGD

7
8
9

VCC5

14,17

D
2N7002

*
B

4
3
2

Add speaker header

TO south-bridge

BC305
0.1uF

7
8
9

37

Q17
MMBT3904

4
3
2

VCC5

R203
1K
+/-5%
R0603

4.7K
+/-5%
R0603

7
8
9

VCC3

Q16

R206

4
3
2

BC304
0.1uF
DUMMY

SBPWRGD

PWOK

7
8
9

ATX_2X10

4
3
2

H6
Mounting Hole
mh40x80_8

0.1uF
DUMMY

7
8
9

H4
Mounting Hole
mh40x80_8

BC303

H3
Mounting Hole
mh40x80_8

1
2
3
4
5
6
7
8
9
10

H2
Mounting Hole
mh40x80_8

PSON-

3.3V*
3.3V*
COM
5V
COM
5V
COM
PW-OK
5VSB
12V

21

PSON-

3.3V*
-12V
COM
PS-ON
COM
COM
COM
-5V
5V
5V

21

14

11
12
13
14
15
16
17
18
19
20

H1
Mounting Hole
mh40x80_8

R202
8.2K

PWR1

6
5

+12V

SB5V

6
5

VCC5

VCC3

6
5

-12V

VCC5

6
5

SB5V

6
5

2N7002
Dummy

TECHNOLOGY COPR.
Title

POWER Con

Document Number
Date:

Rev

661M05

Saturday, October 09, 2004

A
Sheet

38

of

42

VCC1.8V and VDDQ

FSB_VTT
VCC3
SB3V
VCC3

R213
330
+/-1%
R0603

6
VCC1.8V

R790
1K
+/-1%
R0603

EC28
1000uF
6.3V, +/-20%
ce35d80h140

EC30
1000uF
6.3V, +/-20%
ce35d80h140

5A

Q88

R789
1K
+/-5%
R0603

BC921
0.1uF
25V, Y5V, +80%/-20%
C0603

FSB_VTT

NTD40N03R

EC96

* *3300uF
6.3V, +/-20%*

BC922
0.1uF
C0603

BC923
0.1uF
C0603

CE35_50D100H300

Q22

BC318 2.2
R0603
1nF
50V, X7R,
+/-5%
+/-10%
C0603
R235

SB3.3V

EC31
BC310
1000uF
1uF
6.3V, +/-20% DUMMY
ce35d80h140

Vref=1.25V

SB5V

NTD40N03R

SB3V

SB3.3V

LM324

14

U16D

VDDQ

U19
AMS1117

U18
AMS1085
DUMMY

EC33
1000uF
6.3V, +/-20%
ce35d80h140

VIN

VOUT

SB1.8V for 964

SB3V

ADJ

2.2K
R0603
+/-5%

EC25
10uF

R210
124

R0603
+/-1%
1.5K

U31B
LM358M

8
5

VCC3

4
11

* R216
B

NTD40N03R

R234
+

BC317 2.2
R0603
1nF
50V, X7R,
+/-5%
+/-10%
C0603
R174

+12V

13

D
G

2.2K
R0603
+/-5%

12

C0603

EC95
1000uF
6.3V, +/-20%
ce35d80h140

NTD40N03R

R787
1K
+/-5%
R0603

BC920
0.1uF
25V, Y5V, +80%/-20%
C0603

Vin

LM324

BC309
1uF
DUMMY

11

EC27
470uF

R788
1K
+/-1%
R0603

Q21

R87

10

Q87

BC919
0.1uF

+12V

U16C

R212
698
+/-1%
R0603

2.2K
R0603
+/-5%

+12V

NTD40N03R

BC316 2.2
R0603
1nF
50V, X7R,
+/-5%
+/-10%
C0603
R86

LM324

U31A
LM358M

ADJ

BC307
1uF
DUMMY

+12V

EC24
470uF

R786
1.13K
+/-1%
R0603

Q20

R85

U16B

R209
806
+/-1%
R0603

11

+12V

4 Vout

SB3V

Vref
-

EC26
470uF

BC308
0.1uF

R211
205

SB1.8V

*
U27

BC100
0.1uF
C0603

ADJ

4 Vout

Vin

AME1117

*
*

R136
105
+/-1%
R0603

BC101
10uF
10V, Y5V, +80%/-20%
C0805

TECHNOLOGY COPR.

R214
47
+/-1%
R0603

Title

SB3V, SB1.8V, VCC1.8V, VDDQ

Document Number
Date:
5

Rev

661M05

Saturday, October 09, 2004

A
Sheet
1

39

of

42

RN1

TPB0TPB0+
TPA0TPA0+

1
3
5
7

VCC3
FB18

VCC3_1394

PREQ-3
PGNT-3
PERRSERR-

17 PCICLK_1394

R923 100
+/-5%
R0603

PREQ-3
PGNT-3
PERRSERR-

19
18
56
57

PCI_REQ#
PCI_GNT#
PCI_PERR#
PCI_SERR#

R927

1394CLK 16
PCI_CLKJ 12

10K

13,19,24,25,26 SIORST13,24,25
INT-D
14,19,24,25,28 PME-

14
85
13
21

120
108
107
2
1

78
62
48
35
20
VDDP
VDDP
VDDP
VDDP
VDDP

R0

118

R381_2

FILTER0

C233_1

FILTER1

C233_2

CPS
TPBIAS0
TPA0+
TPA0TPB0+
TPB0TPBIAS1
TPA1+
TPA1TPB1+
TPB1-

106
116
115
114
113
112
125
124
123
122
121

TEST0
TEST1
TEST2
TEST3
CNA
TEST8
TEST9
TEST16
TEST17
GPIO2
GPIO3

BC1022
0.1uF

C0603

C0603

TPB0-R

TPB0+R

Close to 1394 connector

R907
56.2
+/-1%
R0603

TPBIAS0

BP WR
TPBIAS0
TPA0+
TPA0TPB0+
TPB0TPBIAS1
TPA1+
TPA1TPB1+
TPB1-

1K
R0603
+/-5%

R908
56.2
+/-1%
R0603

TF2
BC1002
1uF
C0603

BC1004
220pF

R911
56.2
+/-1%
R0603

C0603

R912
56.2
+/-1%
R0603

VCC3

TPA0-R

TPA0+R

Common Choke 90 Ohm 2L

R913
5.11K
+/-1%
R0603

Close to 1394 connector

TO FRONT

Common Choke 90 Ohm 2L

TPB1TPB1+
TPA1TPA1+

TPB1-R

TPB1+R

TF3

Close to 1394 connector

105
104
102
101
96
95
94
11
10

TEST7

R919

4.7K+/-5% R0603

TEST16
TEST17

R921
R922

4.7K+/-5% R0603
4.7K+/-5% R0603

90
89

GPIO2
GPIO3

R924
R925

4.7K+/-5% R0603
4.7K+/-5% R0603

R917
56.2
+/-1%
R0603

TPBIAS1

R918
56.2
+/-1%
R0603

BC1005
1uF
C0603

Common Choke 90 Ohm 2L

4
1

TPA1-R

TPA1+R

TF4

NOTES:
1. Keep termination components close to TSB43AB22 device.
2. Use Wide Copper Bus for Chassis ground and connect all 1394
connector shields directly to it. No thin trace teathers.

SDA

92

SDA

R926

2.7K

SCL

91

S CL

R928

2.7K

RN2

TPB1TPB1+
TPA1TPA1+

0
R0805
+/-5%

* 13

2
4
6
8

VCC3

VCC3

BC1021
0.1uF

TPA0TPA0+

R6

G_RST#
PCI_RST#
PCI_INTA#
PCI_PME#

TO REAR

TF1

TPB0-R

PCI_CLK
PCI_CLKRUN#

99
98
97

R901
5.11K
+/-1%
R0603

TPB0TPB0+

BC1003
0.1uF

R910
390K
+/-5%
R0603

TPB1-R
TPB1+R
TPA1-R
TPA1+R

5
7
0
+/-5%
8P4R0603
Dummy

Del FB19

U39
R929

check
B

BC1001
12pF
50V, NPO, +/-5%
C0603

R906
6.34K
+/-1%
R0603

R798

30
93
17
23
33
44
55
64
68
75
83
103

TSB43AB22A

119

PC0
PC1
PC2

DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND
DGND

INT-D
PME-

R1

C0603

R900
56.2
+/-1%
R0603

330

BC1007
0.1uF

8
7
6
5

VCC
A0
WP/NC
A1
SCL
A2/NC
SDA VSS/GND

1
2
3
4

AD24

C226_1

R381_1

R899
56.2
+/-1%
R0603

AT24C02N-2.7V

2
4
6
8

TPB0+R
TPA0+R

EEPROM

1394GND
1394D0+
1394D1+
SHD2

SHD3

PCI_PAR
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_IDSEL

58
49
50
52
53
54
36

PAR
FRAMEIRDYTR DYDEVSELSTOPIDSEL

XO

BC1000
220pF

Common Choke 90 Ohm 2L

X6
XTAL-24.576MHz

PLLGND1
PLLGND2

13,24,25
PAR
13,24,25 FRAME13,24,25 IRDY13,24,25 TRDY13,24,25 DEVSEL13,24,25 STOP-

PCI_CBE0#
PCI_CBE1#
PCI_CBE2#
PCI_CBE3#

C225_1

73
60
47
34

XI

Close to 1394 connector

BC999
12pF
50V, NPO, +/-5%
C0603

CYCLEIN
CYCLEOUT
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

C/BE-0
C/BE-1
C/BE-2
C/BE-3

C/BE-0
C/BE-1
C/BE-2
C/BE-3

13
13
24,25
13,24,25

87
86
84
82
81
80
79
77
76
74
71
70
69
67
66
65
63
61
46
45
43
42
41
40
38
37
32
31
29
28
26
25
24
22

8
9

4.7K
10K

Crystal must be place as close as

possible to the TSB43AB22. Keep traces
all on one PCB layer.

R902
R903
A D0
A D1
A D2
A D3
A D4
A D5
A D6
A D7
A D8
A D9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

13,24,25 AD[0..31]

AVDD
AVDD
AVDD
AVDD
AVDD

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

U38
VCC3

check

Crystal Placement

PLLVDD

VCC3_1394

AGND
AGND
AGND
AGND
ANGD
AGND
AGND

BC997
VCC3
10uF
6.3V, Y5V, +80%/-20%
C0805

109
110
111
117
126
127
128

BC998
0.1uF
25V, Y5V, +80%/-20%
C0603

100
88
72
59
51
39
27
15

FB L0805 60 Ohm

13,24,25
13,24,25
13,24,25
13,24,25

0
+/-5%
8P4R0603
Dummy

VIO IS TO BE UPDATE !!!!

2

TPB0-R
TPB0+R
TPA0-R
TPA0+R

2
4
6
8

1394VCC
1394D01394D1SHD1

1
3
5
7

8P4R0603
+/-5%
RN83 0
7
5
3
1

TPB0-R
TPA0-R

1394
1394 CONN

8
6
4
2

F6
1

FB20
1

BC1008
10nF

EC102
10uF
Dummy

BC1009
10nF

BC1010
0.1uF

BC1011
0.1uF

BC1012
10nF

VCC3_1394

VCC3_1394

FAB A Trace A and B swap.

EC103
10uF
Dummy

BC1013
0.1uF

BC1014
10nF

BC1015
0.1uF

BC1016
10nF

BC1017
0.1uF

F_1394

TPA1-R

2
4
6
8
10

TPB1-R

FB L0805 60 Ohm

1
3
5
7

TPA1+R
TPB1+R

BC1006
0.1uF

8P4R0603
+/-5%
RN82 0
7
5
3
1

VCC3
VCC3

F1210_1.5A
Dummy

8
6
4
2
D39

F5
1

1394 HEADER

BP WR

2
F1210_1.5A
Dummy

BC1023
0.1uF
C0603

Del BC1018 and FB21

40V 3A

B320B
EC2
10uF
50V, +/-20%
CE20D50H110
Add EC2

+12V

EC1
100uF
25V, +/-20%
CE25D60H110

6
5

H5
Mounting Hole
mh40x80_8
7
8
9

BC1023 and BC1024 change 50V

4
3
2

TECHNOLOGY COPR.
Title

SB3V, SB1.8V, VCC1.8V, VDDQ

Document Number

Rev

661M05
Date:
5

A
Sheet

Saturday, October 09, 2004

1

40

of

42

8
6
4
2

VCC5_DUAL

F2

7
5
3
1

F1813_2.6A
Dummy

RN72
0
8P4R0603
+/-5%

10

11

R_USBPOWER

USB

R_USBPOWER 27

BC820
0.1uF
25V, Y5V, +80%/-20%
C0603

TOP

8
7

UV1+

UV1-

UV1+

15

UV1-

15

UV0+

15

UV0-

15

BOTTOM

12

USBX2

TECHNOLOGY COPR.
Title

SB3V, SB1.8V, VCC1.8V, VDDQ

Document Number
Date:
5

Rev

661M05

Saturday, October 09, 2004

A
Sheet
1

41

of

42

TECHNOLOGY COPR.
Title

661FX-1 HOST & AGP

Document Number
Date:
5

Rev

661M05

Saturday, October 09, 2004

A
Sheet
1

42

of

42