Circuits and Systems

Faculty listing
Shalabh Gupta

SG

Maryam Shojaei

MS

Dinesh Sharma

DKS

Jospeh John

JJ

Madhav Desai

MPD

Sachin Patkar

SP

Virendra Singh

VS

Jayanta Mukherji

JM

Rajesh Zele

RZ

Mahesh Patil

MBP

H Narayanan

HN

Sidharth DattaGupta

SDG

Kumar Appaiah

KA

Saravanan Vijayakumaran SV
Rajbabu Velmurugan

RV

Panel of Examiners

Adviser

Student

Topic

Examiner (see
the list above)

Shalabh
Gupta

Nandish Thaker

Integrated circuit design and demonstration of

equalizers for coherent optical links

RZ MS

Vivek Yadav

Digital to time converters for phase locked loops

RZ MS

Prasad
Shankarrao
Gandewar

Title: Multi-bit Continuous Time Sigma-Delta ADC for

Wideband Applications

SG JM

Ashwith Jerome
Rego

Multistandard Wireless Receiver Front End

SG JM

Dheeraj Tuteja

Design and optimization of an efficient battery charger

using multipiezoelectric transducers
JJ SDG

Maryam
Shojaei

Dinesh
Sharma

Rohan Tukaram
Shelar

The analysis and development of the soil moisture

measurement system and the review of soil
temperature effects on the soil moisture.

JJ SDG

Mehta Aakash
Hasmukhray

Temperature Compensated Soil Moisture System

JJ SDG

Satish Cheekatla

Radiation Hardedned digital library cell design

MPD SDG

Rakashree
Dasgupta

development of peripheral circuits for an Indian

Microprocessor

MPD VS

Shravan Donthula high speed successive approximation ADCs

RZ MS

Rahul Tripathi

RZ MS

Joseph John Lakshay Kumar

Madhav
Desai

Sachin
Patkar

error correction in pipeline ADCs

Receiver circuit design for high speed Polymer Optical

Fiber data links
SG JM

Kirtikant sahu

LED and Laser diode Transmitter circuit design for

high speed Polymer Optical Fiber data links

SG JM

Piyush Soni

Microprocessor architecture verification and

optimization

VS DKS

Anurag Gupta

Hardware implementation of an LDPC decoder

SP MBP

Chirag Shetty
(DD)

Implementation of an IRNSS receiver

SG KA

Aniket Deshmukh
(DD)
A coherent TSO compliant cache subsystem

VS DKS

Aswin

Function unit optimization in a microprocessor

VS DKS

Deval Shah

Going back to Forth

MPD SV

Harshal Kalyane

Smart Memory Engines for Heterogeneous Computing MPD SV

Asmita Raut

Sparse Matrix Vector Multiplication on Virtex 6 FPGA

MBP RV

Saurav Gupta

Model Evaluation Acceleration for Circuit Simulators

MPD SV

Aniket Vaste

Sparse Matrix Vector Multiplication using VIVADO

HLS

VS DKS

Sneha Goenka

Hardware implementation of Block-Wiedeman

Algorithm in Bluespec

VS DKS

Shashank
Gangrade

Parallel Bordered Block Diagonal Matrix Solver for

HN MBP

Large Circuit Simulator

Virendra
Singh

Jayanta
Mukherjee

Jainesh Doshi

??

SP/TBD

Rishabh Rawat

??

SP/TBD

Dinesh Yadav

??

SP/TBD

Binod Kumar

??

MPD/TBD

Suhit Pai

??

SP/TBD

Sujit Mahto

??

MPD/TBD

Design of Digital Delta Sigma Modulator for Frequency

Palla Pavankumar Synthesizers
RZ MS
Krati Sethi (DD)

Minimization of fractional spurs in Digital Delta Sigma

Modulators

RZ MS