Determination of the Effects of Temperature and

Time to Thickness of Oxide Layer Formed by Wet

Thermal Oxidation
Melita Sandra E. Dela Merced
Department of Mining, Metallurgical and Materials Engineering
University of the Philippines Diliman
Quezon City, Philippines
msedelamerced@gmail.com

AbstractSilicon devices have been the epitome of technological

advancements. A key factor for this is the ability of silicon to grow
an oxide layer that serves as surface passivation, barrier, and
dielectric. Development of this oxide layer can be done by
deposition or thermal oxidation. This experiment was done to
form an oxide layer on silicon wafers using wet thermal oxidation
and to determine the effects of oxidation parameters temperature
and time. Based on the acquired data, it was found out that as the
temperature and time increase, the oxide layer becomes darker in
color which is due to the thickening of the layer.
Index TermsSilicon dioxide layer, Thermal Oxidation,
thickness

I. INTRODUCTION
Silicon devices have been the epitome of advancements in
technology. These devices are integrated even in the smallest
equipment or devices used at present leading to more researches
for further improvement. One of the basic researches done by
scientists involves the growth and deposition of an oxide layer
on these silicon devices. This was done because the formation
of this oxide layer is one of the key factors in the technological
development of silicon devices. (Van Zant 2004) This oxide
layer is important in silicon technology because of its many
uses and one of which is surface passivation wherein silicon
oxide physically protects the surface of the wafer from
contaminants. This is due to its high density and hardness.
Silicon dioxide also shows its surface passivation function by
protecting the device from electrically active contaminants
(ions). Being a doping barrier is another function of silicon
dioxide. Doping is one of the primary processes in
semiconductor fabrication which requires hole creation in the
surface layer. These holes act as entry point of the dopants.
Prevention of the dopants from reaching the silicon surface is
done by the silicon dioxide layer. Lastly, silicon dioxide acts
both as surface and device dielectric. Since dielectrics do not
conduct electricity, they are considered as insulators which
prevent the silicon wafer from experiencing the phenomenon
known as shorting. (Van Zant 2004)
Though the silicon dioxide layer is necessary in silicon
device fabrication because of its innate properties, method of
development onto the silicon device is still considered in order
to manipulate the layers properties. There are two ways of

developing an oxide layer onto the silicon wafer: 1) deposition

of oxide layer; and 2) growing of oxide layer. Oxide deposition
process is further classified into physical and chemical vapor
deposition. Physical vapor deposition processes (PVD) involve
the release of material from a source and physically depositing
this material, in this case the oxide layer, onto the substrate.
Examples of PVDs are evaporation and sputtering. Chemical
vapor deposition on the other hand involves chemically reacting
gas sources until condensation on all surfaces of the reactor,
including the surface of the substrate, occurs. Thus forming the
desired oxide layer. Examples of CVD are Plasma enhanced
CVD (PECVD) and low pressure CVD (LPCVD). Deposition
of oxide layer is advantageous because it can be used even when
the substrate is not silicon. (Memsnet.org 2015)
Oxide layer growth, also known as thermal oxidation,
involves the application of heat and reaction of gas (oxygen or
water vapor) with the substrate to form an oxide layer. This
process can be further classified into dry and wet oxidation. The
only difference in the two classifications is the gas source. For
dry oxidation, oxygen gas is used to react with the silicon wafer.
This reaction is shown by Equation 1.
() + 2() 2()

(EQ. 1)

Dry oxidation is used when a high quality oxide layer is desired.

(Xiao 2012) Meanwhile, wet oxidation involves the reaction
(shown in Equation 2) of water vapor with the silicon wafer.
22 () + () 2() + 22()

(EQ. 2)

Wet oxidation is used when the desired fabrication time is short

or a higher oxide growth rate is necessary. In general, oxide
layer growth is used because of its good process control, and
high quality Si-SiO2 interface. (Xiao 2012)
This experiment aims to be able to perform wet oxidation of
Silicon wafers and to determine the effects of the oxidation
parameters temperature and time to the thickness of the oxide
layer produced.

Dela Merced, M.S. (2015)

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II. METHODOLOGY
A. Materials
Commercially available methanol and deionized water were
used to degrease the pre-cleaned (RCA) Silicon wafers. Water
vapos, oxygen, and nitrogen gas were used to induce formation
and growth of oxide layer. Quartz wafer boats and push rod
were used to load the silicon wafers into the tube furnace. Tube
furnace (Ash with New Separation Muffle) was used to contain
the oxidation reaction.
B. Oxidation Process
Before the pre-cleaned silicon wafers (RCA method during
the previous experiment) were subjected to thermal oxidation,
these wafers were first degreased using methanol and deionized
water and were then dried using lint-free wipes. Afterwards,
each wafer was carefully loaded onto two wafer boats for easier
loading into the tube furnace.

FIGURE 1. ASH TUBE FURNACE

Preparation of the oxidation equipment was done by

connecting the line of water vapor to the Ash tube furnace,
shown in Figure 1, for wet oxidation. Ensuring that the water
vapor was enough for the duration of the experiment was done
afterwards. Oxygen gas amount was also checked to determine
if the gas is enough for ease of flow rate into the furnace. The
furnace was then ramped up to 400C. Classes were assigned
with different temperatures 700C and 900C. Once the desired
temperature (either 700C or 900C) was reached, the wafer
boats were then carefully loaded into the furnace. Caution was
taken so as not to warp the wafers due to high temperature.
After 80 minutes, the 2nd wafer boat that was loaded was
carefully unloaded from the furnace. The remaining wafer boat
in the tube furnace was then heated for 20 additional minutes
(total of 100 minutes). Wafers were then carefully transferred,
properly labeled, and meticulously observed in a petri dish.
Observations made were then recorded. Before switching off
the furnace, it was again purged with nitrogen gas and ramped
down to 400C.
C. Schematic Diagram of the Oxidation Set-up and Tube
Furnace Equipment

To fully visualize the experimental set-up, the schematic

diagram of used for both wet and dry oxidation is shown in
Figure 2. The only difference was the source used to oxidize the
Silicon wafer. For dry oxidation, oxygen gas was used while
wet oxidation used water vapor to oxidize the wafer. Labeled
parts of the set-up are also shown in Figure 2. For the gas sources,
a regulator was used to start or stop the flow of gas. Right after
the regulators are the control valves that control the amount of
gas that flow into the tube furnace. Once the gas (either oxygen
or water vapor) has entered the tube furnace, it will react with
the Si wafer thus forming an oxide layer. Other parts of the setup include the burn box which burn out residual hydrogen gas
used in the oxidation process before releasing the exhaust gases
to the scrubber and out of the exhaust. (Xiao 2012)

FIGURE 3. SCHEMATIC DIAGRAM OF A SINGLE HORIZONTAL TUBE FURNACE

(Van Zant 2004)

The tube furnace used in the experiment is the Ash Tube

Furnace with New Separation Muffle. Inside this tube furnace
are different sections that contribute to the formation and
growth of the oxide layer on the wafers. Figure 3 shows the cross
section of a basic single horizontal tube furnace. It can be seen
in this figure that the tube can be divided into three zones that
consist of coiled tubing of copper. This copper tubings are
connected to separate power supplies. However, other furnaces
may have up to seven zones. Looking inside the furnaces tube
is another tube made of quarts where the reaction takes place.
This tube serves as the reaction chamber for oxidation. The
reaction tube may be located inside a muffle which is a ceramic
liner that acts as a heat sink for even distribution of heat along
the reactor. Thermocouples are also present near the quartz tube
to determine temperature information and send to the band
controllers. Heating of the reaction tube by radiation and
conduction are done from the power proportioned by the
controller to the coils. These coils then give out radiation and
then conduct the energy they released. Use of the tube furnace
during oxidation entails that the wafers be placed on the flat
zone (shown in Figure 3). (Van Zant 2004)
III. RESULTS AND DISCUSSION
Once the oxidation reaction times (80 minutes and 100
minutes) were completed for both 700C and 900C, the silicon
wafers were visually inspected to determine the color of the
oxide layers formed and the quantitative thickness. Shown in
Table 1 is the summary of oxide layer colors for the
corresponding temperature and time.

FIGURE 2. SCHEMATIC DIAGRAM OF PYROGENIC STEAM OXIDATION (Xiao

2012)

Dela Merced, M.S. (2015)

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TABLE 1. OXIDE LAYER COLOR WITH RESPECT TO TEMPERATURE AND TIME

PARAMETERS1

Temperature (oC)

Time
(min.)
700

80

100

900

Inner

Outer

Inner

Outer

Green

YellowGreen

Yellowish
brown

Violet

Violet/Brown

Brown

Violet

Yellowgreen

It can be seen from the table that there is a variety of colors

observed on the inner and outer sections of the silicon wafers.
For the wafers subjected to 900C and the wafers subjected to
700oC for 100 minutes, the outer section of the wafers showed
darker colors compared to the inner section. This nonuniformity of the oxide layers may have been due to the
positioning of the wafers on the wafer boat. The edges or outer
section are easier to reach compared to the center or inner
sections of the wafer. Also it was observed that as the
temperature and the exposure time increases, the color of the
inner and outer sections become darker. This is because of the
direct proportionality of oxide growth rate to temperature
(Iue.tuwien.ac.at 2015). Higher temperature results to higher
growth rate leading to thicker oxide layer and darker oxide
color. For exposure time, increasing this parameter results to
further completion of oxidation reaction which also results to
thicker and darker oxide layers. The thickness of the oxide
layers were analyzed by means of quantitative visual inspection
which depended on the darkness or lightness of the oxide layer
color. Though this method of analysis is practical and easy to
implement, it is still unreliable because it is very subjective and
prone to inaccuracies.
An accurate way of determining and analyzing the
mechanism of thermal oxide growth is known as the DealGrove Model. This model involves the assumption of onedimensionality. This means that the model is only applicable to
oxide layers grown on plane substrates. This model then
determines the thickness of the oxide layer using Equation 3.

where,

In these equations, tox as oxide layer thickness, exposure

time, and coefficients A and B. (Campbell 2008) Though this
model is accurate in determining the oxide layer thickness, it is
not ideal because it can only be used for dry thermal oxidation.
Since this experiment was only limited to wet oxidation, the
model could not be used. Inconsistencies with the data may
have been caused by improper RCA cleaning due to insufficient
chemicals and laboratory instruments, positioning of the silicon
wafers, unreliable equipment, and subjectivity of observations.
IV. CONCLUSION
For each silicon wafer sample, an oxide layer was
successfully formed using wet thermal oxidation. Oxide layer
color and thickness were analyzed by means of visual
inspection. It was found out that as temperature and exposure
time increases, the oxide layer becomes darker and resulting to
thicker silicon dioxide layer.
ACKNOWLEDGMENT
I would like to acknowledge the MatE123 HWX section for
providing the data for the 900C temperature (both 80 and 100
minutes reaction time).
REFERENCES
Campbell, Stephen A. 2008. 4.1 The Deal-Grove Model of
Oxidation. Fabrication Engineering at the Micro- and
Nanoscale (3rd Edition). Oxford University Press.
http://app.knovel.com/hotlink/pdf/id:kt008MXXX1/fabr
ication-engineering/deal-grove-model-oxidation.
Iue.tuwien.ac.at. 2015. 2.4 Oxidation Parameters.
http://www.iue.tuwien.ac.at/phd/hollauer/node14.html.
Memsnet.org. 2015. Deposition Processes.
https://www.memsnet.org/mems/processes/deposition.ht
ml.
Van Zant, Peter. 2004. Microchip Fabrication. 5th Editio. The
McGraw-Hill Companies.
www.digitalengineeringlibrary.com.
Xiao, Hong. 2012. Chapter 5: Thermal Processes. In
Introduction to Semiconductor Manufacturing
Technology (2nd Edition). SPIE.
http://app.knovel.com/hotlink/pdf/id:kt00BXRWR4/intr
oduction-semiconductor/dry-oxidation.

(EQ. 3)

Refer to Appendix A for the wafer images

Dela Merced, M.S. (2015)

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Appendix A Wafer Photos

Wafers at 700C (L-80 mins. R-100mins.)

Wafers at 900C for 80 mins.

Wafers at 900C for 100mins.

Dela Merced, M.S. (2015)

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