Sunteți pe pagina 1din 16

Serial ports ..

I/O

Input

DCD

Input

RXD

Output

TXD

Output

DTR

Signal Ground

GND

Open

Output

RTS

Input

CTS

Open

Parallel port 25

Signal

In/Out

Out

Data bit 0

In/Out

Data bit 1

In/Out

Data bit 2

In/Out

Data bit 3

In/Out

Data bit 4

In/Out

Data bit 5

In/Out

Data bit 6

In/Out

Data bit 7

In/Out

In

10

Busy

In

11

Paper End

In

12

Select

In

13

Ground

Out

14

In

15

Out

16

Out

17

25 -18

Keyboard

Signal

Data

In/Out

Not connected

Signal Ground

Volts DC 5.0 +

In/Out

Clock

In/Out

Not connected

Chassis Ground

Shield

VGA 15

Signal

PIN

Red Video

In/Out

Green Video

In/Out

Blue Video

In/Out

ID bit 2

In/Out

Signal Ground

5-8

Key

In/Out

Ground

10

Not connected

12 ,11

Horizontal Synchronisation

In/Out

13

Vertical Synchronisation

In/Out

14

Not connected

In/Out

15

SCART

Pin

)(

Blue ground

Blue output

Green ground

N/C

10

Green output

11

N/C

12

Red ground

13

N/C

14

Red output

15

16

Composite video output

17

Composite video input

18

Composite video output

19

Composite video input

20

21

Twisted-Pair Ethernet Connector

Description

Signal

Pin

Termination

Common mode termination

Termination

Common mode termination

+ Transmit data

+TX

5VDC+

5VDC+

- Transmit data

-TX

+ Receive data

+RX

- Receive data

-RX

Termination

Common mode termination

Hard drive Power supply

Pin

Power +3.3V

3.3V+

Power +3.3V

3.3V+

Ground

GND

Vcc +5V

5V+

Ground

GND

Vcc +5V

5V+

Ground

GND

Power Good

PWROK

5V Standby+

5VSB

Power +12V

12V+

10

Power +3.3V

3.3V+

11

Power -12V

12V-

12

Ground

GND

13

Remote Power ON/OFF

PS-ON

14

Ground

GND

15

Ground

GND

16

Ground

GND

17

Power -5V

5V-

18

Vcc +5V

5V+

19

Vcc +5V

5V+

20

AT

P8

Name

Pin

.Power Good, +5 VDC when all voltages has stabilized

Orange

PG

VDC (or n/c) 5+

Red

5V+

VDC 12+

Yellow

12V+

VDC 12-

Blue

12V-

Ground

Black

GND

Ground

Black

GND

P9

Name

Pin

Ground

Black

GND

Ground

Black

GND

VDC 5-

White or Yellow

5V-

VDC 5+

Red

5V+

VDC 5+

Red

5V+

VDC 5+

Red

5V+

1.8 SATA

Device Present

2-3

Manufacturing Diagnostic

5-6

Ground

15 SATA

coding notch

V 3.3

Ground

3rd

3rd

2nd

1st

2nd

2nd

V5

Ground

Ground

V 12

2nd

3rd

3rd

2nd

10

3rd

11

1st

12

2nd

13

3rd

14

3rd

15

Joysticks

Pin

VDC 5+

OUT

5V+

Button 1

IN

B1/

Joystick 1 - X

IN

X1

Ground

GND

Ground

GND

Joystick 1 - Y

IN

Y1

Button 2

IN

B2/

VDC 5+

OUT

5V+

VDC 5+

OUT

5V+

Button 3

IN

B3/

10

Joystick 2 - X

IN

X2

11

Ground

GND

12

Joystick 2 - Y

IN

Y2

13

Button 4

IN

B4/

14

VDC 5+

OUT

5V+

15

Sony Playstation

Pin

Data

DATA

Command

CMD

Not connected

N/C (9 V unused)

Ground

GND

Vcc

VCC

ATT select

ATT

Clock

CLK

Not connected

N/C

Acknowledge

ACK

MSX

Pin

Forward

IN

FORWARD/

Backward

IN

BACK/

Left

IN

LEFT/

Right

IN

RIGHT/

VDC (50mA max) 5+

OUT

5V+

Trigger A / Output 1

IN/OUT

TRG1/

Trigger A / Output 1

IN/OUT

TRG2/

Output 3

OUT

OUTPUT

Signal Ground

GND

Atari 2600 Joystick

Pin

Up

IN

WHT

Down

IN

BLU

Left

IN

GRN

Right

IN

BRN

Not connected

n/c

Button

IN

ORG

Not connected

n/c

(-)Ground

BLK

Not connected

n/c

S-Video

Description

Name

Pin

Ground Y

GND

Ground C

GND

Intensity Luminance

Color Chrominance

CPU

Pin

GND

12V+

Tachometric Signal

ISA SLOT

Dir

Pin

I/O channel check; active low=parity error

IN

I/O CH CK/

A1

Data bit 7

IN/OUT

D7

A2

Data bit 6

IN/OUT

D6

A3

Data bit 5

IN/OUT

D5

A4

Data bit 4

IN/OUT

D4

A5

Data bit 3

IN/OUT

D3

A6

Data bit 2

IN/OUT

D2

A7

Data bit 1

IN/OUT

D1

A8

Data bit 0

<IN/OUT

D0

A9

I/O Channel ready, pulled low to lengthen memory cycles

IN

I/O CH RDY

A10

Address enable; active high when DMA controls bus

OUT

AEN

A11

Address bit 19

OUT

A19

A12

Address bit 18

OUT

A18

A13

Address bit 17

OUT

A17

A14

Address bit 16

OUT

A16

A15

Address bit 15

OUT

A15

A16

Address bit 14

OUT

A14

A17

Address bit 13

OUT

A13

A18

Address bit 12

OUT

A12

A19

Address bit 11

OUT

A11

A20

Address bit 10

OUT

A10

A21

Address bit 9

OUT

A9

A22

Address bit 8

OUT

A8

A23

Address bit 7

OUT

A7

A24

Address bit 6

OUT

A6

A25

Address bit 5

OUT

A5

A26

Address bit 4

OUT

A4

A27

Address bit 3

OUT

A3

A28

Address bit 2

OUT

A2

A29

Address bit 1

OUT

A1

A30

Address bit 0

OUT

A0

A31

GND

B1

RESET

B2

5V+

B3

IRQ2

B4

5VDC-

B5

DRQ2

B6

12VDC -

B7

NOWS/

B8

VDC 12+

12VDC+

B9

Ground

GND

B10

Ground
Active high to reset or initialize system logic

OUT

VDC 5+
Interrupt Request 2

IN

VDC 5DMA Request 2

IN

VDC 12No WaitState

IN

System Memory Write

OUT

SMEMW/

B11

System Memory Read

OUT

SMEMR /

B12

I/O Write

OUT

IOW/

B13

I/O Read

OUT

IOR/

B14

DMA Acknowledge 3

OUT

DACK3/

B15

DMA Request 3

IN

DRQ3

B16

DMA Acknowledge 1

OUT

DACK1/

B17

DMA Request 1

IN

DRQ1

B18

Refresh

IN/OUT

REFRESH/

B19

System Clock (67 ns, 8-8.33 MHz, 50% duty cycle)

OUT

CLOCK

B20

Interrupt Request 7

IN

IRQ7

B21

Interrupt Request 6

IN

IRQ6

B22

Interrupt Request 5

IN

IRQ5

B23

Interrupt Request 4

IN

IRQ4

B24

Interrupt Request 3

IN

IRQ3

B25

DMA Acknowledge 2

OUT

DACK2/

B26

Terminal count; pulses high when DMA term. count reached

OUT

T/C

B27

Address Latch Enable

OUT

ALE

B28

5V+

B29

VDC 5+

High-speed Clock (70 ns, 14.31818 MHz, 50% duty cycle)

OUT

Ground

OSC

B30

GND

B31

System bus high enable (data available on SD8-15)

IN/OUT

SBHE

C1

Address bit 23

IN/OUT

LA23

C2

Address bit 22

IN/OUT

LA22

C3

Address bit 21

IN/OUT

LA21

C4

Address bit 20

IN/OUT

LA20

C5

Address bit 19

IN/OUT

LA18

C6

Address bit 18

IN/OUT

LA17

C7

Address bit 17

IN/OUT

LA16

C8

Memory Read (Active on all memory read cycles)

IN/OUT

MEMR /

C9

Memory Write (Active on all memory write cycles)

IN/OUT

MEMW/

C10

Data bit 8

IN/OUT

SD08

C11

Data bit 9

IN/OUT

SD09

C12

Data bit 10

IN/OUT

SD10

C13

Data bit 11

IN/OUT

SD11

C14

Data bit 12

IN/OUT

SD12

C15

Data bit 13

IN/OUT

SD13

C16

Data bit 14

IN/OUT

SD14

C17

Data bit 15

IN/OUT

SD15

C18

Memory 16-bit chip select (1 wait, 16-bit memory cycle)

IN

MEMCS16/

D1

I/O 16-bit chip select (1 wait, 16-bit I/O cycle)

IN

IOCS16/

D2

Interrupt Request 10

IN

IRQ10

D3

Interrupt Request 11

IN

IRQ11

D4

Interrupt Request 12

IN

IRQ12

D5

Interrupt Request 15

IN

IRQ15

D6

Interrupt Request 14

IN

IRQ14

D7

DMA Acknowledge 0

OUT

DACK0/

D8

DMA Request 0

IN

DRQ0

D9

DMA Acknowledge 5

OUT

DACK5/

D10

DMA Request 5

IN

DRQ5

D11

DMA Acknowledge 6

OUT

DACK6/

D12

DMA Request 6

IN

DRQ6

D13

DMA Acknowledge 7

OUT

DACK7/

D14

DMA Request 7

IN

DRQ7

D15

V 5+

D16

MASTER/

D17

GND

D18

Used with DRQ to gain control of system


Ground

IN

1.8 SATA

Function

# Pin

Ground

A+ Transmit

A Transmit

Ground

B Receive

B+ Receive

Ground

coding notch

Digital Visual Interface DVI

PIN DVI FEMALE at the Computer 24

PIN DVI FEMALE at the Computer 24+5

Name
DVI-D
(single link)

Pin

DVI-D
(dual link)

DVI-I

DVI-A

-TMDS Data2

n/c

+TMDS Data2

n/c

TMDS Data2/4 Shield

n/c

n/c

-TMDS Data4

n/c

n/c

+TMDS Data4

n/c

DDC Clock

DDC Data (all)

n/c

Vertcal sync

-TMDS Data1

n/c

+TMDS Data1

n/c

10

TMDS Data1/3 Shield

n/c

11

n/c

-TMDS Data3

n/c

12

n/c

+TMDS Data3

n/c

13

5VDC Power+

14

Ground for +5VDC

15

Hot Plug Detect

16

-TMDS Data0

n/c

17

+TMDS Data0

n/c

18

TMDS Data0/5 Shield

n/c

19

n/c

-TMDS Data5

n/c

20

n/c

+TMDS Data5

n/c

21

TMDS Clock Shield

n/c

22

+TMDS Clock

n/c

23

-TMDS Clock

n/c

24

Name
DVI-D
(single link)

DVI-D
(dual link)

Pin
DVI-I

DVI-A

n/c

Analog Red

C1

n/c

Analog Green

C2

n/c

Analog Blue

C3

n/c

Analog Horizontal Sync

C4

n/c

Analog Ground (analog R, G & B return)

C5

Media Independent Interface MII

.PIN HI-DENSITY D-SUB FEMALE at the network device 40

.PIN HI-DENSITY D-SUB MALE at the transciever 40

Description

Name

Pin

Vdc/ 3.3 Vdc 5+

MII Data Input/Output

MDIO

MII Data Clock

MDC

Rx Data

RxD

Rx Data

RxD

Rx Data

RxD

Rx Data

RxD

Rx Data Valid

Rx_DV

Rx Clock

Rx_CLK

Rx Error

Rx_ER

10

Tx Error

Tx_ER

11

Tx Clock

Tx_CLK

12

Tx Enable

Tx_EN

13

Tx Data

TxD

14

Tx Data

TxD

15

Tx Data

TxD

16

Tx Data

TxD

17

Collision

COL

18

Carrier Sense

CRS

19

Vdc/ +3.3 Vdc 5+

20

Vdc/ +3.3 Vdc 5+

21

Ground

GND

22

Ground

GND

23

Ground

GND

24

Ground

GND

25

Ground

GND

26

Ground

GND

27

Ground

GND

28

Ground

GND

29

Ground

GND

30

Ground

GND

31

Ground

GND

32

Ground

GND

33

Ground

GND

34

Ground

GND

35

Ground

GND

36

Ground

GND

37

Ground

GND

38

Ground

GND

39

Vdc/ +3.3 Vdc 5+

40

LAPTOP

MOTHERBOARD CD ROM HARD DISK RAM LCD