Documente Academic
Documente Profesional
Documente Cultură
CFAH1602X-YYH-JP
Hardware Version
Revision A
Product Pages
www.crystalfontz.com/product/1602X-YYH-JP.html
REVISION HISTORY
HARDWARE
Current hardware version: vA
DATA SHEET
2008/08/31
2007/01/31
CONTENTS
MAIN FEATURES - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 4
Module Classification Information - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 4
Ordering Information - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 5
MECHANICAL SPECIFICATIONS - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 5
Module Outline Drawing - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 6
ELECTRICAL SPECIFICATIONS - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7
System Block Diagram - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7
Driving Method - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 8
Absolute Maximum Ratings - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 8
DC Characteristics - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 9
Details of Interface Pin Functions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 10
Quick Reference for Pin Functions (Front & Back Photos) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 11
Typical VO Connections for Display Contrast - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 12
ESD (Electro-Static Discharge) Specifications - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 12
OPTICAL SPECIFICATIONS - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 13
Optical Characteristics - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 13
Optical Definitions - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 13
LED Backlight Characteristics - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 16
LCD CONTROLLER INTERFACE - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 18
Display Position DDRAM Address - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 18
Character Generator ROM (CGROM) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 19
MODULE RELIABILITY AND LONGEVITY - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 20
Module Reliability - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 20
Module Longevity (EOL / Replacement Policy) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 20
CARE AND HANDLING PRECAUTIONS - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 21
APPENDIX A: QUALITY ASSURANCE STANDARDS- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 23
APPENDIX B: APPLICATION NOTE FOR 3.3V OPERATION - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 26
APPENDIX C: SUNPLUS SPLC780D CONTROLLER DATA SHEET - - - - - - - - - - - - - - - - - - - - - - - - - - 28
LIST OF FIGURES
Figure 1. Module Outline Drawing - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 6
Figure 2. System Block Diagram - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7
Figure 3. Back View of Pins (Labeled) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 11
Figure 4. Front View of Pins (Labeled) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 11
Figure 5. Typical VO Connections - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 12
Figure 6. Definition of Operation Voltage (VOP) (Positive)- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 14
Figure 7. Definition of Response Time (Tr, Tf) (Positive) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 14
Figure 8. Definition of Horizontal and Vertical Viewing Angles (CR>2)- - - - - - - - - - - - - - - - - - - - - - - - - - 15
Figure 9. Definition of 6:00 OClock and 12:00 OClock Viewing Angles - - - - - - - - - - - - - - - - - - - - - - - - 15
Figure 10. Typical LED Backlight Connections for Always On - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 16
Figure 11. Example of LED Backlight Connections for PWM Dimming - - - - - - - - - - - - - - - - - - - - - - - - - - 17
Figure 12. Character Generator ROM (CGROM) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 19
MAIN FEATURES
16 characters by 2 lines LCD has a large display area in a compact 100.0 (W) x 38.8 (H) x 14.0 (D) millimeter package (3.94 (W) x 1.53 (H) x 0.55 (D)).
4-bit or 8-bit parallel interface.
Standard Hitachi HD44780 equivalent controller.
Yellow-green array LED backlight with STN, positive, yellow-green, transflective mode LCD (displays dark characters on yellow-green background).
Wide temperature operation: -20C to +70C.
Direct sunlight readable.
RoHS compliant.
CFA H 1 6 0 2 X - Y Y H - J P *
1 2 3 4 5
6 7 8
9 bk bl
1
2
3
4
5
6
7
8
Brand
Display Type
H Character
16 Characters
2 Lines
Model Identifier
Y LED, yellow-green
9
bk Controller
bl Special Codes
ORDERING INFORMATION
PART NUMBER
FLUID
LCD
GLASS
COLOR
IMAGE
POLARIZER
FILM
CFAH1602X-YYH-JP
STN
yellow-green
positive
transflective
BACKLIGHT
COLOR/TYPE
yellow-green LED
MECHANICAL SPECIFICATIONS
PHYSICAL CHARACTERISTICS
ITEM
SIZE
16 Characters x 2 Lines
Module Dimensions
Viewing Area
Active Area
Character Size
Character Pitch
Dot Size
Dot Pitch
Weight
50 grams (typical)
50.0
www.crystalfontz.com/products/
38.0 PCB
31.5
20.4 VA
16.0 AA
87.8
95.0
Part No.(s):
16
.83
Detail "A"
.08
.75
.08
CFAH1602X-YYH
.98
.90
16.0-1.0
P2.54x(16-1)=38.1
copyright 2008 by
10.0
2.5
100.0 PCB
Millimeters
Units:
7.76
.75
4.07
4.82
1.6
9.0
Date:
2008/01/15
CFAH1602X_master
Drawing Number:
Sheet:
1 of 1
vA
Hardware Rev.:
.50
14.0 Maximum
Dot Dimensions
(Nominal Pixel Detail)
8.26
4-2.5
34.0
Not to scale
Scale:
15.3
2.5
Tolerance is OOWPNGUUURGEKHKGF
ELECTRICAL SPECIFICATIONS
SYSTEM BLOCK DIAGRAM
/27
%QO
45
49
*&
'SWKXCNGPV
'
Z.%&
&$&$
84
--
8Q
855
$KCUCPF
8&&
2QYGT%KTEWKV
5GI
5GI
5GI&TKXGT
.'&
$CEMNKIJV
#
-
DRIVING METHOD
DRIVING METHOD
SPECIFICATION
Duty
1/16
Bias
1/5
SYMBOL
MINIMUM
MAXIMUM
Operating Temperature*
TOP
-20C
+70C
Storage Temperature*
TST
-30C
+80C
VI
VSS
VDD
VDD - VSS
-0.3v
+7v
VDD - VO
-0.3v
+13v
Input Voltage
DC CHARACTERISTICS
TYPICAL
MAXIMUM
Controller
and
Board
MINIMUM
PART
SYMBOL
5V OPERATION
VDD - VSS
+4.5v
+5.0v
+5.5v
VIH
+2.2v
VIL
VOH
VOL
DC CHARACTERISTICS
(4.5 to 5.5 volts)
Supply Voltage for Logic
Supply Current
LCD
Glass
TEST
CONDITION
without
backlight
VDD
TA = +25C
TA = +70C
+0.6v
IOH = - 0.1 mA
Pins: DB0 - DB7
+2.4v
+0.4v
IDD
IOL = 0.1 mA
Pins: DB0 - DB7
1.2 mA
TA = -20C
Supply Voltage for Driving
LCD
NOTES
+4.2v
VDD - VO
+3.8v
+3.6v
This is a summary of the modules major operating parameters. For detailed information see APPENDIX C:
SUNPLUS SPLC780D CONTROLLER DATA SHEET (Pg. 28).
For 3.3v operation, please see APPENDIX B: APPLICATION NOTE FOR 3.3V OPERATION (Pg. 26).
DIRECTION
PIN
SIGNAL
LEVEL
DESCRIPTION
VSS
0v
VDD
+5.0v
VO
variable
RS
H/L
R/W
H/L
H: Read (HostModule)
L: Write (HostModule)
H,HL
DB0
H/L
I/O
Data bit 0
DB1
H/L
I/O
Data bit 1
DB2
H/L
I/O
Data bit 2
10
DB3
H/L
I/O
Data bit 3
11
DB4
H/L
I/O
Data bit 4
12
DB5
H/L
I/O
Data bit 5
13
DB6
H/L
I/O
Data bit 6
14
DB7
H/L
I/O
Data bit 7
15
A (LED +)
16
K (LED -)
Supply voltage for LED. K (cathode or kathode for German and original
Greek spelling) or - of LED backlight
Ground
Supply voltage for logic
Supply voltage for driving LCD is VO = +1v typical at VDD = +5v
which gives a VLCD = (VDD - VO) = +4v
L: Instruction code (for write)
For backlight connections, please refer to LED Backlight Characteristics (Pg. 16).
(1) V
SS
(3) VO
(5) R/W
(7) DB0
(9) DB2
(11) DB4
(13) DB6
(15) A (LED +)
(2)VDD
(4) RS
(6) E
(8) DB1
(10) DB3
(12) DB5
(14) DB7
(16) K (LED -)
(16) K (LED -)
(14) DB7
(12) DB5
(10) DB3
(8) DB1
(6) E
(4) RS
(2) V
DD
(15) A (LED +)
(13) DB6
(11) DB4
(9) DB2
(7) DB0
(5) R/W
(3) VO
(1) VSS
VDD
VR
10 k
VLCD
VSS (Ground)
VO
VSS
We recommend allowing field adjustment of VO for all designs. The optimal value for VO will change with temperature,
variations in VDD, and viewing angle. VO will also vary module-to-module and batch-to-batch due to normal
manufacturing variations.
Ideally, adjustments to VO should be available to the end user so each user can adjust the display to the optimal contrast
for their required viewing conditions. At a minimum, your design should allow VO to be adjusted as part of your products
final test.
Although a potentiometer is shown as a typical connection, VO can be driven by your microcontroller, either by using a
DAC or a filtered PWM. Displays that require VO to be negative may need a level-shifting circuit. Please do not hesitate
to contact Crystalfontz application support for design assistance on your application.
OPTICAL SPECIFICATIONS
Contrast Ratio
LCD Response Time*
CR>2
-20
35
(H)
CR>2
-30
30
CR
MAXIMUM
(V)
TYPICAL
MINIMUM
CONDITION
ITEM
SYMBOL
OPTICAL CHARACTERISTICS
T rise
Ta = 25C
250 ms
T fall
Ta = 25C
250 ms
*Response Time: The amount of time it takes a liquid crystal cell to go from
active to inactive or back again.
OPTICAL DEFINITIONS
z Operating Voltage (VLCD): VOP
z Viewing Angle
Vertical (V): 0
Horizontal (H): 0
z Frame Frequency: 64 Hz
z Driving Waveform: 1/16 Duty, 1/5 Bias
z Ambient Temperature (Ta): 25C
Intensity
Selected Wave
100%
Non-selected Wave
CR
Maximum
CR = Lon / Loff
Vop
Selected
State
Unselected
State
Intensity
Light
Transmitted
10%
90%
100%
Light
Blocked
Tr
Tf
Tr = Rise Time
Tf = Fall Time
Figure 7. Definition of Response Time (Tr, Tf) (Positive)
Vertical
Horizontal
Eyes look up
6:00 Oclock
Bottom Viewing Angle
12:00 Oclock
Top Viewing Angle
+5v
ILED
RLIMIT
LED
Backlight
A (LED+)
K (LED-)
VLED
GND
Figure 10. Typical LED Backlight Connections for Always On
The specific RLIMIT calculation for the CFAH1602X-YYH-JP at VDD = +5v is:
RLIMIT =
5v - 4.1v
0.21 A
= 4.29 (minimum)
The backlight may be dimmed by PWM (Pulse Width Modulation). The typical range for the PWM frequency is from 100
to 300 Hz.
+5v
ILED
RLIMIT
LED
Backlight
A (LED+)
K (LED-) VLED
1K
PWM signal
from
microcontroller
IRLML2502
(typical)
GND
Backlight Characteristics
Dark dots on yellow-green background
PARAMETER
MINIMUM
MAXIMUM
210 mA
+3.8v
+4.1v
+4.4v
+10v
TYPICAL
205 cd/m2
568 nm
570 nm
575 nm
1
ROW
COLUMN
8
9 10
11
12
13
14
15
16
0 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0xA 0xB 0xC 0xD 0xE 0xF
1 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F
CGRAM
110
00012
CGRAM
210
00102
CGRAM
310
00112
CGRAM
410
01002
CGRAM
510
01012
CGRAM
610
01102
CGRAM
710
01112
CGRAM
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
810
10002
910
10012
1010
10102
1110
10112
1210
11002
1310
11012
1410
11102
01510
11112
SPECIFICATION
CLEANING
The polarizer (laminated to the glass) is soft plastic. The soft plastic is easily scratched or damaged. Be very careful
when you clean the polarizer.
z Do not clean the polarizer with liquids. Do not wipe the polarizer with any type of cloth or swab (for example, Qtips).
z Use the removable protective film to remove smudges (for example, fingerprints) and any foreign matter. If you
no longer have the protective film, use standard transparent office tape (for example, Scotch brand Crystal
Clear Tape). If the polarizer is dusty, you may carefully blow it off with clean, dry, oil-free compressed air.
OPERATION
z We do not recommend connecting this module to a PC's parallel port as an "end product. This module is not
"user friendly" and connecting them to a PC's parallel port is often difficult, frustrating, and can result in a "dead"
display due to mishandling. For more information, see our forum thread at http://www.crystalfontz.com/forum/
showthread.php?s=&threadid=3257.
z Your circuit should be designed to protect the module from ESD and power supply transients.
z Observe the operating temperature limitations: from -20C minimum to +70C maximum with minimal
fluctuations. Operation outside of these limits may shorten the life and/or harm the display.
At lower temperatures of this range, response time is delayed.
At higher temperatures of this range, display becomes dark. (You may need to adjust the contrast.)
z Operate away from dust, moisture, and direct sunlight.
COLOR DEFINITIONS
We try to describe the appearance of our LCD modules as accurately as possible. For the photos, we adjust the backlight
(if any) and contrast for optimal appearance. Actual display appearance may vary due to (1) different operating
conditions, (2) small variations of component tolerances, (3) inaccuracies of our camera, (4) color interpretation of the
photos on your monitor, and/or (5) personal differences in the perception of color.
16.0 AA
20.4 VA
ACCEPTANCE SAMPLING
DEFECT TYPE
AQL*
Major
<.65%
Minor
<1.0%
* Acceptable Quality Level: maximum allowable error rate or variation from standard
DEFECTS CLASSIFICATION
Defects are defined as:
z Major Defect: results in failure or substantially reduces usability of unit for its intended purpose
z Minor Defect: deviates from standards but is not likely to reduce usability for its intended purpose
DEFECT TYPE
MAJOR /
MINOR
ACCEPTANCE STANDARDS
CRITERIA
Electrical defects
Major
Major
Contrast adjustment
defect
Major
Blemishes or foreign
matter on display
segments
Blemish
Defect Size
Acceptable Qty
<0.30 mm
Minor
Blemishes or foreign
matter outside of display
segments
Defect Size =
(Width + Length)/2
Defect Size
Acceptable Qty
<0.15 mm
Ignore
0.15 to 0.20 mm
Length
Minor
Width
Length
0.20 to 0.25 mm
> 0.30 mm
Defect Width
Defect Length
Acceptable Qty
<0.03 mm
<3.0 mm
0.03 to 0.05
<2.0 mm
0.05 to 0.08
<2.0 mm
0.08 to 0.10
3.0 mm
>0.10
>3.0 mm
Minor
#
7
DEFECT TYPE
CRITERIA
Defect Size
Acceptable Qty
<0.20 mm
Ignore
0.20 to 0.40 mm
0.40 to 0.60 mm
>0.60 mm
Minor
D
E
MAJOR /
MINOR
Dot Size
Acceptable Qty
Minor
((A+B)/2)<0.20 mm
C>0 mm
((D+E)/2)<0.25 mm
((F+G)/2)<0.25 mm
9
10
Backlight defects
PCB defects
See
list
See
list
11
Soldering defects
Minor
3.3v
10K typical
VO
-1.2v
*
Existing
Negative
Voltage Supply
(-3v to -15v)
2. Use a 7660 CMOS switched-capacitor voltage converter or one of the many other available solutions for
creating a negative voltage from a positive supply.
3.3v
10K typical
VO
-1.2v
3.3v
7660
-3.3v
VSS
Figure 2. 7660 Switched-Capacitor Voltage Converter
3. Use the circuit in the figure below to create the voltage for VO by using a PWM (Pulse Width Modulation) output
of your microcontroller. This circuit allows the contrast to be adjusted under software control.
PWM
(7 to 10 kHz typical)
1K
0.1F
Low Vf
Schottky
VO
Low Vf
Schottky
C6
0.1F
GND
GND
Since VO is pulled up internally by the LCD controller, this circuit will produce positive (+1v) VLCD (VLCD = small,
contrast is light) for low (10%) or high (90%) duty cycles. For duty cycles near 50%, this circuit will produce negative
(-2v) levels of VO (VLCD = big, contrast is dark).
4. Replace this module with the module in this series that has an on-board negative voltage generator. (The part
number has a V at the end of it.)
3.3v = VDD
10K typical
-V LCD
Module
VO (Pin 3)
VEE (Pin 15)
-3.3v out
Appendix
DATA SHEET
SPL C7 8 0 D
16COM/40SEG Controller/Driver
Preliminary
AUG. 06, 2003
Version 0.1
SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY
CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document.
Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order.
No responsibility is assumed by
SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products
are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product
may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.
Appendix
Preliminary
SPLC780D
Table of Contents
PAGE
1. GENERAL DESCRIPTION........................................................................................................................................................................3
2. FEATURES................................................................................................................................................................................................3
3. BLOCK DIAGRAM ....................................................................................................................................................................................3
4. SIGNAL DESCRIPTIONS ..........................................................................................................................................................................4
4.1. ORDERING INFORMATION......................................................................................................................................................................4
5. FUNCTIONAL DESCRIPTIONS ................................................................................................................................................................5
5.1. OSCILLATOR ........................................................................................................................................................................................5
5.2. CONTROL AND DISPLAY INSTRUCTIONS..................................................................................................................................................5
5.3. INSTRUCTION TABLE.............................................................................................................................................................................7
5.4. 8-BIT OPERATION AND 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET)...............................................................................................8
5.5. 4-BIT OPERATION AND 8-DIGIT 1-LINE DISPLAY (USING INTERNAL RESET)...............................................................................................9
5.6. 8-BIT OPERATION AND 8-DIGIT 2-LINE DISPLAY (USING INTERNAL RESET)...............................................................................................9
5.7. RESET FUNCTION ..............................................................................................................................................................................10
5.8. DISPLAY DATA RAM (DD RAM) ..........................................................................................................................................................12
5.9. TIMING GENERATION CIRCUIT.............................................................................................................................................................12
5.10. LCD DRIVER CIRCUIT .....................................................................................................................................................................12
5.11. CHARACTER GENERATOR ROM (CG ROM) .....................................................................................................................................12
5.12. CHARACTER GENERATOR RAM (CG RAM) ......................................................................................................................................12
5.13. CURSOR /BLINK CONTROL CIRCUIT...................................................................................................................................................16
5.14. INTERFACING TO MPU.....................................................................................................................................................................16
5.15. SUPPLY V OLTAGE FOR LCD DRIVE...................................................................................................................................................16
5.16. REGISTER --- IR (INSTRUCTION REGISTER ) AND DR (DATA REGISTER)............................................................................................19
5.17. BUSY FLAG (BF) .............................................................................................................................................................................19
5.18. ADDRESS COUNTER (AC)................................................................................................................................................................19
5.19. I/O PORT CONFIGURATION ...............................................................................................................................................................19
6. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................20
6.1. A BSOLUTE MAXIMUM RATINGS............................................................................................................................................................20
6.2. DC CHARAC TERISTICS (VDD = 2.7V TO 4.5V, TA = 25)...................................................................................................................20
6.3. AC CHARACTERISTICS (VDD = 2.7V TO 4.5V, TA = 25) ...................................................................................................................21
6.4. DC CHARACTERISTICS (VDD = 4.5V TO 5.5V, TA = 25)...................................................................................................................22
6.5. AC CHARACTERISTICS (VDD = 4.5V TO 5.5V, TA = 25) ...................................................................................................................22
7. APPLICATION CIRCUITS.......................................................................................................................................................................25
7.1. R-OSCILLATOR ..................................................................................................................................................................................25
7.2. INTERFACE TO MPU...........................................................................................................................................................................25
7.3. SPLC780D A PPLICATION CIRCUIT......................................................................................................................................................26
7.4. A PPLICATIONS FOR LCD.....................................................................................................................................................................27
8. CHARACTER GENERATOR ROM .........................................................................................................................................................29
8.1. SPLC780D - 001..............................................................................................................................................................................29
9. PACKAGE/PAD LOCATIONS .................................................................................................................................................................30
9.1. PAD A SSIGNMENT AND LOCATIONS....................................................................................................................................................30
9.2. PACKAGE CONFIGURATION .................................................................................................................................................................31
9.3. PACKAGE INFORMATION ......................................................................................................................................................................32
10. DISCLAIMER...........................................................................................................................................................................................33
11. REVISION HISTORY ...............................................................................................................................................................................34
Preliminary
Appendix
SPLC780D
16COM/40SEG CONTROLLER/DRIVER
1. GENERAL DESCRIPTION
2. FEATURES
The SPLC780D
the most efficient way and the performance keeps in the highest
rank.
3. BLOCK DIAGRAM
OSC1
OSC2
VDD
5
VSS
CL1,CL2
M
Busy Flag
Character
Generator
ROM
Character
Generator
RAM
Cursor
Blink
Control
Circuit
DB0-DB3
8
DB4-DB7
RS
R/W
I/O
Data
Register
8
8
7
7
Buffer
E
Power
Supply
for LCD
Drive :
(V1-V5)
Instruction
Register
Instruction
Decorder
7
Display
Data RAM
80 Bytes
40-bit
Shift
Register
40
Latch
Circuit
40
40
Segments
x
16
16-bit 16 Commons
Shift
LCD
Register
Driver
COM1COM16
SEG1SEG40
Address
Counter
Preliminary
Appendix
SPLC780D
4. SIGNAL DESCRIPTIONS
Mnemonic
PIN No.
Type
VDD
33
Power input
VSS
23
Ground
OSC1
24
Both OSC1 and OSC2 are connected to resistor for internal oscillator circuit. For
OSC2
25
V1 - V5
Description
26 - 30
38
R/W
37
RS
36
1: Read, 0: Write.
A signal for selecting registers.
1: Data Register (for read and write)
0: Instruction Register (for write),
Busy flag - Address Counter (for read).
DB0 - DB3
39 - 42
I/O
DB4 - DB7
43 - 46
I/O
CL1
31
CL2
32
34
35
SEG1 - SEG22
22 - 1
SEG23 - SEG40
80 - 63
COM1 - COM16
47 - 62
Package Type
SPLC780D- NnnV-C
Chip form
SPLC780D- NnnV-PQ05
Preliminary
Appendix
SPLC780D
5. FUNCTIONAL DESCRIPTIONS
5.1. Oscillator
SPLC780D oscillator supports not only the internal oscillator
operation, but also the external clock operation.
S=1
I/D=1
S=1
I/D=0
RS
Code
It clears the entire display and sets Display Data RAM Address 0
in Address Counter.
5 x 8 dot
5 x 10 dot
character font
character font
8th line
Cursor
X: Do not care (0 or 1)
11th line
displayed).
display.
change.
RS
Code
S/C
R/L
I/D
I / D = 1: Increment, I / D = 0: Decrement.
S = 1: The display shift, S = 0: The display does not shift.
S/C
R/L
Description
AC = AC - 1
AC = AC + 1
AC = AC
AC = AC
Address Counter
Preliminary
Appendix
SPLC780D
DL
X: Do not care (0 or 1)
RS
N = 1: Two-line display.
Code
BF
5 x 8 dots
1/8
5 x 10 dots
1 / 11
5 x 8 dots
1 / 16
data RAM.
RS
Code
setting.
It reads data (dddddddd)2 from character generator RAM or
Counter.
Preliminary
Appendix
SPLC780D
Instruction
Execution time
Description
(fosc=270KHz)
Return Home
1.52ms
1.52ms
I/D
Set
Display ON/
38s
OFF Control
Cursor or
38s
S/C R/L
Display Shift
38s
Function Set
DL
38s
AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter.
BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 Whether during internal operation or not
38s
Address
Set DDRAM
AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in counter
38s
Address
Read Busy Flag
and Address
The
Counter
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
Write
data
into
internal
RAM
38s
internal
RAM
38s
(DDRAM/CGRAM).
RAM
Read
data
from
(DDRAM/CGRAM).
Preliminary
Appendix
SPLC780D
5.4. 8-Bit Operation and 8-Digit 1-Line Display (Using Internal Reset)
No.
Instruction
Display
Operation
Function set
Set to 8-bit operation and select 1-line display line and character font.
Display on.
Cursor appear.
It will shift the cursor to the right when writing to the DD RAM/CG RAM.
Now the display has no shift.
7
8
10
Write "
"(space).
ELCOME _
1
11
12
13
14
COMPAMY_
COMPAMY_
0
15
17
16
COMPAMY_
OMPANY_
18
19
OMPANY_
20
21
Return home
0
WELCOME_
0
:
Both the display and the cursor return to the original position (address 0).
Preliminary
Appendix
SPLC780D
5.5. 4-Bit Operation and 8-Digit 1-Line Display (Using Internal Reset)
No.
1
Instruction
Display
Operation
Power on.
Function set
Set to 4-bit operation and select 1-line display line and character font.
Display on.
_
Cursor appears.
Increase address by one.
It will shift the cursor to the right when writing to the DD RAM / CG RAM.
Now the display has no shift.
5.6. 8-Bit Operation and 8-Digit 2-Line Display (Using Internal Reset)
No.
1
Instruction
Display
Operation
Power on.
Function set
Set to 8-bit operation and select 2-line display line and 5 x 8 dot
character font.
Display on.
Cursor appear.
It will shift the cursor to the right when writing to the DD RAM /
CG RAM.
Now the display has no shift.
5
6
7
10
WELCOME
_
WELCOME
T_
WELCOME_
0
11
W_
:
Write " T ".
WELCOME
TO PART_
Preliminary
Appendix
No.
12
Instruction
Entry mode set
0
13
14
Return home
0
ELCOME
O PARTY_
Operation
WELCOME
TO PART_
15
Display
:
Both the display and the cursor return to the original position
WELCOME
TO PARTY
SPLC780D
(address 0).
[ 8-Bit Interface ]
Power On
I/D
Display off
Display clear
Initialization Ends
10
Appendix
Preliminary
SPLC780D
[ 4-Bit Interface ]
Power On
Display off
I/D
0
0
0
Display clear
Initialization Ends
11
Preliminary
Appendix
SPLC780D
Those DD RAM not used for display data can be used as general
data RAM.
01
02
03
04
05
79
80
Display position
4E
4F
Display position
00
01
02
03
04
05
06
07
When the display shift operation is performed , the display data RAM's address moves as :
( i ) Left shift
01
02
( ii ) Right shift
03
04
05
06
06
07
08
4F
00
01
02
03
04
05
06
interface, the MPU access timing and the RAM access timing are
generated independently.
12
Preliminary
Appendix
SPLC780D
CG
RAM
(1)
CG
RAM
(2)
CG
RAM
(3)
CG
RAM
(4)
CG
RAM
(5)
CG
RAM
(6)
CG
RAM
(7)
CG
RAM
(8)
CG
RAM
(1)
CG
RAM
(2)
CG
RAM
(3)
CG
RAM
(4)
CG
RAM
(5)
CG
RAM
(6)
CG
RAM
(7)
CG
RAM
(8)
13
Preliminary
Appendix
SPLC780D
The relationships between Character Generator RAM Addresses, Character Generator RAM Data (character patterns), and Character
Codes are depicted as follows:
Character Code
( DD RAM Data )
CG RAM
Address
Character Patterns
( CG RAM Data )
b7 b6 b5 b4 b3 b2 b1 b0
b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Note1:
It means that the bit0~2 of the character code correspond to the bit3~5 of the CG RAM address.
Note2:
These areas are not used for display, but can be used for the general data RAM.
Character
Pattern
Example (1)
Cursor
Position
Character
Pattern
Example (2)
Note3: When all of the bit4-7 of the character code are 0, CG RAM character patterns are selected.
Note4: " 1 ": Selected, " 0 " : No selected , " X " : Do not care (0 or 1).
Note5: For example (1), set character code (b2 = b1 = b0 = 0, b3 = 0 or 1, b7-b4 = 0) to display T .
display T character.
Note6: The bits 0-2 of the character code RAM is the character pattern line position. The 8th line is the cursor position and display is formed by logical OR
with the cursor.
14
Preliminary
Appendix
SPLC780D
Character Code
( DD RAM Data )
CG RAM
Address
Character Patterns
( CG RAM Data )
b7 b6 b5 b4 b3 b2 b1 b0
b5 b4 b3 b2 b1 b0
b7 b6 b5 b4 b3 b2 b1 b0
Note1:
It means that the bit1~2 of the character code correspond to the bit4~5 of the CG RAM address.
Note2:
These areas are not used for display, but can be used for the general data RAM.
Character
Pattern
Example (1)
Cursor
Position
Note3: When all of the bit4-7 of the character code are 0, CG RAM character patterns are selected.
Note4: " 1 : Selected, " 0 : No selected, " X : Do not care (0 or 1).
Note5: For example (1), set character code (b2 = b1 = 0, b3 = b0 = 0 or 1, b7-b4 = 0) to display U .
That means all of the character codes (00) 16, (01) 16,
15
Preliminary
Appendix
SPLC780D
When the Address Counter is (07) 16, the cursor position is shown
control circuit. The cursor or the blink appears in the digit at the
as belows:
AC
b6
b5
b4
b3
b2
b1
b0
10
Display position
00
01
02
03
04
05
06
07
08
09
In a 1-line display
digit
( Hexadecimal )
the cursor position
In a 2-line display
digit
10
1st line
00
01
02
03
04
05
06
07
08
09
2nd line
40
41
42
43
44
45
46
47
48
49
Display position
Display data RAM address
( Hexadecimal )
There are two types of data operations: 4-bit and 8-bit operations.
4-busline (DB4 to DB7). Thus, DB0 to DB3 bus lines are not
used. Using 4-bit MPU to interface 8-bit data requires two times
transferring.
Duty Factor
Supply
Voltage
1/8, 1/11
1/16
1/4
1/5
V1
(DB0 to DB7).
V2
V3
V4
V5
VDD V LCD
VDD V LCD
16
Preliminary
Appendix
SPLC780D
5.15.1. The power connections for LCD (1/4 Bias, 1/5 Bias) are shown belows:
VDD ( +5.0V )
VDD ( +5.0V )
VDD
VDD
R
V1
V1
R
V2
V2
V LCD
V LCD
V3
V3
V4
V4
R
V5
V5
VR
VR
1 / 4 Bias
1 / 5 Bias
(1/8,1/11 Duty)
(1/16 Duty)
-V or Gnd
-V or Gnd
VDD( +5.0V )
VDD( +5.0V )
VDD
VDD
R
V1
V2
V1
R
V2
R
V3
V3
R
R
C
V4
V4
R
V5
V5
VR
VR
1 / 5 Bias
1 / 4 Bias
(1/8,1/11 Duty)
(1/16 Duty)
-V or Gnd
-V or Gnd
17
Preliminary
Appendix
SPLC780D
5.15.2. The relationship between LCD frames frequency and oscillators frequency.
(Assume the oscillation frequency is 250KHz, 1 clock cycle time = 4.0s)
7 8 1 2
7 8 1 2
7 8 1 2
7 8
VPP
V1
COM1 V2(V3)
V4
VSS
1 Frame
1 Frame
10 11 1 2
10 11 1 2
VPP
V1
COM1 V2(V3)
V4
VSS
1 Frame
1 Frame
1
17.6(ms)
= 5 6. 8(Hz)
15 16 1 2
15 16 1 2
VPP
V1
COM1 V2
V3
V4
VSS
1 Frame
1 Frame
18
Preliminary
Appendix
SPLC780D
PMOS
RS
R/W
Operation
sch
NMOS
(DB0 - DB6)
DR write (DR to Display data RAM or
VDD
VDD
sch
NMOS
VDD
NMOS
VDD
PMOS
VDD
Enable
PMOS
sch
NMOS
19
Data
Preliminary
Appendix
SPLC780D
6. ELECTRICAL SPECIFICATIONS
6.1. Absolute Maximum Ratings
Characteristics
Symbol
Ratings
Operating Voltage
VDD
-0.3V to +7.0V
V LCD
V IN
Operating Temperature
TA
-30 to +80
TSTO
-55 to +125
Storage Temperature
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. For normal operational
conditions see AC/DC Electrical Characteristics.
Limit
Symbol
Min.
Typ.
Unit
Test Condition
Max.
Operating Current
IDD
0.2
0.4
mA
V IH1
0.7VDD
VDD
V IL1
-0.3
0.55
V IH2
0.7VDD
VDD
V IL2
-0.2
0.2VDD
IIH
-1.0
1.0
IIL
-5.0
-15
-30
VDD = 3.0V
V OH1
0.75VDD
V OL1
0.2VDD
V OH2
0.8VDD
V OL2
0.2VDD
RCOM
20
RSEG
30
V LCD
3.0
9.0
Output High
Voltage (TTL)
Output Low
Voltage (TTL)
Output High
Voltage (CMOS)
Output Low
Voltage (CMOS)
Driver ON Resistance
(COM)
Driver ON Resistance
(SEG)
LCD Voltage
Pin OSC1
IOH = - 0.1mA
Pins: DB0 - DB7
IOL = 0.1mA
Pins: DB0 - DB7
IOH = - 40A,
Pins: CL1, CL2, M, D
IOL = 40A, Pins:
CL1, CL2, M, D
IO = 50A, V LCD = 4.0V
Pins: COM1 - COM16
IO = 50A, V LCD = 4.0V
Pins: SEG1 - SEG40
VDD-V5, 1/4 bias or 1/5 bias
Note: F OSC = 250KHz, VDD = 3.0V, pin E = L, RS, R/W, DB0 - DB7 are open, all outputs are no loads.
20
Preliminary
Appendix
SPLC780D
6.3. AC Characteristics (VDD = 2.7V to 4.5V, T A = 25)
6.3.1. Internal clock operation
Characteristics
OSC Frequency
Limit
Symbol
FOSC1
Unit
Min.
Typ.
Max.
190
270
350
KHz
Test Condition
VDD = 3.0V, Rf = 75K2%
FOSC2
Duty Cycle
Rise/Fall Time
Limit
Symbol
t r, t f
Unit
Min.
Typ.
Max.
125
250
350
KHz
45
50
55
0.2
Test Condition
Limit
Symbol
Unit
Min.
Typ.
Max.
Test Condition
E Cycle Time
tC
1000
ns
Pin E
E Pulse Width
tPW
450
ns
Pin E
E Rise/Fall Time
tR, tF
25
ns
Pin E
tSP1
60
ns
tHD1
20
ns
tSP2
195
ns
tHD2
10
ns
Limit
Symbol
Unit
Min.
Typ.
Max.
Test Condition
E Cycle Time
tC
1000
ns
Pin E
E Pulse Width
tW
450
ns
Pin E
E Rise/Fall Time
tR, tF
25
ns
Pin E
tSP1
60
ns
tHD1
20
ns
tD
360
ns
tHD2
5.0
ns
21
Preliminary
Appendix
SPLC780D
6.4. DC Characteristics (VDD = 4.5V to 5.5V, T A = 25)
Characteristics
Limit
Symbol
Unit
Min.
Typ.
Max.
Test Condition
Operating Current
IDD
0.55
0.8
mA
V IH1
2.2
VDD
V IL1
-0.3
0.6
V IH2
VDD-1
VDD
Pin OSC1
V IL2
-0.2
1.0
Pin OSC1
IIH
-2.0
2.0
IIL
-20
-50
-100
V OH1
2.4
VDD
V OL1
0.4
V OH2
0.9VDD
VDD
V OL2
0.1VDD
RCOM
20
RSEG
30
V LCD
3.0
11
Output High
Voltage (TTL)
Output Low
Voltage (TTL)
Output High
Voltage (CMOS)
Output Low
Voltage (CMOS)
Driver ON Resistance
(COM)
Driver ON Resistance
(SEG)
LCD Voltage
IOH = - 0.1mA
Pins: DB0 - DB7
IOL = 0.1mA
Pins: DB0 - DB7
IOH = - 40A,
Pins: CL1, CL2, M, D
IOL = 40A, Pins:
CL1, CL2, M, D
IO = 50A, V LCD = 4.0V
Pins: COM1 - COM16
IO = 50A, V LCD = 4.0V
Pins: SEG1 - SEG40
VDD-V5, 1/4 bias or 1/5 bias
Note: F OSC = 250KHz, VDD = 5.0V, pin E = L, RS, R/W, DB0 - DB7 are open, all outputs are no loads.
Limit
Symbol
FOSC1
Unit
Min.
Typ.
Max.
190
270
350
KHz
Test Condition
VDD = 5.0V, Rf = 91K2%
FOSC2
Duty Cycle
Rise/Fall Time
Limit
Symbol
t r, t f
Unit
Min.
Typ.
Max.
125
250
350
KHz
45
50
55
0.2
22
Test Condition
Preliminary
Appendix
SPLC780D
6.5.3. Write mode (Writing Data from MPU to SPLC780D)
Characteristics
Limit
Symbol
Unit
Min.
Typ.
Max.
Test Condition
E Cycle Time
tC
500
ns
Pin E
E Pulse Width
tPW
230
ns
Pin E
E Rise/Fall Time
tR, tF
20
ns
Pin E
tSP1
40
ns
tHD1
10
ns
tSP2
80
ns
tHD2
10
ns
Limit
Symbol
Unit
Test Condition
Min.
Typ.
Max.
tC
500
ns
Pin E
tW
230
ns
Pin E
E Rise/Fall Time
tR, tF
20
ns
Pin E
tSP1
40
ns
tHD1
10
ns
tD
120
ns
tHD2
5.0
ns
Limit
Symbol
Unit
Min.
Typ.
Max.
Test Condition
tPWH
800
ns
tPWL
800
ns
tCSP
500
ns
tDSP
300
ns
Pins: D
tHD
300
ns
Pins: D
M delay time
tD
-1000
1000
ns
Pins: M
23
Preliminary
Appendix
SPLC780D
6.5.6. Write mode timing diagram (Writing Data from MPU to SPLC780D)
VI H 1
VIL1
tSP1
RS
R/W
V IH1
V IL1
tHD1
V IL1
VIL1
t PW
t F tHD1
V IH1
V IL1
V IH1
V IL1
V IL1
tSP2
tR
V IH1
V IL1
DB7 - 0
t HD2
VIH1
VIL1
Valid Data
tC
6.5.7. Read mode timing diagram (Reading Data from SPLC780D to MPU)
RS
R/W
VIH1
VIL1
tS P 1
V IH1
V IL1
tHD1
VIH1
VIH1
tPW
t F tHD1
V IH1
V IL1
tR
DB0 - DB7
V IH1
V IL1
tD
V IH1
V IL1
VIL1
tHD2
Valid Data
V IH1
V IL1
tC
CL1
0.9VDD
0.9VDD
tPWH
t PWH
CL2
0.9VDD
t CSP
0.1VDD
0.1VDD
tCSP
t PWL
0.9VDD
0.1VDD
0.9VDD
0.1VDD
t DSP
t HD
0.1VDD
tD
24
Preliminary
Appendix
SPLC780D
7. APPLICATION CIRCUITS
7.1. R-Oscillator
The oscillation resistor Rf is used only for the internal oscillator operation mode.
OSC1
OSC2
Since the oscillation frequency varies depending on the OSC1 and OSC2
pin capacitance, the wiring length to these pins should be minimized.
600
Fosc ( KHz )
Fosc ( KHz )
400
270
200
75
100
200
300
400
270
200
400
91
100
Rosc ( Kohms )
200
300
400
Rosc ( Kohms )
VDD = 3.0V
VDD = 5.0V
PA0
|
PA7
COM1
|
COM16
DB0
|
DB7
LCD PANEL
16
16 COMMONS
6805
SPLC780D
X
PB0
PB1
PB2
RS
SEG1
|
SEG40
R/W
40
40 SEGMENTS
D0
|
D7
Z80
A1
|
A7
A0
IORQ
WR
DB0
|
DB7
7
E
COM1
|
COM16
16
LCD PANEL
16 COMMONS
SPLC780D
SEG1
|
SEG40
RS
X
40
40 SEGMENTS
R/W
25
Preliminary
Appendix
SPLC780D
16
(8)
40
40
SEG40
|
SEG1
COM16 (COM8)
|
COM1
Y1-Y40
DL1
VDD
FCS
SHL1
SHL2
GND
VEE
40
SPLC100A1
SPLC100A1
40
SPLC100A1
CL1
CL2
M
Y1-Y40
DL1
DR2
VDD
DL2
FCS
DR1
SHL1
CL1
SHL2
CL2
GND
M
VEE
Y1-Y40
DL1
DR2
VDD
DL2
FCS
DR1
SHL1
CL1
SHL2
CL2
GND
M
VEE
V1V2V3V4V5V6
V1V2V3 V4V5V6
V1V2V3V4V5V6
DR2
DL2
DR1
VDD
GND
CL1
CL2
M
V1
V2
V3
V4
V5
SPLC780D
R
VDD ( +5V )
R
C
R
C
R
C
R
C
VR
C
26
-V or Gnd
Appendix
Preliminary
SPLC780D
SPLC780D
COM1
LCD Panel
8 characters x 1 line
COM8
SEG1
SEG40
( Example 1 ) : 5 x 8 dots , 8 characters x 1 line [ 1 / 4 Bias , 1 / 8 Duty ]
SPLC780D
COM1
LCD Panel
8 characters x 1 line
COM11
SEG1
SEG40
( Example 2 ) : 5 x 10 dots , 8 characters x 1 line [ 1 / 4 Bias , 1 / 11 Duty ]
SPLC780D
COM1
LCD Panel
8 characters x 2 lines
COM8
COM9
COM16
SEG1
SEG40
( Example 3 ) : 5 x 8 dots , 8 characters x 2 lines [ 1 / 5 Bias , 1 / 16 Duty ]
27
Appendix
Preliminary
SPLC780D
SPLC780D
COM1
COM8
SEG1
SEG40
COM9
COM16
( Example 4 ) : 5 x 8 dots , 16 characters x 1 line [ 1 / 5 Bias , 1 / 16 Duty ]
SPLC780D
SEG1
SEG20
COM1
LCD Panel
COM8
4 characters x 2 lines
SEG21
SEG40
( Example 5 ) : 5 x 8 dots , 4 characters x 2 lines [ 1 / 4 Bias , 1 / 8 Duty ]
28
Appendix
Preliminary
SPLC780D
29
Appendix
Preliminary
SPLC780D
9. PACKAGE/PAD LOCATIONS
9.1. PAD Assignment and Locations
Please contact Sunplus sales representatives for more information.
30
Preliminary
Appendix
SPLC780D
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
SEG38
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
SEG22
64
SEG39
SEG21
63
SEG40
SEG20
62
COM16
SEG19
61
COM15
SEG18
60
COM14
SEG17
59
COM13
SEG16
58
COM12
SEG15
57
COM11
SEG14
56
COM10
SEG13
10
55
COM9
SEG12
11
54
COM8
53
COM7
52
COM6
51
COM5
COM4
SEG11
12
SEG10
13
SEG09
14
SPLC780DXXX
24
41
DB2
40
OSC1
DB1
DB3
39
42
DB0
23
38
VSS
DB4
37
DB5
43
R/W
44
22
36
21
SEG01
RS
SEG02
35
DB6
45
34
20
SEG03
33
DB7
VDD
46
32
19
CL2
SEG04
31
COM1
CL1
47
30
18
V5
SEG05
29
COM2
V4
48
28
17
V3
SEG06
27
COM3
26
49
V2
16
V1
SEG07
25
15
OSC2
SEG08
50
31
Preliminary
Appendix
SPLC780D
Unit: Millimeter
D
D1
SUNPLUS
SPLC780D
YYWW
E1
A2
c
L1
Symbol
Min.
A1
Nom.
Max.
Unit
23.20 REF
Millimeter
D1
20.00 REF
Millimeter
17.20 REF
Millimeter
E1
14.00 REF
Millimeter
0.80 REF
Millimeter
0.30
0.35
0.45
Millimeter
3.40
Millimeter
A1
0.25
Millimeter
A2
2.50
2.72
2.90
Millimeter
0.11
0.15
0.23
Millimeter
L1
1.60 REF
32
Millimeter
Appendix
Preliminary
SPLC780D
10. DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of
sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or
regarding the freedom of the described chip(s) from patent infringement.
MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. SUNPLUS reserves the right to halt production or alter the specifications and
prices at any time without notice.
Accordingly, the reader is cautioned to verify that the data sheets and other information in this
Products described herein are intended for use in normal commercial applications.
Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are
specifically not recommended without additional processing by SUNPLUS for such applications. Please note that application circuits
illustrated in this document are for reference purposes only.
33
Appendix
Preliminary
SPLC780D
Revision #
0.1
Description
Original
Page
34
34