Binary Numbers

Binary Numbers
In electronics, binary numbers are the flow of information in the form of zeros and ones
used by digital computers and systems. Unlike a linear, or analogue circuits, such as AC
amplifiers, which process signals that are constantly changing from one value to another, for
example amplitude or frequency, digital circuits process signals that contain just two voltage
levels or states, labelled, Logic 0 and Logic 1.
Generally, a logic 1 represents a higher voltage, such as 5 volts, which is commonly
referred to as a HIGH value, while a logic 0 represents a low voltage, such as 0 volts or
ground, and is commonly referred to as a LOW value. These two discrete voltage levels
representing the digital values of 1s (ones) and 0s (zeros) are commonly called:
BInary digiTS, and in digital and computational circuits and applications they are normally
referred to as binary BITS.

Binary Bits of Zeros and Ones

Because there are only two valid Boolean values for representing either a logic 1 or a logic
0, makes the system of using Binary Numbers ideal for use in digital or electronic circuits
and systems.
The binary number system is a Base-2 numbering system which follows the same set of rules
in mathematics as the commonly used decimal or base-10 number system. So instead of
powers of ten, ( 10n ) for example: 1, 10, 100, 1000 etc, binary numbers use powers of two,
( 2n ) effectively doubling the value of each successive bit as it goes, for example: 1, 2, 4, 8,
16, 32 etc.
The voltages used to represent a digital circuit can be of any value, but generally in digital
and computer systems they are kept well below 10 volts. In digital systems theses voltages
are called logic levels and ideally one voltage level represents a HIGH state, while
another different and lower voltage level represents a LOW state. A binary number system
uses both of these two states.
Digital waveforms or signals consist of discrete or distinctive voltage levels that are changing
back and forth between these two HIGH and LOW states. But what makes a signal or
voltage Digital and how can we represent these HIGH and LOW voltage levels.
Electronic circuits and systems can be divided into two main categories.

Analogue Circuits Analogue or Linear circuits amplify or respond to continuously

varying voltage levels that can alternate between a positive and negative value over a
period of time.

Digital Circuits Digital circuits produce or respond too two distinct positive or
negative voltage levels representing either a logic level 1 or a logic level 0.

Analogue Voltage Output

A simple example of the differences between an analogue (or analog) circuit and a digital
circuit are shown below:

Analogue Voltage Output Representation

This is an analogue circuit. The output from the potentiometer varies as the wiper terminal is
rotated producing an infinite number of output voltage points between 0 volts and Vmax. The
output voltage can vary either slowly or rapidly from one value to the next so there is no
sudden or step change between two voltage levels thereby producing a continuously variable
output voltage. Examples of analogue signals include temperature, pressure, liquid levels and
light intensity.

Digital Voltage Output

In this digital circuit example, the potentiometer wiper has been replaced by a single rotary
switch which is connected in turn to each junction of the series resistor chain, forming a basic
potential divider network. As the switch is rotated from one position (or node) to the next the
output voltage, Vout changes quickly in discrete and distinctive voltage levels representing
multiples of 1.0 volts on each switching action or step, as shown in the output graph.
So for example, the output voltage will be 2 volts, 3 volts, 5 volts, etc. but NOT 2.5V, 3.1V or
4.6V. Finer output voltage levels could easily be produced by using a multi-positional switch
and increasing the number of resistive elements within the potential divider network,
therefore increasing the number of discrete switching steps.

Digital Voltage Output Representation

Then we can see that the major difference between an analogue signal or quantity and a
digital quantity is that an Analogue quantity is continuously changing over time while a
Digital quantity has discrete (step by step) values. LOW to HIGH or HIGH to
LOW.
A good example of this would be a light dimmer in your house that varies the lights intensity
(brightness) up or down as it is rotated between fully-ON (maximum brightness) and fullyOFF, producing an analogue output that varies continuously. While on the other hand, with a
standard wall mounted light switch, the light is either ON (HIGH) or it is OFF (LOW)
when the switch is operated. The result is that there is no in between producing a form of
ON-OFF digital output.
Some circuits combine both analogue and digital signals such as an analogue to digital
converter (ADC) or a digital to analogue converter (DAC). Either way, the digital input or
output signal represents a binary number value equivalent of an analogue signal.

Digital Logic Levels

In all electronic and computer circuits, only two logic levels are allowed to represent a single
state. These levels are referred to as a logic 1 or a logic 0, HIGH or LOW, True or False, ON
or OFF. Most logic systems use positive logic, in which case a logic 0 is represented by
zero volts and a logic 1 is represented by a higher voltage. For example, +5 volts for TTL
logic as shown.

Digital Value Representation

First State
Logic 0

Second State
Logic 1

LOW
FALSE
Low Level Voltage Output
0V or Ground

HIGH
TRUE
High Level Voltage Output
+5 Volts

Generally the switching from one voltage level, 0 to 1 or 1 to 0 is made as quickly as

possible to prevent miss switching of the logic circuit. In standard TTL (transistor-transistorlogic) ICs there is a pre-defined range of input and output voltage limits for defining what
exactly is a logic 1 value and what is a logic 0 value as shown below.

TTL Input & Output Voltage Levels

Then, when using a +5 volt supply any voltage input between 2.0v and 5v is recognised as a
logic 1 value and any voltage input of below 0.8v is recognised as a logic 0 value. While
the output of a logic gate between 2.7v and 5v represents a logic 1 value and a voltage
output below 0.4v represents a logic 0 value. This is called positive logic and is used in
these digital logic tutorials.
Then binary numbers are commonly used in digital and computer circuits and are represented
by either a logic 0 or a logic 1. Binary numbering systems are best suited to the digital
signal coding of binary, as it uses only two digits, one and zero, to form different figures. So

in this section about Binary Numbers we will look at how to convert decimal or base-10
numbers into octal numbers, hexadecimal numbers, and binary numbers.
So in the next tutorial about Binary Numbers and the binary number
system we will look at converting decimal numbers into binary numbers
and vice versa and introduce the concept of thBinary to Decimal Conversion

How to Convert Binary to Decimal

Conversion of binary to decimal (base-2 to base-10) numbers and back is an important
concept to understand as the binary numbering system forms the basis for all computer and
digital systems. The decimal or denary counting system uses the Base-of-10 numbering
system where each digit in a number takes on one of ten possible values, called digits, from
0 to 9, eg. 21310 (Two Hundred and Thirteen).
But as well as having 10 digits ( 0 through 9 ), the decimal numbering system also has the
operations of addition ( + ), subtraction ( ), multiplication ( ) and division ( ).
In a decimal system each digit has a value ten times greater than its previous number and this
decimal numbering system uses a set of symbols, b, together with a base, q, to determine the
weight of each digit within a number. For example, the six in sixty has a lower weighting
than the six in six hundred. Then in a binary numbering system we need some way of
converting Decimal to Binary as well as back from Binary to Decimal.
Any numbering system can be summarised by the following relationship:
N = bi qi
where:

N is a real positive number

b is the digit
q is the base value
and integer (i) can be positive, negative or zero

N = bn qn b3 q3 + b2 q2 + b1 q1 + b0 q0 + b-1 q-1 + b-2 q-2 etc.

The Decimal Numbering System

In the decimal, base-10 (den) or denary numbering system, each integer number column has
values of units, tens, hundreds, thousands, etc as we move along the number from right to
left. Mathematically these values are written as 100, 101, 102, 103 etc. Then each position to
the left of the decimal point indicates an increased positive power of 10. Likewise, for
fractional numbers the weight of the number becomes more negative as we move from left to
right, 10-1, 10-2, 10-3 etc.
So we can see that the decimal numbering system has a base of 10 or modulo-10
(sometimes called MOD-10) with the position of each digit in the decimal system indicating
the magnitude or weight of that digit as q is equal to 10 (0 through 9). For example, 20

(twenty) is the same as saying 2 x 101 and therefore 400 (four hundred) is the same as saying
4 x 102.
The value of any decimal number will be equal to the sum of its digits multiplied by their
respective weights. For example: N = 616310 (Six Thousand One Hundred and Sixty Three)
in a decimal format is equal to:
6000 + 100 + 60 + 3 = 6163
or it can be written reflecting the weight of each digit as:
( 61000 ) + ( 1100 ) + ( 610 ) + ( 31 ) = 6163
or it can be written in polynomial form as:
( 6103 ) + ( 1102 ) + ( 6101 ) + ( 3100 ) = 6163

Where in this decimal numbering system example, the left most digit is the most significant
digit, or MSD, and the right most digit is the least significant digit or LSD. In other words,
the digit 6 is the MSD since its left most position carries the most weight, and the number 3 is
the LSD as its right most position carries the least weight.

The Binary Numbering System

The Binary Numbering System is the most fundamental numbering system in all digital and
computer based systems and binary numbers follow the same set of rules as the decimal
numbering system. But unlike the decimal system which uses powers of ten, the binary
numbering system works on powers of two giving a binary to decimal conversion from base2 to base-10.
Digital logic and computer systems use just two values or states to represent a condition, a
logic level 1 or a logic level 0, and each 0 and 1 is considered to be a single digit in a
Base-of-2 (bi) or binary numbering system.
In the binary numbering system, a binary number such as 101100101 is expressed with a
string of 1s and 0s with each digit along the string from right to left having a value
twice that of the previous digit. But as it is a binary digit it can only have a value of either 1
or 0 therefore, q is equal to 2 (0 or 1) with its position indicating its weight within the
string.
As the decimal number is a weighted number, converting from decimal to binary (base 10 to
base 2) will also produce a weighted binary number with the right-hand most bit being the
Least Significant Bit or LSB, and the left-hand most bit being the Most Significant Bit or
MSB, and we can represent this as:

Representation of a Binary Number

MSB
28
256

Binary Digit
27
26
128
64

25
32

24
16

23
8

22
4

LSB
20
1

21
2

We saw above that in the decimal number system, the weight of each digit to the left
increases by a factor of 10. In the binary number system, the weight of each digit increases by
a factor of 2 as shown. Then the first digit has a weight of 1 ( 20 ), the second digit has a
weight of 2 ( 21 ), the third a weight of 4 ( 22 ), the fourth a weight of 8 ( 23 ) and so on.
So for example, converting a Binary to Decimal number would be:
Decimal Digit Value
Binary Digit Value

256
1

128
0

64
1

32
1

16
0

8
0

4
1

2
0

1
1

By adding together ALL the decimal number values from right to left at the positions that are
represented by a 1 gives us: (256) + (64) + (32) + (4) + (1) = 35710 or three hundred and
fifty seven as a decimal number.
Then, we can convert binary to decimal by finding the decimal equivalent of the binary array
of digits 1011001012 and expanding the binary digits into a series with a base of 2 giving an
equivalent of 35710 in decimal or denary.

Repeated Division-by-2 Method

We have seen above how to convert binary to decimal numbers, but how do we convert a
decimal number into a binary number. An easy method of converting decimal to binary
number equivalents is to write down the decimal number and to continually divide-by-2 (two)
to give a result and a remainder of either a 1 or a 0 until the final result equals zero.
So for example. Convert the decimal number 29410 into its binary number equivalent.
Number 294
divide by 2
result 147
divide by 2
result 73
divide by 2
result 36
divide by 2
result 18
divide by 2
result 9
divide by 2
result 4
divide by 2
result 2

remainder

0 (LSB)

remainder

remainder

remainder

remainder

remainder

remainder

Dividing each decimal number by 2 as

shown will give a result plus a remainder.
If the decimal number being divided is
even then the result will be whole and the
remainder will be equal to 0. If the
decimal number is odd then the result
will not divide completely and the
remainder will be a 1.
The binary result is obtained by placing
all the remainders in order with the least
significant bit (LSB) being at the top and
the most significant bit (MSB) being at

divide by 2
result 1

remainder

result 0

remainder

1 (MSB)

divide by 2
the bottom.

This divide-by-2 decimal to binary conversion technique gives the decimal number 29410 an
equivalent of 1001001102 in binary, reading from right to left. This divide-by-2 method will
also work for conversion to other number bases.
Then we can see that the main characteristics of a Binary Numbering System is that each
binary digit or bit has a value of either 1 or 0 with each bit having a weight or value
double that of its previous bit starting from the lowest or least significant bit (LSB) and this is
called the sum-of-weights method.
So we can convert a decimal number into a binary number either by using the sum-of-weights
method or by using the repeated division-by-2 method, and convert binary to decimal by
finding its sum-of-weights.

Binary Number Names & Prefixes

Binary numbers can be added together and subtracted just like decimal numbers with the
result being combined into one of several size ranges depending upon the number of bits
being used. Binary numbers come in three basic forms a bit, a byte and a word, where a bit
is a single binary digit, a byte is eight binary digits, and a word is 16 binary digits.
The classification of individual bits into larger groups are generally referred to by the
following more common names of:
Number of Binary Digits (bits)
1
4
8
16
32
64

Common Name
Bit
Nibble
Byte
Word
Double Word
Quad Word

Also, when converting from Binary to Decimal or even from Decimal to Binary, we need to
be careful that we do not mix up the two sets of numbers. For example, if we write the digits
10 on the page it could mean the number ten if we assume it to be a decimal number, or it
could equally be a 1 and a 0 together in binary, which is equal to the number two in the
weighted decimal format from above.
One way to overcome this problem when converting binary to decimal numbers and to
identify whether the digits or numbers being used are decimal or binary is to write a small
number called a subscript after the last digit to show the base of the number system being
used.

So for example, if we were using a binary number string we would add the subscript 2 to
denote a base-2 number so the number would be written as 102. Likewise, if it was a standard
decimal number we would add the subscript 10 to denote a base-10 number so the number
would be written as 1010.
Today, as micro-controller or microprocessor systems become increasingly larger, the
individual binary digits (bits) are now grouped together into 8s to form a single BYTE with
most computer hardware such as hard drives and memory modules commonly indicate their
size in Megabytes or even Gigabytes.
Number of Bytes
1,024 (210)
1,048,576 (220)
1,073,741,824 (230)
a very long number! (240)

Common Name
kilobyte (kb)
Megabyte (Mb)
Gigabyte (Gb)
Terabyte (Tb)

Binary to Decimal Summary

A BIT is the abbreviated term derived from BInary digiT

A Binary system has only two states, Logic 0 and Logic 1 giving a base of 2

A Decimal system uses 10 different digits, 0 to 9 giving it a base of 10

A Binary number is a weighted number whos weighted value increases from right to
left

The weight of a binary digit doubles from right to left

A decimal number can be converted to a binary number by using the sum-of-weights

method or the repeated division-by-2 method

When we convert numbers from binary to decimal, or decimal to binary, subscripts

are used to avoid errors

Converting binary to decimal (base-2 to base-10) or decimal to Binary Numbers (base10 to

base-2) can be done in a number of different ways as shown above. When converting decimal
numbers to binary numbers it is important to remember which is the least significant bit
(LSB), and which is the most significant bit (MSB).
In the next tutorial about Binary Logic we will look at converting binary numbers into
Hexadecimal Numbers and vice versa and show that binary numbers can be represented by
letters as well as numbers.
e Byte and the Word to represent the parts of a much larger binary number.

Hexadecimal Numbers
Hexadecimal Numbering System
The one main disadvantage of binary numbers is that the binary string equivalent of a large
decimal base-10 number can be quite long. When working with large digital systems, such as
computers, it is common to find binary numbers consisting of 8, 16 and even 32 digits which
makes it difficult to both read or write without producing errors especially when working
with lots of 16 or 32-bit binary numbers.
One common way of overcoming this problem is to arrange the binary numbers into groups
or sets of four bits (4-bits). These groups of 4-bits uses another type of numbering system
also commonly used in computer and digital systems called Hexadecimal Numbers.

Hexadecimal Number String

The Hexadecimal or simply Hex numbering system uses the Base of 16 system and are a
popular choice for representing long binary values because their format is quite compact and
much easier to understand compared to the long binary strings of 1s and 0s.
Being a Base-16 system, the hexadecimal numbering system therefore uses 16 (sixteen)
different digits with a combination of numbers from 0 through to 15. In other words, there are
16 possible digit symbols.
However, there is a potential problem with using this method of digit notation caused by the
fact that the decimal numerals of 10, 11, 12, 13, 14 and 15 are normally written using two
adjacent symbols. For example, if we write 10 in hexadecimal, do we mean the decimal
number ten, or the binary number of two (1 + 0). To get around this tricky problem
hexadecimal numbers that identify the values of ten, eleven, . . . , fifteen are replaced with
capital letters of A, B, C, D, E and F respectively.
Then in the Hexadecimal Numbering System we use the numbers from 0 to 9 and the
capital letters A to F to represent its Binary or Decimal number equivalent, starting with the
least significant digit at the right hand side.
As we have just said, binary strings can be quite long and difficult to read, but we can make
life easier by splitting these large binary numbers up into even groups to make them much
easier to write down and understand. For example, the following group of binary digits

1101 0101 1100 11112 are much easier to read and understand
than 11010101110011112 when they are all bunched up together.
In the everyday use of the decimal numbering system we use groups of three digits or 000s
from the right hand side to make a very large number such as a million or trillion, easier for
us to understand and the same is also true in digital systems.
Hexadecimal Numbers is a more complex system than using just binary or decimal and is
mainly used when dealing with computers and memory address locations. By dividing a
binary number up into groups of 4 bits, each group or set of 4 digits can now have a possible
value of between 0000 (0) and 1111 ( 8+4+2+1 = 15 ) giving a total of 16 different
number combinations from 0 to 15. Dont forget that 0 is also a valid digit.
We remember from our first tutorial about Binary Numbers that a 4-bit group of digits is
called a nibble and as 4-bits are also required to produce a hexadecimal number, a hex digit
can also be thought of as a nibble, or half-a-byte. Then two hexadecimal numbers are
required to produce one full byte ranging from 00 to FF.
Also, since 16 in the decimal system is the fourth power of 2 ( or 24 ), there is a direct
relationship between the numbers 2 and 16 so one hex digit has a value equal to four binary
digits so now q is equal to 16.
Because of this relationship, four digits in a binary number can be represented with a single
hexadecimal digit. This makes conversion between binary and hexadecimal numbers very
easy, and hexadecimal can be used to write large binary numbers with much fewer digits.
The numbers 0 to 9 are still used as in the original decimal system, but the numbers from 10
to 15 are now represented by capital letters of the alphabet from A to F inclusive and the
relationship between decimal, binary and hexadecimal is given below.

Hexadecimal Numbers
Decimal Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14

4-bit Binary Number

0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110

Hexadecimal Number
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E

15
1111
16
0001 0000
17
0001 0001
Continuing upwards in groups of four

F
10 (1+0)
11 (1+1)

Using the original binary number from above 1101 0101 1100 11112 this can now be
converted into an equivalent hexadecimal number of D5CF which is much easier to read and
understand than a long row of 1s and 0s that we had before.
So by using hexadecimal notation, the numbers can be written with fewer digits and much
less likelihood of an error occurring. Similarly, converting hexadecimal based numbers back
into binary is simply the reverse operation.
Then the main characteristics of a Hexadecimal Numbering System is that there are 16
distinct counting digits from 0 to F with each digit having a weight or value of 16 starting
from the least significant bit (LSB). In order to distinguish Hexadecimal numbers from
Denary numbers, a prefix of either a #, (Hash) or a $ (Dollar sign) is used before the
actual Hexadecimal Number value, #D5CF or $D5CF.
As the base of a hexadecimal system is 16, which also represents the number of individual
symbols used in the system, the subscript 16 is used to identify a number expressed in
hexadecimal. For example, the previous hexadecimal number is expressed as: D5CF16

Counting using Hexadecimal Numbers

So we now know how to convert 4 binary digits into a hexadecimal number. But what if we
had more than 4 binary digits how would we count in hexadecimal beyond the final letter F.
The simple answer is to start over again with another set of 4 bits as follows.
0to9, A,B,C,D,E,F, 10to19, 1A, 1B, 1C, 1D, 1E, 1F, 20, 21.etc
Do not get confused, 10 or 20 is NOT ten or twenty it is 1 + 0 and 2 + 0 in hexadecimal. In
fact twenty does not even exist in hex. With two hexadecimal numbers we can count up to FF
which is equal to decimal 255. Likewise, to count higher than FF we would add a third
hexadecimal digit to the left so the first 3-bit hexadecimal number would be 10016, (25610) and
the last would be FFF16, (409510). The maximum 4-digit hexadecimal number is FFFF16 which
is equal to 65,535 in decimal and so on.

Representation of a Hexadecimal Number

MSB
168
4.3G

Hexadecimal Number
167
166
165
2.6G
16M
1M

164
65k

163
4k

162
256

161
16

LSB
160
1

This adding of additional hexadecimal digits to convert both decimal and binary numbers into
an Hexadecimal Number is very easy if there are 4, 8, 12 or 16 binary digits to convert. But
we can also add zeros to the left of the most significant bit, the MSB if the number of binary
bits is not a multiple of four.

For example, 110010110110012 is a fourteen bit binary number that is to large for just three
hexadecimal digits only, yet too small for a four hexadecimal number. The answer is to ADD
additional zeros to the left most bit until we have a complete four bit binary number or
multiples thereof.

Adding of Additional 0s to a Binary Number

Binary Number

0011 0010 1101 1001

Hexadecimal Number 3

The main advantage of a Hexadecimal Number is that it is very compact and by using a
base of 16 means that the number of digits used to represent a given number is usually less
than in binary or decimal. Also, it is quick and easy to convert between hexadecimal numbers
and binary.

Hexadecimal Numbers Example No1

Convert the following Binary number 1110 10102 into its Hexadecimal number equivalent.
Binary Number = 111010102
Group the bits into fours starting from the right hand side

= 1110

1010

= 14

10

(in decimal)

=E

(in Hex)

Then, the hexadecimal equivalent of the binary number

1110 10102 is #EA16

Hexadecimal Numbers Example No2

Convert the following Hexadecimal number #3FA716 into its Binary equivalent, and also into
its Decimal or Denary equivalent using subscripts to identify each numbering system.
#3FA716
= 0011 1111 1010 01112
= (8192 + 4096 + 2048 + 1024 + 512 + 256 + 128 + 32 + 4 + 2 + 1)
= 16,29510

Then, the Decimal number of 16,295 can be represented as:#3FA716 in Hexadecimal

or
0011 1111 1010 01112 in Binary.

Hexadecimal Numbers Summary

Then to summarise. The Hexadecimal, or Hex, numbering system is commonly used in
computer and digital systems to reduce large strings of binary numbers into a sets of four
digits for us to easily understand. The word Hexadecimal means sixteen because this type
of digital numbering system uses 16 different digits from 0-to-9, and A-to-F.
To convert binary numbers into hexadecimal numbers we must first divide the binary number
up into a 4-bit binary word which can have any value from 010 ( 00002 ) to 1510 ( 11112 )
representing the hexadecimal equivalent of 0 through to F.
In the next tutorial about Binary Logic we will look at converting strings of binary numbers
into another digital numbering system called Octal Numbers and vice versa.

Octal Number System

The Octal Numbering System
The Octal Number System is another type of computer and digital base number system. The
Octal Numbering System is very similar in principle to the previous hexadecimal
numbering system except that in Octal, a binary number is divided up into groups of only 3
bits, with each group or set of bits having a distinct value of between 000 (0) and 111 ( 4+2+1
= 7 ).
Octal numbers therefore have a range of just 8 digits, (0, 1, 2, 3, 4, 5, 6, 7) making them a
Base-8 numbering system and therefore, q is equal to 8.
Then the main characteristics of an Octal Numbering System is that there are only 8 distinct
counting digits from 0 to 7 with each digit having a weight or value of just 8 starting from the
least significant bit (LSB). In the earlier days of computing, octal numbers and the octal
numbering system was very popular for counting inputs and outputs because as it works in
counts of eight, inputs and outputs were in counts of eight, a byte at a time.
As the base of an Octal Numbers system is 8 (base-8), which also represents the number of
individual numbers used in the system, the subscript 8 is used to identify a number expressed
in octal. For example, an octal number is expressed as: 2378

Just like the hexadecimal system, the octal number system provides a convenient way of
converting large binary numbers into more compact and smaller groups. However, these days
the octal numbering system is used less frequently than the more popular hexadecimal
numbering system and has almost disappeared as a digital base number system.

Representation of an Octal Number

MSB
88
16M

Octal Number
87
86
2M
262k

8
32k

8
4k

8
512

8
64

8
8

LSB
80
1

As the octal number system uses only eight digits (0 through 7) there are no numbers or
letters used above 8, but the conversion from decimal to octal and binary to octal follows the
same pattern as we have seen previously for hexadecimal.
To count above 7 in octal we need to add another column and start over again in a similar
way to hexadecimal.
0, 1, 2, 3, 4, 5, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 20, 21.etc
Again do not get confused, 10 or 20 is NOT ten or twenty it is 1 + 0 and 2 + 0 in octal
exactly the same as for hexadecimal. The relationship between binary and octal numbers is
given below.

Octal Numbers
Decimal Number
3-bit Binary Number
0
000
1
001
2
010
3
011
4
100
5
101
6
110
7
111
8
001 000
9
001 001
Continuing upwards in groups of three

Octal Number
0
1
2
3
4
5
6
7
10 (1+0)
11 (1+1)

Then we can see that 1 octal number or digit is equivalent to 3 bits, and with two octal
number, 778 we can count up to 63 in decimal, with three octal numbers, 7778 up to 511 in
decimal and with four octal numbers, 77778 up to 4095 in decimal and so on.

Octal Numbers Example No1

Using our previous binary number of 11010101110011112 convert this binary number to its
octal equivalent, (base-2 to base-8).

001101010111001111

Binary Digit Value

Group the bits into threes starting

001 101 010 111 001 111

from the right hand side

1 5 2 7 1 78

Octal Number form

Thus, 0011010101110011112 in its Binary form is equivalent to 1527178 in Octal form or

54,735 in denary.

Octal Numbers Example No2

Convert the octal number 23228 to its decimal number equivalent, (base-8 to base-10).
Octal Digit Value

23228

In polynomial form

= ( 283 ) + ( 382 ) + ( 281 ) + ( 280 )

Add the results

= ( 1024 ) + ( 192 ) + ( 16 ) + ( 2 )

Decimal number form equals: 123410

Then, converting octal to decimal shows that 23228 in its Octal form is equivalent to 123410
in its Decimal form.
While Octal is another type of digital numbering system, it is little used these days instead
the more commonly used Hexadecimal Numbering System is used as it is more flexible.

Binary Numbers Tutorial

Binary Numbers Tutorial Summary
There are different numbering systems used in digital electronic circuits and computers.
However, the numbering system used in one type of circuit may be different to that of another
type of circuit, for example, the memory of a computer would use hexadecimal numbers
while the keyboard uses decimal numbers.
Then the conversion from one number system to another is very important with the four main
forms of arithmetic being.

Decimal The decimal numbering system has a base of 10 (MOD-10) and uses the
digits from 0 through 9 to represent a decimal number value.

Binary The binary numbering system has a base of 2 (MOD-2) and uses only two
digits a 0 and a 1 to represent a binary number value.

Octal The octal numbering system has a base of 8 (MOD-8) and uses 8 digits
between 0 and 7 to represent an octal number value.

Hexadecimal The Hexadecimal numbering system has a base of 16 (MOD-16) and

uses a total of 16 numeric and alphabetic characters to represent a number value.
Hexadecimal numbers consist of digits 0 through 9 and letters A to F.

Long binary numbers are difficult to both read or write and are generally converted into a
system more easily understood or user friendly. The two most common derivatives based on
binary numbers are the Octal and the Hexadecimal numbering systems, with both of these
limited in length to a byte (8-bits) or a word (16-bits).
Octal numbers can be represented by groups of 3-bits and hexadecimal numbers by groups of
4-bits together, with this grouping of the bits being used in electronic or computer systems in
displays or printouts. The grouping together of binary numbers can also be used to represent
Machine Code used for programming instructions and control such as an Assembly
Language.
Comparisons between the various Decimal, Binary, Hexadecimal and Octal numbers are
given in the following table.

Comparison Table
Base, b

Byte (8-bits)
0
to
25510
0000 0000
to
1111 11112

Word (16-bits)
0
to
65,53510
0000 0000 0000 0000
to
1111 1111 1111 11112

Hexadecimal

00
to
FF16

0000
to
FFFF16

Octal

000
to
3778

000 000
to
177 7778

Decimal
Binary

We can see from the table above that the Hexadecimal numbering system uses only four
digits to express a single 16-bit word length, and as a result it is the most commonly used
Base Numbering System for digital, micro-electronic and computer systems.

Signed Binary Numbers

Signed Binary Numbers
In mathematics, positive numbers (including zero) are represented as unsigned numbers. That
is we do not put the +ve sign in front of them to show that they are positive numbers.
However, when dealing with negative numbers we do use a -ve sign in front of the number to

show that the number is negative in value and different from a positive unsigned value, and
the same is true with signed binary numbers.
However, in digital circuits there is no provision made to put a plus or even a minus sign,
since digital systems operate with binary numbers that are represented in terms of 0s and
1s. We have seen previously that an 8-bit byte can have a value from 0 to 255, that is
28 = 256 different combinations of bits forming a single 8-bit byte. So for example an
unsigned binary number such as: 010011012 = 64 + 8 + 4 + 1 = 7710 in decimal. But Digital
Systems and computers must also be able to use and to manipulate negative numbers as well
as positive numbers.
Mathematical Numbers are generally made up of a sign and a value (magnitude) in which the
sign indicates whether the number is positive, ( + ) or negative, ( ) with the value indicating
the size of the number, for example 23, +156 or -274. Presenting numbers is this fashion is
called sign-magnitude representation since the left most digit can be used to indicate the
sign and the remaining digits the magnitude or value of the number.
Sign-magnitude notation is the simplest and one of the most common methods of
representing positive and negative numbers either side of zero, (0). Thus negative numbers
are obtained simply by changing the sign of the corresponding positive number as each
positive or unsigned number will have a signed opposite, for example, +2 and -2, +10 and
-10, etc.
But how do we represent signed binary numbers if all we have is a bunch of ones and zeros.
We know that binary digits, or bits only have two values, either a 1 or a 0, and
conveniently a sign also has only two values, a + or a . Then we can use a single bit to
identify the sign of a signed binary number.
So to represent a positive (N) and a negative (-N) binary number we can use the binary
numbers with sign. For signed binary numbers the most significant bit (MSB) is used as the
sign. If the sign bit is 0, this means the number is positive. If the sign bit is 1, then the
number is negative. The remaining bits are used to represent the magnitude of the binary
number in the usual unsigned binary number format.
Then we can see that the Sign-and-Magnitude (SM) notation stores positive and negative
values by dividing the n total bits into two parts: 1 bit for the sign and n1 bits for the value
which is a pure binary number. For example, the decimal number 53 can be expressed as an
8-bit signed binary number as follows.

Positive Signed Binary Numbers

Negative Signed Binary Numbers

The disadvantage here is that whereas before we had a n-bit unsigned binary number we now
have a n-1 bit signed binary number giving a range of digits from:
-(2(n-1) - 1) to +(2(n-1) - 1)
So for example: if we have 4 bits to represent a signed binary number, (1-bit for the Sign bit
and 3-bits for the Magnitude bits), then the actual range of numbers we can represent in
sign-magnitude notation would be:
-(2(4-1) - 1) to +(2(4-1) - 1)
-2(3) - 1 to +2(3) - 1
-7 to +7
Whereas before, the range of an unsigned 4-bit binary number would have been from 0 to 15,
or 0 to F in hexadecimal. In other words, unsigned binary arithmetic does not have a sign-bit,
and therefore can have a larger binary range as the most significant bit (MSB) is just an extra
bit or digit rather than a sign bit.

Signed Binary Numbers Example No1

Convert the following decimal values into signed binary numbers using the sign-magnitude
format:
-1510 as a 6-bit number
+2310 as a 6-bit number
-5610 as a 8-bit number
+8510 as a 8-bit number
-12710 as a 8-bit number

1011112
0101112
101110002
010101012
111111112

Note that for a 4-bit, 6-bit, 8-bit, 16-bit or 32-bit signed binary number all the bits MUST
have a value, therefore 0s are used to fill the spaces between the leftmost sign bit and the
first or highest value 1.
The sign-magnitude representation of a binary number is a simple method to use and
understand for representing signed binary numbers, as we use this system all the time with
normal decimal (base 10) numbers in mathematics. Adding a 1 to the front of it if the
binary number is negative and a 0 if it is positive.

However, using this sign-magnitude method can result in the possibility of two different bit
patterns having the same binary value. For example, +0 and -0 would be 0000 and 1000
respectively as a signed 4-bit binary number. So we can see that using this method there can
be two representations for zero, a positive zero ( 00002 ) and also a negative zero ( 10002 )
which can cause big complications for computers and digital systems.

Ones Complement of a Signed Binary Number

Ones Complement or 1s Complement as it is also termed, is another method which we can
use to represent negative binary numbers in a signed binary number system. In ones
complement, positive numbers (also known as non-complements) remain unchanged as
before with the sign-magnitude numbers.
Negative numbers however, are represented by taking the ones complement (inversion,
negation) of the unsigned positive number. Since positive numbers always start with a 0,
the complement will always start with a 1 to indicate a negative number.
The ones complement of a negative binary number is the complement of its positive
counterpart, so to take the ones complement of a binary number, all we need to do is change
each bit in turn. Thus the ones complement of 1 is 0 and vice versa, then the ones
complement of 100101002 is simply 011010112 as all the 1s are changed to 0s and the 0s to
1s.
The easiest way to find the ones complement of a signed binary number when building
digital arithmetic or logic decoder circuits is to use Inverters. The inverter is naturally a
complement generator and can be used in parallel to find the 1s complement of any binary
number as shown.

1s Complement Using Inverters

Then we can see that it is very easy to find the ones complement of a binary number N as all
we need do is simply change the 1s to 0s and the 0s to 1s to give us a -N equivalent. Also
just like the previous sign-magnitude representation, ones complement can also have n-bit
notation to represent numbers in the range from: -2(n-1) - 1 and +2(n-1) - 1. For example, a 4-bit
representation in the ones complement format can be used to represent decimal numbers in

the range from -7 to +7 with two representations of zero: 0000 (+0) and 1111 (-0) the same as
before.

Addition and Subtraction Using Ones Complement

One of the main advantages of Ones Complement is in the addition and subtraction of two
binary numbers. In mathematics, subtraction can be implemented in a variety of different
ways as A B, is the same as saying A + (-B) or -B + A etc. Therefore, the complication of
subtracting two binary numbers can be performed by simply using addition.
We saw in the Binary Adder tutorial that binary addition follows the same rules as for the
normal addition except that in binary there are only two bits (digits) and the largest digit is a
1, (just as 9 is the largest decimal digit) thus the possible combinations for binary
addition are as follows:
0
+0
0

0
+1
1

1
+0
1

1
+1
1 0 ( 0 plus a carry 1 )

When the two numbers to be added are both positive, the sum A + B, they can be added
together by means of the direct sum (including the number and bit sign), because when single
bits are added together, 0 + 0, 0 + 1, or 1 + 0 results in a sum of 0 or 1. This is
because when the two bits to be added together are odd (0 + 1 or 1 + 0), the result is
1. Likewise when the two bits to be added together are even (0 + 0 or 1 + 1) the result
is 0 until you get to 1 + 1 then the sum is equal to 0 plus a carry 1. Lets look at a
simple example.

Subtraction of Two Binary Numbers

An 8-bit digital system is required to subtract the following two numbers 115 and 27 from
each other using ones complement. So in decimal this would be: 115 - 27 = 88.
First we need to convert the two decimal numbers into binary and make sure that each
number has the same number of bits by adding leading zeros to produce an 8-bit number
(byte). Therefore:
11510 in binary is: 0 1 1 1 0 0 1 1 2
2710 in binary is: 0 0 0 1 1 0 1 1 2
Now we need to find the complement of the second binary number, (00011011) while leaving
the first number (01110011) unchanged.
By changing all the 1s to 0s and 0s to 1s, the ones complement of 00011011 is equal to
11100100.
Adding the first number and the complement of the second number gives:

01110011
+ 11100100
Overflow 1 01010111
Since the digital system is to work with 8-bits, only the first eight digits are used to provide
the answer to the sum, and we simply ignore the last bit (bit 9). This bit is call an overflow
bit. Overflow occurs when the sum of the most significant (left-most) column produces a
carry forward. This overflow or carry bit can be ignored completely or passed to the next
digital section for use in its calculations. Overflow indicates that the answer is positive. If
there is no overflow then the answer is negative.
The 8-bit result from above is: 01010111 (the overflow 1 cancels out) and to convert it
back from a ones complement answer to the real answer we now have to add 1 to the ones
complement result, therefore:
01010111
+ 1
01011000
So the result of subtracting 27 ( 000110112 ) from 115 ( 011100112 ) using 1s complement in
binary gives the answer of: 010110002 or (64 + 16 + 8) = 8810 in decimal.
Then we can see that signed or unsigned binary numbers can be subtracted from each other
using Ones Complement and the process of addition. Binary adders such as the TTL
74LS83 or 74LS283 can be used to add or subtract two 4-bit signed binary numbers or
cascaded together to produce 8-bit adders complete with carry-out.

Twos Complement of a Signed Binary Number

Twos Complement or 2s Complement as it is also termed, is another method like the
previous sign-magnitude and ones complement form, which we can use to represent negative
binary numbers in a signed binary number system. In twos complement, the positive
numbers are exactly the same as before for unsigned binary numbers. A negative number,
however, is represented by a binary number, which when added to its corresponding positive
equivalent results in zero.
In twos complement form, a negative number is the 2s complement of its positive number
with the subtraction of two numbers being A B = A + ( 2s complement of B ) using much
the same process as before as basically, twos complement is ones complement + 1.
The main advantage of twos complement over the previous ones complement is that there is
no double-zero problem plus it is a lot easier to generate the twos complement of a signed
binary number. Therefore, arithmetic operations are relatively easier to perform when the
numbers are represented in the twos complement format.

Lets look at the subtraction of our two 8-bit numbers 115 and 27 from above using twos
complement, and we remember from above that the binary equivalents are:
11510 in binary is: 0 1 1 1 0 0 1 1 2
2710 in binary is: 0 0 0 1 1 0 1 1 2
Our numbers are 8-bits long, then there are 28 digits available to represent our values and in
binary this equals: 1000000002 or 25610. Then the twos complement of 2710 will be:
(28)2 00011011 = 100000000 00011011 = 111001012
The complementation of the second negative number means that the subtraction becomes a
much easier addition of the two numbers so therefore the sum is: 115 + ( 2s complement of
27 ) which is:
01110011 + 11100101 = 1 010110002
As previously, the 9th overflow bit is disregarded as we are only interested in the first 8-bits,
so the result is: 010110002 or (64 + 16 + 8) = 8810 in decimal the same as before.

Signed Binary Numbers Summary

Digital Fundamentals (10th Edition)

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We have seen that negative binary numbers can be represented by using the most significant
bit (MSB) as a sign bit. If an n bit binary number is signed the leftmost bit is used to
represent the sign leaving n-1 bits to represent the number.
For example, in a 4-bit binary number, this leaves only 3 bits to hold the actual number. If
however, the binary number is unsigned then all the bits can be used to represent the number.
The representation of a signed binary number is commonly referred to as the sign-magnitude
notation and if the sign bit is 0, the number is positive. If the sign bit is 1, then the
number is negative. When dealing with binary arithmetic operations, it is more convenient to
use the complement of the negative number.

Complementation is an alternative way of representing negative binary numbers. This

alternative coding system allows for the subtraction of negative numbers by using simple
addition.
Since positive sign-magnitude numbers always start with a zero (0), its complement will
therefore always start with a one (1) to indicate a negative number as shown in the following
table.

4-bit Signed Binary Number Comparison

Decimal
+7
+6
+5
+4
+3
+2
+1
+0
-0
-1
-2
-3
-4
-5
-6
-7

Signed
Magnitude
0111
0110
0101
0100
0011
0010
0001
0000
1000
1001
1010
1011
1100
1101
1110
1111

Signed Ones
Complement
0111
0110
0101
0100
0011
0010
0001
0000
1111
1110
1101
1100
1011
1010
1001
1000

Signed Twos
Complement
0111
0110
0101
0100
0011
0010
0001
0000

1111
1110
1101
1100
1011
1010
1001

Signed-complement forms of binary numbers can use either 1s complement or 2s

complement. The 1s complement and the 2s complement of a binary number are important
because they permit the representation of negative numbers.
The method of 2s complement arithmetic is commonly used in computers to handle negative
numbers the only disadvantage is that if we want to represent negative binary numbers in the
signed binary number format, we must give up some of the range of the positive number we
had before.

Laws of Boolean Algebra

The Laws of Boolean
As well as the logic symbols 0 and 1 being used to represent a digital input or output, we
can also use them as constants for a permanently Open or Closed circuit or contact
respectively. A set of rules or Laws of Boolean Algebra expressions have been invented to

help reduce the number of logic gates needed to perform a particular logic operation resulting
in a list of functions or theorems known commonly as the Laws of Boolean Algebra.
Boolean Algebra is the mathematics we use to analyse digital gates and circuits. We can use
these Laws of Boolean to both reduce and simplify a complex Boolean expression in an
attempt to reduce the number of logic gates required. Boolean Algebra is therefore a system
of mathematics based on logic that has its own set of rules or laws which are used to define
and reduce Boolean expressions.
The variables used in Boolean Algebra only have one of two possible values, a logic 0 and
a logic 1 but an expression can have an infinite number of variables all labelled
individually to represent inputs to the expression, For example, variables A, B, C etc, giving
us a logical expression of A + B = C, but each variable can ONLY be a 0 or a 1.
Examples of these individual laws of Boolean, rules and theorems for Boolean Algebra are
given in the following table.

Truth Tables for the Laws of Boolean

Boolean
Description
Expression

Equivalent
Switching Circuit

Boolean Algebra
Law or Rule

A+1=1

A in parallel with
closed = "CLOSED"

Annulment

A+0=A

A in parallel with
open = "A"

Identity

A.1=A

A in series with
closed = "A"

Identity

A.0=0

A in series with
open = "OPEN"

Annulment

A+ A= A

A in parallel with
A = "A"

Idempotent

A. A=A

A in series with
A = "A"

Idempotent

NOT A = A

NOT NOT A
(double negative) = "A"

Double Negation

A+A=1

A in parallel with
NOT A = "CLOSED"

Complement

A.A= 0

A in series with
NOT A = "OPEN"

Complement

A+B = B+A

A in parallel with B =
B in parallel with A

Commutative

A.B = B.A

A in series with B =
B in series with A

Commutative

invert and replace OR with

AND
invert and replace AND with
A.B = A+B
OR
A+B = A.B

de Morgans Theorem
de Morgans Theorem

The basic Laws of Boolean Algebra that relate to the Commutative Law allowing a change
in position for addition and multiplication, the Associative Law allowing the removal of
brackets for addition and multiplication, as well as the Distributive Law allowing the
factoring of an expression, are the same as in ordinary algebra.
Each of the Boolean Laws above are given with just a single or two variables, but the number
of variables defined by a single law is not limited to this as there can be an infinite number of
variables as inputs too the expression. These Boolean laws detailed above can be used to
prove any given Boolean expression as well as for simplifying complicated digital circuits.
A brief description of the various Laws of Boolean are given below with A representing a
variable input.

Description of the Laws of Boolean Algebra

Annulment Law A term ANDed with a 0 equals 0 or ORed with a 1 will equal
1.

o A.0=0

A variable ANDed with 0 is always equal to 0.

o A+1=1

A variable ORed with 1 is always equal to 1.

Identity Law A term ORed with a 0 or ANDed with a 1 will always equal that
term.

o A + 0 = A A variable ORed with 0 is always equal to the variable.

o A . 1 = A A variable ANDed with 1 is always equal to the variable.

Idempotent Law An input that is ANDed or ORed with itself is equal to that input.

o A + A = A A variable ORed with itself is always equal to the variable.

o A . A = A A variable ANDed with itself is always equal to the variable.

Complement Law A term ANDed with its complement equals 0 and a term OR
ed with its complement equals 1.

o A . A = 0 A variable ANDed with its complement is always equal to 0.

o A+ A= 1

A variable ORed with its complement is always equal to 1.

Commutative Law The order of application of two separate terms is not important.

o A . B = B . A The order in which two variables are ANDed makes no

difference.
o A + B = B + A The order in which two variables are ORed makes no
difference.

Double Negation Law A term that is inverted twice is equal to the original term.

o A=A

A double complement of a variable is always equal to the variable.

de Morgans Theorem There are two de Morgans rules or theorems,

(1) Two separate terms NORed together is the same as the two terms inverted
(Complement) and ANDed for example, A+B = A. B.

(2) Two separate terms NANDed together is the same as the two terms inverted
(Complement) and ORed for example, A.B = A +B.

Other algebraic Laws of Boolean not detailed above include:

Distributive Law This law permits the multiplying or factoring out of an expression.

o A(B + C) = A.B + A.C

(OR Distributive Law)

o A + (B.C) = (A + B).(A + C)

(AND Distributive Law)

Absorptive Law This law enables a reduction in a complicated expression to a

simpler one by absorbing like terms.

o A + (A.B) = A

(OR Absorption Law)

o A(A + B) = A

(AND Absorption Law)

Associative Law This law allows the removal of brackets from an expression and
regrouping of the variables.

o A + (B + C) = (A + B) + C = A + B + C
o A(B.C) = (A.B)C = A . B . C

(OR Associate Law)

(AND Associate Law)

Boolean Algebra Functions

Using the information above, simple 2-input AND, OR and NOT Gates can be represented by
16 possible functions as shown in the following table.
Function
1.
2.

Description
NULL
IDENTITY

Expression
0
1

3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.

Input A
Input B
NOT A
NOT B
A AND B (AND)
A AND NOT B
NOT A AND B
NOT A AND NOT B (NAND)
A OR B (OR)
A OR NOT B
NOT A OR B
NOT OR (NOR)
Exclusive-OR
Exclusive-NOR

A
B
A
B
A.B
A.B
A.B
A.B
A+B
A+B
A+B
A+B
A.B + A.B
A.B + A.B

Laws of Boolean Algebra Example No1

Using the above laws, simplify the following expression: (A + B)(A + C)
Q=

Q=

(A + B).(A + C)
A.A + A.C + A.B + B.C
A + A.C + A.B + B.C
A(1 + C) + A.B + B.C
A.1 + A.B + B.C
A(1 + B) + B.C
A.1 + B.C
A + (B.C)

Distributive law
Idempotent AND law (A.A = A)
Distributive law
Identity OR law (1 + C = 1)
Distributive law
Identity OR law (1 + B = 1)
Identity AND law (A.1 = A)

Then the expression: (A + B)(A + C) can be simplified to A + (B.C) as in the Distributive

law.

Logic AND Function

Introduction To Boolean
In 1854, George Boole performed an investigation into the laws of thought which were
based on a simplified version of the group or set theory, and from this Boolean or
Switching algebra was developed. Boolean Algebra deals mainly with the theory that both
logic and set operations are either TRUE or FALSE but not both at the same time.
For example, A + A = A and not 2A as it would be in normal algebra. Boolean Algebra is a
simple and effective way of representing the switching action of standard Logic Gates and the
basic logic statements which concern us here are given by the logic gate operations of the
AND, the OR and the NOT gate functions.

The logic AND Function

The Logic AND Function function states that two or more events must occur together and at
the same time for an output action to occur. The order in which these actions occur is
unimportant as it does not affect the final result. For example, A & B = B & A. In Boolean
algebra the Logic AND Function follows the Commutative Law which allows a change in
position of either variable.
The AND function is represented in electronics by the dot or full stop symbol ( . ) Thus a 2input (A B) AND Gate has an output term represented by the Boolean expression A.B or just
AB.

Switch Representation of the AND Function

Here the two switches, A and B are connected together to form a series circuit. Therefore, in
the circuit above, both switch A AND switch B must be closed (Logic 1) in order to put the
lamp on. In other words, both switches must be closed, or at logic 1 for the lamp to be
ON.
Then this type of logic gate ( an AND Gate ) only produces an output when ALL of its
inputs are present. In Boolean Algebra terms the output will be TRUE only when all of its
inputs are TRUE. In electrical terms, the logic AND function is equal to a series circuit as
shown above.
As there are only two Switches, each with two possible states open or closed. Defining a
Logic 0 as being when the switch is open and a Logic 1 when the switch is closed, there
are then four different ways or combinations of arranging the two switches together as
shown.

AND Function Truth Table

Switch A
0
0
1
1

Switch B
0
1
0
1

Output
0
0
0
1

Description
A and B are both open, lamp OFF
A is open and B is closed, lamp OFF
A is closed and B is open, lamp OFF
A is closed and B is closed, lamp ON

Boolean Expression (A AND B)

A.B

Logic AND Gates are available as standard i.c. packages such as the common TTL 74LS08
Quadruple 2-input Positive AND Gates, (or the 4081 CMOS equivalent) the TTL 74LS11
Triple 3-input Positive AND Gates or the 74LS21 Dual 4-input Positive AND Gates. AND
Gates can also be cascaded together to produce circuits with more than just 4 inputs.

Logic OR Function
The Logic OR Function
The Logic OR Function function states that an output action will occur or become TRUE if
either one OR more events are TRUE, but the order at which they occur is unimportant as it
does not affect the final result. For example, A + B = B + A. In Boolean algebra the Logic OR
Function follows the Commutative Law the same as for the logic AND function, allowing a
change in position of either variable.
The OR function is sometimes called by its full name of Inclusive OR in contrast to the
Exclusive-OR function we will look at later in tutorial six.
The logic or Boolean expression given for a logic OR gate is that for Logical Addition which
is denoted by a plus sign, (+). Thus a 2-input (A B) Logic OR Gate has an output term
represented by the Boolean expression of: A+B = Q.

Switch Representation of the OR Function

Here the two switches A and B are connected in parallel and either Switch A OR Switch B
can be closed in order to put the lamp on. In other words, either switch can be closed, or at
logic 1 for the lamp to be ON.
Then this type of logic gate only produces and output when ANY of its inputs are present
and in Boolean Algebra terms the output will be TRUE when any of its inputs are TRUE. In
electrical terms, the logic OR function is equal to a parallel circuit.
Again as with the AND function there are two switches, each with two possible positions
open or closed so therefore there will be 4 different ways of arranging the switches.

OR Function Truth Table

Switch A
Switch B
Output
0
0
0
0
1
1
1
0
1
1
1
1
Boolean Expression (A OR B)

Description
A and B are both open, lamp OFF
A is open and B is closed, lamp ON
A is closed and B is open, lamp ON
A is closed and B is closed, lamp ON
A+B

Logic OR Gates are available as standard i.c. packages such as the common TTL 74LS32
Quadruple 2-input Positive OR Gates. As with the previous AND Gate, OR can also be
cascaded together to produce circuits with more inputs such as in security alarm systems
(Zone A or Zone B or Zone C,etc).

Logic NOT Function

The Logic NOT Function
The Logic NOT Function is simply a single input inverter that changes the input of a logic
level 1 to an output of logic level 0 and vice versa. The logic NOT function is so called
because its output state is NOT the same as its input state.
The logical NOT function is generally denoted by a bar or overline ( ) over its input
symbol which denotes the inversion operation, (hence its name as an inverter). As NOT gates
perform the logic INVERT or COMPLEMENTATION function they are more commonly
known as Inverters because they invert the signal. In logic circuits this negation can be
represented by a normally closed switch.

Switch Representation of the NOT Function

If A means that the switch is closed, then NOT A or simply A says that the switch is NOT
closed or in other words, it is open. The logic NOT function has a single input and a single
output as shown.

NOT Function Truth Table

Switch
1
0
Boolean Expression

Output
0
1
not-A or A

The inversion indicator for a logic NOT function is a bubble, ( O ) symbol on the output (or
input) of the logic elements symbol. In Boolean algebra the inverting Logic NOT Function
follows the Complementation Law producing inversion.

Logic NOT Gates or Inverters as they are more commonly called, can be connected with
standard AND and OR gates to produce NAND and NOR gates respectively. Inverters can
also be used to produce Complementary signals in more complex decoder/logic circuits for

example, the complement of logic A is A and two Inverters connected together in series will
give a double inversion which produces at its output the original value of A.
When designing logic circuits and you may only need one or two inverters within your
design, but do not have the space or the money for a dedicated Inverter chip such as the
74LS04. Then you can easily make a logic NOT function easily by using any spare NAND or
NOR gates by simply connecting their inputs together as shown below.

NOT Function Equivalents

Logic NAND Function

The Logic NAND Function
The NAND or Not AND function is a combination of the two separate logical functions,
the AND function and the NOT function connected together in series. The logic NAND
function can be expressed by the Boolean expression of, A.B

The Logic NAND Function only produces an output when ANY of its inputs are not
present and in Boolean Algebra terms the output will be TRUE only when any of its inputs
are FALSE.

Switch Representation of the NAND Function

The truth table for the NAND function is the opposite of that for the previous AND function
because the NAND gate performs the reverse operation of the AND gate. In other words, the
NAND gate is the complement of the basic AND gate.

NAND Function Truth Table

Switch A
Switch B
Output
0
0
1
0
1
1
1
0
1
1
1
0
Boolean Expression (A AND B)

Description
A and B are both open, lamp ON
A is open and B is closed, lamp ON
A is closed and B is open, lamp ON
A is closed and B is closed, lamp OFF
A.B

The NAND Function is sometimes known as the Sheffer Stroke Function and is denoted by
a vertical bar or upwards arrow operator, for example, A NAND B = A|B or AB.
Logic NAND Gates are used as the basic building blocks to construct other logic gate
functions and are available in standard i.c. packages such as the very common TTL 74LS00
Quadruple 2-input NAND Gates, the TTL 74LS10 Triple 3-input NAND Gates or the 74LS20
Dual 4-input NAND Gates. There is even a single chip 74LS30 8-input NAND Gate.

Logic NOR Function

The Logic NOR Function

Like the previous NAND Gate, the NOR or Not OR Gate is also a combination of two
separate functions connected together to form a single logic gate function. The OR function
and the NOT function are connected together in series with its operation given by the
Boolean expression as, A + B

The Logic NOR Function only produces and output when ALL of its inputs are not
present and in Boolean Algebra terms the output will be TRUE only when all of its inputs are
FALSE.

Switch Representation of the NOR Function

The truth table for the NOR function is the opposite of that for the previous OR function
because the NOR gate performs the reverse operation of the OR gate. Then we can see that
the NOR gate is the complement of the OR gate.

NOR Function Truth Table

Switch A
0
0
1

Switch B
0
1
0

Output
1
0
0

Description
Both A and B are open, lamp ON
A is open and B is closed, lamp OFF
A is closed and B is open, lamp OFF

1
1
0
Boolean Expression (A OR B)

A is closed and B is closed, lamp OFF

A+B

The NOR Function is sometimes known as the Pierce Function and is denoted by a
downwards arrow operator as shown, A NOR B = AB.
Logic NOR Gates are available as standard i.c. packages such as the TTL 74LS02 Quadruple
2-input NOR Gate, the TTL 74LS27 Triple 3-input NOR Gate or the 74LS260 Dual 5-input
NOR Gate.

Digital Logic Gates

Introduction to Digital Logic Gates
A Digital Logic Gate is an electronic device that makes logical decisions based on the
different combinations of digital signals present on its inputs. Digital logic gates may have
more than one input but generally only have one digital output. Individual logic gates can be
connected together to form combinational or sequential circuits, or larger logic gate
functions.

Standard commercially available digital logic gates are available in two basic families or
forms, TTL which stands for Transistor-Transistor Logic such as the 7400 series, and
CMOS which stands for Complementary Metal-Oxide-Silicon which is the 4000 series of
chips. This notation of TTL or CMOS refers to the logic technology used to manufacture the
integrated circuit, (IC) or a chip as it is more commonly called.

Digital Logic Gate

Generally speaking, TTL logic ICs use NPN and PNP type Bipolar Junction Transistors
while CMOS logic ICs use complementary MOSFET or JFET type Field Effect Transistors
for both their input and output circuitry.
As well as TTL and CMOS technology, simple Digital Logic Gates can also be made by
connecting together diodes, transistors and resistors to produce RTL, Resistor-Transistor
logic gates, DTL, Diode-Transistor logic gates or ECL, Emitter-Coupled logic gates but
these are less common now compared to the popular CMOS family.
Integrated Circuits or ICs as they are more commonly called, can be grouped together into
families according to the number of transistors or gates that they contain. For example, a
simple AND gate my contain only a few individual transistors, were as a more complex
microprocessor may contain many thousands of individual transistor gates. Integrated circuits
are categorised according to the number of logic gates or the complexity of the circuits within
a single chip with the general classification for the number of individual gates given as:

Classification of Integrated Circuits

Small Scale Integration or (SSI) Contain up to 10 transistors or a few gates within a

single package such as AND, OR, NOT gates.

Medium Scale Integration or (MSI) between 10 and 100 transistors or tens of gates
within a single package and perform digital operations such as adders, decoders,
counters, flip-flops and multiplexers.

Large Scale Integration or (LSI) between 100 and 1,000 transistors or hundreds of
gates and perform specific digital operations such as I/O chips, memory, arithmetic
and logic units.

Very-Large Scale Integration or (VLSI) between 1,000 and 10,000 transistors or

thousands of gates and perform computational operations such as processors, large
memory arrays and programmable logic devices.

Super-Large Scale Integration or (SLSI) between 10,000 and 100,000 transistors

within a single package and perform computational operations such as microprocessor
chips, micro-controllers, basic PICs and calculators.

Ultra-Large Scale Integration or (ULSI) more than 1 million transistors the big
boys that are used in computers CPUs, GPUs, video processors, micro-controllers,
FPGAs and complex PICs.

While the ultra large scale ULSI classification is less well used, another level of integration
which represents the complexity of the Integrated Circuit is known as the System-on-Chip or
(SOC) for short. Here the individual components such as the microprocessor, memory,
peripherals, I/O logic etc, are all produced on a single piece of silicon and which represents a
whole electronic system within one single chip, literally putting the word integrated into
integrated circuit.
These complete integrated chips which can contain up to 100 million individual siliconCMOS transistor gates within one single package are generally used in mobile phones, digital
cameras, micro-controllers, PICs and robotic type applications.

Moores Law
In 1965, Gordon Moore co-founder of the Intel corporation predicted that The number of
transistors and resistors on a single chip will double every 18 months regarding the
development of semiconductor gate technology. When Gordon Moore made his famous
comment way back in 1965 there were approximately only 60 individual transistor gates on a
single silicon chip or die.
The worlds first microprocessor in 1971 was the Intel 4004 that had a 4-bit data bus and
contained about 2,300 transistors on a single chip, operating at about 600kHz. Today, the
Intel Corporation have placed a staggering 1.2 Billion individual transistor gates onto its new
Quad-core i7-2700K Sandy Bridge 64-bit microprocessor chip operating at nearly 4GHz, and
the on-chip transistor count is still rising, as newer faster microprocessors and microcontrollers are developed.

Digital Logic States

The Digital Logic Gate is the basic building block from which all digital electronic circuits
and microprocessor based systems are constructed from. Basic digital logic gates perform
logical operations of AND, OR and NOT on binary numbers.
In digital logic design only two voltage levels or states are allowed and these states are
generally referred to as Logic 1 and Logic 0, High and Low, or True and False. These
two states are represented in Boolean Algebra and standard truth tables by the binary digits of
1 and 0 respectively.
A good example of a digital state is a simple light switch as it is either ON or OFF but
not both at the same time. Then we can summarise the relationship between these various
digital states as being:

Boolean Algebra
Logic 1
Logic 0

Boolean Logic
True (T)
False (F)

Voltage State
High (H)
Low (L)

Most digital logic gates and digital logic systems use Positive logic, in which a logic level
0 or LOW is represented by a zero voltage, 0v or ground and a logic level 1 or
HIGH is represented by a higher voltage such as +5 volts, with the switching from one
voltage level to the other, from either a logic level 0 to a 1 or a 1 to a 0 being made
as quickly as possible to prevent any faulty operation of the logic circuit.
There also exists a complementary Negative Logic system in which the values and the rules
of a logic 0 and a logic 1 are reversed but in this tutorial section about digital logic gates
we shall only refer to the positive logic convention as it is the most commonly used.
In standard TTL (transistor-transistor logic) ICs there is a pre-defined voltage range for the
input and output voltage levels which define exactly what is a logic 1 level and what is a
logic 0 level and these are shown below.

TTL Input & Output Voltage Levels

There are a large variety of logic gate types in both the bipolar 7400 and the CMOS 4000
families of digital logic gates such as 74Lxx, 74LSxx, 74ALSxx, 74HCxx, 74HCTxx,
74ACTxx etc, with each one having its own distinct advantages and disadvantages compared
to the other. The exact switching voltage required to produce either a logic 0 or a logic 1
depends upon the specific logic group or family.
However, when using a standard +5 volt supply any TTL voltage input between 2.0v and 5v
is considered to be a logic 1 or HIGH while any voltage input below 0.8v is recognised
as a logic 0 or LOW. The voltage region in between these two voltage levels either as an
input or as an output is called the Indeterminate Region and operating within this region may
cause the logic gate to produce a false output.

The CMOS 4000 logic family uses different levels of voltages compared to the TTL types as
they are designed using field effect transistors, or FETs. In CMOS technology a logic 1
level operates between 3.0 and 18 volts and a logic 0 level is below 1.5 volts. Then the
following table shows the difference between the logic levels of traditional TTL and CMOS
logic gates.

TTL and CMOS Logic Levels

Device Type
TTL
CMOS

Logic 0
0 to 0.8v
0 to 1.5v

Logic 1
2.0 to 5v (VCC)
3.0 to 18v (VDD)

Then from the above observations, we can define the ideal TTL digital logic gate as one that
has a LOW level logic 0 of 0 volts (ground) and a HIGH level logic 1 of +5 volts
and this can be demonstrated as:

Ideal TTL Digital Logic Gate Voltage Levels

Where the opening or closing of the switch produces either a logic level 1 or a logic level
0 with the resistor R being known as a pull-up resistor.

Digital Logic Noise

However, between these defined HIGH and LOW values lies what is generally called a nomans land (the blue areas above) and if we apply a signal voltage of a value within this nomans land area we do not know whether the logic gate will respond to it as a level 0 or as a
level 1, and the output will become unpredictable.
Noise is the name given to a random and unwanted voltage that is induced into electronic
circuits by external interference, such as from nearby switches, power supply fluctuations or
from wires and other conductors that pick-up stray electromagnetic radiation. Then in order
for a logic gate not to be influence by noise in must have a certain amount of noise margin or
noise immunity.

Digital Logic Gate Noise Immunity

In the example above, the noise signal is superimposed onto the Vcc supply voltage and as
long as it stays above the minimum level (VON(min)) the input an corresponding output of the
logic gate are unaffected. But when the noise level becomes large enough and a noise spike
causes the HIGH voltage level to drop below this minimum level, the logic gate may interpret
this spike as a LOW level input and switch the output accordingly producing a false output
switching. Then in order for the logic gate not to be affected by noise it must be able to
tolerate a certain amount of unwanted noise on its input without changing the state of its
output.

Simple Basic Digital Logic Gates

Simple digital logic gates can be made by combining transistors, diodes and resistors with a
simple example of a Diode-Resistor Logic (DRL) AND gate and a Diode-Transistor Logic
(DTL) NAND gate given below.
Diode-Resistor Circuit

Diode-Transistor circuit

2-input AND Gate

2-input NAND Gate

The simple 2-input Diode-Resistor AND gate can be converted into a NAND gate by the
addition of a single transistor inverting (NOT) stage. Using discrete components such as
diodes, resistors and transistors to make digital logic gate circuits are not used in practical
commercially available logic ICs as these circuits suffer from propagation delay or gate
delay and also power loss due to the pull-up resistors.

Another disadvantage of diode-resistor logic is that there is no Fan-out facility which is the
ability of a single output to drive many inputs of the next stages. Also this type of design does
not turn fully OFF as a Logic 0 produces an output voltage of 0.6v (diode voltage drop),
so the following TTL and CMOS circuit designs are used instead.

Basic TTL Logic Gates

The simple Diode-Resistor AND gate above uses separate diodes for its inputs, one for each
input. As a transistor is made up off two diode circuits connected together representing an
NPN or a PNP device, the input diodes of the DTL circuit can be replaced by one single NPN
transistor with multiple emitter inputs as shown.

2-input NAND Gate

As the NAND gate contains a single stage inverting NPN transistor circuit (TR2) an output
logic level 1 at Q is only present when both the emitters of TR1 are connected to logic level
0 or ground allowing base current to pass through the PN junctions of the emitter and not
the collector. The multiple emitters of TR1 are connected as inputs thus producing a NAND
gate function.
In standard TTL logic gates, the transistors operate either completely in the cut off region,
or else completely in the saturated region, Transistor as a Switch type operation.

Emitter-Coupled Digital Logic Gate

Emitter Coupled Logic or ECL is another type of digital logic gate that uses bipolar
transistor logic where the transistors are not operated in the saturation region, as they are with
the standard TTL digital logic gate. Instead the input and output circuits are push-pull
connected transistors with the supply voltage negative with respect to ground.
This has the effect of increasing the speed of operation of the emitter coupled logic gates up
to the Gigahertz range compared with the standard TTL types, but noise has a greater effect in
ECL logic, because the unsaturated transistors operate within their active region and amplify
as well as switch signals.

The 74 Sub-families of Integrated Circuits

With improvements in the circuit design to take account of propagation delays, current
consumption, fan-in and fan-out requirements etc, this type of TTL bipolar transistor
technology forms the basis of the prefixed 74 family of digital logic ICs, such as the
7400 Quad 2-input AND gate, or the 7402 Quad 2-input OR gate, etc.
Sub-families of the 74xx series ICs are available relating to the different technologies used to
fabricate the gates and they are denoted by the letters in between the 74 designation and the
device number. There are a number of TTL sub-families available that provide a wide range
of switching speeds and power consumption such as the 74L00 or 74ALS00 AND gate, were
the L stands for Low-power TTL and the ALS stands for Advanced Low-power
Schottky TTL and these are listed below.

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74xx or 74Nxx: Standard TTL These devices are the original TTL family of logic
gates introduced in the early 70s. They have a propagation delay of about 10ns and a
power consumption of about 10mW. Supply voltage range: 4.75 to 5.25v

74Lxx: Low Power TTL Power consumption was improved over standard types by
increasing the number of internal resistances but at the cost of a reduction in
switching speed. Supply voltage range: 4.75 to 5.25v

74Hxx: High Speed TTL Switching speed was improved by reducing the number
of internal resistances. This also increased the power consumption. Supply voltage
range: 4.75 to 5.25v

74Sxx: Schottky TTL Schottky technology is used to improve input impedance,

switching speed and power consumption (2mW) compared to the 74Lxx and 74Hxx
types. Supply voltage range: 4.75 to 5.25v

74LSxx: Low Power Schottky TTL Same as 74Sxx types but with increased
internal resistances to improve power consumption. Supply voltage range: 4.75 to
5.25v

74ASxx: Advanced Schottky TTL Improved design over 74Sxx Schottky types
optimised to increase switching speed at the expense of power consumption of about
22mW. Supply voltage range: 4.5 to 5.5v

74ALSxx: Advanced Low Power Schottky TTL Lower power consumption of

about 1mW and higher switching speed of 4nS compared to 74LSxx types. Supply
voltage range: 4.5 to 5.5v

74HCxx: High Speed CMOS CMOS technology and transistors to reduce power
consumption of less than 1uA with CMOS compatible inputs. Supply voltage range:
4.5 to 5.5v

74HCTxx: High Speed CMOS CMOS technology and transistors to reduce power
consumption of less than 1uA but has increased propagation delay of about 16nS due
to the TTL compatible inputs. Supply voltage range: 4.5 to 5.5v

Basic CMOS Digital Logic Gate

One of the main disadvantages with the TTL digital logic gate series is that the logic gates are
based on bipolar transistor logic technology and as transistors are current operated devices,
they consume large amounts of power from a fixed +5 volt power supply.
Also, TTL bipolar transistor gates have a limited operating speed when switching from an
OFF state to an ON state and vice-versa called the gate or propagation delay. To
overcome these limitations complementary MOS called CMOS (Complementary Metal
Oxide Semiconductor) logic gates which use Field Effect Transistors or FETs were
developed.
As these gates use both P-channel and N-channel MOSFETs as their input device, at
quiescent conditions with no switching, the power consumption of CMOS gates is almost
zero, (1 to 2uA) making them ideal for use in low-power battery circuits and with switching
speeds upwards of 100MHz for use in high frequency timing and computer circuits.

2-input NAND Gate

This CMOS gate example contains 3 N-channel MOSFETs, one for each input FET1 and
FET2 and one for the output FET3. When both the inputs A and B are at logic level 0, FET1
and FET2 are both switched OFF giving an output logic 1 from the source of FET3.
When one or both of the inputs are at logic level 1 current flows through the corresponding
FET giving an output state at Q equivalent to logic 0, thus producing a NAND gate
function.
Improvements in the circuit design with regards to switching speed, low power consumption
and improved propagation delays has resulted in the standard CMOS 4000 CD family of
logic ICs being developed that complement the TTL range.
As with the standard TTL digital logic gates, all the major digital logic gates and devices are
available in the CMOS package such as the CD4011, a Quad 2-input NAND gate, or the
CD4001, a Quad 2-input NOR gate along with all their sub-families.
Like TTL logic, complementary MOS (CMOS) circuits take advantage of the fact that both
N-channel and P-channel devices can be fabricated together on the same substrate material to
form various logic functions.
One of the main disadvantage with the CMOS range of ICs compared to their equivalent
TTL types is that they are easily damaged by static electricity. Also unlike TTL logic gates
that operate on single +5V voltages for both their input and output levels, CMOS digital logic
gates operate on a single supply voltage of between +3 and +18 volts.
Common CMOS Sub-families include:

4000B Series: Standard CMOS These devices are the original Buffered CMOS
family of logic gates introduced in the early 70s and operate from a supply voltage of
3.0 to 18v d.c.

74C Series: 5v CMOS These devices are pin-compatible with standard 5v TTL
devices as their logic switching is implemented in CMOS but with TTL-compatible
inputs. They operate from a supply voltage of 3.0 to 18v d.c.

Note that CMOS logic gates and devices are static sensitive, so always take the appropriate
precautions of working on antistatic mats or grounded workbenches, wearing an antistatic
wristband and not removing a part from its antistatic packaging until required.
In the next tutorial about Digital Logic Gates, we will look at the digital Logic AND Gate
function as used in both TTL and CMOS logic circuits as well as its Boolean Algebra
definition and truth tables.

Logic AND Gate Tutorial

The Logic AND Gate
Logic AND Gate Definition

A Logic AND Gate is a type of digital logic gate that has an output which is normally at
logic level 0 and only goes HIGH to a logic level 1 when ALL of its inputs are at logic
level 1. The output state of a Logic AND Gate only returns LOW again when ANY of
its inputs are at a logic level 0. In other words for a logic AND gate, any LOW input will
give a LOW output.
The logic or Boolean expression given for a Digital Logic AND Gate is that for Logical
Multiplication which is denoted by a single dot or full stop symbol, ( . ) giving us the Boolean
expression of: A.B = Q.
Then we can define the operation of a 2-input logic AND gate as being:

If both A and B are true, then Q is true

2-input Transistor AND Gate

A simple 2-input logic AND gate can be constructed using RTL Resistor-transistor switches
connected together as shown below with the inputs connected directly to the transistor bases.
Both transistors must be saturated ON for an output at Q.

Logic AND Gates are available using digital circuits to produce the desired logical function
and is given a symbol whose shape represents the logical operation of the AND gate.

Digital Logic AND Gate Types

The 2-input Logic AND Gate
Symbol

Truth Table

2-input AND Gate

Boolean Expression Q = A.B

B
A
Q
0
0
0
0
1
0
1
0
0
1
1
1
Read as A AND B gives Q

The 3-input Logic AND Gate

Symbol

3-input AND Gate

Boolean Expression Q = A.B.C

Truth Table
C
B
A
Q
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
Read as A AND B AND C gives Q

Because the Boolean expression for the logic AND function is defined as (.), which is a
binary operation, AND gates can be cascaded together to form any number of individual
inputs. However, commercial available AND gate ICs are only available in standard 2, 3, or
4-input packages. If additional inputs are required, then standard AND gates will need to be
cascaded together to obtain the required input value, for example.

Multi-input AND Gate

The Boolean Expression for this 6-input AND gate will therefore be: Q = (A.B).(C.D).(E.F)

If the number of inputs required is an odd number of inputs any unused inputs can be held
HIGH by connecting them directly to the power supply using suitable Pull-up resistors.
Commonly available Digital Logic AND Gate ICs include:
TTL Logic AND Gates

74LS08 Quad 2-input

74LS11 Triple 3-input

74LS21 Dual 4-input

CMOS Logic AND Gates

CD4081 Quad 2-input

CD4073 Triple 3-input

CD4082 Dual 4-input

7408 Quad 2-input AND Gate

In the next tutorial about Digital Logic Gates, we will look at the digital logic OR Gate
function as used in both TTL and CMOS logic circuits as well as its Boolean Algebra
definition and truth tables.

Logic OR Gate Tutorial

The Logic OR Gate
Logic OR Gate Definition
A Logic OR Gate or Inclusive-OR gate is a type of digital logic gate that has an output
which is normally at logic level 0 and only goes HIGH to a logic level 1 when one or

more of its inputs are at logic level 1. The output, Q of a Logic OR Gate only returns
LOW again when ALL of its inputs are at a logic level 0. In other words for a logic OR
gate, any HIGH input will give a HIGH, logic level 1 output.
The logic or Boolean expression given for a Digital Logic OR Gate is that for Logical
Addition which is denoted by a plus sign, ( + ) giving us the Boolean expression
of: A+B = Q.
Then we can define the operation of a 2-input logic OR gate as being:

If either A or B is true, then Q is true

2-input Transistor OR Gate

A simple 2-input logic OR gate can be constructed using RTL Resistor-transistor switches
connected together as shown below with the inputs connected directly to the transistor bases.
Either transistor must be saturated ON for an output at Q.

Logic OR Gates are available using digital circuits to produce the desired logical function
and is given a symbol whose shape represents the logical operation of the OR gate.

Digital Logic OR Gate Types

The 2-input Logic OR Gate
Symbol

Truth Table
B
A

2-input OR Gate
Boolean Expression Q = A+B

0
0
0
1
1
0
1
1
Read as A OR B gives Q

0
1
1
1

The 3-input Logic OR Gate

Symbol

3-input OR Gate

Boolean Expression Q = A+B+C

Truth Table
C
B
A
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Read as A OR B OR C gives Q

Q
0
1
1
1
1
1
1
1

Like the AND gate, the OR function can have any number of individual inputs. However,
commercial available OR gates are available in 2, 3, or 4 inputs types. Additional inputs will
require gates to be cascaded together for example.

Multi-input OR Gate

The Boolean Expression for this 6-input OR gate will therefore be: Q = (A+B)+(C+D)+
(E+F)
If the number of inputs required is an odd number of inputs any unused inputs can be held
LOW by connecting them directly to ground using suitable Pull-down resistors.

Commonly available Digital Logic OR Gate ICs include:

TTL Logic OR Gates

74LS32 Quad 2-input

CMOS Logic OR Gates

CD4071 Quad 2-input

CD4075 Triple 3-input

CD4072 Dual 4-input

7432 Quad 2-input Logic OR Gate

In the next tutorial about Digital Logic Gates, we will look at the digital logic NOT Gate
function as used in both TTL and CMOS logic circuits as well as its Boolean Algebra
definition and truth table.

Logic NOT Gate Tutorial

The Logic NOT Gate
Logic NOT Gate Definition
The digital Logic NOT Gate is the most basic of all the logical gates and is sometimes
referred to as an Inverting Buffer or simply a Digital Inverter. It is a single input device
which has an output level that is normally at logic level 1 and goes LOW to a logic level
0 when its single input is at logic level 1, in other words it inverts (complements) its
input signal. The output from a NOT gate only returns HIGH again when its input is at
logic level 0 giving us the Boolean expression of: A = Q.
Then we can define the operation of a single input Digital Logic NOT Gate as being:

If A is NOT true, then Q is true

Transistor NOT Gate

A simple 2-input logic NOT gate can be constructed using a RTL Resistor-transistor switches
as shown below with the input connected directly to the transistor base. The transistor must
be saturated ON for an inverted output OFF at Q.

Logic NOT Gates are available using digital circuits to produce the desired logical function.
The standard NOT gate is given a symbol whose shape is of a triangle pointing to the right
with a circle at its end. This circle is known as an inversion bubble and is used in NOT,
NAND and NOR symbols at their output to represent the logical operation of the NOT
function. This bubble denotes a signal inversion (complementation) of the signal and can be
present on either or both the output and/or the input terminals.

The Logic NOT Gate Truth Table

Symbol

Inverter or NOT Gate

Boolean Expression Q = not A or A

Truth Table
A
0

Q
1

Read as inverse of A gives Q

Logic NOT gates provide the complement of their input signal and are so called because
when their input signal is HIGH their output state will NOT be HIGH. Likewise, when
their input signal is LOW their output state will NOT be LOW. As they are single input
devices, logic NOT gates are not normally classed as decision making devices or even as a
gate, such as the AND or OR gates which have two or more logic inputs. Commercial
available NOT gates ICs are available in either 4 or 6 individual gates within a single IC
package.

The bubble (o) present at the end of the NOT gate symbol above denotes a signal inversion
(complementation) of the output signal. But this bubble can also be present at the gates input
to indicate an active-LOW input. This inversion of the input signal is not restricted to the
NOT gate only but can be used on any digital circuit or gate as shown with the operation of
inversion being exactly the same whether on the input or output terminal. The easiest way is
to think of the bubble as simply an inverter.

Signal Inversion using Active-low input Bubble

Bubble Notation for Input Inversion

NAND and NOR Gate Equivalents

An Inverter or logic NOT gate can also be made using standard NAND and NOR gates by
connecting together ALL their inputs to a common input signal for example.

A very simple inverter can also be made using just a single

stage transistor switching circuit as shown. When the
transistors base input at A is high, the transistor
conducts and collector current flows producing a voltage
drop across the resistor R thereby connecting the output
point at Q to ground thus resulting in a zero voltage
output at Q.
Likewise, when the transistors base input at A is low
(0v), the transistor now switches OFF and no collector
current flows through the resistor resulting in an output

voltage at Q high at a value near to +Vcc.

Then, with an input voltage at A HIGH, the output at Q will be LOW and an input
voltage at A LOW the resulting output voltage at Q is HIGH producing the complement
or inversion of the input signal.

Hex Schmitt Inverters

Fundamentals of Digital Logic

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A standard Inverter or Logic NOT Gate, is usually made up from transistor switching
circuits that do not switch from one state to the next instantly, there will always be some
delay in the switching action.
Also as a transistor is a basic current amplifier, it can also operate in a linear mode and any
small variation to its input level will cause a variation to its output level or may even switch
ON and OFF several times if there is any noise present in the circuit. One way to
overcome these problems is to use a Schmitt Inverter or Hex Inverter.
We know from the previous pages that all digital gates use only two logic voltage states and
that these are generally referred to as Logic 1 and Logic 0 any TTL voltage input
between 2.0v and 5v is recognised as a logic 1 and any voltage input below 0.8v is
recognised as a logic 0 respectively.
A Schmitt Inverter is designed to operate or switch state when its input signal goes above an
Upper Threshold Voltage or UTV limit in which case the output changes and goes LOW,
and will remain in that state until the input signal falls below the Lower Threshold Voltage
or LTV level in which case the output signal goes HIGH. In other words a Schmitt Inverter
has some form of Hysteresis built into its switching circuit.

This switching action between an upper and lower threshold limit provides a much cleaner
and faster ON/OFF switching output signal and makes the Schmitt inverter ideal for
switching any slow-rising or slow-falling input signal and as such we can use a Schmitt
trigger to convert these analogue signals into digital signals as shown.

Schmitt Inverter

A very useful application of Schmitt inverters is when they are used as oscillators or sine-tosquare wave converters for use as square wave clock signals.

Schmitt NOT Gate Inverter Oscillator

The first circuit shows a very simple low power RC type oscillator using a Schmitt inverter to
generate a square wave output waveform. Initially the capacitor C is fully discharged so the
input to the inverter is LOW resulting in an inverted output which is HIGH. As the
output from the inverter is fed back to its input and the capacitor via the resistor R the
capacitor begins to charge up.

When the capacitors charging voltage reaches the upper threshold limit of the inverter, the
inverter changes state, the output becomes LOW and the capacitor begins to discharge
through the resistor until it reaches the lower threshold level were the inverter changes state
again. This switching back and forth by the inverter produces a square wave output signal
with a 33% duty cycle and whose frequency is given as: = 680/RC.
The second circuit converts a sine wave input (or any oscillating input for that matter) into a
square wave output. The input to the inverter is connected to the junction of the potential
divider network which is used to set the quiescent point of the circuit. The input capacitor
blocks any DC component present in the input signal only allowing the sine wave signal to
pass.
As this signal passes the upper and lower threshold points of the inverter the output also
changes from HIGH to LOW and so on producing a square wave output waveform. This
circuit produces an output pulse on the positive rising edge of the input waveform, but by
connecting a second Schmitt inverter to the output of the first, the basic circuit can be
modified to produce an output pulse on the negative falling edge of the input signal.
Commonly available logic NOT gate and Inverter ICs include:
TTL Logic NOT Gates

74LS04 Hex Inverting NOT Gate

74LS14 Hex Schmitt Inverting NOT Gate

74LS1004 Hex Inverting Drivers

CMOS Logic NOT Gates

CD4009 Hex Inverting NOT Gate

CD4069 Hex Inverting NOT Gate

7404 NOT Gate or Inverter

In the next tutorial about Digital Logic Gates, we will look at the digital logic NAND Gate
function as used in both TTL and CMOS logic circuits as well as its Boolean Algebra
definition and truth tables.

Logic NAND Gate Tutorial

The Logic NAND Gate
Logic NAND Gate Definition
The Logic NAND Gate is a combination of the digital logic AND gate with that of an
inverter or NOT gate connected together in series. The NAND (Not AND) gate has an
output that is normally at logic level 1 and only goes LOW to logic level 0 when ALL
of its inputs are at logic level 1. The Logic NAND Gate is the reverse or Complementary
form of the AND gate we have seen previously.

Logic NAND Gate Equivalence

The logic or Boolean expression given for a logic NAND gate is that for Logical Addition,
which is the opposite to the AND gate, and which it performs on the complements of the
inputs. The Boolean expression for a logic NAND gate is denoted by a single dot or full stop
symbol, ( . ) with a line or Overline, ( ) over the expression to signify the NOT or logical
negation of the NAND gate giving us the Boolean expression of: A.B = Q.
Then we can define the operation of a 2-input Digital Logic NAND Gate as being:

If either A or B are NOT true, then Q is true

Transistor NAND Gate

A simple 2-input logic NAND gate can be constructed using RTL Resistor-transistor switches
connected together as shown below with the inputs connected directly to the transistor bases.
Either transistor must be cut-off OFF for an output at Q.

Logic NAND Gates are available using digital circuits to produce the desired logical
function and is given a symbol whose shape is that of a standard AND gate with a circle,
sometimes called an inversion bubble at its output to represent the NOT gate symbol with
the logical operation of the NAND gate given as.

The Digital Logic NAND Gate

2-input Logic NAND Gate
Symbol

2-input NAND Gate

Boolean Expression Q = A.B

Truth Table
B
A
Q
0
0
1
0
1
1
1
0
1
1
1
0
Read as A AND B gives NOT Q

3-input Logic NAND Gate

Symbol

3-input NAND Gate

Truth Table
C
B
0
0
0
0
0
1
0
1
1
0
1
0
1
1

A
0
1
0
1
0
1
0

Q
1
1
1
1
1
1
1

Boolean Expression Q = A.B.C

1
1
1
0
Read as A AND B AND C gives NOT Q

As with the AND function seen previously, the NAND function can also have any number of
individual inputs and commercial available NAND Gate ICs are available in standard 2, 3, or
4 input types. If additional inputs are required, then the standard NAND gates can be
cascaded together to provide more inputs for example.

A 4-input NAND Function

The Boolean Expression for this 4-input logic NAND gate will therefore be: Q = A.B.C.D
If the number of inputs required is an odd number of inputs any unused inputs can be held
HIGH by connecting them directly to the power supply using suitable Pull-up resistors.
The Logic NAND Gate function is sometimes known as the Sheffer Stroke Function and is
denoted by a vertical bar or upwards arrow operator, for example, A NAND B = A|B or AB.

The Universal NAND Gate

The Logic NAND Gate is generally classed as a Universal gate because it is one of the
most commonly used logic gate types. NAND gates can also be used to produce any other
type of logic gate function, and in practice the NAND gate forms the basis of most practical
logic circuits. By connecting them together in various combinations the three basic gate types
of AND, OR and NOT function can be formed using only NANDs, for example.

Various Logic Gates using only NAND Gates

As well as the three common types above, Ex-Or, Ex-Nor and standard NOR gates can be
formed using just individual NAND gates.
Commonly available Digital Logic OR Gate ICs include:
TTL Logic NAND Gates

74LS00 Quad 2-input

74LS10 Triple 3-input

74LS20 Dual 4-input

74LS30 Single 8-input

CMOS Logic NAND Gates

CD4011 Quad 2-input

CD4023 Triple 3-input

CD4012 Dual 4-input

7400 Quad 2-input Logic NAND Gate

In the next tutorial about Digital Logic Gates, we will look at the digital logic NOR Gate
function as used in both TTL and CMOS logic circuits as well as its Boolean Algebra
definition and truth tables.

Logic NOR Gate Tutorial

The Logic NOR Gate
Logic NOR Gate Definition
The Logic NOR Gate or Inclusive-NOR gate is a combination of the digital logic OR gate
with that of an inverter or NOT gate connected together in series. The NOR (Not OR) gate
has an output that is normally at logic level 1 and only goes LOW to logic level 0
when ANY of its inputs are at logic level 1. The Logic NOR Gate is the reverse or
Complementary form of the OR gate we have seen previously.

Logic NOR Gate Equivalent

The logic or Boolean expression given for a logic NOR gate is that for Logical Multiplication
which it performs on the complements of the inputs. The Boolean expression for a logic NOR
gate is denoted by a plus sign, ( + ) with a line or Overline, ( ) over the expression to
signify the NOT or logical negation of the NOR gate giving us the Boolean expression
of: A+B = Q.
Then we can define the operation of a 2-input Digital Logic NOR Gate as being:

If both A and B are NOT true, then Q is true

Transistor NOR Gate

A simple 2-input logic NOR gate can be constructed using RTL Resistor-transistor switches
connected together as shown below with the inputs connected directly to the transistor bases.
Both transistors must be cut-off OFF for an output at Q.

Logic NOR Gates are available using digital circuits to produce the desired logical function
and is given a symbol whose shape is that of a standard OR gate with a circle, sometimes
called an inversion bubble at its output to represent the NOT gate symbol with the logical
operation of the NOR gate given as.

The Digital Logic NOR Gate

2-input NOR Gate
Symbol

2-input NOR Gate

Boolean Expression Q = A+B

Truth Table
B
A
Q
0
0
1
0
1
0
1
0
0
1
1
0
Read as A OR B gives NOT Q

3-input NOR Gate

Symbol

Truth Table

3-input NOR Gate

Boolean Expression Q = A+B+C

C
B
A
Q
0
0
0
1
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
0
Read as A OR B OR C gives NOT Q

As with the OR function, the NOR function can also have any number of individual inputs
and commercial available NOR Gate ICs are available in standard 2, 3, or 4 input types. If
additional inputs are required, then the standard NOR gates can be cascaded together to
provide more inputs for example.

A 4-input NOR Function

The Boolean Expression for this 4-input NOR gate will therefore be: Q = A+B+C+D
If the number of inputs required is an odd number of inputs any unused inputs can be held
LOW by connecting them directly to ground using suitable Pull-down resistors.
The Logic NOR Gate function is sometimes known as the Pierce Function and is denoted
by a downwards arrow operator as shown, AB.

The Universal NOR Gate

Like the NAND gate seen in the last section, the NOR gate can also be classed as a
Universal type gate. NOR gates can be used to produce any other type of logic gate
function just like the NAND gate and by connecting them together in various combinations
the three basic gate types of AND, OR and NOT function can be formed using only NORs,
for example.

Various Logic Gates using only NOR Gates

As well as the three common types above, Ex-Or, Ex-Nor and standard NOR gates can also
be formed using just individual NOR gates.
Commonly available Digital Logic NOR Gate ICs include:
TTL Logic NOR Gates

74LS02 Quad 2-input

74LS27 Triple 3-input

74LS260 Dual 4-input

CMOS Logic NOR Gates

CD4001 Quad 2-input

CD4025 Triple 3-input

CD4002 Dual 4-input

7402 Quad 2-input NOR Gate

In the next tutorial about Digital Logic Gates, we will look at the digital logic Exclusive-OR
gate known commonly as the Ex-OR Gate function as used in both TTL and CMOS logic
circuits as well as its Boolean Algebra definition and truth tables.

Exclusive-OR Gate Tutorial

The Exclusive-OR Gate
Exclusive-OR Gate Definition
In the previous tutorials, we saw that by using the three principal gates, AND Gate, the OR
Gate and the NOT Gate, we can build many other types of logic gate functions, such as a
NAND Gate and a NOR Gate or any other type of digital logic function we can imagine.
But there are two other types of digital logic gates which although they are not a basic gate in
their own right as they are constructed by combining together other logic gates, their output
Boolean function is important enough to be considered as complete logic gates. These two
hybrid logic gates are called the Exclusive-OR (Ex-OR) Gate and its complement the
Exclusive-NOR (Ex-NOR) Gate.
Previously, we saw that for a 2-input OR gate, if A = 1, OR B = 1, OR BOTH A + B =
1 then the output from the digital gate must also be at a logic level 1 and because of this,
this type of logic gate is known as an Inclusive-OR function. The gate gets its name from the
fact that it includes the case of Q = 1 when both A and B = 1.

Introduction to Digital Electronics (Essential Electronics Series)

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If however, an logic output 1 is obtained when ONLY A = 1 or when ONLY B = 1 but

NOT both together at the same time, giving the binary inputs of 01 or 10, then the output
will be 1. This type of gate is known as an Exclusive-OR function or more commonly an
Ex-Or function for short. This is because its boolean expression excludes the OR BOTH
case of Q = 1 when both A and B = 1.
In other words the output of an Exclusive-OR gate ONLY goes HIGH when its two input
terminals are at DIFFERENT logic levels with respect to each other.
An odd number of logic 1s on its inputs gives a logic 1 at the output. These two inputs
can be at logic level 1 or at logic level 0 giving us the Boolean expression
of: Q = (A B) = A.B + A.B
The Exclusive-OR Gate function, or Ex-OR for short, is achieved by combining standard
logic gates together to form more complex gate functions that are used extensively in
building arithmetic logic circuits, computational logic comparators and error detection
circuits.
The two-input Exclusive-OR gate is basically a modulo two adder, since it gives the sum of
two binary numbers and as a result are more complex in design than other basic types of logic
gate. The truth table, logic symbol and implementation of a 2-input Exclusive-OR gate is
shown below.

The Digital Logic Exclusive-OR Gate

2-input Ex-OR Gate
Symbol

2-input Ex-OR Gate

Boolean Expression Q = A

Truth Table
B
A
Q
0
0
0
0
1
1
1
0
1
1
1
0
A OR B but NOT BOTH gives Q

The truth table above shows that the output of an Exclusive-OR gate ONLY goes HIGH
when both of its two input terminals are at DIFFERENT logic levels with respect to each
other. If these two inputs, A and B are both at logic level 1 or both at logic level 0 the
output is a 0 making the gate an odd but not the even gate.
This ability of the Exclusive-OR gate to compare two logic levels and produce an output
value dependent upon the input condition is very useful in computational logic circuits as it
gives us the following Boolean expression of:

Q = (A

B) = A.B + A.B

The logic function implemented by a 2-input Ex-OR is given as either: A OR B but NOT
both will give an output at Q. In general, an Ex-OR gate will give an output value of logic
1 ONLY when there are an ODD number of 1s on the inputs to the gate, if the two
numbers are equal, the output is 0.
Then an Ex-OR function with more than two inputs is called an odd function or modulo-2sum (Mod-2-SUM), not an Ex-OR. This description can be expanded to apply to any number
of individual inputs as shown below for a 3-input Ex-OR gate.

3-input Ex-OR Gate

Symbol

3-input Ex-OR Gate

Boolean Expression Q = A

Truth Table
C
B
A
Q
0
0
0
0
0
0
1
1
0
1
0
1
0
1
1
0
1
0
0
1
1
0
1
0
1
1
0
0
1
1
1
1
Any ODD Number of Inputs gives Q

The symbol used to denote an Exclusive-OR odd function is slightly different to that for the
standard Inclusive-OR Gate. The logic or Boolean expression given for a logic OR gate is
that of logical addition which is denoted by a standard plus sign.
The symbol used to describe the Boolean expression for an Exclusive-OR function is a plus
sign, ( + ) within a circle ( ). This exclusive-OR symbol also represents the mathematical
direct sum of sub-objects expression, with the resulting symbol for an Exclusive-OR
function being given as: (
).
We said previously that the Ex-OR function is not a basic logic gate but a combination of
different logic gates connected together. Using the 2-input truth table above, we can expand
the Ex-OR function to: (A+B).(A.B) which means that we can realise this new expression
using the following individual gates.

Ex-OR Gate Equivalent Circuit

One of the main disadvantages of implementing the Ex-OR function above is that it contains
three different types logic gates OR, NAND and finally AND within its design. One easier
way of producing the Ex-OR function from a single gate is to use our old favourite the
NAND gate as shown below.

Ex-OR Function Realisation using NAND gates

Exclusive-OR Gates are used mainly to build circuits that perform arithmetic operations and
calculations especially Adders and Half-Adders as they can provide a carry-bit function or
as a controlled inverter, where one input passes the binary data and the other input is supplied
with a control signal.
Commonly available Digital Logic Exclusive-OR Gate ICs include:
TTL Logic Ex-OR Gates

74LS86 Quad 2-input

CMOS Logic Ex-OR Gates

CD4030 Quad 2-input

7486 Quad 2-input Exclusive-OR Gate

The Exclusive-OR logic function is a very useful circuit that can be used in many different
types of computational circuits. Although not a basic logic gate in its own right, its usefulness
and versatility has turned it into a standard logical function complete with its own Boolean
expression, operator and symbol. The Exclusive-OR Gate is widely available as a standard
quad two-input 74LS86 TTL gate or the 4030B CMOS package.
One of its most commonly used applications is as a basic logic comparator which produces a
logic 1 output when its two input bits are not equal. Because of this, the exclusive-OR gate
has an inequality status being known as an odd function. In order to compare numbers that
contain two or more bits, additional exclusive-OR gates are needed with the 74LS85 logic
comparator being 4-bits wide.
In the next tutorial about Digital Logic Gates, we will look at the digital logic ExclusiveNOR gate known commonly as the Ex-NOR Gate function as used in both TTL and CMOS
logic circuits as well as its Boolean Algebra definition and truth tables.

Exclusive-NOR Gate Tutorial

The Exclusive-NOR Gate
Exclusive-NOR Gate Definition
The Exclusive-NOR Gate function or Ex-NOR for short, is a digital logic gate that is the
reverse or complementary form of the Exclusive-OR function we look at in the previous
tutorial. Basically the Exclusive-NOR Gate is a combination of the Exclusive-OR gate and
the NOT gate but has a truth table similar to the standard NOR gate in that it has an output
that is normally at logic level 1 and goes LOW to logic level 0 when ANY of its inputs
are at logic level 1.
However, an output 1 is only obtained if BOTH of its inputs are at the same logic level,
either binary 1 or 0. For example, 00 or 11. This input combination would then give
us the Boolean expression of: Q = (A B) = A.B + A.B

In other words, the output of a Digital Logic Exclusive-NOR Gate ONLY goes HIGH
when its two input terminals, A and B are at the SAME logic level which can be either at a
logic level 1 or at a logic level 0. An even number of logic 1s on its inputs gives a
logic 1 at the output. Then this type of gate gives and output 1 when its inputs are
logically equal or equivalent to each other, which is why an Exclusive-NOR gate is
sometimes called an Equivalence Gate.
The logic symbol for an Exclusive-NOR gate is simply an Exclusive-OR gate with a circle or
inversion bubble, ( ) at its output to represent the NOT function. Then the Logic
Exclusive-NOR Gate is the reverse or Complementary form of the Exclusive-OR gate, (
) we have seen previously.

Ex-NOR Gate Equivalent

The Exclusive-NOR Gate function is achieved by combining standard gates together to form
more complex gate functions and an example of a 2-input Exclusive-NOR gate is given
below.

The Digital Logic Ex-NOR Gate

2-input Ex-NOR Gate
Symbol

2-input Ex-NOR Gate

Boolean Expression Q = A

Truth Table
B
A
Q
0
0
1
0
1
0
1
0
0
1
1
1
Read if A AND B the SAME gives Q

The logic function implemented by a 2-input Ex-NOR gate is given as when both A AND B
are the SAME will give an output at Q. In general, an Exclusive-NOR gate will give an
output value of logic 1 ONLY when there are an EVEN number of 1s on the inputs to the
gate (the inverse of the Ex-OR gate) except when all its inputs are LOW.
Then an Ex-NOR function with more than two inputs is called an even function or modulo2-sum (Mod-2-SUM), not an Ex-NOR. This description can be expanded to apply to any
number of individual inputs as shown below for a 3-input Exclusive-NOR gate.

3-input Ex-NOR Gate

Symbol

3-input Ex-NOR Gate

Boolean Expression Q = A

Truth Table
C
B
A
Q
0
0
0
1
0
0
1
0
0
1
0
0
0
1
1
1
1
0
0
0
1
0
1
1
1
1
0
1
1
1
1
0
Read as any EVEN number of Inputs gives Q

We said previously that the Ex-NOR function is a combination of different basic logic gates
Ex-OR and a NOT gate, and by using the 2-input truth table above, we can expand the ExNOR function to: Q = A B = (A.B) + (A.B) which means we can realise this new
expression using the following individual gates.

Ex-NOR Gate Equivalent Circuit

One of the main disadvantages of implementing the Ex-NOR function above is that it
contains three different types logic gates the AND, NOT and finally an OR gate within its
basic design. One easier way of producing the Ex-NOR function from a single gate type is to
use NAND gates as shown below.

Ex-NOR Function Realisation using NAND gates

Ex-NOR gates are used mainly in electronic circuits that perform arithmetic operations and
data checking such as Adders, Subtractors or Parity Checkers, etc. As the Ex-NOR gate
gives an output of logic level 1 whenever its two inputs are equal it can be used to compare
the magnitude of two binary digits or numbers and so Ex-NOR gates are used in Digital
Comparator circuits.
Commonly available Digital Logic Exclusive-NOR Gate ICs include:
TTL Logic Ex-NOR Gates

74LS266 Quad 2-input

CMOS Logic Ex-NOR Gates

CD4077 Quad 2-input

74266 Quad 2-input Ex-NOR Gate

In the next tutorial about Digital Logic Gates, we will look at the digital Tri-state Buffer also
called the non-inverting buffer as used in both TTL and CMOS logic circuits as well as its
Boolean Algebra definition and truth table.

Digital Logic Gates Summary

Digital Logic Gates Summary
In this section about Digital Logic Gates, we have seen that there are three main basic types
of digital logic gate, the AND Gate, the OR Gate and the NOT Gate. We have also seen that
each gate has an opposite or complementary form of itself in the form of the NAND Gate, the
NOR Gate and the Buffer respectively, and that any of these individual gates can be
connected together to form more complex Combinational Logic circuits.
We have also seen, that in Digital Electronics both the NAND gate and the NOR gate can
both be classed as Universal gates as they can be used to construct any other gate type. In
fact, any combinational circuit can be constructed using only two or three input NAND or
NOR gates. We also saw that NOT gates and Buffers are single input devices that can also
have a Tri-state High-impedance output which can be used to control the flow of data onto a
common data bus wire.
Digital Logic Gates can be made from discrete components such as Resistors, Transistors
and Diodes to form RTL (resistor-transistor logic) or DTL (diode-transistor logic) circuits,
but todays modern digital 74xxx series integrated circuits are manufactured using TTL
(transistor-transistor logic) based on NPN bipolar transistor technology or the much faster
and low power CMOS based MOSFET transistor logic used in the 74Cxxx, 74HCxxx,
74ACxxx and the 4000 series logic chips.
The eight most standard individual Digital Logic Gates are summarised below along with
their corresponding truth tables.

Standard Logic Gates

The Logic AND Gate
Symbol

2-input AND Digital Logic Gate

Boolean Expression Q = A.B

Truth Table
B
A
Q
0
0
0
0
1
0
1
0
0
1
1
1
Read as A AND B gives Q

The Logic OR Gate

Symbol

Truth Table
B
0
0
1

A
0
1
0

Q
0
1
1

1
1
1
Read as A OR B gives Q

Boolean Expression Q = A + B

Inverting Logic Gates

The Logic NAND Gate
Symbol

Truth Table
B
A
Q
0
0
1
0
1
1
1
0
1
1
1
0
Read as A AND B gives NOT Q

Boolean Expression Q = A . B

The Logic NOR Gate

Symbol

Truth Table
B
A
Q
0
0
1
0
1
0
1
0
0
1
1
0
Read as A OR B gives NOT Q

Boolean Expression Q = A + B

Exclusive Logic Gates

The Logic Exclusive-OR Gate (Ex-OR)
Symbol

Boolean Expression Q = A

Truth Table
B
A
Q
0
0
0
0
1
1
1
0
1
1
1
0
Read as A OR B but not BOTH gives Q (odd)

The Logic Exclusive-NOR Gate (Ex-NOR)

Symbol

Truth Table
B
0
0
1
1

A
0
1
0
1

Q
1
0
0
1

Boolean Expression Q = A

Read if A AND B the SAME gives Q (even)

Single Input Logic Gates

The Hex Buffer
Symbol

Boolean Expression Q = A

Truth Table
A
Q
0
0
1
1
Read as A gives Q

The NOT gate (Inverter)

Symbol

Boolean Expression Q = not A or A

Truth Table
A
Q
0
1
1
0
Read as inverse of
A gives Q

The operation of the above Digital Logic Gates and their Boolean expressions can be
summarised into a single truth table as shown below. This truth table shows the relationship
between each output of the main digital logic gates for each possible input combination.

Digital Logic Gate Truth Table Summary

The following logic gates truth table compares the logical functions of the 2-input logic gates
detailed above.
Inputs
A
0
0
1
1

B
0
1
0
1

Truth Table Outputs For Each Gate

AND
NAND
OR
NOR
0
1
0
1
0
1
1
0
0
1
1
0
1
0
1
0

Truth Table Output for Single-input Gates

A
NOT
0
1
1
0

EX-OR
0
1
1
0

EX-NOR
1
0
0
1

Buffer
0
1

Pull-up and Pull-down Resistors

One final point to remember, when connecting together Digital Logic Gates to produce logic
circuits, any unused inputs to the gates must be connected directly to either a logic level

1 or a logic level 0 by means of a suitable Pull-up or Pull-down resistor ( for

example 1k resistor ) to produce a fixed logic signal. This will prevent the unused input to
the gate from floating about and producing false switching of the gate and circuit.

As well as using pull-up or pull-down resistors to prevent unused logic gates from floating
about, spare inputs to gates and latches can also be connected together or connected to leftover or spare gates within a single IC package as shown.

Binary Adder
The Binary Adder
Another common and very useful combinational logic circuit which can be constructed using
just a few basic logic gates and adds together binary numbers is the Binary Adder circuit. A
basic Binary Adder can be made from standard AND and Ex-OR gates allowing us to add
together two single bit binary numbers, A and B.
The addition of these two digits produces an output called the SUM of the addition and a
second output called the CARRY or Carry-out, ( COUT ) bit according to the rules for binary
addition. One of the main uses for the Binary Adder is in arithmetic and counting circuits.
Consider the simple addition of the two denary (base 10) numbers below.
123
+ 789
912

A
B
SUM

(Augend)
(Addend)

From our maths lessons at school, we learnt that each number column is added together
starting from the right hand side and that each digit has a weighted value depending upon its
position within the columns. When each column is added together a carry is generated if the
result is greater or equal to 10, the base number. This carry is then added to the result of the
addition of the next column to the left and so on, simple school maths addition, add the
numbers and carry.
The adding of binary numbers is exactly the same idea as that for adding together decimal
numbers but this time a carry is only generated when the result in any column is greater or
equal to 2, the base number of binary. In other words 1 + 1 creates a carry.

Binary Addition
Binary Addition follows these same basic rules as for the denary addition above except in
binary there are only two digits with the largest digit being 1. So when adding binary
numbers, a carry out is generated when the SUM equals or is greater than two (1+1) and
this becomes a CARRY bit for any subsequent addition being passed over to the next
column for addition and so on. Consider the single bit addition below.

Binary Addition of Two Bits

0
+0
0

0
+1
1

1
+0
1

1
+1
(carry) 10

When the two single bits, A and B are added together, the addition of 0 + 0, 0 + 1 and 1
+ 0 results in either a 0 or a 1 until you get to the final column of 1 + 1 then the sum is
equal to 2. But the number two does not exists in binary however, 2 in binary is equal to
10, in other words a zero for the sum plus an extra carry bit.
Then the operation of a simple adder requires two data inputs producing two outputs, the Sum
(S) of the equation and a Carry (C) bit as shown.

Binary Adder Block Diagram

For the simple 1-bit addition problem above, the resulting carry bit could be ignored but you
may have noticed something else with regards to the addition of these two bits, the sum of
their binary addition resembles that of an Exclusive-OR Gate. If we label the two bits as A
and B then the resulting truth table is the sum of the two bits but without the final carry.

2-input Exclusive-OR Gate

Symbol

Truth Table
B
0
0
1
1

2-input Ex-OR Gate

A
0
1
0
1

S
0
1
1
0

We can see from the truth table above, that an Exclusive-OR gate only produces an output
1 when either input is at logic 1, but not both the same as for the binary addition of the
previous two bits. However in order to perform the addition of two numbers, microprocessors
and electronic calculators require the extra carry bit to correctly calculate the equations so we
need to rewrite the previous summation to include two-bits of output data as shown below.
00
+ 00
00

00
+ 01
01

01
+ 00
01

01
+ 01
10

From the above equations we now know that an Exclusive-OR gate will only produce an
output 1 when EITHER input is at logic 1, so we need an additional output to produce
the carry bit when BOTH inputs A and B are at logic 1. One digital gate that fits the bill
perfectly producing an output 1 when both of its inputs A and B are 1 (HIGH) is the
standard AND Gate.

2-input AND Gate

Symbol

2-input AND Gate

Truth Table
B
0
0
1
1

A
0
1
0
1

C
0
0
0
1

By combining the Exclusive-OR gate with the AND gate results in a simple digital binary
adder circuit known commonly as the Half Adder circuit.

A Half Adder Circuit

A half adder is a logical circuit that performs an addition operation on two binary digits. The
half adder produces a sum and a carry value which are both binary digits.

Half Adder Truth Table with Carry-Out

Symbol

Truth Table
B
0
0
1
1

A
0
1
0
1

SUM
0
1
1
0

CARRY
0
0
0
1

From the truth table of the half adder we can see that the SUM (S) output is the result of the
Exclusive-OR gate and the Carry-out (Cout) is the result of the AND gate. Then the Boolean
expression for a half adder is as follows.
For the SUM bit

SUM = A XOR B = A B
For the CARRY bit

CARRY = A AND B = A.B

One major disadvantage of the Half Adder circuit when used as a binary adder, is that there is
no provision for a Carry-in from the previous circuit when adding together multiple data
bits.
For example, suppose we want to add together two 8-bit bytes of data, any resulting carry bit
would need to be able to ripple or move across the bit patterns starting from the least
significant bit (LSB). The most complicated operation the half adder can do is 1 + 1 but as
the half adder has no carry input the resultant added value would be incorrect. One simple
way to overcome this problem is to use a Full Adder type binary adder circuit.

A Full Adder Circuit

The main difference between the Full Adder and the previous Half Adder is that a full adder
has three inputs. The same two single bit data inputs A and B as before plus an additional
Carry-in (C-in) input to receive the carry from a previous stage as shown below.

Full Adder Block Diagram

Then the full adder is a logical circuit that performs an addition operation on three binary
digits and just like the half adder, it also generates a carry out to the next addition column.
Then a Carry-in is a possible carry from a less significant digit, while a Carry-out represents
a carry to a more significant digit.
In many ways, the full adder can be thought of as two half adders connected together, with
the first half adder passing its carry to the second half adder as shown.

Full Adder Logic Diagram

As the full adder circuit above is basically two half adders connected together, the truth table
for the full adder includes an additional column to take into account the Carry-in, CIN input as
well as the summed output, S and the Carry-out, COUT bit.

Full Adder Truth Table with Carry

Symbol

Truth Table
C-in
B
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1

A
0
1
0
1
0
1
0
1

Then the Boolean expression for a full adder is as follows.

For the SUM (S) bit

SUM = (A XOR B) XOR Cin = (A B) Cin

For the CARRY-OUT (Cout) bit

Sum
0
1
1
0
1
0
0
1

C-out
0
0
0
1
0
1
1
1

CARRY-OUT = A AND B OR Cin(A XOR B) = A.B + Cin(A

B)

An n-bit Binary Adder

We have seen above that single 1-bit binary adders can be constructed from basic logic gates.
But what if we wanted to add together two n-bit numbers, then n number of 1-bit full adders
need to be connected or cascaded together to produce what is known as a Ripple Carry
Adder.

Digital Logic Design, Fourth Edition

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A ripple carry adder is simply n, 1-bit full adders cascaded together with each full adder
representing a single weighted column in a long binary addition. It is called a ripple carry
adder because the carry signals produce a ripple effect through the binary adder from right
to left, (LSB to MSB).
For example, suppose we want to add together two 4-bit numbers, the two outputs of the
first full adder will provide the first place digit sum (S) of the addition plus a carry-out bit
that acts as the carry-in digit of the next binary adder.
The second binary adder in the chain also produces a summed output (the 2nd bit) plus
another carry-out bit and we can keep adding more full adders to the combination to add
larger numbers, linking the carry bit output from the first full binary adder to the next full
adder, and so forth. An example of a 4-bit adder is given below.

A 4-bit Ripple Carry Adder

One main disadvantage of cascading together 1-bit binary adders to add large binary
numbers is that if inputs A and B change, the sum at its output will not be valid until any
carry-input has rippled through every full adder in the chain because the MSB (most
significant bit) of the sum has to wait for any changes from the carry input of the LSB (less
significant bit). Consequently, there will be a finite delay before the output of the adder
responds to any change in its inputs resulting in a accumulated delay.
When the size of the bits being added is not too large for example, 4 or 8 bits, or the summing
speed of the adder is not important, this delay may not be important. However, when the size
of the bits is larger for example 32 or 64 bits used in multi-bit adders, or summation is
required at a very high clock speed, this delay may become prohibitively large with the
addition processes not being completed correctly within one clock cycle.
This unwanted delay time is called Propagation delay. Also another problem called
overflow occurs when an n-bit adder adds two parallel numbers together whose sum is
greater than or equal to 2n
One solution is to generate the carry-input signals directly from the A and B inputs rather than
using the ripple arrangement above. This then produces another type of binary adder circuit
called a Carry Look Ahead Binary Adder where the speed of the parallel adder can be
greatly improved using carry-look ahead logic.
The advantage of carry look ahead adders is that the length of time a carry look ahead adder
needs in order to produce the correct SUM is independent of the number of data bits used in
the operation, unlike the cycle time a parallel ripple adder needs to complete the SUM which
is a function of the total number of bits in the addend.
4-bit full adder circuits with carry look ahead features are available as standard IC packages
in the form of the TTL 4-bit binary adder 74LS83 or the 74LS283 and the CMOS 4008 which
can add together two 4-bit binary numbers and generate a SUM and a CARRY output as
shown.

74LS83 Logic Symbol

Summary of Binary Adders

We have seen in this tutorial about Binary Adders that adder circuits can be used to add
together two binary numbers producing a carry-out. In its most basic form, adders can be
made from connecting together an Exclusive-OR gate with an AND gate to produce a Half
Adder circuit. Two half adders can the be combined to produce a Full Adder.
There are a number of 4-bit full-adder ICs available such as the 74LS283 and CD4008. which
will add two 4-bit binary number and provide an additional input carry bit, as well as an
output carry bit, so you can cascade them together to produce 8-bit, 12-bit, 16-bit, adders but
the carry propagation delay can be a major issue in large n-bit ripple adders.