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EN TROD UVic ENON: 7:0 4 (INTRODUCTION 1:0 SPICE THIRD EDITION ELECTRIC CIRCUITS James W. Nilsson Professor Emeritus lowa State University A vv ADDISON-WESLEY PUBLISHING COMPANY Reading, Massachusetts + Menlo Park, California + New York Don Mills, Ontario. + Wokingham, England + Amsterdam * Bonn Sydney * Singapore + Tokyo + Madrid * San Juan Sponsoring Editor: Don Fowley Production Supervisor: Bette J. Aaronson Production Administrator: Sarah Hallet Text Designer: Deborah Schneck Technical Art Consultant: Joseph Vetere Illustrations: Capricom Design Cover Designer: Marshall Henrichs Copy Editor: Ursula Smith Manufacturing Supervisor: Hugh Crawford y Addison-Wesley Publishing Company, Inc. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or trans- mitted, in any form or by any means, electronic, mechanical, photocopying, record- ing, or otherwise, without the prior written permission of the publisher. Printed in the United States of America. Published simultaneously in Canada. ISBN 0-201-57288-5 ABCDEFGHIJ-DO-89 ABOUT THIS MANUAL Introduction to SPICE was written expressly to support the use of SPICE as a part of an introductory course in electric circuit analysis using Electric Circuits, Third Edi- tion. The supplement focuses on three things: (1) learning to write SPICE programs; (2) constructing circuit models of basic devices like op-amps and transformers; and (3) learning to challenge computer output data as a means to reinforce confidence in programming. SPICE is designed to simulate networks containing integrated circuit devices and therefore its range of application goes beyond the topics covered in the textbook. Even though we cannot exploit the full power of SPICE, we can start the introduction to this widely used simulation program at a level where the student can test the computer solutions. The use of SPICE involves learning a significant new technical vocabulary and a number of specialized techniques. As such, this supplement has been designed to stand as its own instructional unit. Our decision to separate this material from the parent text is related to this fact, but was also done as a service to the student: The portable format will greatly facilitate the student’s use of the supplement at a com- puter terminal. The supplement has been produced in this format to add value, but not cost, to the student—the supplement is free to purchasers of the text, and no adjust- ment to the price of the text has been made as a result. Introduction to SPICE includes a set of 61 problems. These problems were de- signed with two objectives in mind: first, to teach the student how to write SPICE programs, and second, to teach the importance of checking the output from SPICE programs to ensure that the computer-generated solution makes sense in terms of known circuit behavior. Complete solutions to these problems are included in the So- lutions Manual to Electric Circuits. Many of the Drill Exercises and Chapter Prob- Jems can be solved using SPICE. If time permits the textbook exercises and problems can be integrated with the supplement problems in writing SPICE programs and checking computer-generated solutions. INTEGRATING SPICE INTO INTRODUCTORY CIRCUITS COURSES While some circuits courses cover SPICE as an independent topic, many instructors prefer to integrate computer solutions throughout the course. The following measures have been taken to support such integration: (1) there are references in the margin of the text (marked in color by a logo and the acronym “SPICE”) to sections in the sup- plement which relate to the topic under study in the text; and (2) there is a grid on the following page that relates topics in the body and problem set of the supplement to topics in the text. iv INTRODUCTION TO SPICE The coverage in the supplement generally parallels the text as follows: Introduction to SPICE Supplement Supplement Section Topic Problems Comments 1-6 Data statements 1-8 Can be introduced after the and DC analysis node voltage method is discussed in Chapter 4 7 -Print and .Plot Should be introduced as part statements of transient analysis 8 Transient analysis = 9-22, 51-53 Can be introduced either in parallel with or following Chapters 7-10 9 Time-dependent 26-35, 56-61 Can be introduced as part of sources transient analysis 10 Sinusoidal steady 36-38 Can be introduced either in state parallel with or following Chapters 11-13 10 Bode plots 43 Can be introduced either in parallel with or following Sections 18.6-18.8 ll Mutual inductance 46-48 Can be introduced either in parallel with or following Chapter 14 12 Ideal transformer 44-45 Can be introduced either in parallel with or following Section 14.6 13, 14 Operational 49-50 Can be introduced either in amplifier and sub parallel with or following circuits Chapter 6 15 -Alter statement 54-55 Introduce at the discretion of the instructor 16 - Width statement Introduce as needed to control plots on the computer terminal 17 -Options statements Introduce if necessary, otherwise use as a reference for more advanced applications in follow-up courses 10 Introductory Comments 2 : Introduction and Passive Elements 3 ndependent Sources 6 Data Statements: Dependent Sources 8 Control Statements: Introduction and Simple DC Analysis 12 Control Statements: DC Analysis 16 -DC Control Statement . TF Control Statement -SENS Control Statement Control Statements: PRINT and .PLOT 27 Control Statements: Transient Analysis 28 Natural Response Step Response Time-Dependent Sources 34 Periodic-Pulse Source (PULSE) Damped Sinusoidal Source (SIN) Exponential-Pulse Source (EXP) Piecewise Linear Source (PWL) Control Statements: Sinusoidal Steady-State (AC) and Frequency Response Analysis 43 Steady-State Analysis (.AC Control Statement) Frequency Response Analysis (.AC Control Statement) Bode Plots Mutual Inductance 517 The Ideal Transformer 54 The Operational Amplifier 56 Subcircuits 58 -ALTER Control Statement 67 -WIDTH Control Statement 64 -OPTIONS Control Statement 64 Summary 67 Problems 67 Answers to Selected Problems 87 2 INTRODUCTION TO SPICE is a computer-aided simulation program that enables an engineer to design a cir- eae ait aula ay on a computer. SPICE, an acronym for a simulation program with integrated circuit emphasis, was developed by the Electroni h " Laborate University of California and has been available to the public since 15. Since we have not yet studied semiconductor devices, we shall restrict our appli- cations of SPICE to networks that contain the circuit elements previously introduced in the text. ‘We shall also limit our applications of SPICE to the types of circuit problems al- ready discussed in the text. Though SPICE is a general-purpose program designed for a wide range of circuit simulation—including the simulation of nonlinear circuits, trans- mission lines, noise, and distortion—we discuss here only the use of SPICE in de anal- ysis, transient analysis, and steady-state sinusoidal (ac) analysis. | INTRODUCTORY COMMENTS The general procedure for using SPICE “create a source file for the circuit to be te first step we analyzed. In the second step the Souce file is entered into the > computer, which ins the program and creates an out- put file. "Tie thi daa ipeaiaioencan plot the results of the output file. Before we discuss the creation of the source file, some general comments about the SPICE format are in order.” - 1. The input format is of the free-format type. Fields are separated by one or more blanks, a comma, an equal sign, or a left and right parenthesis. Extra spaces are ig- nored. ~ 2. A card may be continued by entering a plus (+) in column 1 of the following card. SPICE continues reading beginning with column 2. 3. A name field must begin with a letter (A through Z) and cannot contain any de- limiters. Only the first eight characters of the name are used. 4. A number field may be an integer field (4, 12, —8) or a floating-point field (2.5, 3.14159, —1.414). An integer or floating-point number may be followed by either an integer exponent (7E-6, 2.136E3) or a symbolic scale factor (7U, 2.136K). The sym- bolic scale factors and the corresponding exponential forms are summarized in Table 1. Letters immediately following a number that are not scale factors are ignored and so "SPICE Version 2G User's Guide A. Vladimirescu, K. Zhang, A. R. Newton, D. O. Peder- son, and A. Sangiovanni-Vincentelli, University of California at Berkeley, unpublished. 2 DATA STATEMENTS: INTRODUCTION AND PASSIVE ELEMENTS _ 3 TABLE 1, SPICE Scale Factors Symbol Exponential Form Value Ry EIS 108 P 1E-12 for? N 1E-9 10° U 1E-6 10° M 1E-3 10-3 K 1E3 10° MEG 1E6 10° G 1E9 10° it 1E12 10” are letters immediately following a scale factor. For example, 10, 10V, 10HZ, and 104. all represent the same number. The same can be said for 2.5M, 2.5MA, 2.5MSEC, and 2.5MOHMS. ing a source file to ana gram, we must do three e mus i it d; second, we mi st state the be performed; and third, we must specify the desired output. It is to divide the source file into three major subdivisions. on cons sts of data statem ts that desc the it B up of control statements that describe the type o ision contains the output specification state- _ feo eked tei ee SO which control what outputs are to be printed or plotted. ’ In addition to these major statement subdivisions, the source file must include two other statements. line of the source file must be a title statement, and the last line of the coal pees Sl aac . The format for the end statement is : pacer -END, where the period is part of the statement. DATA STATEMENTS: INTRODUCTION AND PASSIVE ELEMENTS based on nodal analysis. Therefore the first step in describing a circuit in a SPICE program is to number all the nodes in the circuit. The reference node must be numbered zero (0). The remaining nodes must be numb “ith nonnegative integers, but they need not be sequential. Once all the nodes in a circuit have been numbered, a circuit can be completely described by identifying the type of element that is connected between the nodes. In addition to describing the type of element, we must also specify 4 INTRODUCTION TO SPICE its numerical characteristics. SPICE places several restrictions on the topological characteris of a circuit. Therefore in describing a circuit we must make sure that (1) every node has at least two connections, (2) each node in the ci de ‘to the reference node, (3) the circuit does not contain loops of either voltage sources or “indvtors, and (4) the circuit des not conan cu ses of ether current sources anes pacitors. We begin our discussion of the data statements by considering the description of the following elements: resistors, inductors, capacitors, independent vi “pendent current sources, and controlled or dependent sources. The passive circuit element and each independent source must contain three pieces of mation nely, the type of element, two nodes to which it is connected, and it merical value. The description of each controlled or dependent source must contain four pieces of information: the type of element, the two nodes a ee the controlling nodes, and its numerical value. The format for each element data statement consists of (1) the element name, (2) the circuit nodes to which the element is connected, and (3) the values of the parameters that describe the behavior of the element. The element name must start with a letter of the alphabet—may contain up to eight alphanum > characters—and cannot contain any delimiters. The first letter in the element name specifies the type of element. If we let xxxxxxx denote an arbitrary alphanumeric string, then element names must conform to the following table: Type of Element Element Name Resistor Raxxxxxx Inductor Laxxxxxx Capacitor Crxxxxxx Independent voltage source Vaxxxxxx Independent current source Lecexxx Voltage-controlled voltage source Exxxxxxx Voltage-controlled current source Grexxxet Current-controlled voltage source Hxxxxexx Current-controlled current source Foxxx __ The format for identifying a 100-0 resistor named RX7 that is connected between nodes 7 and 12 would be : RX7 712 100 . a ekonit 2 Name Node Value connections A 10-mH inductor named LPGA8 that is connected between nodes 3 and 9 would 2 DATA STATEMENTS: INTRODUCTION AND PASSIVE ELEMENTS. 5 be formatted as 32 SS Node connections The format for a 0.58-yF capacitor denoted C1 and connected between nodes 5 and 0 would be cl 50 0.58E—6. a ne) SS Name Node Value connections The reference node 0 does not have to be given explicitly. That is, if only one node number is given, the unspecified node defaults to 0. Before continuing our discussion of data statements, we need to pause and comment on polarity references. In SPICE, when polarity is relevant to the behavior of the ele- ment, the first node is positive with respect to the second node. In the case of resistors the order of the nodes is irrelevant. The same can be said for inductors if the initial in- ductor current is zero and for capacitors if the initial capacitor voltage is zero. For ex- ample, in steady-state sinusoidal analysis initial conditions are irrelevant, and hence the ordering of the nodes of inductors and capacitors is also irrelevant in such analysis. For cases where inductors carry an initial current, the current reference direction is from the first-named node to the second-named node. As an example, consider the in- ductor shown in Fig. 1, which is carrying an initial current of 5 A oriented from node 8 to node 4. Let us assume the inductor is named LS. The element data statement in the file would be Ls 84 8.75E-3 Ic=5. Name Node Value Initial connections condition If the order of the nodes is reversed in the description of LS, then the initial current would be given as a negative value. In other words, another way to describe the induc- tor in Fig. | would be Ls 48 8.75SE-3 Ic = -5.. Figure 1 An inductor carrying an initial current. 6 INTRODUCTION TO SPICE — 128V + 0.25 nF Figure 2 A capacitor carrying an initial voltage. For cases where capacitors carry an initial voltage, the polarity of that voltage is positive at the first-named node. As an example, consider the capacitor shown in Fig. 2, which is carrying an initial voltage of 12.8 V, positive at node 12. Assume that the capacitor named CAP36. The element data statement in the source file would be CAP36, 125 IC = 12:8 a= =~ Sa — Name Node Value Initial connections condition As in the previous example, if the order of the nodes is reversed, the initial condi- tion would be entered as a negative value. Hence another way to describe the capacitor in Fig. 2 would be CAP36, 512 0.25E - 9 IC = =12.8) 3 DATA STATEMENTS: INDEPENDENT SOURCES The element data statement for independent voltage and current sources must specify the type of source—that is, whether it is de or ac. If it is ac, it is necessary to specify both the amplitude and phase angle. The polarity of an independent source is deter- mined by the order in which the nodes are specified. For a voltage source, the first node is positive with respect to the second node. For a current source, the current di- rection through the source is from the first node to the second node: For example, the data statement for a 100-V dc voltage source named VSOURCE1 connected between nodes | and 0, as shown in Fig. 3, would be VSOURCE1 10 pc 100. Name Node Type of Value connections source 100 Vide) ° 1 Figure 3 A 100-V dc source connected between nodes 1 and 0, with node 1 positive with re- spect to node 0. 3 DATA STATEMENT: INDEPENDENT SOURCES i 7 If the order of the nodes is reversed in the description of the source in Fig. 3, the value is entered as a negative number; thus ‘VSOURCE1 ol DC —100 Assume that we have an ac current source as shown in Fig. 4. Assume further that this current source is called ISO6. The data statement enetered in the source file would be 1so6 34 AC 5.2 68 = at —— eee wed Name Node Type Amplitude Phase connections angle There are two ways to compensate for reversing the order of the nodes on an ac source. Either a minus sign can be attached to the value of the amplitude or 180° can be added to the value of the phase angle. For example, two alternative data statements for the current source seen in Fig. 4 are 1S06 43 AC ES 68 and 1S06 43 AC 52. 248 In SPICE an independent voltage source of zero value can be used as an ammeter. ‘That is, in order to measure a current, a zero-valued voltage source can be inserted in series with the element where the current is desired. The zero-valued voltage source will not disturb the circuit since it is equivalent to a short circuit. These zero-valued voltage sources are necessary because the only current SPICE is designed to output is the current in sources. For example, assume that we have a resistor between nodes 8 and 9, as shown in Fig. 5, and we wish to measure the de current i. In order to measure the current—that 52/68 3e—__{ = \—_—o4 Figure 4 A phasor-domain current source connected between nodes 3 and 4. The reference di- rection for the current is from node 3 toward node 4 100 Figure 5 A 10-0 resistor connected between nodes 8 and 9 8 INTRODUCTION TO SPICE Figure 6 The two branches needed to measure i, is, to get a printout of i;—we have to insert a zero-value voltage source in series with the 10-0 resistor. Adding the voltage source will also add a node to the circuit, Let us identify this additional node as node 15. The two branches relevant to the measurement of i, are shown in Fig. 6. If the name of the 10-0 resistor is RI and the name of the independent zero-value votlage source is VZ1, the two data statements in the source file are then RI 815 10 VZ1 159 Dc 0 Since the reference direction of i, is specified, the order of the nodes describing VZ1 is relevant to the proper measurement of i,. That is, the direction of the current through VZ1 is from the first-named node to the second-named node. If the nodes of VZ1 are reversed, the program will print the negative of i,. 4 DATA STATEMENTS: DEPENDENT SOURCES In discussing the data statements for dependent sources, it is convenient to divide them into voltage-controlled sources and current-controlled sources. For a voltage- controlled voltage source, the format is Exxcxxxx NI N2 NCI NC2 VALUE. Laas Sy Sa) eee Name Node Controlling Voltage connections nodes gain ‘As an example, consider the circuit seen in Fig. 7, where the dependent voltage source is named ES2. The data statement for this voltage-controlled voltage source is ES2 43 12 3. Name Node Controlling Voltage connections nodes gain Observe that the order of the nodes is relevant to the proper description of the source. Node 4 is positive with respect to node 3—hence the order 4,3. The reference polarity for the controlling voltage vs is positive at node 1; therefore the order of the con- trolling nodes is 1,2. 4 DATA STATEMENTS: DEPENDENT SOURCES 2. 1560 ton 5 2 <> ‘ i (+) a0 1 20 0 10 Figure 7 A circuit illustrating the data statement for a voltage-controlled voltage source. The format of the data statement for a voltage-controlled current source is Grxxxxxx NI N2 NCI NC2 VALUE . eee eee See eee Name Node Controlling Transcon- connections nodes ductance The data statement for the voltage-controlled current source in the circuit seen in Fig. 8, which is called GS04, is Gs04 23 13 0.2 me Name Node Controlling Transcon- connections nodes ductance Figure 8 A circuit illustrating the data statement for a voltage-controlled current source. 10 INTRODUCTION TO SPICE Here again the order of the nodes is germane to the proper description of the voltage-controlled current source. The reference direction for the current source is from node 2 to node 3; therefore the order of the node connections is 2,3. The con- trolling voltage (vs) is positive at node 1; thus the order of the controlling nodes is 1,3. A current-controlled source requires the insertion of a zero-valued voltage source in the circuit to measure the controlling current. Once this zero-valued voltage source has been named, it is entered on the data statement of the current-controlled source. The format of a data statement for a current-controlled voltage source is Hoc NI N2 Vicxxcxxxx VALUE eae oy Rie Name of Node Name of the Trans- current-controlled connections zero-valued resistance, voltage source voltage source in ohms used to measure the controlling current The polarity of the current-controlled voltage source is relevant to the behavior of the device; hence the order of the nodes is important. As before, N1 is positive with re- Spect to N2. It is also important to note that the controlling current is directed into the Positive terminal of the zero-valued voltage source. Consider the circuit seen in Fig. 9, which contains a current-controlled voltage source. Then consider the same circuit as it is redrawn in Fig. 10, with the nodes num- bered and a zero-valued voltage source labeled VDELTA inserted in series with the branch containing is. Assuming that the current-controlled voltage source has been named HSO1, we can see that the pertinent data statement for the current-controlled 247.5V 200 Figure 9 A circuit illustrating the data statement for a current-controlled voltage source. 4 DATA STATEMENTS: DEPENDENT SOURCES an VDELTA 200 S01 Figure 10 The circuit of Fig. 9, with the nodes numbered and the zero-valued voltage source inserted, voltage source is HSO1 40 VDELTA 8. eo as eas ~ Name Node Controlling ‘Trans- connections current resistance ‘The source file will also contain the data statement VDELTA 2.5: DC Oo. Recent ae aie, ~ Name Node Type of Value connections source The format for the current-controlled current source is : Fxxxxxxx NI N2 Vax VALUE . Name of Node Name of the Current current-controlled connections zero-valued gain current source voltage source used to measure the controlling current Assume that the current-controlled current source in the circuit shown in Fig. 11 has been labeled F1 and that the zero-valued voltage source used to measure the controlling 12 INTRODUCTION TO SPICE VALPHA, Figure 11. A circuit containing a current-controlled current source. current is called VALPHA. Then the data statements relating to this source are Fl ol VALPHA 0.1 VALPHA os DC 0 We summarize this introduction to SPICE data statements by writing them for the circuit seen in Fig. 10. USTRATIVE EXAMPLE (title statement) | 3 o 5 , 21 1 23 4 34 10 45 20 25 oC ° 10 oD 20708 1 40 Ro i" 3 5 CONTROL STATEMENTS: INTRODUCTION AND SIMPLE DC ANALYSIS As we mentioned earlier, SPICE was developed to solve circuits containing integrated- circuit devices. One of the important aspects of such analysis is to determine the de op- erating point, or bias level, of the circuit. As a result, SPICE has been programmed to automatically perform a de analysis prior to both transient and ac analysis. Therefore it is possible to get a dc solution by simply describing the circuit. It is not even necessary 5 CONTROL STATEMENTS: INTRODUCTION AND SIMPLE DC ANALYSIS 13 to insert a print instruction! However, when the simple de analysis program is used, the printed output is limited to node-to-reference voltages and currents in sources. As an example of this type of analysis we shall use SPICE to find the node voltages and source currents in the circuit shown in Fig. 11. The input source file is ILLUSTRATIVE EXAMPLE OF SIMPLE DC ANALYSIS ru o 1 VALPHA 0-1 VALPHA o 5 oc 0 Rt 164 10 RZ 4 0 22 vi z i DC 20 RB 23 2 Ra 304 3.6 RS 3°05 68 + END and the pertinent printed output data is NODE VOLTAGE’ i —14,1230 2 5.8770 3 3.2987 4 1.1732 5 0.0000 VOLTAGE SOURCE CURRENTS NAME CURRENT VALPHA —4,848D-02 vai —1.290D+00 TOTAL POWER DISSIPATION 2.58D+01 WATTS CURRENT-CONTROLLED CURRENT SOURCES Fi 1-SOURCE —4,85E-03 It is understood that voltages are given in volts and currents are given in amperes. Note that in some cases the letter D is used in place of the exponential symbol E to denote powers of 10 ‘In the actual printout, node voltages are printed horizontally across the page. 14 INTRODUCTION TO SPICE It is necessary to comment here on the total-power-dissipation value, which is auto- matically printed out when simple de analysis is invoked. In SPICE this power repre- sents the net power generated by the independent sources in the circuit. If a dependent source is generating power, its value is not included in this figure. For example, in the circuit seen in Fig. 11 the power developed by the 20-V source is 25.80 W, and the to- tal power dissipated in the five resistors is 25.87 W. The difference of 0.07 W is devel- oped by the current-controlled current source. A more dramatic illustration of this ob- servation is brought out in Example 1. EXAMPLE 1 (a) Use SPICE to find the voltages v, and vy in the circuit seen in Fig. 12. (b) Use the SPICE solution to calculate (1) the total power dissipated in the circuit, (2) the power supplied by the independent current source, and (3) the power supplied by the current-controlled voltage source SOLUTION (a) The circuit of Fig. 12 is redrawn in Fig. 13. Note the insertion of a zero-value de voltage source in series with the 20- resistor. The names of the circuit components are given on the figure to facilitate reading the SPICE program. 19 +); 265 4 Al va 50 ‘ 200 v is 24 Aldo) Q) 1 a nal Figure 12 A circuit used to check power dissipation, 20.388/3, ~O: Figure 13 The circuit of Fig. 12 redrawn for SPICE analysis. 5 CONTROL STATEMENTS: INTRODUCTION AND SIMPLE DC ANALYSIS 15 The SPICE program is A CIRCUIT USED TO CHECK POWER DISSIPATION It o1 oc 24 YDELTA 13 oC 0 Hi 20 YDELTA 20.3846 Ri 10 5 R2 30 20 R3 be 1 +END (b) The pertinent SPICE printout is NODE VOLTAGE (1) 104,0000 (2) 106.0000 (3) 104.0000 VOLTAGE SOURCE CURRENTS NAME CURRENT YDELTA 5.200D+00 TOTAL POWER DISSIPATION 2,50D+03 WATTS CURRENT-CONTROLLED VOLTAGE SOURCES HI Y-SOURCE 106.000 I-SOURCE —2,00E+00 It follows directly that v, = V(1) = 104.00 V, vy = V(2) = 106.00 V. 1. Psa = 1042/5 = 2163.20 W; Prog, = 1047/20 = 540.80 W; Pin = (106 — 104)?/1 = 4.00 W; D Pas = 2163.20 + 540.8 + 4 = 2708 W. 2. Pasa(supplied) = 104(24) = 2496 W. 3. Pia(supplied) = 106(2) = 212 W. 16 INTRODUCTION TO SPICE Note that the sum of power dissipated equals the sum of the power supplied. Also note that the total-power-dissipated value given by SPICE is 2500 W, which, when roundoff is taken into consideration, corresponds to the power sup- plied by the independent current source. 6 CONTROL STATEMENTS: DC ANALYSIS When other than the simple de analysis described in the previous section is desired, four options are available. These are denoted .OP, .DC, .TF, and .SENS. (Note that "control commands always begin with a period.) We shall delay our discussion of the -OP (operating-point) option until such time as we can illustrate its use (see Ex- ample 10). -DC Control Statement The .DC control statement allows the SPICE user to increment an independent input source (either voltage or current) over a specified range of values. The user also specifies the size of the increment. The general format for the .DC control statement is .DC SCRNAM START STOP INCR SCRNAM is the name of the independent voltage or current source and START, STOP, and INCR are the starting, final, and incrementing values, respectively. For ex. ample, the following control statement .DC SOL ~5 10 1.0 will cause a de voltage source named VSO1 to start at —5 V and stop at 10 V, with in- terim steps of 1.0 V. For each value of VSO1 the user can request a specified output variable to be either printed or plotted. Examples 2 and 3 illustrate the use of the .DC control statement. It is important to note that when this statement is used it is necessary for the user to state explicity what output variables are to be printed or plotted. We shall have more to say about the .PRINT and .PLOT statements later. When studying Examples 2 and 3, sim- ply note now that the .PRINT and .PLOT statements refer to the type of analysis (dc) and state the output variables to be printed or plotted. EXAMPLE 2 For the circuit shown in Fig. 14 use SPICE to find the values of i, and v. when v, varies from 0 to 100 V in 10-V steps. 320 | 6 CONTROL STATEMENTS: DC ANALYSIS 17 \ Figure 14 The circuit for Example 2 320 “ Iso Figure 15 The circuit of Fig. 14 prepared for SPICE analysis. SOLUTION The circuit in Fig. 14 is redrawn in Fig. 15, with the nodes numbered and the ele- ments named to facilitate reading the SPICE program. Note the insertion of a zero- valued independent voltage source in series with the 32-0 resistor to measure the current ig. A SPICE program that solves the problem is A PROGRAM TO ILLUSTRATE THE «DC CONTROL STATEMENT vso 1 0 DC oO Iso o 3 be 5 VAMP. 4 3 boc 0 Ri 1 2 5 R2 2 0 40 R3 2 3 8 Ra 1 4 32 +0C vso ° 100 10 +PRINT DC I(VAMP) VCLe2) END 18 INTRODUCTION TO SPICE 6 CONTROL STATEMENTS: DC ANALYSIS and the relevant output from the program is denotes the new node between VISO and ISO. The SPICE program is vso 1 (VAMP) (192) SOLUTION OF EXAMPLE 3 0.000E-01 -1.400E+00 —-1.600E+00 vso 1 0 DC O 1,000E+01 ~-1.375E+00 —1.500E+00 Iso 3 3 oe 0 2,000E+01 -—1.350E+00 -1,400E+00 VIso Oo S DC O 3,000E+01 -1,325E+00 -1.300E+00 R1 : 5 4,000E+01 -—1.300E+00 -1,200E+00 R2 2 0 40 5.O000E+01 -1.275E+00 -1,100E+00 R3 Zz 3 8 6.000E+01 -1.250E+00 —-1.000E+00 Ra 1 3 32 7,000E+01 -1.225E+00 -—8,000E+00 DC vso ° 100 20 Is0 0 5 1 8,000E+01 -1.200E+00 -8.000E+00 »PRINT DC (142) I(VISO) 9,000E+01 -1.175E+00 -—7,000E+00 +END . + —1,150E+ -8. + , PS Let BO eS and the output from the program is vso VCte2)d 1(¥ISO) 0,000E-01 0,000E-01 0,000E-01 2,000E+01 2,000E+00 0,000E-01 The .DC control statement also allows the user to sweep a second independent 4.000E+01 4,000E+00 9, 000E-01 source over a specified range of values. For each specified value of the second source, G.000E+01 6,000E+00 0, 000E-01 the first source is swept through its designated range. Hence SPICE can be used to gen- B,000E+01 8, 000E+00 = 0, 000E-01 erate a family of characteristics; each member of the family corresponds to a specific 1,000E+02 1, 000E+01 0. 000E-01 value of the second source. This feature of SPICE is particularly useful in plotting the O.,000E-01 -3,200E+00 1,000E+00 output characteristics of semiconductor devices. Z.O00E+01 -1.200E+00 1, 000E+00 The format for the .DC control statement when a second source enters into the anal- 4,000E+01 8,000E-01 1,000E+00 ysis is 6,O000E+01 2.BO0E+00 1,000E+00 B,OO00E+01 4,800E+00 1,000E+00 -DC SRC1 STARTI STOP1 INCRI SCR2 START2 STOP2 INCR2 1,000E+02 6,800E+00 1,000E+00 To illustrate this feature of SPICE, we shall return to the circuit in Example 2 and in- TeOO0E-01 =BeAOOE+00 2 i000E+00 crement the current source as well as the voltage source. The problem is formulated in 2000EtGL —ArdQGE+OG ZrOOcErO Example 3. 4,000E#01 -2,400E#00 2, 000E+00 6.000E+01 -4,000E-01 2.000E+00 EXAMPLE 3 B.000E+01 1,600E+00 2.000E+00 | 1,000E+02 3,600E+00 2,000E+00 } 0,000E-01 -9,600E+00 3,000E+00 4 2,000E+01 -7,B00E+00 3,000E+00 4,000E+01 -5,600E+00 3,000E+00 G.O000E+01 -3,600E+00 3,000E+00 B,Q00E+01 -1,G00E+00 3,000E+00 In order to print out ISO, a zero-value voltage source is inserted in series with ISO. 1,000E+02 4,000E-01 3, 000E+00 Refer to Fig. 15 and visualize this source placed between nodes 0 and 5, where 5 0,000E-01 -1.2B0E+01 4,000E+00 The current source in the circuit shown in Fig. 14 is varied from 0 to 5 A in I-A steps. For each value of the current, tabulate v, and i, as v, varies from 0 to 100 V in increments of 20 V. SOLUTION 20 INTRODUCTION TO SPICE 2.000E+01 -1,080E+01 4,000E+00 4,000E+01 -8,800E+00 4,000E+00 6, 000E+01 -B.BOOE+00 4, 000E+00 8.000E+01 -4,800E+00 4,000E+00 1,000E+02 -2,B00E+00 4,000E+00 0.,000E-01 -1,600E+01 5,000E+00 2,000E+01 -1,400E+01 5,000E+00 4,000E+01 -1,200E+01 5,000E+00 6.000E+01 -1,000E+01 5,000E+00 8.000E+01 -8,000E+00 5,000E+00 1,000E+02 -6,000E+00 5,000E+00 Recall from Section 5 that when simple de analysis is employed the only output voltages printed are the nodes-to-reference voltages. The .DC control statement can be used to obtain the voltage between any two nodes. This can be done by sweeping only ‘one source and then setting the sweep range to zero by makinig START1 = STOP] and setting INCR to any positive value. To illustrate we return to the circuit shown in Fig. 11. We already have a simple de analysis of this circuit—see the illustrative example of Section 5, with its accompany- ing printout. Remember this printout was obtained without a .PRINT statement, and in this mode we have no control over what is printed. Let us assume that in the circuit in Fig. 11 the voltages V(3,4), V(2,4), and V(1,4) are of interest. To obtain these desired voltages we modify that original SPICE program in the following ways. 1. the independent voltage source entry is modified to read V1 2 1 DC 0; 2. a .DC control statement reading .DC V1 20 20 1 is added to the program: 3. a PRINT statement requesting the desired voltages is added to the program. The new program is now ILLUSTRATIVE EXAMPLE OF DC ANALYSIS Ft © 1 VALPHA 0.1 VALPHA O 5 oc oO Rt 164 10 R2 4 0 22 Vai 21 oc Oo R3 2 3 2 Ra 304 3.6 RS 3°05 68 +DC Vt 20 20 1 *PRINT DC V(394) Y(2s4) V(154) +END 6 CONTROL STATEMENTS: DC ANALYSIS . 21 and the output voltages from this new program are V1 2, 000E+01 V(3.d) 4, 470E+01 V(21+4) — -7.050E+00 Wild) -1,295E+01 We shall leave it to the reader to verify that these results are consistent with those given by the original program. It is also worth noting that, when the .DC control state- ment is used, only the requested node voltages are printed, along with the voltage of the independent voltage source—V1 in this example. -TF Control Statement The .TF control statement is designed so that SPICE will compute three characteristics of the circuit being analyzed. First, it will compute the ratio of the output variable to the input variable. This ratio is referred to as the transfer function of the circuit. Sec- ond, it will compute the resistance seen by the input source, and third, it will compute the output resistance seen at the terminals of the output variable. The general format of the .TF (transfer function) control statement is oF OUTVAR INSRC. See es peblgaer Output Input variable source When the .TF control statement is used in a SPICE program, the program will au- tomatically output (i.e., no .PRINT command is necessary) the same information as obtained from a simple de program, plus 1. the ratio OUTVAR/INSRC; 2. the input resistance seen by INSRC; and 3. the output resistance at OUTVAR. The .TF control statement can be used to find the Thévenin equivalent with respect to a designated pair of terminals. Examples 4 and 5 have been designed to illustrate this application. EXAMPLE 4 Use SPICE to find the Thévenin equivalent with respect to the terminals a,b for the circuit seen in Fig. 16. 22 INTRODUCTION TO SPICE 20K Figure 16 The circuit for Example 4 SOLUTION The circuit of Fig. 16 is prepared for SPICE analysis as shown in Fig. 17. The zero- value voltage source VAIB is used to measure the controlling current is. The com- ponents have been labeled to facilitate reading the SPICE program. In comparing Fig. 17 with Fig. 16, note that the Thévenin voltage v,, will be node voltage V(5,0) or V(5). If we specify V(5,0) as the output variable in the . TF control statement, the output resistance from the SPICE program will be the Thévenin resistance. The SPICE program for the circuit in Fig. 17 is FINDING A THEVENIN EQUIVALENT VIA SPICE vi 1 0 DC 119,.59E-3 Rt 1°92 4E3 R2 2 0 21E3 VAIB 2 3 oc oO R3 3°04 «#1,65E3 Ra 4 0 600 RS 4 5 203 Fi 5 4 VAIB 39 RS 5 0 750 .TF V(510) Vt + END RS, 20k. Re 0.750 Figure 17 The circuit of Fig. 16 prepared for SPICE analysis. 6 CONTROL STATEMENTS: DC ANALYSIS 23 744.80 Figure 18 The Thévenin equivalent of the circuit seen in Fig. 16. o.10v b The pertinent data from the SPICE printout is NODE VOLTAGE (5S) -0.1000 and OUTPUT RESISTANCE AT V(5) = 7,446D+02 It follows that the Thévenin equivalent is as shown in Fig. 18. It is also worth noting that the Thévenin voltage can be calculated from the transfer-function ratio V(5)/V1. From the SPICE printout we have V(S)/UL = -8,359D-01 Thus V(5) = (119.59 x 107%)(—0.8359) = —0.100. EXAMPLE 5 Use SPICE to find the Thévenin equivalent with respect to the terminals a,b for the circuit seen in Fig. 19. SOLUTION In studying the circuit of Fig. 19, note that i, is the current in an independent voltage source and therefore we will not have to use a zero-valued voltage source to measure the controlling current is. Also note there is only one connection to the node labeled b. Since SPICE requires at least two connections to every node, we must modify the circuit to conform to this requirement. There are two ways we can do this. First, a resistor that is large compared with the other resistors in the circuit—say, 10° © for the circuit under investigation—can be connected to node b and any other node in the circuit without affecting the behavior of the circuit. Sec- ond, a capacitor can be connected between node b and any other node. The capaci- tor will behave like an open circuit during de analysis and therefore will not influence the de Thévenin equivalent. The circuit of Fig. 19 is redrawn in Fig. 20 in preparation for writing the SPICE program. Note that we have connected a resistor of 10° 1 between nodes 0 and 3. 24 INTRODUCTION TO SPICE 2v Big 20v Figure 20 The circuit of Fig. 19 redrawn for SPICE analysis. Also observe that node b was chosen as the reference node. This was done since SPICE automatically prints all the node-to-reference voltages, and therefore the Thévenin voltage becomes part of the printout if node b is chosen as the reference. The final observation we bring to the reader's attention is that since there are three independent sources we have a choice as to which one we use in the . TF con- trol statement. Since we are only interested in the Thévenin voltage and resistance with respect to the terminals a,b, the choice is immaterial. In other words, the transfer-function ratio and the input resistance at the source are not germane to the Thévenin equivalent at a,b. In the SPICE program that follows we selected the 20-V source as the input source. A SPICE program for finding the Thévenin equivalent is SOLUTION OF EXAMPLE 5S Rt 1 2 @ R2 13 7 Vi 2 3 oc 20 R3 0 4 tel R4 Oo 3 166 v2 4 5 oC 2 RS 5 3 0.7 F1 6 5 v2 3 RE a F 6 v3 7° 3 pe 40 sTF V(190) VE +END 6 CONTROL STATEMENTS: DC ANALYSIS 25 6a Vv Figure 21 The Thévenin equivalent for Example 5 and the relevant output from the program is NODE VOLTAGE (1) 12.0000 OUTPUT RESISTANCE AT Y(1) = 6.000D+00 It follows that the Thévenin equivalent is a 12-V source in series with a 6-0 resis- tor, as shown in Fig. 21 -SENS Control Statement The purpose of the .SENS control statement is to obtain the de small-signal sensitivi- ties of each specified output variable with respect to every circuit parameter. This means that for circuits containing a large number of elements tremendous amounts of output data can be generated, particularly when the sensitivity of more than one output : variable is of interest. Example 6 illustrates how the .SENS control statement can be : used to preduct the behavior of an unloaded voltage-divider circuit. EXAMPLE 6 Use SPICE to study the sensitivity of the output voltage v, in the voltage-divider circuit of Fig. 22. The nodes have been numbered in the anticipation of writing a SPICE program. Figure 22 The circuit for Example 6. i 26 INTRODUCTION TO SPICE SOLUTION Since we have three elements in the circuit, SPICE will give us the sensitivity of v., with respect to the independent voltage source, the 25-2 resistor, and the 100- resistor. The SPICE program is EXAMPLE OF SENSITIVITY ANALYSIS vt 1 0 be 125 Ri 1 2 25 RZ 2 0 100 »SENS Y(210) +END Note that no .PRINT statement is required. SPICE will automatically print out the data associated with simple de analysis plus the sensitivity data. The data relevant to sensitivity are SENSITIVITIES OF OUTPUT V(2) ELEMENT ELEMENT ELEMENT NORMALIZED NAME VALUE SENSITIVITY SENSITIVITY (VOLTS/UNIT) (VOLTS/PERCENT) R1 2.500D+01 -8.000D-01 -2,000D-01 R2 1,000D+02 2.000D-01 2,000-01 Va 1,250D+02 8.000D-01 1,000D+00 From the simple de analysis of the circuit we have v. = V(2) = 100 V when R1, R2, and V1 are at their nominal values. From the sensitivity data we can deduce the following: 1. if R, increases 1 0, V(2) will decrease by 0.8 V—that is, V(2) = v, = 99.2 Vs 2. if R; increases by 1%, then v, will decrease by 0.2 V to 99.8 V; 3. if Rz increases 1 © V(2) will increase by 0.2 V—that is, V(2) = 100.2 V; 4. if R, increases 1%, then v, will increase by 0.2 V to 100.2 V; 5. if V1 increases 1 V, (V2) will increase by 0.8 V to 100.8 V; and 6. if V1 increases by 1%, V(2) will increase by 1 V—that is, v. = V(2) = 101 V. Since we have a linear circuit, the principle of superposition is applicable and there- fore we can superimpose simultaneous effects. For example, assume that R1 in- creases by 1 2, R2 decreases by 1%, and V1 increases by half a volt. The effect on v, or V(2) will be v» = 100 — 0.8 — 0.2 + 0.4 = 99.4 V. 7 CONTROL STATEMENTS: .PRINT AND .PLOT ® 27 7 CONTROL STATEMENTS: .PRINT AND .PLOT Although we have not yet discussed transient and steady-state sinusoidal, or ac, analy- sis, we need to interrupt our discussion of types of analysis to discuss the .PRINT and -PLOT commands. This interruption is necessary because in both transient and ac anal- ysis either a .PRINT or .PLOT command is necessary in order to obtain the output of a SPICE program. We have already used the .PRINT command in conjunction with the -DC control statement, but now we need to discuss this control statement in general terms. The general form of the .PRINT control statement is .PRINT PRTYPE Ovi < OV2 OV3 - - OV8 > PRTYPE is the type of analysis—that is, DC, TRAN, AC, NOISE, or DISTO. Here we are interested in the first three—namely, DC, TRAN, and AC. OVI, OV2, . . . , OV8 are the output variables to be printed. Up to eight output variables can be requested on a single print statement. There is no limit on the number of .PRINT statements for each type of analysis. The format for the voltage and current variables is outlined below. DC Analysis V(N1,N2) specifies the voltage difference between nodes 1 and 2. As before, the order of the nodes specifies the reference polarity. If N2 is omitted, it de- faults to zero or the reference node. I(Vaxxxxxx) specifies the current in an independent voltage source named Vaxxxxxx. As before, positive current is through the source from the positive node to the negative node. Transient Analysis In transient analysis the desired output voltages or currents are specified using the same format for the variables as in de analysis. AC Analysis In ac analysis the voltage and current variables can be specified in rectangular, polar, or decibel values. To obtain these values, the V and I in the de for- mat given above are replaced by the following: VR or IR = real part, VI or I imaginary part, VM or IM = magnitude, VP or IP = phase angle, VDB or IDB = 20 * logio (magnitude). For example, VR(N1,N2) would yield the real component of the voltage between nodes NI and N2, and IR(Vxxxxxxx) would generate the real component of the current 28 INTRODUCTION TO SPICE in the voltage source Vxxxxxxx. The .PLOT command is summarized by the following statements." 1. The general format of the .PLOT command is .PLOT PLTYPE OVI < (PLOI,PHII) >< OV2 < (PLO2,PHI2) > - - OV8 > 2. The .PLOT command statement defines the contents of one plot of from one to eight output variables—that is, OV1, OV2, . . . , OV8. 3, PLTYPE is the type of analysis. 4. The syntax for the output variables is identical with that of the PRINT com- mand. 5. The low and high plot limits, i.e., PLO and PHI, are optional and may be speci- fied after any of the output variables. All output variables to the left of a pair of plot limits (PLO, PHI) will be plotted using the same lower and upper plot bounds. 6. If plot limits are not specified, SPICE will automatically determine minimum and maximum values of all output variables being plotted and scale the plot to fit. More than one scale will be used if the output variable values differ by orders of magnitude. This means that mixing such output variables on the same plot still yields a readable plot. 7. The overlap of two or more traces on any plot is indicated by the letter X 8. When more than one output variable appears on the same plot, the first variable specified will be printed as well as plotted. If a printout of all variables is desired, a companion .PRINT command is required. 9. There is no limit on the number of PLOT commands specified for each type of analysis. 8 CONTROL STATEMENTS: TRANSIENT ANALYSIS The general format of the transient control card is .TRAN TSTEP TSTOP > The terms inside the brackets <> are optional, as will be discussed below. TSTEP is the printing or plotting increment. TSTOP is the final time. TSTART is the starting time; if omitted, it is assumed to be zero. TMAX is the maximum step size that SPICE ‘A. Vladimirescu, K. Zhang, A. R. Newton, D. O. Pederson, and A. Sangiovanni- Vincentelli, SPICE Version 2G User's Guide, University of California at Berkeley, unpublished. j 8 CONTROL STATEMENTS: TRANSIENT ANALYSIS 29 will use for computation purposes. If TMAX is omitted, the program defaults to either TSTEP or (TSTOP — TSTART)/50, whichever is smaller. TMAX is useful when one wishes to guarantee a computing interval that is smaller than the printing or plotting in- terval, i.e., TSTEP. Transient analysis always begins at time zero. If TSTART is not zero, the circuit is analyzed between zero and TSTART but no outputs are stored. In the interval between TSTART and TSTOP the circuit is analyzed and the outputs are stored, UIC stands for use initial conditions. UIC is an optional keyword that tells SPICE not to determine a quiescent operating point before beginning the transient analysis. If the keyword UIC appears, SPICE uses the values specified on the element cards, that is, the IC = values. This option is of particular interest to us since our circuits do not contain nonlinear devices for which the quiescent operating point must be found. Natural Responses To find the natural response of a circuit we first find the initial inductor currents and capacitor voltages. Once these values are known we can describe the circuit for tran- sient analysis. In writing the program for a transient solution we must decide how we want the output data, i.e., whether to use a .PRINT command, a .PLOT command, or a combination of both. For simple circuits, decisions concerning TSTEP and TSTOP can be made by means of a preliminary analysis of the circuit. Time constants and fre- quencies of oscillation are important characteristics that can influence these decisions. For more complicated structures, a trial-and-error procedure may be necessary before a satisfactory choice of TSTEP and TSTOP can be made. Example 7 is designed to illustrate how SPICE can be used to find the natural re- sponse of a series RLC circuit. We have incorporated a preliminary analytical solution as part of the example so that we can check the validity of the SPICE solution. EXAMPLE 7 (a) Analyze the natural response of the circuit seen in Fig. 23 with respect to the type of damping, the peak value of v. and the frequency of oscillation. (b) Write a SPICE program to plot the voltage v. versus 1 for the circuit shown in Fig. 23. ; 200 10mH 90 mA OVER Zur Me of Figure 23 The circuit for Example 7. 30 INTRODUCTION TO SPICE (©) Analyze the plot obtained in part (b) and check against the predicted values ob- tained in part (a). SOLUTION (a) For the series circuit in Fig. 23 we have @ = R/2L = 1000: a? = 10°; and «3 = 1/LC = 50 x 10°. It follows that the response is underdamped, and the roots of the characteristic equation are s; = —1000 + j7000 rad/s and 52 = —1000 — j7000 rad/s. Therefore the form of the solution for t. is ‘vb. = (By cos 70001 + Bo sin 7000r)e 1. From the initial conditions we have dv.(0) v(0)=0 and H 45,000 Vis. Solving for B, and B2 yields ve = (—10 cos 70001 + 5 sin 7000r)e'™ V, 1 = 0. From the solution for v. we find that the peak value of v. is 7.70 V and that it occurs at t = 362.29 ps. The damped frequency is 7000 rad/s and thus the damped period is 897.60 ps. (b) From the preliminary analysis of the circuit we select TSTOP to be 2000 us so we can analyze the first two cycles of the response. Selecting TSTEP to be 20 ys will give us 100 points between 0 and 2000 ys and should result in a rea- sonable graph. If the resulting plot is not to our liking, we can always rerun the program with different values of TSTEP and TSTOP. The SPICE program is SOLUTION TO EXAMPLE 7 c1 10 2E-6 IC = -10 RL 12 20 ui 20 10E-3 IC = -S0E-3 +» TRAN 20E-6 2000E-6 UIC +»PLOT TRAN Vit) «END The results of this SPICE program are shown in Fig. 24. (@) From the output data we have p.(max) = 7.670 V, which occurs at t = 360 us. ‘The damped period is 1260 — 360, or 900 us. All these measured values are in agreement with our preliminary analysis. me vay “1.9090 91 tay 2090-08 Bes Figure 24 The solution for Example 7. 31 32 INTRODUCTION TO SPICE SPICE also provides an alternative method for specifying initial conditions. This al- ternative method is most useful in circuits containing capacitors and jiconductor devices. If the circuit contains inductors carrying initial currents, the initial currents must be specified on the element statements. Instead of being given as part of the ele- ment statements the initial capacitor voltages are given by means of an .IC control statement that is inserted in the program. The format for the .IC control statement is AC V(NODNUM) = VALUE, V(NODNUM) = VALUE, .. . Observe that the node voltages are specified with respect to the reference node. This method of entering initial capacitor voltages can sometimes be more convenient than entering them on the individual element statement. In either case we shall continue to use the UIC keyword on the . TRAN control statement since we have no need for a pre- liminary bias analysis. As an illustration of using the .IC control statement we can rewrite the program for Example 7 as EXAMPLE 7 USING THE .IC CONTROL STATEMENT 0 ci 1 2E-6 Ri 12 20 ut 20 10E-3 IC = -90E-3 IC V1) = -10 «TRAN 20E-6 2000E-6 UIC +PLOT TRAN (1) +END ‘We leave it to the reader to confirm that this program will generate the same solution as the program given in Example 7. Step Response The easiest way to find the step response is to simply insert a de source in the circuit at the point where the step change takes place. (After we discuss time-dependent sources in the next section, other techniques for finding the step response will be presented.) To illustrate the insertion of a de source, we return to the circuit used in Example 7, that is, the circuit of Fig. 23. The problem is defined in Example 8. EXAMPLE 8 (a) The switch in the circuit seen in Fig. 25 is closed at r = 0. At the instant the switch is closed, the initial current in the 10-mH inductor is 90 mA and the 8 CONTROL STATEMENTS: TRANSIENT ANALYSIS ; 33 Figure 25 The circuit for Example 8. voltage across the capacitor is 10 V. The references for these initial conditions are given in Fig. 25. Make a preliminary analysis of the step response and cal- culate the maximum value of v. and the time at which it occurs. (b) Write a SPICE program to plot v. versus ¢ from 0 to 1000 ps in steps of 20 ps. (©) Compare the SPICE solution with the preliminary anslysis. SOLUTION (a) From our solution of Example 7 we already know the response is underdamped. Furthermore, we know s; = —1000 + j7000 rad/s, s» = —1000 ~ j7000 rad/s, and the damped period is 897.60 us. The stepped-response solution for v- is of the form ve = vy + (Bi cos 7000t + B} sin 7000t)e™'™ The initial values of v. and dv./dt are the same as in Example 7 and the final value is 21 V. It follows that Bj = —31 V and B} = 2 V; therefore bv. = 21 — (31 cos 70001 — 2 sin 7000r)e™ V, 1 = 0. The maximum value of v. is found to be 41.22 V at 419.32 ps (b) The SPICE program is SOLUTION TO EXAMPLE 8 ct o1 2E-6 Ic = 10 Ri 12 20 ti 32 10E-3 IC = 90E-3 vi 30 oc 21 «TRAN 20E-6 1000E-6 uIc +PLOT TRAN V(1) +END 34 INTRODUCTION TO SPICE (©) From the output of the SPICE program we have v(max) = 41.18 V at 410 ps; Ty = 1320 — 420 = 900 ps; y= 21. We note that these results are in agreement with our preliminary analysis. 9 TIME-DEPENDENT SOURCES As part of the transient-analysis capability of SPICE, the user is provided with sev- eral independent voltage or current sources that are time-dependent. The five time- dependent sources are (1) periodic pulse (PULSE), (2) damped sinusoidal (SIN), (3) exponential pulse (EXP), (4) piecewise linear (PWL), and (5) single-frequency FM (SFFM). For our work here we need only describe the first four sources. Although we shall base each description in terms of an independent voltage source, it is impor- tant to recognize that each source can also be designated as an independent current source. -Periodic-Pulse Source (PULSE) The syntax for a periodic-pulse voltage source named VPP1, connected between nodes I and 0 and positive at node 1, is VPP1 10 — PULSE(V1,V2,TD,TR,TF,PW,PER) The pulse parameters are V1 = initial value (volts), V2 = pulsed value (volts), TD = delay time (seconds), TR = rise time (seconds), TF = fall time (seconds), PW = pulse width (seconds), and PER = period (seconds). ‘The default values for the time parameters are TD = 0, TR = TSTEP, TF = TSTEP, 9 TIME-DEPENDENT SOURCES 7 35 Yep bo per ——+1 v2 vw { | \ re Tr t i 0 1D 1D TD 1D PER t TR ™: TR + + Pw OPW Figure 26 A periodic-pulse voltage source. PW = TSTOP, and PER = TSTOP. TSTEP and TSTOP are specified on the .TRAN control statement. . . a ‘A graph of the periodic pulse is shown in Fig. 26, and an illustrative application of periodic-pulse source is discussed in Example 9. EXAMPLE 9 ‘The circuit seen in Fig. 27 is excited by an impulsive current source where ig = 7 &(t) A. Use SPICE to plot v(t) versus t. SOLUTION In using SPICE. to obtain a plot of v,(t) our problem is to construct a current pulse that will satisfactorily model the given impulsive current source. In order to do this we will make a preliminary analysis of the circuit and study the nature of the tran- sient behavior. In particular, we need to get some feel for how rapidly the transient Figure 27 The circuit for Example 9. 36 INTRODUCTION TO SPICE response will decay. This will enable us to build a current pulse whose duration is very brief compared with the life of the transient voltage. The information we seek is contained in the roots of the characteristic equation. For the circuit seen in Fig. 27 the characteristic equation is 1 1 ap hg “ROT Te~” and for the given values of R, L, and C we find the roots to be 512 = —a@ + jog = -1 + j7 radis It follows that the impulse response will be of the form volt) = Bye cos wat + Bre sin wat, and therefore the duration of the pulse should be short compared with a, or | s. Furthermore, in order for the transient to die out before the next pulse arrives, the period of the pulse train should be in the order of Sa, or 5 s. We will select a pulse duration equal to @/1000, or I ms. As long as the duration of the pulse is brief with respect to 1 s, the exact shape of the pulse is not critical. For convenience we shall construct the trapezoidal pulse shown in Fig. 28. The break points are arbitrarily chosen to occur at T,/5 and 47,/5. Having decided on the general shape of the current pulse, we must now deter- mine the height of the pulse—that is, I2. We know from our study of the impulse function (Chapters 16 and 17) that the impulsive current 76 (1) will instantaneously charge the 0.1 F capacitor to 70 V. (Once the impulse has passed, our response is identical with the natural response of the circuit, i.e., the response associated with an initial capacitor voltage of 70 V.) Therefore our current pulse must charge the ca- Figure 28 The current pulse for Example 9 9 TIME-DEPENDENT SOURCES ar pacitor to 70 V during its duration of 7, seconds. Thus ie w= 3 idt = 70. The integral of the current is simply the area under the current-versus-time curve, which is easily calculated in this case without integrating; that is, apr, 5 ¢ =70 Vo Since T, = 1 ms and C = 0.1 F, we have 12 = 8750 A. If we label the top node in the circuit of Fig. 27 as 1, the SPICE program to obtain a plot of v.(t) versus 1 is SOLUTION TO EXAMPLE 9 ET 0 1 PULSE (0+ 8750+ O+ 0.2M» O.2M> O.6My 5) Ri 1o 865 Lt 10 0.2 Ic oO C1 10 Ot Ic = 0 +TRAN 10E-3 1400E-3 0 IE +PLOT TRAN W(1) 3 UIC In studying the . TRAN control statement in the above program, note that the plot- ting increment is 10 ms, the computation increment is 1 ms, and TSTOP is approxi- mately 1.57, where Ty = 21/7 s. From the output of the SPICE program we have the following results: The voltage at 1 ms is 69.24 V; the first minimum value of v(t) occurs at 411 ms and is —47.13 V; and the damped period is 1301 — 411, or 890 ms. We leave it to the reader to verify these results in Problem 26. Damped Sinusoidal Source (SIN) ‘The damped sinusoidal voltage source is described by the following equations: t, vo, 0=t=TD; @ = VO + VAe*~™ sin [2m FREQ(t — TD)], TD = ¢ = TSTOP; 38 INTRODUCTION TO SPICE where VO = offset voltage in volts, VA = amplitude in volts, FREQ = frequency in hertz, TD = delay in seconds and © = damping factor in seconds. The default values of TD and © are zero, while FREQ defaults to 1/TSTOP. A graph of the damped sinusoidal voltage is shown in Fig. 29. The syntax for a damped sinusoidal voltage source named VG, positive at node N1 and connected between nodes N1,N2 is VG NI N2 SIN(VO VA FREQ TD 8) In constructing any of the time-dependent sources, it is helpful to check a plot of its waveform before using it in a specific problem. The waveform can be checked by first applying it to a pure resistive circuit. The output waveform in a resistive circuit will al- ways be a scaled replica of the input waveform. A convenient scaling factor can always be chosen for the test circuit. For example, assume we want to check the data statement for the damped sinusoidal voltage ty = 12.5 + 25e-" sin [0.40 (¢ — D] V. If we apply this voltage to the voltage-divider circuit shown in Fig, 30, we know the output voltage will be 0.80. The following SPICE program will generate a plot of v., and from the plot and tabu- lated values of v. we can check the correctness of our v, data statement. (See Prob- lem 27.) Ya vo 1D TsToP + Figure 29 A damped sinusoidal voltage ‘9 TIME-DEPENDENT SOURCES . 39 1 200 ¥ C) 80.0 ve Figure 30 A voltage divider used to check Vg CIRCUIT USED TO CHECK A DAMPED SINUSOID v1 10 =SIN(12.5 25 0.2 1 O41) Ri 1 2 20 R2 2 0 80 + TRAN Ot 10° «UIC »PLOT TRAN (2) +END Exponential-Pulse Source (EXP) The exponential voltage pulse is described by the following equations: v, = V1,0=1 STDI; te = V1 + (V2 - VIL - en), = TDI <1 = TD2; _ = VI + (V2 = VI) — evn) + (V1 — V2)(1 — e-@-T 2/2), TD2 = +t = TSTOP; where V1 = initial value in volts, V2 = pulsed value in volts, TD1 = rise delay time in seconds, 7 = rise-time constant in seconds, TD2 = fall delay time in seconds, and 72 = fall-time constant in seconds. The default values are as follows: TD1 = 0, 7, = TSTEP, TD2 = TD1 + TSTEP, and 7, = TSTEP. A graph of the exponential voltage pulse is shown in Fig. 31. 40 INTRODUCTION TO SPICE Ye 101 12 ‘TSTOP 7 Figure 31 The exponential voltage pulse. The syntax for an exponential voltage source called VEXPSO, positive at node NI and connected between nodes NI and N2, is VEXPSO NI N2 EXP(V1 v2 TDI n TD2 1) Problems 29, 30, and 31 illustrate SPICE analysis of circuits excited by an exponen- tial source. Piecewise Linear Source (PWL) The piecewise, linear, time-dependent source allows a SPICE user to define a single- valued function at a series of discrete times. The value of the source at intermediate values of time is determined by using linear interpolation on the input values. The fact that the function must be single-valued implies that the values of time used in the de- scription of f(t) must continually increase. The syntax for a piecewise linear voltage source named VGPWL, positive at N1, and connected between nodes N1 and N2, is VGPWL NI N2 PWL(T1 VI T2 V2: ++) Each pair of values T;, V, specifies that the value of the source is V, volts at T, seconds. Furthermore Tl < T2 < T3.... Example 10 is used to illustrate how the piecewise linear source can be used in a transient problem. At the same time we shall use Example 22.10 to demonstrate the -OP (operating-point) control statement alluded to earlier in our work. EXAMPLE 10 The circuit seen in Fig. 32 has been in operation for a long time. At t = 0 the 80-V source drops instantaneously to 20 V. Write a SPICE program, using a PWL source, to plot v,(t) versus r. i 9 TIME-DEPENDENT SOURCES 41 75k 2k Figure 32 The circuit for Example 10. SOLUTION To simulate the drop in voltage from 80 to 20 V, a piecewise linear voltage source of opposite polarity is inserted in series with the 80-V de source. The piecewise source is then stepped from 0 to 60 V over a very short time interval. At the same time the duration of the 60-V step is made long enough so that the circuit reaches its new steady-state condition. We must now decide how rapidly the source must rise to 60 V and how long it should remain at 60 V. We will leave it to the reader (see Problem 32) to verify that the time constant for the circuit shown in Fig. 32 is 40 ms. We will select a rise time for our piecewise linear voltage source of 40 ms/1000, or 40 ys. The duration of the 60-V source should be long compared with 40 ms. We arbitrarily select 10 time constant, or 400 ms. Our piecewise linear voltage source has the waveform shown in Fig. 33. The circuit seen in Fig. 32 is redrawn in Fig. 34 in preparation for writing the SPICE program. In writing the SPICE program to plot v(t) [V(4)], we can take ad- vantage of the operating-point (.OP) control statement. When the .OP control state- ment is inserted in the program, SPICE will calculate the initial conditions just prior to the application of the piecewise linear source. In other words, in this type of tran- sient analysis problem we can use SPICE to automatically calculate initial condi- tions. This means that no IC = value entries are required on the element state- ments, and we also omit the UIC keyword on the .TRAN control statement. 400 ms t Figure 33 A piecewise linear voltage source. 42 INTRODUCTION TO SPICE 2 75k 3 2k 4 Figure 34 The circuit of Fig. 32 modified for SPICE analysis. The SPICE program for plotting V(4) is SOLUTION TO EXAMPLE 10 vi 1 0 oc 80 VGPWL 1 2 PWL (010, 4OE-G+ GO+ 400E-3» 60) RL 23 7.5E3 RZ 3.0 30E3 RB 3.04 2E3 ci a) SE-G .OP sTRAN 2E-3, 200E-3 +PLOT TRAN vcd) +END We shall leave it to the reader, via Problem 32, to verify that the output of the SPICE program yields the following results: tims vival], V 0 64 40 33.67 80 22.50 Furthermore, the SPICE solution shows that v.(t) approaches 16 V as ¢ ap- proaches ». 10 SINUSOIDAL STEADY-STATE (AC) AND FREQUENCY RESPONSE ANALYSIS 43 1 CONTROL STATEMENTS: SINUSOIDAL STEADY-STATE O (AC) AND FREQUENCY RESPONSE ANALYSIS Steady-state sinusoidal analysis with SPICE can be divided into two general types of problems. The first type consists of finding the steady-state voltages and/or currents at a single frequency. The second type consists of finding how the steady-state voltages and/or currents vary in amplitude and phase as the frequency of a source is varied over a specified range of values. We shall refer to these two types of analysis as (1) steady- state and (2) frequency response. In both types of sinusoidal analysis SPICE automatically does a de analysis, a direct result of the fact that SPICE is designed to simulate circuits containing semiconductor devices. The de bias levels are necessary to establish the small-signal models of the nonlinear semiconductor devices. Since our applications are limited to linear circuits, our circuits containing sinusoidal sources will not contain de sources. Therefore the de solution carried out by SPICE will always generate a zero dc level in our ac circuit problems. Steady-State Analysis (.AC Control Statement) The general format for the control statement that implements a sinusoidal steady-state analysis is -AC LIN NP FSTART FSTOP LIN stands for linear variation, NP is the number of points, FSTART is the starting fre- quency, and FSTOP is the final frequency. For a sinusoidal steady-state analysis at a single frequency, NP is set to 1 and FSTOP is made equal to FSTART, where FSTART is the frequency of the sinusoidal sources. In steady-state sinusoidal analysis all the sources in a circuit operate at the same frequency. In addition to the .AC control statement, a .PRINT statement is required in order to get a printout of the desired voltages and currents. Since the output voltages and cur- rents are phasor quantities, it is necessary to specify whether polar or rectangular val- ues are desired. For voltages the letter V is followed by M for magnitude, P for phase, R for real part or I for imaginary part. Thus the statement -PRINT. AC VM(1,3) VP(1,3) would yield the magnitude and phase angle of the voltage between nodes 1 and 3, the reference polarity for V(1,3) being positive at node 1. The statement -PRINT AC VR(1,3) VI(1,3) would generate the real and imaginary components of V(1,3) 44 INTRODUCTION TO SPICE Current outputs can also be obtained in either polar or rectangular form. The print statement -PRINT AC IM(VSO1) IP(VSO1) would give the magnitude and phase angle of the current in the voltage source named VSO1. The current reference would be through the source from the positive to the neg- ative terminal, To obtain this same current in rectangular form, we would use the print statement -PRINT AC IR(VSO1) II(VSO1) Before illustrating single-frequency ac analysis, it will be helpful to briefly review the data statement for a sinusoidal source, which was first introduced in Section 3, The syntax for an independent ac source is NAME NODE CONNECTIONS TYPE AMPLITUDE PHASE The default values for amplitude and phase are 1 and 0, respectively. Thus a voltage source would default to 1 V at zero degrees, and a current source would default to 1 A at zero degrees. These default values are useful in single-source circuits when the trans- fer function is of interest. By setting the input source to its default values, we make the value of the output identical with the value of the transfer function. Examples 11 and 12 illustrate how SPICE is used to find the single-frequency, steady-state sinusoidal response. EXAMPLE 11 The sinusoidal sources in the circuit seen in Fig. 35 are described by the following equations I = 20 cos (10° + 90°) V; = 6 cos 10°F A. n= Figure 35 The circuit for Example 11 10 SINUSOIDAL STEADY-STATE (AC) AND FREQUENCY RESPONSE ANALYSIS 45 (a) Use SPICE to find the magnitude and phase of v, and i,. (b) Check the SPICE results obtained in part (a) against an analytical solution for V, and I. \ SOLUTION | (a) The circuit in Fig. 35 is redrawn in Fig. 36 in preparation for writing the SPICE program. The SPICE program is SOLUTION TO EXAMPLE 11 V1 1 0 Ac 20 90 It 0 2 ac 6 0 Rt 1 2 1 R2 2 3 4 R3 2 4 3 L1 3°00 30E-6 C1 4 5 2,5€-6 VIO 5 0 oc Oo ‘AC LIN 1 15915,48 15915.49 +PRINT AC YM(2) YPC2) IM(VIO) IP(VIO) END Note that the frequency in a SPICE program must be in hertz. (b) The solution for the phasor voltage V, can be obtained by solving a single node- voltage equation; thus 4 Nex 20 = 620° 0 Figure 36 The circuit of Fig. 35 prepared for SPICE analysis. 46 INTRODUCTION TO SPICE The solution for V, is 16.31/71.51° V. It follows that Te = 57g = 3.261124." A. The pertinent output from the SPICE program listed above is VM(2) = 16.31 and VP(2) = 71.51°; therefore V, = 16.31271.51° V. And because IM(VIO) = 3.261 and _—_IP(VI) = 124.6°, we have I, = 3.2612124.6° A. Example 12 is used to illustrate sinusoidal steady-state circuit analysis when the cir- cuit contains dependent sources. EXAMPLE 12 The sinusoidal voltage source in the circuit seen in Fig. 37 is described by the rela- tionship U, = 8.94 cos (25,0001 — 116.57°) V. Use SPICE to find v, and vy in both polar and rectangular form. SOLUTION The SPICE program to obtain both the polar and rectangular expression for V, and Vs is given below. In studying this program, observe that the independent voltage source V1 is used to measure the controlling current is. Also note that the current 0.5 uF Figure 37 The circuit for Example 12 10 SINUSOIDAL STEADY-STATE (AC) AND FREQUENCY RESPONSE ANALYSIS 47 gain is —20, since the reference direction for ig is out of the positive terminal of vy. Finally, note that the frequency of the source is converted from radians per second to hertz. THE SOLUTION TO EXAMPLE 12 Mt 1 0 AC 8.94 -116.57 EL 2 0 3.0 0.20 a 3°90 V1 —20 RL 1 2 200 RZ 3°90 40 ci 23 0.5E-6 «AC LIN 1 3978.87 3978.87 +PRINT AC VM(2) VP(2) VR(2) VI(2) +PRINT AC YM(3) = -YP(3) ss YR(3) YC) +END The pertinent output from the SPICE program is UM(2) VP(2) YR(2) VI(2) 1,599E+01 -4,928E-03 1,599E+01 -1,376E-03 YM(3) VP(3) YR(3) YVIC3) 7,996E+01 —-4,928E-03 7.996E+01 -68,878E-03 It follows that V, = 15.99/—0.004928° = 15.99 — 0.001376 V and Ve = 79.96/—0.004928° = 79.96 — j0.006878 V. We shall leave it to the reader to verify that these results are consistent with an ana- lytical solution of the circuit. Frequency Response Analysis (.AC Control Statement) The .AC control statement is also used to obtain the frequency response of a circuit, The user has a choice of three frequency variations: linear, decade, or octave. At the same time the type of frequency variation is selected, the user must also select the number of frequencies (points) if the variation is linear, or the number of frequencies (points) per decade (octave) if the frequency variation is decade (octave). Recall that a decade is a 10-to-1 change in frequency and an octave is a 2-to-1 change in frequency. 48 INTRODUCTION TO SPICE The general format of the .AC control statement that implements a frequency re- sponse analysis is -AC LIN NP FSTART FSTOP -AC DEC =-ND__FSTART ~—_—s=FSTOP. -AC_ OCT NO FSTART __FSTOP where LIN = linear variation, NP umber of points, DEC = decade variation, ND = number of points per decade, OCT = octave variation, and NO = number of points per octave. In all cases FSTART and FSTOP are the starting and stopping frequencies in hertz. When a linear variation is selected, the frequency increment Af is FSTOP — FSTART NP - 1 For example, if FSTOP = 1801 Hz, FSTART = 1 Hz, and the number of points is 181, then Af = 1801 — 181-1 af = 10 Hz. When a decade variation is selected, the frequencies within a given decade are fe = FSD + 10%, where FSD is the frequency at the start of the decade, ND is the number of points per decade, and & is an integer in the range from 1 to ND. For example, if ND = 20, FSTART = 50, and FSTOP = 5000, then the frequen- cies in the decade between 50 and 500 would be given by the expression fe = (50)10, where k = 1, 2,3, .. . 20. Hence fi = (50)10" = 56.10 Hz fe = (50)10° = 62.95 Hz 10 SINUSOIDAL STEADY-STATE (AC) AND FREQUENCY RESPONSE ANALYSIS 49 When an octave variation is selected, the frequencies within a given octave are fe = FSO - 2080, where FSO is the frequency at the start of the octave, NO is the number of points per octave, and & is an integer in the range from 1 to NO. For example, if FSTART = 400 Hz, FSTOP = 3200 Hz and NO = 10, then the frequencies in the octave from 400 to 800 Hz would be fe = (400)2", Hence fi = (400)2"! = 428.71 Hz; Sz = (400)2°? = 459.48 Hz; The output from a frequency-response program can be printed or plotted at the dis- cretion of the user. The appropriate PRINT AC or .PLOT AC statements instruct the Program as to what output variables are to be printed and plotted. If only one output variable is of interest, then both a printout and a plot can be obtained from the .PLOT AC control statement. Example 13 illustrates how the frequency response of a parallel RLC circuit can be analyzed with SPICE. EXAMPLE 13 (a) The current source in the circuit seen in Fig. 38 is 50 cos wt mA. Use SPICE to plot v, versus f from 1000 to 2000 Hz in increments of 10 Hz on a linear fre- quency scale. (b) From the output of the SPICE program, estimate the resonant frequency, the bandwidth, and the quality factor of the circuit. (c) Compare the results obtained in part (b) with an analytical solution for fos Bs and Q. Figure 38 The circuit for Example 13. 50 INTRODUCTION TO SPICE SOLUTION (a) The SPICE program for obtaining a plot of v, versus f is SOLUTION TO EXAMPLE 13 I1 o 1 AC SOE-3 Oo Ri 1 0 8E3 ui i 06 40E-3 ci 1 0 0.25E-6 +WIDTH OUT = B80 +AC LIN 101 1000 2000 +PLOT AC YM(1) + END (b) From the output of the SPICE program we have a peak amplitude of 399.7 V at a frequency of 1590 Hz. Thus we estimate the resonant frequency at 1590 Hz. To estimate the bandwidth, we find the frequencies where v, = 399.7/V2, or 282.63 V. From the SPICE output the closest values are 274.30 V at 1550 Hz and 289,30 V at 1630 Hz. Thus we estimate the bandwidth to be 1630 — 1550, or 80 Hz. The quality factor is calculated from the relationship Q = f,/Af = 1590/80 = 19.88. (©) A direct analysis of the circuit yields fo = 1591.55 Hz; fi = 1551.76 Hz; fy = 1631.34 Hz; Af =fi- fi = 79.58 He; Q = f./Af = 20. The comparison with the SPICE analysis is summarized in the following table: Quantity Analysis SPICE fo 1591.55 1590 fi 1551.76 1550 fi 1631.34 1630 Af 79.58 80 Q 20.00 19.88 11 MUTUAL INDUCTANCE 51 If necessary, a more accurate analysis around the resonant frequency can be ob- tained from SPICE by rerunning the program with different values of NP, FS- TART, and FSTOP. (See Problem 41.) Bode Plots SPICE can be used to generate Bode amplitude and phase-angle plots. The amplitude plots are made by plotting VDB(N1,N2) or IDB(VAMMETER) versus f using the decade variation for f. Bode phase-angle plots are made by simply plotting VP(N1,N2) or IP(VAMMETER) versus f using the decade variation for frequency. We will illustrate a Bode amplitude plot by returning to the circuit of Example 13 and writing the SPICE program to plot the decibel amplitude of v, versus a decade variation in f. For conve- nience we will pick a decade multiple of the resonant frequency f, as the starting fre- quency. This will make it easy to check the decibel amplitude of , at f,. The SPICE program for obtaining the Bode plot is BODE PLOT EXAMPLE It Oo. ac SOE-3 9 Rt 1 0 8E3 li 1 0 40E-3 C1 1 0 0.25E-6 ACT DEC 10 1.59155 15915.5 +PLOT AC YDB(1) «END We know from Example 13 that the resonant frequency is 1591.55 Hz. The magni- tude of f, at this frequency is 400 V or 52.04 dB. We leave it to the reader to verify that the SPICE program given above gives 52.04 dB at 1592 Hz. 1 1 MUTUAL INDUCTANCE A SPICE program requires three element statements to describe a pair of coils that are magnetically coupled. Each coil in such a pair requires a statement that contains the name, the polarity-sensitive node connections, and the self-inductance of the coil. The first-named node of each individual coil description is the “dotted” terminal. The third statement identifies the coupled coils by name and states the value of the coefficient of coupling k. The name used to identify the coupled coils must start with the letter K, and the value of k must be greater than 0 and less than or equal to 1. To illustrate the SPICE description of two magnetically coupled coils, consider the coils shown in Fig. 39. Assume that this pair of coupled coils has been named 52 INTRODUCTION TO SPICE Figure 39 A pair of 7 10 magnetically coupled coils. . oa ao ur 35H 2208 . 6 8 KCCPAIR and the individual coils have been identified as L1 and L2. Then the three SPICE statements are LI 7 6 5 L2 9 10 20 KCCPAIR Li L2 0.8 Recall from our introduction to data statements in Section 2 that every node in a cir- cuit must have a de path to the reference node. When a circuit contains magnetically coupled coils, it is possible that one part of the circuit may be isolated from another part insofar as de signals are concerned. If this happens, it is necessary to establish a de path between the isolated portion of the circuit and the reference node. This can be done by either coalescing two isolated nodes into one node by using a single conductor or by joining the two isolated nodes with a resistor. The two techniques are summa- rized by Fig. 40. Example 14 illustrates the SPICE analysis of a circuit containing magnetically cou- pled coils. EXAMPLE 14 (a) Use SPICE to find the rms amplitude and the phase angle of i; and i; in the cir- cuit shown in Fig. 41 when v, = 141.42 cos 102 V. ne en3 ote 2n3 . . . . R ne ond nde end (a) (b) Figure 40 Providing a dc path between magnetically coupled coils: (a) coalescing isolated nodes. with a single conductor and (b) joining isolated nodes with a resistor 11 MUTUAL INDUCTANCE s 53 6H % 4H 16H 200 Figure 41. The circuit for Example 14 (b) Check the SPICE solution by using it to show the average power generated equals the average power dissipated. SOLUTION (a) Before redrawing the circuit for analysis by SPICE, we note that % = 10020" Vrms, f = 5/m = 1.59135 Hz, and the coefficient of coupling is k = 6/V64 = 0.75. The SPICE circuit is shown in Fig, 42. ie SPICE program that yields the rms amplitude and the phase angle of i; and is is SOLUTION TO EXAMPLE 14 V4 1 0 ac 100 ° Rt 1 2 2 Lt Zz 3 4 L2 46 16 KT2 Li L2 0.75 R2 4 5 200 R3 6 3 10E6 Vit 3°00 oc 0 VIZ 5 6 oc ° AC LIN 1 1.59155 1.59155 sPRINT AC IM(YI1) IP(UIL) IM(YIZ) IP(UYTZ) +END 20000 vi viz Figure 42 The circuit of Fig. 41 redrawn for SPICE analysis. 54 INTRODUCTION TO SPICE (b) From the SPICE solution we have J, = 2.9582 —67.43° A(rms) and 1, = 0.69292 ~16.09° A(rms). Using the SPICE solution, we find that the total average power generated is P, = (100)(2.958)cos 67.43° = 113.532 W. The average power dissipated in Ry is P = (2.958)°(2) = 17.500 W. The average power dissipated in R> is Pz = (0.6929)*(200) = 96.022 W. We note that P, = P; + P2, and therefore the SPICE solution is consistent with the conversation-of-energy principle. 12 THE IDEAL TRANSFORMER The ideal transformer can be modeled in a SPICE program by making L, and Ls large enough so that wL, and wL> are much greater than the other impedances in the circuit. In addition to setting large values for L; and Lz, we set the coefficient of coupling equal to 1. The turns ratio of the ideal transformer is brought into the model by using the re- lationship L,/L = (Ni /N;)?. As an example of modeling an ideal transformer, consider the circuit shown in Fig. 43, where v, = 50 cos 1000r V. It follows from the circuit diagram that N,/N2 = 1/5 and therefore L2 = 25L,. In picking values for L; and L>, we want wl> >> 200 Q. Since « equals 1000 rads, if we make La = 200 H, wLa will be three orders of magni- tude greater than R>. Therefore let us pick L, = 200 H. It follows that L; = 8 H. va 2000 Ideal Figure 43 A circuit containing an ideal transformer. 12 THE IDEAL TRANSFORMER i 55 SOLUTION TO IDEAL TRANSFORMER CIRCUIT o V1 1 0 AC so Ri 1 2 2 ui 20 8 L2 3.00 200 K1 La L2 1 RZ 3.00 200 *AC LIN 1 159,1549 159,1549 +PRINT Ac YM(2) YP(2) YM(3) VP(3) The pertinent output from the SPICE Program is VM(2) = 4.000E + 01 V, VP(2) = 1.146E — 02°, VM(3) = 2.000E + 02 V, VP(3) = 1.146E — 02°, It follows that Vi = 4020.01146° v, V2 = 20020.01146° Vv. We leave it to the reader to verify that the analytical solution for V, and V> yields Vi = 4020°V and V2 = 20020° Vv. 200 2000 Figure 44 The circuit of Fig. 43 redrawn for SPICE analysis 56 INTRODUCTION TO SPICE ] 3 THE OPERATIONAL AMPLIFIER In Section 6.7 of the text we introduced an equivalent circuit for the operational am- plifier. The equivalent is redrawn in Fig. 45, where we have numbered the nodes to fa- cilitate our discussion of the SPICE model. The SPICE description of the equivalent circuit seen in Fig. 45 is RI 12 VALUE OF R; Boxxx 3521 VALUE OF A RO 34 VALUE OF R, Example 15 is designed to illustrate how SPICE is used to solve a circuit containing an operational amplifier. EXAMPLE 15 The parameters for the operational amplifier in the circuit shown in Fig. 46 are Rj = 200k, A = 10", and R, = 5 kQ. - % Ro 4 5 Figure 45. An equivalent circuit for an operational amplifier 10k. Figure 46 The circuit for Example 15. 13 THE OPERATIONAL AMPLIFIER 57 (a) Use SPICE to find v; and vo when , = 1 V(de). (b) Compare the SPICE solution with the analytical solution for v, and vo. SOLUTION (a) The circuit of Fig. 46 is redrawn in Fig. 47 in preparation for writing the SPICE Program for finding 0; and vo: SOLUTION TO EXAMPLE 15 VG 1 0 pbc 1 RS 1 2 1000 RI 2 0 200E3 RF 24 10E3 Et 3.00 2 0 -10E3 RO 3 04 5E3 RL 4 0 4E3 “END The pertinent output from the SPICE program is V(2) = 0.0027 V = v,, V(4) = -9.969 V = to. (©) The analytical solution for v; and ty is obtained by solving the following simul- taneous node-voltage equations: Po- 1 | % + 10d, ey 2 10 a Figure 47 The circuit of Fig. 46 redrawn for SPICE analysis, 58 INTRODUCTION TO SPICE We leave it to the reader to verify that the solutions for v; and v, are v1 = 2.742 mV and UV. = —9.970 V. These values are in agreement with the SPICE solution. If the operational amplifier in the circuit seen in Fig. 46 is assumed ideal, the Se solution can be implemented by making R, and A very large and R, equal to zero. . illustrate we will rewrite the program in Example 15, with R, set to 200 MQ, A equi to 10°, and R, equal to zero. By making R, zero we eliminate node 3 from the circuit. The SPICE program becomes SOLUTION TO EXAMPLE 15 (IDEAL OP AMP) WG 1 0 Dc 1 RS 1 2 1000 RI 2 0 200E6 RF 2 4 10E3 E1 40 2 0 — 168 RL 4 0 4E3 END The values of o, and v, from this program are v1 = V(2) = 0.0000 V, ve = V(4) = 10.0000 V. These results are consistent with the analysis of the circuit in Fig. 46 if we assume that the operational amplifier is ideal—that is, v, = 0 V and v, = —10 V. 1 4 SUBCIRCUITS In describing the topological connections of a circuit, SPICE allows the use of bel cuits. In other words, we can take a portion of an overall circuit, describe it oar ely, and then insert this description into the program that describes the overall or global e cuit. The subcircuit is defined by naming the group of element statements that descril it. There is no limit on the size of a subcircuit, and furthermore, a subcircuit may con- tain other subcircuits. 14 SUBCIRCUITS c 59 A subcircuit is defined in a SPICE program by first inserting a .SUBCKT control statement, which has the general form -SUBCKT SUBNAM. N1,N2,N3,... where SUBNAM is the subcircuit name and NI,N2,. . . are the external nodes of the subcircuit. The external nodes are the nodes that connect the subcircuit to the global circuit. The only restriction on selecting the external node numbers is that zero cannot be used. It is important to note that any node numbers used in the description of a sub- circuit that do not appear in the -SUBCKT control statement are strictly local, with the exception of 0, which is always global. The subcircuit description is terminated by inserting an .ENDS control statement. The general form of the ENDS control state- ment is -ENDS where SUBNAM is optional. If included, it indicates which subcircuit is being termi- nated. If it is omitted, all subcircuits being described are terminated. The control statement to call a subcircuit has the general form wyyyyy N1,N2,N3, SUBNAM where Xyyyyyy indicates a subcircuit is being called; N1,N2,N3, . . . are the circuit nodes to which the subcircuit external nodes are connected; and SUBNAM is the name of the subcircuit being called. To illustrate how we can use a subcircuit in a SPICE program, we return to the operational-amplifier circuit discussed in Example 15, but here we shall use a subcircuit \0 describe the equivalent circuit. The subcircuit is shown in Fig. 48, along with the node number assignments. The SPICE definition of the subcircuit is + SUBCKT OPAMP 1245 RL 21 200E3 El 3°55 21 10E3 Ro 304 5E3 ENDS OPAMP = ska 1 3 é 200 1 104v— v4) 2 Figure 48 An operational-amplifier subcircuit 60 INTRODUCTION TO SPICE When this subcircuit is used in the description of the circuit seen in Fig. 47, the SPICE program becomes UG 1 0 oc 1 RS 1 2 1000 RF 24 10E3 RL 40 4E3 + SUBCKT OPAMP 124 5 RI 2 1 200E3 EI 3°05 21 10E3 RO 3 4 SE3 ENDS OPAMP x1 20 40 OPAMP END In studying the program, note the correspondence between the node numbers in the -SUBCKT control statement and the X1 element statement. That is, node | of the sub- circuit connects to node 2 of the main circuit, node 2 of the subcircuit connects to node 0 of the main circuit, and so forth. A more powerful use of subcircuits occurs when a subcircuit is repeated in the over- all, or global, circuit. As an example of this situation, consider the circuit shown in Fig. 49, where the two operational amplifiers are assumed identical. We shall write the SPICE program to find v.; and v2 when v, = 0.5 V(dc) and the operational amplifier parameters are R; = 100 kQ, R, = 200 , and A = 10. In studying the SPICE program that follows, note the repeated use of the OPAMP subcircuit and the use of the .DC control statement so that only the node voltages of interest are printed out. For convenience we have used the same node designations in the OPAMP subcircuit as used in Fig. 48. 18ko. Figure 49 A two-stage operational-amplifier circuit. 15 ALTER CONTROL STATEMENT 61 @ SPICE PROGRAM USING A REPEATED SUBCIRCUIT ° VG 100 oc RS1 ios 4E3 RFI 23 BOE3 R1 3°94 SE3 RZ 4 0 20E3 RS2 5 0 6E3 RF2 5 6 18E3 RL 6 0 10E3 + SUBCKT OPAMP 12 45 Rt 1 2 100E3 RO 3°44 200 E1 3°05 21 1E4 + ENDS. OPAMP xt 2 0 3 0 OPAMP x2 5 4 6 0 OPAMP +DC WG 0.5 O.S 1 «PRINT oc v3) vie) +END The outputs from the SPICE program are vo. = V(3) = 9.9780 V and vo2 = V(6) = —31.9154 V. We can test whether these results are reasonable by assuming that the operational amplifiers are ideal and then calculating the resulting values of v,, and v,2. We leave it to the reader to confirm that these calculations yield v., = —10 V and v.. = —32 V. We conclude from these results that we have made no errors in describing the circuit and hence are confident the SPICE solution is correct. 1 5 -ALTER CONTROL STATEMENT The SPICE program has been designed to allow the user to change the parameter val- ues of specified elements so that the type of analysis called for in the original program will be executed all over again with the new parameter values. The alter routine is 62 INTRODUCTION TO SPICE carried out by inserting an ALTER control statement followed by the element state- ments that are to be changed. The .ALTER control statement, along with the changed element statements, is placed just before the .END statement. The alter routine has the following characteristics. 1. There is no limit to the number of .ALTER commands that can be inserted in a Program. The circuit will be reanalyzed for each ALTER command statement. 2. Subsequent .ALTER operations employ the Parameters of the previous change when the elements in the subsequent .ALTER command differ from the elements in the Previous one. In other words, element parameters do not revert to their original values when the parameters of a different set of elements are altered. 3. The ALTER command cannot be used to change the topological structure of the circuit. An application of the ALTER command statement in the analysis of a circuit is il- lustrated in Example 16. EXAMPLE 16 The sinusoidal voltage source in the circuit shown in Fig. 50 is generating the voltage v, = 10 cos 10% V. The capacitor is changed from 0.5 to 4.0 F in steps of 0.5 uF. Use SPICE to in- vestigate the effect the changing of the capacitance has on the steady-state magni- tude of v,(r). 1 3620 2 4.81 mH 3 Figure 50 The circuit for Example 16. 15 .ALTER CONTROL STATEMENT . 63 SOLUTION The SPICE program that generates the steady-state magnitude of v, as C takes on the values of 0.5, 1.0, 1.5, 2.0, 2.5, 3.0, 3.5, and 4 pF is SOLUTION TO EXAMPLE 16 v1 1 0 ac 10 0 Rt 1 F 9.62 ut Zig 4,81E-3 C1 3°00 0,50E-6 +AC LIN 1 1591.55 1591.55 +PRINT AC YM(3) sALTER C1 3 0 1,0E-6 +ALTER C1 3°00 1,.5E-6 sALTER c1 300 2.0E-6 +ALTER ci 3°40 2,5E-6 +ALTER C1 3.0 3,0E-6 sALTER ci 3°00 3,5E-6 sALTER ci 3°00 4,0E-6 +END The output from the SPICE program is summarized in the following table: CwF [Vol V 0.5 13.14 1.0 18.95 1.5 31.88 2.0 50.99 2.5 31.81 3.0 18.91 35 13:12 4.0 9.991 64 INTRODUCTION TO SPICE We can use phasor-domain analysis to check any of the results from the SPICE pro- gram. For example, it follows directly from the circuit seen in Fie. 50 that V, V, = "+ __ 1 — w°LC + joRC When C = 2 uF, we get = 10/0" = —78.93° Vo = Soae-+ joctopa ~ 50-99/—78.83° V. Thus the magnitude of v,(r) is 50.99 V when C = 2 uF. This is in agreement with the SPICE solution. ] 6 -WIDTH CONTROL STATEMENT The . WIDTH control statement allows the SPICE user to control the last column read from each line of input and the output print width. The format for the .WIDTH control statement is -WIDTH IN = COLNUM OUT = COLNUM The . WIDTH OUT = COLNUM is useful in controlling plots which otherwise extend beyond the width of the screen on the computer terminal used to monitor the output be- fore printing. Permissible values for the output print width are 80 and 133. The default value for . WIDTH IN is 80, and the default value for .WIDTH OUT is 133. 1 # -OPTIONS CONTROL STATEMENT SPICE gives the user a variety of program control options.’ Although many of these options are for more advanced applications of SPICE than have been discussed in thie introduction, we have included them in the following table for future reference. The general form of the OPTIONS control statement is -OPTIONS OPTI OPT2 (or OPT = OPTVAL . . .) "For further discussion see A. Vladimirescu, K. Zhang, A. R. Newton, D. O. Pederson, Bei, Sangiovanni-Vincentelli, SPICE Version 2G User's Guide, University of Californie it Berkeley, unpublished. 17 OPTIONS CONTROL STATEMENT 65 Any combination of the options given in Table 2 may be included, in any order, in @ SPICE program. (The letter x in the table stands for a positive number.) TABLE 2. SPICE Options Option Effect ACCT Causes accounting and run-time statistics to be printed. LIST Causes the summary listing of the input data to be printed. NOMOD Suppresses the printout of the model parameters. NOPAGE Suppresses page ejects. NODE Causes the printing of the node table. OPTS Causes the option values to be printed, GMIN = x Resets the value of GMIN, the minimum conductance allowed RELTOL = x ABSTOL = x VNTOL = x TRTOL = x CHGTOL = x PIVTOL = x PIVREL = x NUMDGT = x by the program; default value is 1.0E — 12. Resets the relative error tolerance of the program; default value is 0.001 (0.1%). Resets the absolute current error tolerance of the program; default value is 1 pA. Resets the absolute voltage error tolerance of the program; default value is 1 wV. Resets the transient error tolerance; default value is 7.0; this parameter is an estimate of the factor by which SPICE Overestimates the actual truncation error. Resets the charge tolerance of the program; default value is 1.0E — 14. Resets the absolute minimum value for a matrix entry to be accepted as a pivot; default value is 1,0E — 13. Resets the relative ratio between the largest column entry and an acceptable pivot value; default value is 1.0E — 3; in the numerical pivoting algorithm, the allowed minimum pivot value is determined by EPSREL=AMAX1(PIVREL*MAXVAL, PIVTOL), where MAXVAL is the maximum element in the column where a pivot is sought (partial pivoting). Resets the number of significant digits printed for output variable values; x must satisfy the relation 0 4.) 66 TABLE 2. (continued) INTRODUCTION TO SPICE Option Effect TNOM = x Resets the nominal temperature; default value is 27°C(300 K). ITLI = x Resets the dc iteration limit; default is 100. ITL2 = x Resets the de transfer curve iteration limit; default is 50. ITL3 = x Resets the lower transient analysis iteration limit; default value is 4. ITL4 =x Resets the transient analysis time-point iteration limit; default CPTIME = x LIMTIM = x LIMPTS = x LVLCOD = x LVLTIM = METHOD = name MAXORD = x DEFL is 10. Resets the transient analysis total iteration limit; default is 5000; set ITLS = 0 to omit this test. Resets the de iteration limit at each step of the source stepping method; default is 0, which means this method is not used. Sets the maximum CPU time in seconds allowed for this job. Resets the amount of CPU time reserved by SPICE for generating plots should a CPU time limit cause job termination; default value is 2 s. Resets the total number of points that can be printed or plotted in a de, ac, or transient analysis; default value is 201. If x is 2, machine code for the matrix solution will be generated; otherwise no machine code is generated; default value is 2; applies only to CDC computers. If x is 1, the iteration time-step control is used; if x is 2, the truncation-error time step is used; default value is 2; if METHOD=GEAR and MAXORD > 2, then LVLTIM is set to 2 by SPICE. Sets the numerical integration method used by SPICE; possible names are GEAR or TRAPEZOIDAL; default is TRAPEZOIDAL. Sets the maximum order for the integration method if GEAR’s variable-order method is used; x must be between 2 and 6; default value is 2. Resets the value for MOS channel length; default is 100.0 xm. Resets the value for MOS channel width; default is 100.0 um. Resets the value for MOS drain diffusion area; default is 0.0. Resets the value for MOS source diffusion area; default is 0.0. PROBLEMS 67 SUMMARY ‘SPICE, ia one of a number of programs desi e features of tion programs is that they allow the user _ to define the circuit in terms of a topological, as opposed to a mathematical, descrip- ee Although the primary purpose of SPICE is to facilitate the analysis of circuits containing nonlinear integrated electronic devices, we have chosen to introduce it as a tool for analyzing linear, lumpe fer circuits. There are several reasons for this carly introduction. First, it acquaints the reader with a powerful computational tool. Second, the reader can test the computer-generated values by direct computation, thus gaining confidence in his or her ability to formulate correct programs. Third, the com- puter makes it possible to attack computational problems that are very tiresome if done without the aid of a computer, and often these lengthy computations can add insight to the behavior of a circuit. Finally, simulation progr: “modern practice. - introduction at an element ‘ dent for what lies ahead. PROBLEMS 1. Use SPICE to find the voltages V(2,0); V(3,0); and V(4,0) in the circuit shown in Fig. 10 when the reference for the controlling current is is reversed. 2. (a) Use the SPICE solution of Problem 1 to calculate the power dissipated in each resistor in Fig. 10. (b) Find the total power supplied by the independent voltage source. (©) Find the total power supplied by the current-controlled voltage source. (d) Check that the power dissipated equals the power supplied. (e) What is the total-power-dissipated value given by the SPICE program? (f) How does the value in part (e) relate to the previous calculations? 3. Return to the circuit of Problem 1 and replace the current-controlled voltage source with an independent voltage source of 132 V, positive at the reference node. Obtain the SPICE solution for this circuit and compare it with that obtained for Prob- lem 1. In Particular, compare the total-power-dissipated values of the two solutions. 4. Use SPICE to find the voltages v,, b; and v. in the circuit shown in Fig. P4.23. Use the .DC control statement so that these voltages can be printed directly from the program. 68 INTRODUCTION TO SPICE 5. Use SPICE to find the Thévenin equivalent with respect to the terminals of the variable resistor R, in the circuit seen in Fig. P4.35. 6. (a) Label the terminals of the 10-0 resistor in the circuit of Fig. P4.22 as a and b. Let a be the terminal at the top of the resistor. Now remove the 10-0 re- sistor and use SPICE to find the Thévenin equivalent of the remaining cir- cuit with respect to the terminals a,b. (b) Use the Thévenin equivalent obtained in part (a) to find the current in the 10-2 resistor. 7. Use SPICE to find the Thévenin equivalent with respect to the terminals a,b for the circuit of Fig. P7. (Hint: Introduce a very small current source in parallel with the 60-2 resistor to simulate no independent source in the original circuit.) 40ig non ang | Figure P7 . 8. Assume that the resistors in the circuit seen in Fig. P8 can vary by +2% and the voltage of the ideal voltage source can vary by +5%. Use SPICE to predict the maximum and minimum values of t,. 300 av C) v0 Figure P8 9. Write a SPICE program that will plot the transient response of v. in the circuit shown in Fig. 23 from 300 to 1800 ss in steps of 25 ps. Use a 5-ys increment for cal- culating the transient response. PROBLEMS 69 10. Use SPICE to obtain a plot of i versus 1 for the circuit shown in Fig. 10.3 when Jo = 50 mA, Vo = —10 V, L = 10 mH, R = 200 Q, and C = 1 wF. Use the ana- lytical solution for i(t) to check your SPICE plot. 11. Run the SPICE program for Example 8 and verify the results stated in part (c) of the solution. 12. The switch in the circuit seen in Fig. P12 has been closed for a long time. At 1 = 0 it is opened. Use SPICE to plot i:(¢) versus t for ¢ > 0. In making the plot, let TSTOP equal five time constants and select TSTEP to give 100 points between 0 and TSTOP. eon Figure P12 13. The 360-V, 3.6-( source in the circuit seen in Fig. P13 is inadvertently short- circuited at its terminals a,b. At the time the fault occurs, the circuit is in a steady-state operating condition. (a) Use SPICE to obtain a plot of the short-circuit current for : = 0. Make a Preliminary analysis of the circuit to facilitate the choice of TSTOP and TSTEP. (b) From the SPICE solution, estimate at what time the short-circuit current equals 76 A. 360 a Figure P13 70 INTRODUCTION TO SPICE 14, The initial voltage on the capacitor in the circuit seen in Fig. P14 is 100 V. Use SPICE to obtain a plot of v. and vy fort > 0. 200%01 <> 100V =~ 0.1 uF Ye vs Ss0Ka Figure P14 —. 1S. There is no energy stored in the circuit seen in Fig. P1S at the instant the de Current source jumps from 0 to 8 A. (a) Use SPICE to plot in(t) versus t fort = 0, (b) From the output of the SPICE Program, determine the peak value of iz(t) and the instant at which it occurs. Is 4) » wo La, Figure P15 16. (a) Use SPICE to solve part (c) of Example 10.3, (b) Use the output from your SPICE Program to check the maximum value of v(0), the time at which the maximum value occurs, and the value of the damped period. 17. (a) Use SPICE to plot v(t) versus ¢ for the circuit in Problem 16 when the 20-kO resistor is removed from the circuit. (b) Discuss the significance of removing the resistor from the circuit. 18. (a) Use SPICE to solve part (c) of Example 10.4, 0 S”SCS PROBLEMS ’ 71 (®) Use the output from your SPICE program to check the maximum value of (0) and the time at which it occurs. 19. (a) Use SPICE to Plot i(t) and ».(¢) in Example 10.10. (b) Use the output from your SPICE Program to confirm the solutions for i(t) and v.(0) given in Example 10.10(a) and (©). In particular, check peak val- ues, time of occurrence, and the damped Period. 20. (a) Use SPICE to plot v.(t) versus ¢ in the circuit in Example 10.11. (b) Use the output from your SPICE Program to confirm the solution for v(t) given in Example 10.11. 21. The switch in the circuit shown in Fig. P21 has been closed for a long time be- fore opening at 1 = 0, (@) Calculate the damped period of the voltage v,(z). (b) Use SPICE to obtain a plot of v(t) over the interval 0 <1 <= 1.57. (c) Use the output from your SPICE Program to determine the maximum mag- nitude of v,(r) and the time at which it occurs, Figure P21 22. Increase the size of the capacitor in the circuit of Fig. P21 to 12.5 uP, Use SPICE to find the maximum amplitude of v(t) and the time at which it occurs. 23. (a) Use SPICE to plot v2(t) versus ¢ for the circuit seen in Fig. P23. (See Prob- lem 17.23 for the initial conditions.) 72 INTRODUCTION TO SPICE Figure P23 (b) Use the output from your SPICE program to find v3(0), v(%), and dv(0)/de. 24. (a) Use SPICE to plot i(t) in the circuit shown in Fig. P17.27. [See Problem 17.27 for the initial conditions and the nature of »,(t).] (b) Use the output from your SPICE program to determine i(0), i(%), and the damped period. 25. (a) Use SPICE to plot i(r) in the circuit shown in Fig. P17.29. (See Problem 17.29 for the initial conditions and the nature of i,.) (b) Use the output from your SPICE program to determine i(0) and i(cc), 26. (a) Derive the analytical solution for the circuit seen in Fig. 27. (b) From the analytical solution, find the minimum value of vo(t), the time at which the minimum occurs, and the damped period. (c) Run the SPICE program listed in Example 9 and confirm the numerical val- ues given in the solution to the example, (d) Compare the SPICE results with those derived from the analytical solution. 27. (a) For the damped sinusoidal voltage vy = 12.5 + 25e-" sin [0.4 (¢ — DIV, calculate the maximum value of v,, the time at which the maximum occurs, the damped period, the delay time, and the offset voltage. (b) Run the SPICE program given for a circuit used to check a damped sinu- soidal (Section 9). PROBLEMS. 73) (©) From the output of the SPICE program, tabulate the maximum value of v,, the time at which the maximum occurs, the damped period, the delay time. and the offset voltage. (@) Compare the calculated values from part (a) with the SPICE-generated val- uues from part (c). Remember that output amplitudes are scaled by a factor of 0.8. 28. Assume that the damped sinusoidal source described in Problem 27 is applied to the circuit shown in Fig. P28. At the time 0g is energized the initial charge on the capacitor is zero. (a) Use SPICE to plot v,(t) versus 1. (b) Does the plot obtained in Part (a) make sense in terms of known circuit behavior? 100 Yo oo1F Yo Figure P28 29. An exponential voltage pulse is described by the following equations: =125V, O5rs1; b= 1254 1250 —e Vy, L 0 0.5} 1.0} tls) 400 /- | Figure P33 (a) (v) (b) Use SPICE to obtain a plot of v(t) versus t. Simulate the voltage source with a piecewise linear voltage source. (c) Compare the results from the SPICE program with those predicted by the analytical expressions. 34. The current source i, in the circuit shown in Fig. P34(a) has the waveform shown in Fig. P34(b). (a) Use SPICE to plot i,(r) versus ¢ for 0 = + = 1000 ps. (b) Derive the analytical expressions for i,(t) for: = 0. (©) Use the output from the SPICE program to check the results predicted by the analytical solutions for i,(r). ig (mA) lg ‘| 3254 0 35 750, t(us) Figure P34 (a) (b) 35. The circuit shown in Fig. P35 has been in operation a long time. At ¢ = 0 the voltage drops instantaneously to 12.5 V and the current source reverses direction. 76 INTRODUCTION TO SPICE Bko 15k 50V Figure P35, (a) Use SPICE to obtain a plot of vo(t) versus ¢ for 0 = 1 < 500 ms. (b) From the output of the SPICE Program, note the time at which w,(t) is zero. (©) Check the result found in part (b) with the analytical solution for the time when v,(f) is zero. 36. The sinusoidal voltage source in the circuit seen in Fig. P36 is generating a voltage of 6 cos 10°zrV. (@) Use SPICE to find the amplitude and phase angle of vo, vi, v2, and ip. (b) Test the results obtained in Part (a) by showing that they are consistent with the conservation-of-energy principle—namely, that the average power de- livered equals the average power absorbed. 7300 tka 126.0 18mH Figure P36 37. The phasor-domain circuit seen in Fig. P37 is based on a frequency of 60 Hz. (@) Use SPICE to find the amplitude and phase angle of V;, Vs, and Vs. (©) Repeat part (a), with the impedance of the neutral conductor first increased by a factor of 100—that is, Z, = 6 + j6 Q—and then increased by a fac- tor of 1000—that is, Z, = 60 + j60 0. PROBLEMS : 77; 0.050 (0.050 12000°V (rims) 0.062 O06 1290/0" V (rms) 005 0.050 Figure P37 (c) Describe the adverse effect on the operation of the circuit when the impedance of the neutral conductor is increased. 38. The phasor-domain circuit seen in Fig. P38 is based on a frequency of 5000 rad/s. Use SPICE to find the magnitude and phase angle of Ip and I, if V, = 40 + 730 V. =, 0.18299 were hssssn Bo no |» | 39. (a) Use SPICE to plot the amplitude of v, versus frequency for the circuit seen in Fig. P39. On| fo “ . Figure P39 = Figure P38 78 INTRODUCTION TO SPICE (b) From the output of the SPICE program, estimate the resonant frequency, the bandwidth, and the quality factor of the circuit. (©) Compare the results obtained in part (b) with the calculated values of f,, 8, and Q. 40. (a) The current source in the parallel-resonant circuit seen in Fig. P40 is i, = 4-cos wt mA. Calculate the unity power-factor resonant frequency (fe), the frequency at which v, is maximum (f,), the value of v, at f,, and the value of v, at fn. (b) Use SPICE to plot the amplitude of vy versus f. (c) Compare the output of the SPICE program with the results from part (a). Figure P40 41. (a) Print the values of v, versus f for the circuit of Example 13 from 1520 to 1680 Hz in increments of 1 Hz. (b) From the data generated in part (a), estimate the resonant frequency, the bandwidth, and the Q of the circuit. 42. The sinusoidal voltage source (v,) in the circuit shown in Fig. P42 has a peak amplitude of 10 V. Use SPICE to find (a) the unity power-factor resonant frequency; (b) the magnitude of v, at unity power-factor resonance; (c) the maximum magnitude of v,; and (d) the frequency at which the maximum magnitude of v, occurs. 100 kN? 5k = 40 mH Rp Figure P42 PROBLEMS 79 43. The circuit parameters in the circuit shown in Fig. P42 are changed to the following values: Ri = 2kQ, L = 20mH, R: = 200k, C = 250/21 pF, and Rs = 8 kQ. At the same time the peak amplitude of v, is changed to 100 mV. (a) Derive the transfer function Vo/Ve. (b) Calculate the unity Power-factor resonant frequency f,. (©) Calculate the magnitude of v, in decibels at the frequency found in part (b) (d) Calculate the frequency (f,) at which the magnitude of v, is maximum, (©) Calculate the magnitude of v, in decibels at the frequency found in part (4). (f) Use SPICE to make a Bode Plot of v, versus f. Start the plot at f,/1000 and stop the plot at 10f,. (8) Compare the results from the output of the SPICE program with the analyt- ical calculations. 44. (a) Use SPICE to find the magnitude and phase angle of v, in the circuit shown in Fig. P44 if v, = 500 cos 1000mt V. (b) Compare the output of the SPICE program with the analytical solution of &. a + Ye . 100.0 vo $500 Figure P44 = 45. (a) Use SPICE to find the magnitude and phase angle of v, in the circuit seen in Fig. PAS if vy = 456 cos 5000 V, V, = 1000 turns, and N; = 500 turns, (b) Compare the SPICE solution for v, with the analytical solution for vo. 40 08mH % 3200 >—t0ur Figure P45 80 INTRODUCTION TO SPICE 46. The sinusoidal voltage source in the circuit seen in Fig. P46 is described by the equation v = 202 cos 75,000r V. Use SPICE to find the amplitude and phase angle of i. 2800 k= VOD ae Yo 4mH 16mH 9009 Figure P46 47. Use SPICE to find the amplitude and phase angle of i, in the circuit seen in Fig. P47 when v, = 100 cos 2r V. 48. (a) Use SPICE to find the rms magnitude and the phase angle of i; and is in the circuit in Fig. P48. The sinusoidal voltage source is operating at a fre. quency of 1600 rad/s and has an rms value of 150 V. Figure P47 (©) Test the SPICE solution by using it to see if the average power generated equals the average power dissipated. 100 75mH 152 gay =i; olf Ve % 30 mH, vse2506 Figure P48 PROBLEMS 81 49. The operational amplifier in the noninverting amplifier circuit seen in Fig. P49 has an input resistance of 40 kQ, an Output resistance of 1 kM, and an open-loop gain of 10%. 80k Figure P49 (a) Use SPICE to find the value of v, and i, if vy is equal to 1 V(de). (b) Compare the SPICE solution with the analytical solution of v, and iy. 50. The two operational amplifiers in the circuit seen in Fig. P50 are identical. Their parameter values are R; = 500 kQ, R. = 100 Q, and A = 10%. (a) Use SPICE to find vo; and Cor When v, = 0.6 V(dc). (b) Calculate vo; and v2 if the operational amplifiers are assumed ideal. Are these values of vo, and vos consistent with the SPICE solution obtained in part (a)? 175k Figure P50 82 INTRODUCTION TO SPICE 51. The following parameters pertain to the circuit shown in Fig. P10.41(b): R=1kQ, Rs = 0.5 kQ, Ri = 400k, —R, = 400 2, 100kM, Ry = 50 kO, Ry= 20k, C= 5 uF, Ry = 5kO, C2 = 5 uF. Rs = 50 kQ, Assume that f(t) is a de voltage source that switches from 0 to 4.04 V att = 0. Atthe time the source is switched on, there is no energy stored in the capacitors C, and C2, The operational amplifiers are assumed to be ideal. (a) Use SPICE to obtain a plot of va(t) and v¢(#) versus t. (Hint: Use the solu- tion to Problem 10.41 to guide you to your selection of TSTEP and TSTOP.) (b) From the output of your SPICE program, estimate the maximum value of c(t) and the time at which it occurs. (c) Compare the results of part (b) with the analytical solution for vc(max) and t(max). 52. (a) Set the initial voltages on the capacitors C, and C2 in the circuit of Problem 51 so that vc(0) = —5 V and dvc(0)/dt = 10 V/s. (b) Use SPICE to obtain a plot of vc(t) and vs(t) with the initial conditions specified in part (a) (©) Check the output of the SPICE program to see if vc(0), doc(0)/dt, and tc() are satisfied. (d) Use the output of the SPICE program to estimate T, and check it against the calculated value. 53. The ideal operational amplifiers in the circuit of Problem 51 are replaced by 741 op amps. The parameters of the 741 are assumed to be Ri = 2 MQ, R, = 75 Q, and A = 10°. Compare the maximum and minimum values of tc(¢) with those obtained in Problem 51. 54. In the circuit shown in Fig. P22.54 the sinusoidal voltage source is generating the voltage vg = 100 cos 64,5001 V. The variable capacitor is varied from 5.72 to 9.72 nF in steps of 1 nF. Use SPICE to obtain a data set that gives the steady-state magnitude of v, versus C where 5.72 nF = C = 9.72 nF. PROBLEMS 83 10k Figure P54 55. The coefficient of coupling (k) in the circuit seen in Fig. PSS is varied from 0.3 to 1.0 in steps of 0.1. (a) Use SPICE to construct a table that shows how the magnitude of i, varies with k when v, = 100 cos 75,0001 V. (b) Analytically solve for the value of k that yields the maximum magnitude of iy. Call this value knox (c) Compare the SPICE solution for kina, with the analytical solution for kmax. 4mH 16mH 900.0 Figure P55 56. There is no charge on the capacitor when the voltage pulse shown in Fig. P56(a) is applied to the ideal integrating amplifier circuit shown in Fig. P56(b). Yo (mV) 5 0.1 pF 50 (a) tb) Figure P56 84 INTRODUCTION TO SPICE (a) Use SPICE to obtain a plot of vo(t) versus t over the time interval 0 to 3 s. (b) From the output of the SPICE program, tabulate the values of to at 0, 0.5, 1.0, 1.5, 2.0, 2.5, and 3 s. () Compare the output of the SPICE program with the analytical solution for to. 57. Repeat Problem 56, with the feedback capacitor paralleled by a 5-MQ resistor. 58. Assume that the ideal operational amplifier in the circuit seen in Fig. P56(b) is replaced with an operational amplifier that has an output resistance of 75 9, an input resistance of 2 MQ, and an open-loop gain of 10°. (a) Use SPICE to plot the output voltage in the interval 0 < 1 <3. (b) Compare the output with the ideal operational amplifier solution at 0, 0.5, 1.0, 1.5, 2.0, and 3.0 s. 59. The operational amplifiers in the circuit seen in Fig. P59 are ideal. At the in- stant the voltage source jumps from 0 to 250 mV there is no energy stored in the capac- itors. (a) Use SPICE to obtain a plot of vo: and vo: for 0 = 1 = 0.5 s. (b) Compare the SPICE output with the analytical solution for vo, and vo: at 1 = 0, 0.10, 0.20, 0.30, 0.40, and 0.50 s. 500K Ye Figure P59 PROBLEMS . 85 60. The signal voltage in the circuit shown in Fig. P60(a) is the periodic square wave shown in Fig. P60(b). 10) ete, 0 08 16 2a 32 tts) (o) Figure P60 (a) Assume that vo, = 4 V and use SPICE to obtain a plot of vo: for the inter- val O=1 = 1.68. (b) Compare the SPICE solution for vo; with the analytical solution for vo: 86 INTRODUCTION TO SPICE 61. The input signal in the circuit seen in Fig. P61 is the periodic square wave ANSWERS TO SELECTED PROBLEMS shown in Fig. P60(b). (a) Assume that vo: (0) = 4 V and vo2(0) = 0 V. Use SPICE to obtain a plot of 1. 198 V, 66 V, -132 V vo: and vm forO=1 <= 1.85. 4. 111.20 V, 117 V, 228.3 V 7.V.=0V,R, = 250 10. SPICE plot agrees with the solution i = (S00? + 0.05)e~!% A,t2=0 13. (a) SPICE plot agrees with the solution i = 100 — 362% — 24¢-40 a (b) 3.47 ms 16. (a) i, = 8 — 8e~‘ cos 8 — e' sin 8 A (b) From the plot i, (max) = 13.39 A at 400 ms 21. (a) 22.44 us; (b) SPICE plot agrees with the analytical _ solution (~300/7)e"* sin wat, where a = 40,000 rad/s, wy = 280 krad/s; (c) 57.61 VatS us 25. (a) SPICE plot agrees with the analytical solution (—100 + 84e~' + 36e*)u(t) A (b) (0) = 20 A, i) = -100A 27. (a) 34.63 V, 2.198, 5s, 18, 12.5 V; (©) 34.59 V, 2.208, 5s, 1s, 12.5 V5 (d) compare (a) and (c) values 33. (a) »» = 0,t <0 v = 400 — 400e-* V,0=1 = 0.505 vo = —400 + 745.87e~"-9 V,0.5 <1 <1.05 v = —299.06e"" V, 1s <7<0 (b) Computer plot is in agreement with these analytical expressions (b) Compare the SPICE solution for vo2 with the analytical solution for vo2. Figure P61 (©) Quantity Analytical SPICE vo(0.2) 220.27 V 219.7 V v0(0.5) 345.87 V 345.0 V vo(0.7) — 64.86 V 64.41 V v0(1.0) —299.06 V —298.60 V v0(1.2) — 134.38 V —134.30 V 36. (a) V, = 3.675/6.886° V; Vj, = 1.690/57.66° V; V2 = 1.946/-51.14° V; I, = 2.917/=19.78° mA () Paci = 2Pa, = 9.6637 mW 38. To = 18.68/—9.9° A; I = 3.688/139.4° A 42. (a) 159.155 kHz; (b) 7.50 V; (©) 7.94 V; (d) 220.25 kHz. 87 88 INTRODUCTION TO SPICE 45. (a) 508.4/—41.99° v; (b) 508.41/—41.99° v 48. (a) I, = 2.361/—64.29° A; Lb = 74.15/-21.41° mA (b) Pac = 154.64 W; Pai, = 153.65 W; checks to 1 part in 155. 51. (a) SPICE plots are in agreement with the analytical solutions for vp and ve —that is, wc = (5 — Se cos 10t — 0.5e~* sin 10) Vand, vs = —25.25e~ sin 102 V (b) 8.655 V; 320 ms (c) 8.652 V, 314.16 ms, and therefore Qua Analytical vc(max) 8.652 V 8.655 V fa 314.16 ms 320 ms 54. C, nF Ivol, V C nF |vol, V 5.72 27.03 8.72 28.34 6.72 28.34 9.72 27.01 LR 28.83 Se 56. (a) SPICE plot is in agreement with the analytical solution; (b) and (c): ts Vo, V (SPICE) Yo, V (anal) 0 4.2 x 10% 0 0.5 —2.497 —2.5 1.0 —4.994 -5.0 1.5 —2.497 2.5 2.0 7.975 x 10-5 0 2.5 7.975 x 1075 0 3.0 7.975 x 10-5 0 ANSWERS TO SELECTED PROBLEMS 89 59. (a) SPICE plots are in agreement with the analytical solutions: Vor —1.25 + 1.25e) V,1 = 0 Po = (5 — 10e“"" + Se“) V4 > 0 (b) ¢ Vor (SPICE) Vor (anal) Vor (SPICE) Vo2 (anal) 0 4.199 x 10-7 0 8.390 x 10-7 0 0.1 —1.081 —1.081 1,996 1,998 0.2 =L =1.227, 3.738 3.738 0.3 ~1.247 —1.247 4.515 4.515 0.4 —1.25 —1.2496 4.819 4.819 0.5 -1.25 —1.2499 4.933 4.933 61. (a) SPICE plots are in agreement with the analytical solutions: va = (—10t + 4), V.0<1<0.85 (10t — 12) V,0.8 <1 = 16s (-10t + 20) V,16<1=245 (St? — 4) V,0<1<085 (—St? + 12r- 6.4) V,08<1< 16s (St? — 201 + 19.2) V,16<1=2.45 (b) ¢ Vor, V (SPICE) Yo (anal) 0 —2.5 x 10° 0 0.2 —0.60 —0.60 0.4 —0.80 ~0.80 0.6 —0.60 —0.60 0.8 2.857 x 10-* 0 1.0 0.60 0.60 1.2 0.80 0.80 1.4 0.60 0.60 1.6 —1.722 x 10-5 0 Index of SPICE Data Statements, Deen curas errant} Pe Yin) Capacitor 4-6 Ce alta CoM seo ice) seed Independent v4 Meller coemenn ell el cal) Inductor Ce DUC ec le Ei oS lg ca Maley acd fen eee uel ce) 10-11 Independent eA Relietcoeeeru uel ce) tad Index of SPICE Control Statements Ce a os) rae Ce Pais. I .DC 16 B18) E Aa) |2 A] AC 32 OPTIONS od PLOT 28 ae vid SENS 25 B10) fea Bete} als v4) aT 28 Aye) Ce ADDISON-WESLEY PUBLISHING COMPANY, Ss) RUyA0 areola)

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