Documente Academic
Documente Profesional
Documente Cultură
fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TSTE.2017.2657660, IEEE
Transactions on Sustainable Energy
1
N OMENCLATURE
Vsa , Vsb , Vsc
Ia , Ib , Ic
+
+
Vsd
, Vsq
Vsd
, Vsq
Vsod , Vsoq
Id+ , Iq+
Id , Iq
Iod , Ioq
Ibatt1 , Ibatt2
C1 , C2
RON
Rf , Lf
Cf
Rloss1 , Rloss2
Lf dc1 , Lf dc2
CDC1 , CDC2
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Transactions on Sustainable Energy
2
+
VPV1 Lfdc1
SpDC2
IPV2
np
ns
2
CDC2
RSeries1 RTransient_S1
CCapacity1
CDC1
+
VPV2 Lfdc2
RTransient_L1 Ibatt1
IDC
IC 1
+
VOC1
Rloss1
CTransient_S1 CTransient_L1
C1
Iloss1
RSeries2 RTransient_S2
Rself_Discharge2
ns
2
Rself_Discharge1
np
CCapacity2
PV Array
+
VOC2
RTransient_L2 Ibatt2
IC 2
Rloss2
CTransient_S2 CTransient_L2
Iloss2
C2
Sp1
+
VC 1
Sp2 Vt
I
+
VC 2
Lf
Rf
IEEE 34 node
distribution
network
IL
If
Sn1
PCC Coupling
Vs Transformer Vsec
Cf
Sn2
(a). Schematic diagram of a VSC based DG unit with PV System and BESS.
848
846
Phase Detector
844
Notch filter
864
842
836
840
858
834
860
Vsa
Vsb
Vsc
abc
Vs
Vs
dq
Vsdp
Fn(s)
Vsd+
Vsqp
Fn(s)
Vsq+
Notch filter
862
Vsm+
838
822
820
PV System with
BESS, Connected
to VSC 2
PLL
Grid
808
850
824
888
832
818
890
f(s)
+
f(s)
K(s)
Vsqnorm+
+
Hard Limiter
Transformer 1
826
Loop Filter
VCO
fo
852
BRK
802
812
806
814
816
830
800
(Substation Bus)
810
PV System with
BESS, Connected
to VSC 1
828
856
f(s) Frequency
VCO Voltage Controlled Oscillator
Fn(s) is a notch filter tuned to eliminate the double line frequency component
Fault
Fig. 1: (a). Schematic diagram of a VSC based DG unit with PV System and BESS; (b). Modified IEEE 34 node Distribution Network [8]; (c). Improved Synchronous Reference
FramePhase Locked Loop (SRFPLL) [9], [10].
1949-3029 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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Transactions on Sustainable Energy
3
dId+ (t)
dt
dIq+ (t)
dt
dId (t)
dt
Lf
dt
(2)
dIq (t)
(1)
(3)
(4)
dIod (t)
Lf
+ (Rf + 2RON )Iod (t) = Vtod (t) Vsod (t)
dt
+ 2Lf [fo + f (t)]Ioq (t)
(5)
dIoq (t)
Lf
+ (Rf + 2RON )Ioq (t) = Vtoq (t) Vsoq (t)
dt
2Lf [fo + f (t)]Iod (t)
(6)
+
dVsd
(t)
dt
+
dVsq
(t)
dt
dVsd
(t)
dt
dVsq
(t)
(7)
(8)
(9)
(10)
(11)
(12)
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Transactions on Sustainable Energy
4
Fn(s)
ILdp(s)
Vsdref+(s)
Notch filter
+-
Fn(s)
Vsdp(s)
Kvd
uvd+(s) +
+
-
+(s)
Vsd+(s)
Dynamically
varying
Limiter
ILd+(s)
2Cf
Noise filter
Fn(s)
Gff(s)
Vsdp(s)
Idref
+(s)
Notch filter
+-
Kd
Id+(s)
Fn(s)
Idp(s)
f(s)
Fn(s)
Vsqp(s)
Notch filter
Vsqref+(s)
Notch filter
Iqref+(s)
ILq
Dynamically
varying
Limiter
+(s)
Fn(s)
Iqp(s)
Fn(s)
Vsd+(s)
Fixed
Hard Limiter
ud+(s) + Vtd+(s)
+
+(s)
2Lf
md
Vsqp(s)
Notch filter
Vtd+(s) -
Id
+
+
Gff(s)
mq
+(s)
Dynamically
varying
Limiter
Vsq+(s)
Noise filter
Vsd+(s)
+
+
f(s)
Fn(s)
+(s)
2Lf
2Lf
Iq+(s)
uq+(s) + Vtq+(s)
+
Kq (s)
+
++
Notch filter
Positive Sequence
Filter Capacitor Dynamics
ILd+(s)
VSC
+(s)
f(s)
2Cf
Vsq+(s)
uvq+(s) +
+
Kvq (s)
+
+
ILqp(s)
Vtq+(s) +
-
2Lf
2Cf
f(s)
!
Iq
+(s)
2Cf
+
-
Vsq+(s)
ILq+(s)
(a). Improved Positive Sequence VSC Current Control and PCC Voltage Control.
Closed Loop Negative Sequence Current Control
Negative Sequence PCC Voltage Controller
Notch filter
Fn(s)
ILdn(s)
Vsdref(s)
Notch filter
Fn(s)
Vsdn(s)
+-
Kvd
Vsd(s)
Dynamically
varying
Limiter
ILd(s)
(s)
uvd(s) +
+
2Cf
Noise filter
Fn(s)
Gff(s)
Vsdn(s)
Idref(s)
Notch filter
Kd
+-
Id(s)
Fn(s)
Idn(s)
f(s)
Fn(s)
Vsqn(s)
Notch filter
Vsqref(s)
ILqn(s)
Dynamically
varying
Limiter
Vsd(s)
ud(s) + Vtd(s)
+
(s)
2Lf
md
ILq
Notch filter
Iqref(s)
Dynamically
varying
Limiter
(s)
Fn(s)
Iqn(s)
Vtd(s) +-
Id
uq(s) - Vtq(s)
+
+
Fn(s)
Gff(s)
Noise filter
2Lf
Vsd(s)
mq
(s)
Vtq(s) +
+
-
2Cf
f(s)
2Lf
!
Iq
(s)
Dynamically
varying
Limiter
Vsq(s)
Notch filter
(s)
f(s)
2Lf
Kq(s)
Vsqn(s)
Notch filter
Iq(s)
-
Negative Sequence
Filter Capacitor Dynamics
ILd(s)
VSC
(s)
f(s)
2Cf
Vsq(s)
uvq(s) (s)
K
++
+
vq
Fn(s)
2Cf
+
+
Vsq(s)
ILq(s)
(b). Improved Negative Sequence VSC Current Control and PCC Voltage Control.
Closed Loop Zero Sequence Current Control
Zero Sequence PCC Voltage Controller
Notch filter
ILdz(s)
Vsodref(s)
Notch filter
Fn(s)
Vsdz(s)
Fn(s)
ILod(s)
Fixed
Hard Limiter
uvod(s) +
++
Kvod(s)
Vsod(s)
2Cf
Noise filter
Fn(s)
Gff(s)
Vsdz(s)
Iodref(s)
Notch filter
Fn(s)
Idz(s)
f(s)
Fn(s)
Vsqz(s)
Notch filter
Vsoqref(s)
2Cf
Vsoq(s)
u (s)
Kvoq(s) voq ++
+
ILoq(s)
Fn(s)
Iqz(s)
Fn(s)
+-
Vsod(s)
Kod(s)
Iod(s)
Dynamically
varying
Limiter
uod(s) + Vtod(s)
+
2Lf
Notch filter
Ioqref(s)
Fixed
Hard Limiter
Notch filter
Vsqz(s)
Vtod(s) -
Iod(s)
+
+
Vsoq(s)
Fn(s)
Gff(s)
Noise filter
Vsod(s)
+
+
2Lf
f(s)
2Lf
Ioq(s)
uoq(s) + Vtoq(s)
Koq(s)
+
+
Notch filter
Zero Sequence
Filter Capacitor Dynamics
ILod(s)
VSC
mod(s)
f(s)
ILqz(s)
moq(s)
Dynamically
varying
Limiter
Vtoq(s) +
-
2Cf
f(s)
2Lf
!
Ioq(s)
+
-
2Cf
Vsoq(s)
ILoq(s)
(c). Proposed Zero Sequence VSC Current Control and PCC Voltage Control.
Fig. 2: Positive, Negative and Zero Sequence VSC Current Control and PCC Voltage Control.
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5
I b
Ic+
I a+
Positive Sequence
Components
Ic+
I b
Where,
Rf + 2RON
Lf
I b+
Ic
Positive Sequence
Components
Negative Sequence
Components
Ic+
I b
Ic
+
min
Id
+
min
= Iq
Idmax
min
Id
IN
IO
1 KN
1 KO
Irated
IP
IP
IN
IO
= KN
1
1 KO
Irated
IP
IP
I
I
O
rated
= Iqmax = 1 KO
IP
2
IO
Irated
= Iq
= KO
1
min
IP
2
Irated
Iodmax = Ioqmax =
3
Irated
Iodmin = Ioqmin =
3
(15)
(16)
(17)
(18)
(19)
(20)
Where,
Irated Rated RMS current of the VSC.
IO
Peak value of the zero sequence component of the
VSC Current.
IN
Peak value of the negative sequence component of
the VSC Current.
IP
Peak value of the positive sequence component of
the VSC Current.
KN
Negative Sequence Scaling factor (chosen as 0.5).
Ib
I a+
Ia
Ib
Ic
Positive Sequence
Components
I a
Negative Sequence
Components
(c). Three Phase Three Wire System (Phase difference between Ia+ and Ia is /6 rad).
Ic+
I b I c
I a+
Ia
Ic = Ib
(b). Three Phase Three Wire System (Phase difference between Ia+ and Ia is 0 rad).
(14)
Idmax = Iqmax =
I a
(13)
Negative Sequence
Components
I a+
s+z
s
Ia
Ib = Ic = 0
(a). Three Phase Four Wire System (Magnitude of Ia+, Ia and Io is 1 pu).
z=
Io
Zero Sequence
Component
Ic
I b+
I a
I b+
Positive Sequence
Components
Ic
Ib = 0
I a
Ia
Resultant Line Currents
Negative Sequence
Components
(d). Three Phase Three Wire System (Phase difference between Ia+ and Ia is /3 rad).
KO
Zero Sequence Scaling factor (chosen as 0.33333).
If the system is operating under balanced conditions and
the VSC is supplying balanced currents, then the limits of
the positive sequence current references can be conveniently
chosen as 1 pu, but if the system is operating under unbalanced
conditions then VSC can be possibly subjected to over currents
in one of the phases. The most extreme case of unbalance
that is practically possible; when the positive sequence, the
negative sequence and the zero sequence components (will
be absent in a delta connected system) are all exactly equal
in magnitude. For instance, if the positive sequence, negative
sequence and zero sequence components are all equal to 1 pu,
then the current in one of the phases will be 3.0 pu which
will definitely cause considerable damage to the switches.
Therefore when the VSC is supplying unbalanced currents,
it is important to vary the limits of the positive and the
negative sequence current references as suggested in equations
(15)(18). The choice of the scaling factors KN and KO
will be discussed very briefly as follows.
Fig. 3 shows the phasor diagrams considering the worst
practically possible cases of unbalance that can occur in a
power system. Based on the phasor diagrams presented in
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Transactions on Sustainable Energy
6
PLref(s)
KPL(s)
fref(s)
Vsqref+(s)
Kf(s)
Hard Limiter
Gvq+(s)
Vsq+(s)
f(s)
K(s)
Hard Limiter
Droop Controller
Vsdbase
MPPT Controller
Closed loop Positive Sequence
d-axis PCC Voltage Control
1.04
f s + 1
f(s)
+
fo
f s + 1
KQdroop
Hard Limiter
KPdroop
PL1(s)
QL1(s)
Frequency Controller
Vsdref+(s)
Gvd+(s)
KMPPT(s)
D(s)
Vsd+(s)
Hard Limiter
Perturb
0.5
KMPPT(s) is a P-I Compensator
Hard Limiter
Droop Controller
Fig. 4: (a). Active Power and Frequency Control Schemes; (b). Reactive PowerVoltage Droop Control Scheme; (c) Maximum Power Point Tracking (MPPT) Control [22], [23],
[24]
PV Array
Buck-Boost
Converters
Rself
Battery
Energy
Storage
System
(BESS)
Voltage
Source
Converter
(VSC)
Coupling
Transformer
Capacity
Lf dc1 , Lf dc2
10 mH, 10 mH
CDC1 , CDC2
20 mF, 20 mF
Rated Voltage
Discharge1 ,
Rself
Discharge2
CCapacity1 , CCapacity2
RSeries1 , RSeries2
RT ransient
S1 ,
,
2970000 F, 2970000 F
VSC Current
Controller
Zero Sequence
(Kod (s), Koq (s))
Positive Sequence
+
+
Kvd
(s), Kvq
(s)
PCC Voltage
Controller
S2
0.00354 , 0.00354
CT ransient
S1 ,
CT ransient
S2
3316.9 F, 3316.9 F
RT ransient
L1 ,
RT ransient
L2
0.01056 , 0.01056
CT ransient
L1 ,
CT ransient
L2
21096.4 F, 21096.4 F
2000 A (rms)
DC Capacitors (C1 , C2 )
Rloss1 , Rloss2
IGBT ON Resistance
0.5 m
Filter Inductor
Rf = 0 , Lf = 300 H
400 F
Voltage Ratio
480/ 24900 V
kVA Rating
1650 kVA
Base Frequency
60 Hz
Winding Type
YGr/ YGr
Leakage Reactance
0.1 pu
Negative Sequence
Kvd
(s), Kvq
(s)
Zero Sequence
(Kvod (s), Kvoq (s))
0.0158 , 0.0158
RT ransient
Negative Sequence
Kd (s), Kq (s)
2
s 2 + n
2
+ 2n s + n
Noise filter in the current
control loops (Gf f (s))
Fn (s) =
s2
5.0
5.0
5.0
s+1
0.25
s
s+1
s
0.083333 Hz/MW
13.6 V/MVAR
1 ms
s+2
0.05
s
dPP V
is in kA
dV P V
Notch Filter
20.0
s + 3.333333
s
s + 3.333333
0.6
s
s + 3.333333
0.6
s
0.6
n = 2 120 rad/sec; = 0.8
1
0.001s + 1
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Transactions on Sustainable Energy
7
(21)
(22)
Vsd
ref
(23)
1949-3029 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TSTE.2017.2657660, IEEE
Transactions on Sustainable Energy
0.6
0.4
0.2
0.75
1.25
Time (s)
1.5
1.75
400
200
100
0.8
Time (s)
0.74
0.75
Time (s)
(V)
+
sd
0.76
0.77
0.78
Frequency of VSC 1
800cpu
60.2
410
400
390
60.1
60
59.9
59.8
min
max
0.73
0.74
0.75
0.76 0.77
Time (s)
0.78
0.79
380
0.7
0.8
0.75
0.8
0.85
Time (s)
0.9
apu
bpu
cpu
Power (kW)
0.25
0
0.25
0.5
1500
1000
500
0.75
0.8
0.82
0
0.7
0.75
0.8
(g)
0.8
0.85
Time (s)
0.9
0.95
(f)
2000
0.76
0.78
Time (s)
grid
0.75
(e)
I
0.74
59.7
0.7
0.95
2500
0.5
(pu)
0.73
60.3
+
sd
+
sdref
420
(pu)
800abc
800bpu
0.75
abc
20
0.72
0.9
(d)
1
0.72
(c)
430
800apu
gc
(b)
0.85
15
0.75
(a)
1.25
1
0.75
0.5
0.25
0
0.25
0.5
0.75
1
1.25
0.72
gb
10
(A)
300
100
0.7
ga
10
Frequency (Hz)
0
0.5
15
0.85
Time (s)
(h)
0.9
0.95
Mode
0.8
20
gabc
1200
1000
800
600
400
200
0
200
0.7
0.75
0.8
0.85
Time (s)
0.9
0.95
(i)
Fig. 5: Transition from the Grid Connected mode of Operation to the Islanded mode of Operation.
1949-3029 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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Transactions on Sustainable Energy
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1.5
1.5
862cpu
0.5
0
0.5
1.02
1.04
1.06
Time (s)
1.08
1.1
1.02
1.04
Time (s)
(a)
1.5
1.5
0.5
sbpu
0
0.5
0.5
1
1.5
0.98
1.08
1.1
scapu
1.5
0.98
1.04
1.06
Time (s)
sbcpu
0.5
sabbcca
scpu
sabpu
(pu)
(pu)
sabc
1
0.98
1.1
1.02
1.12
1.02
1.04
1.06
Time (s)
(d)
1.04
Time (s)
1.06
1.08
1.1
(c)
sapu
1.08
1.02
1.06
(b)
0.25
0.5
1.5
0.98
1.12
cpu
0.75
1.08
1.1
1.12
1.5
0.98
bpu
0.25
apu
0.5
0.5
0.75
1
(pu)
0.5
862capu
abc
862bcpu
862bpu
(pu)
862abbcca
862abc
(pu)
862abpu
862apu
Active Power (P )
400
Reactive Power (Q )
L1
L1
200
0
200
0.9
(e)
(f)
Fig. 6: Islanded mode of operationResponse to Sudden Change in Load (Zero Sequence VSC Current Control and PCC Voltage Control is Disabled [13]).
Per Unit Line to Neutral Voltages at node 862
V
(pu)
0.5
0
862bcpu
1.5
sapu
862capu
0.5
0.5
0
0.5
sbpu
scpu
0
0.5
0.5
862abpu
862abbcca
(pu)
862abc
862cpu
862bpu
(pu)
862apu
sabc
1.5
1
1
1.02
1.04
Time (s)
1.06
1.08
1.5
0.98
1.1
1.02
(a)
1.04
Time (s)
1.06
1.08
(pu)
abc
cpu
0.25
0
0.25
0.5
Frequency (Hz)
bpu
0.5
60.2
apu
60.1
60
Frequency of the PLL
Reference Frequency
f
59.9
59.8
0.75
min
1.02
1.04
1.06
Time (s)
1.08
1.1
1.12
59.7
0.9
max
(d)
(e)
1.02
1.04
Time (s)
1.06
1.08
1.1
(c)
60.3
I
0.75
(b)
Frequency of VSC 1
1
0.98
1.5
0.98
1.1
1.5
0.98
Active Power (P )
400
Reactive Power (Q )
L1
L1
200
0
200
0.9
(f)
Fig. 7: Islanded mode of operationResponse to Sudden Change in Load (Zero Sequence VSC Current Control and PCC Voltage Control is Enabled).
1949-3029 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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830bpu
830cpu
0.5
0.5
(pu)
sbpu
1.5
1.5
0.98
1.02 1.04 1.06 1.08 1.1 1.12 1.14 1.16 1.18 1.2
Time (s)
500
Power absorbed by BESS 1
Power Generated by PV System 1
Power supplied by VSC 1 to the Microgrid
1.2
1.3
Time (s)
1.4
1.5
1.2
0.8
0.8
O P
1000
1.1
0.6
0.4
0.2
0.2
0
0.9
1.6
1.1
1.2
1.3
Time (s)
(d)
1.4
1.5
0
0.9
1.6
500
150
400
100
1.5
1.6
sod
150
(V)
100
sod
(V)
0
50
sodref
50
0
50
100
100
1.1
1.2
1.3
Time (s)
1.4
1.5
150
0.9
1.6
150
1
1.1
(g)
40
1.2
1.3
Time (s)
1.4
1.5
80
1.5
soqref
160
0.9
1.6
1600
1200
600
800
1.5
1600
0.9
1.6
1.1
1.2
1.3
Time (s)
1.4
1.5
1200
0.9
1.6
900
600
400
1200
800
1800
1200
1.4
1.5
1.6
qmax
600
1.2
1.3
Time (s)
qmin
(A)
400
qref
1600
0.9
oq
I (A)
q
+
qmax
600
1.1
1.1
1.2
1.3
Time (s)
1.5
1.6
800
+
qmin
1.4
odmax
(o)
odmin
900
1200
+
qref
odref
1600
I
300
1800
+
q
1.6
300
2400
od
(n)
1.5
600
(m)
Positive Sequence qaxis component of the
Line Current of VSC 1
1.4
600
I
dmax
(A)
I
dmin
400
1200
1.4
I
dref
1800
900
I
d
400
1200
1.2
1.3
Time (s)
1200
800
+
I
dmax
1.2
1.3
Time (s)
(l)
od
+
I
dmin
I (A)
d
+
I
dref
2400
0.9
1.1
+
I
d
1200
(k)
1800
1.1
1.4
soq
2400
1.2
1.3
Time (s)
120
(j)
1.6
40
75
1.1
1.5
40
50
1.4
80
soq
0
25
100
0.9
1.6
1.2
1.3
Time (s)
120
(V)
25
2400
0.9
1.1
160
sq
V
sqref
sq
600
50
20
1200
200
0.9
1.6
(i)
75
(V)
20
1.1
1.5
100
+
sq
+
V
sqref
1.4
V
40
60
0.9
1.2
1.3
Time (s)
(h)
60
(V)
1.4
200
sd
V
sdref
50
+
sq
1.2
1.3
Time (s)
(f)
200
sd
0
0.9
1.1
(V)
+
sd
+
sd
+
V
sdref
300
100
I (A)
d
(e)
Negative Sequence daxis component of the
PCC Voltage of VSC 1
V
0.6
0.4
I (A)
q
1.02 1.04 1.06 1.08 1.1 1.12 1.14 1.16 1.18 1.2
Time (s)
(c)
I /I
I /I
N P
1500
1.2
500
0.9
(b)
3000
0.5
2000
cpu
1
1
(a)
Power Flow on the DC side of VSC 1
2500
bpu
0.5
0.5
1.5
0.98
1.02 1.04 1.06 1.08 1.1 1.12 1.14 1.16 1.18 1.2
Time (s)
apu
scpu
0.5
sapu
sabc
1.5
0.98
Power (kW)
830abc
(pu)
830apu
(pu)
abc
1.5
oq
1.4
1.5
oqref
oqmin
oqmax
300
0
300
600
900
(p)
1.1
1.2
1.3
Time (s)
(q)
1.4
1.5
1.6
1200
0.9
1.1
1.2
1.3
Time (s)
1.6
(r)
1949-3029 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TSTE.2017.2657660, IEEE
Transactions on Sustainable Energy
0.6
0.4
0.2
0
0.5
0.6
0.7
0.8
0.9
1
1.1
Time (s)
1.2
1.3
1.4
1.5
500
20
400
200
0.7
0.75
0.8
0.85
Time (s)
0.9
1.5
0.78
0.8
0.82
V
V
410
(V)
0.5
+
sd
400
0.5
1.5
0.32
1.5
0.68
0.34
Time (s)
0.35
0.36
390
0.69
0.7
Time (s)
sbpu
60.3
scpu
Frequency (Hz)
0.76
0.78
60
59.9
bpu
cpu
0.25
0
0.25
0.5
0.75
1
0.68
0.7
0.72
0.74
Time (s)
0.76
0.78
apu
1.5
0.95
1460
1440
0.7
0.8
0.9
1
1.1
Time (s)
1.2
1.3
1.4
1400
0.65
1.5
0.7
0.75
(h)
0.5
1.4
1420
(g)
Per Unit AC Line Currents of VSC 1
1.3
1480
fgrid
59.8
0.72
0.74
Time (s)
1.2
fmax
60.1
59.7
0.6
1
1.1
Time (s)
1500
60.2
0.9
(f)
0.5
0.7
0.8
DC
1.5
0.68
0.7
Frequency of VSC 1
0.5
380
0.6
0.72
(e)
sapu
0.75
0.71
(V)
0.33
(pu)
0.74
0.76
Time (s)
420
V (pu)
a
V (pu)
a
1.5
sabc
430
800apu
(d)
0.72
gapu
0.5
(pu)
0.7
0.5
abc
30
0.68
(c)
gapu
0.95
(b)
800apu
gc
20
(a)
1.5
gb
10
100
10
(A)
300
100
0.65
ga
0.8
0.85
Time (s)
0.9
(i)
Power Flow on the DC side of VSC 1
2500
1400
2000
1200
1000
800
600
400
200
Power (kW)
Mode
0.8
30
gabc
11
1500
1000
500
0
200
0.65
0.7
0.75
(j)
0.8
0.85
Time (s)
(k)
0.9
0.95
0
0.65
0.7
0.75
0.8
0.85
Time (s)
0.9
0.95
(l)
Fig. 9: Transition from the Islanded mode of Operation to the Grid Connected mode of Operation.
fault current has been limited to less than 1.5 pu which clearly
indicates the advantage of using dynamically varying limits for
the references of the positive and negative sequence current
control loops (The PCC Voltage Controllers were saturated
during the fault, which can be inferred from Fig. 8g, 8h, 8i, 8j,
8k and 8l for VSC-1). The current controllers were capable to
controlling the currents to the reference commands as shown in
Fig. 8m, 8n, 8o, 8p, 8q and 8r for VSC-1. During the transient
period, there will be a peak overshoot due to the fact that the
closed loop current control is not a first order system (It is
a Third order system). After the fault was cleared, the results
(shown in Fig. 8g, 8h, 8i, 8j, 8k and 8l for VSC-1) clearly show
that the PCC Voltage controllers were capable of regulating
the voltages to the reference commands (Fig. 8b shows the
PCC voltage at VSC-1 in abc-frame). From Fig. 8d it is clear
that the PV array still operates at MPP even during the fault
condition. Since the VSC effectively doesnt supply power to
the microgrid during the fault, all the power generated by the
PV array flows into the BESS (the results have been shown
for VSC-1). Fig. 8e and 8f respectively show the ratio of the
Negative and Zero Sequence components of the Line current
of VSC-1 with respect to the Positive Sequence component.
D. Transition from the Islanded mode of Operation to the Grid
Connected mode of Operation (Re-synchronization with the
grid):
The microgrid was operating in the Islanded mode of operation (After a Black Start was performed). Between t=0.32s to
t=0.36s it is clear that there is a significant phase difference between the voltage at node 800 and the grid voltage (as shown
in Fig. 9d) and therefore the microgrid cannot be synchronized
at this instant. At t=0.7s the phase difference between the
microgrid and the main grid is negligible (as shown in Fig. 9e)
and therefore the microgrid has been synchronized to the main
grid at this instant (By the closing of circuit breaker BRK)
which can be clearly observed in Fig. 9a, 9b, 9c and 9e. The
1949-3029 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TSTE.2017.2657660, IEEE
Transactions on Sustainable Energy
12
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1949-3029 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TSTE.2017.2657660, IEEE
Transactions on Sustainable Energy
13
1949-3029 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.