Comparative Performance Analysis of Shunt Active
Power Filter and Hybrid Active Power Filter using
FPGA-Based Hysteresis Current Controller
Gayadhar Panda1, Santanu Kumar Dash2
Department of Electrical Engineering
I.G.I.T, Sarang, Odisha
p_gayadhar@yahoo.com1
santanu4129@gmail.com2
AbstractThis paper describes the performance analysis of
single phase Shunt Active power filter (SAPF) verses Hybrid
Active Power Filter (HAPF) using Simulink and Xilinx System
Generator as a design platform. At the present age, elimination
of harmonics produced by the nonlinear loads to improve the
power quality is a great issue. To overcome the problem due to
harmonics, Active Power Filters (APFs) are used with various
control schemes. But Hybrid Active power filter is a power
electronic device which has both the characteristics of passive
power filters and active power filters, helps in cancelation of the
harmonics by producing compensating signal. The digital
controller design and its simulation are presented for both the
filter types, showing acceptable THD results for the word length
used in the fixed-point computations involved in the switching
sequence generation.
KeywordsActive Power Filter (APF); Hybrid Active power
filter (HAPF);Hysteresis Current Controller (HCC);Field
programmable gate array (FPGA); Hardware in Loop (HIL);Total
Harmonic Distortion (THD).
I. INTRODUCTION
Technological advancement leads to increase in use of
nonlinear loads; which leads to degradation in power quality.
The economic activities depend on electrical energy quality
and efficiency. Both industrial and commercial users are
interested in electrical waveform quality, which supplies their
different systems. Harmonics are the major problems
associated with these nonlinear loads. Many researchers have
been working for the elimination of harmonics in power
systems due to nonlinear loads [1].
Power electronic with VLSI application into different areas
has a considerable role in this sector. Increased energy
productivity results increased unbalanced, non linear loads
like variable switching devices. Continuous use of nonlinear
loads produces harmonics to power system that degrades the
power quality. The harmonic results in equipment overheating,
data losses, power losses, malfunctioning of the grid
components. Elimination of harmonics due to the nonlinear
loads passive power filters (PPF) with some merits like
reliable operation, easy design procedure, act as reactive
power compensators, but has many disadvantages like large
Financial support provided by Department of Science and Technology (DST),
Government. Of India
978-1-4673-0934-9/12/$31.00 2012 IEEE
Nirjharini Sahoo3
Department of Electrical Engineering
HI-Tech institute of technology
Bhubaneswar
nirjharini80@gmail.com3
numbers of components, bulky in nature, depend on system
impedance, tuned for a certain loading condition. By
overcoming these disadvantages of PPF, nowadays active
power filter (APF) has an effective role in harmonic
elimination [2, 3].Utilization of fast switching transistors (i.e.
IGBT) in APF application causes switching Frequency noise
to appear in the compensated source current. This switching
frequency noise requires additional filtering to prevent
interference with other sensitive equipment. These technical
limitations of conventional APFs mentioned above can be
overcome with hybrid APF configurations. They are typically
the combination of basic APFs and passive filters. Hybrid
APFs, inheriting the advantages of both passive filters and
APFs provide improved performance and cost-effective
solutions [4-6].
A number of control strategies for HAPF have been
proposed and implemented with different control algorithms.
Among all those analog to digital converter (ADC driver),
voltage regulator are also required to be implemented, but due
to complicated procedures these are very difficult for
realization in a digital controller in high sampling rate system.
At the same time DSP provides flexibility, easy powerful
calculation for various algorithms to develop fast acting
HAPFs. On the contrary these adopted solutions gives
complicated hardware and software designs, many times it
affects the dynamic performance and the compensation
accuracy [7-9].
But FPGA based digital controller provides a platform
which solves the problems of DSPs processer to greater
extent. Some of the merits of using FPGAs over DSPs are
mentioned below [10-15].
Parallel processing: executes all instructions
simultaneously in hardware.
Little effect on latency between different
control procedures.
Provides platform for easy and fast circuit
modification.
Rapid prototyping through Hardware
Description Language.
 It has the potential to speed-up the real time complete harmonic current elimination. As a result the hybrid
algorithm for industrial systems. APF performs the best for harmonic elimination.
It can work in association with DSPs.
III. HYSTERESIS CURRENT CONTROLLER
Present paper proposes a hysteresis current controller
technique implemented in a fully digital controller rather than There are many control scheme proposed for the control of
DSP processer, it is implemented in FPGA (Xilinx Hybrid active power filter but the hysteresis current control
Spartan3E). format for the SAPF and HAPF can be used to generate the
switching signals of the inverter with more advantages.HCC
provides easy implementation, fast current controllability and
II. STATE OF THE ART unconditioned stability in comparison to other methods. It
creates an environment for fastest control with minimum
Ls D1
D2
hardware and has excellent dynamics. Traditional hysteresis
current controllers produce bad harmonic performance, by
source
varying the hysteresis band its performance can be improved
to get a fixed switching frequency.
D3
D4
Hysteresis current controllers are many types like two-level
hysteresis current controller and three-level hysteresis current
controller. This paper covers two-level hysteresis current
controller for the proposed Hybrid active power line
conditioner.
Fig. 3. Shows the block diagram of hysteresis current
controller, Fig. 4 shows the two levels hysteresis current
control indicating the upper hysteresis band, lower hysteresis
Fig. 1. Diagram of Shunt Active Power Filter. band, actual and reference current. Conventional HCC
operates the PWM voltage source inverter by comparing the
current error against fixed hysteresis bands. The difference
ac source
is between the reference current and the current being injected
Non linear load
by inverter means the current error. When this current error
exceeds the upper limit of the hysteresis band the lower switch
of the inverter arm is turn on and the upper switch is turned
OFF and vice-versa.
APF

PPF

Fig. 2. Diagram of Hybrid Active Power Filter.

Fig. 3. Block diagram of Hysteresis current controller
Fig. 1. Shows the schematic diagram of a single phase At any point of time if we resolve the rate of change of phase
shunt APF connected to a distribution network Fig. 2. shows current, this can be written as
the schematic diagram of a single phase Hybrid APF dI I 2V IL
connected to a distribution network. The idea behind the dc t (1)
present scheme is to simultaneously reduce the switching dt t L 2Vdc
noise and electromagnetic interference. Although SAPF is
able to absorb the harmonics from nonlinear loads but HAPF In the equation (1) 2Vdc depends on switching state of
shows better performance. In HAPF the harmonics filtering inverter , rate of change of inverter current is represented as
task is divided between the two filters. The APF cancels the I ,rate of change in current in time period is t .In the
lower order harmonics, while the PPF filters the higher order hysteresis band complete switching cycle is from
harmonics. The main objective of hybrid APF therefore is to 0 t1 T
improve the filtering performance of high-order harmonics
while providing a cost-effective low order harmonics So the equation can be written as for 0 t1
mitigation. Passive filters which act as least impedance path to
the tuned harmonic frequencies were used initially to reduce
harmonics. Active filters overcome drawbacks of passive filter IL
t1 (2)
by using the switched mode power converter to perform 2Vdc
Again for the period t1 T
V. HARDWARE IN LOOP
IL
T t1 (3)
Hardware in loop is a technique for combining
2Vdc
mathematical control algorithm for a system with actual
By combining both the period equation total switching time physical hardware such that the hardware performs such a way
can be determined, it is given as: as it is connected to the real hardware. To connect the real-
2
1 Vdc V time model to the hardware controller the real-time computer
fs f max dc (4) receives electrical
T ILVdc IL Signals from the controller as actuator commands to drive
the plant, and convert the signals into the physical variable
Where the inverter maximum switching frequency can be connected to the plant model. When FPGA as digital
controller connected to the loop called as FPGA in the loop.
represented as fmax. In this paper FPGA Spartan3E is connected to a PC via a
interface named JTAG (Joint Test Action Group), which
provides communication between FPGA and the plant model

Simulink

Controller model Plant model

Fig. 4. Diagram of hysteresis band.

IV. FPGA DESIGNING ASPECTS

SPARTAN-3E PC with I/Os
FPGA target
FPGA Designers always face problems in minimizing the
device cost while maximizing the design functionality; this
leads to find a FPGA solution providing low cost and gate
centric programmable logic designs. At the same time Fig. 6. Hardware in loop system-model diagram
Spartan3E FPGA offers lowest cost per logic, parallel flash
memories, and efficient integration of the functions of many
chips into a single FPGA. These low cost features provide a
great platform to FPGA designers. Many of the advanced
features are shown in diagrammatic format in Fig. 5; which is Requirement System level
the main reason for choosing the Spartan3E in this paper. analysis testing

Model HIL Testing

Development

VHDL
Coding

Fig. 5. Advanced features of Spartan3E Fig. 7. V-Model

 VI. DESIGN PROCEDURE

The HCC block and the PI regulator are implemented on the

Spartan3E board by using the Xilinx ISE 13.2 synthesis tool.
The step wise design as follows:
Step 1: design of the control algorithm for APF is
written on VHDL code with Xilinx ISE 13.2 or the
same control algorithm can be developed by Matlab
Simulink and converted to HDL code.
Step 2: Each of the control blocks is developed in
RTL level VHDL code.
Step 3: Checking the connection of the FPGA board Fig. 9 simulink model of SAPF
with PC by JTAG by initializing the chain.
Step4: Downloading the VHDL code to the target
FPGA
The Hysteresis Current Controller implemented on FPGA
board for prototyping, where we can say the whole system is
working as hardware in loop (HIL) or FPGA in loop where the
HCC block has an up/down counter and a comparator along
with a clock divider to control frequency of switching pulses.
Computer is connected to the FPGA board by PC serial port,
the HCC is implemented in the FPGA controls the tuning of
the power filters to generate the opposite phase harmonic of
nonlinear load. Current signals from the nonlinear load are
taken and converted to voltage signals by converter, passing
the signals through the analog to digital converter injected into Fig. 10. simulink model of HAPF
the FPGA board. Thus the whole system acts like a Controller
in the loop. The total hardware setup is shown in Fig. 8. The operation of both the Simulink model of SAPF and HAPF
with hysteresis band can be explained as follows:

Step1- First the DC voltage across the capacitor is

sensed by voltage measuring instrument.
Step2-It is then compared with reference voltage and
the error generated is processed in PI controller.
Step3-This error is multipliesd with sine vector. The
product form one component of the current reference
signal of the conveter.
Step4-Again these component is compared with load
current and the error is given to the hyterisis band . As
the hysterisis band operates within certain tolerance
Fig. 8. FPGA implementation band so whenever the error hits hysteresis band
switching occurs.

VII. SYSTEM PERFORMANCE USING MATLAB
SIMULINK
Matlab provides a very good environment for students from
different domain in developing various algorithms. On the
other hand simulink platform provided by Matlab helps in
easy development of graphical models. It has various types of
tool boxes with simple drag and drop option. Power electronic
tool box of simulink is used to develop the Active power filter
with hysteresis current controller.
Fig. 11. (a), (b), and (c) show the source current, load
current, compensated current respectively for SAPF. Fig.
12 (a), (b), and (c) show the source current ,load current
and compensating current for HAPF. Fig. 13. (a), (b) and
(c) show the comparison of the total harmonic distortion
(THD) without APF, with SAPF and with HAPF
respectively. There is a significant reduction in THD in
HAPF model in comparison to SAPF which leads to
increase in nature of power quality. Table I shows the
comparison of THD with and without HAPF in the
distribution system. This tabulation shows reduction in
THD with respect to each order of current harmonic. It is
 evident from the results that if an HAPF with a suitable
controller is implemented in the point of common coupling
in the distributed system then harmonic created by the
nonlinear loads definitely get absorbed.

12(b)

11(a)

12(c)

Fig. 12. Simulated waveforms of HAPF (a) source current, (b) load current
and (c) compensating current

11(b)

13(a)

11(c)

Fig. 11. Simulated waveforms of SAPF (a) source current, (b) load current
and (c) compensating current
13(b)

13(c)

12(a) Fig. 13. Total Harmonic Distortion (a) without SAPF, (b) with SAPF and (c)
with HAPF
 TABLE I COMPARISION OF THD

ORDER OF CURRENT WITHOUT APF APF with HCC(Magnitude as % of HYBRID APF WITH HYSTERESIS Reduction in % Reduction in %
HARMONICS (Magnitude as % of fundamental) CONTROLLER(Magnitude as % of for SAPF for HAPF
fundamental) fundamental)

(Fundamental) 100 100 100

3 14.33 5.98 5.20 58.26 63.71
5 7.87 2.99 3.24 62.1 58.83
7 4.59 2.04 1.66 55.5 63.83
9 2.6 1.49 1.34 42.7 48.46

VIII. CONCLUSION [4] S.Suresh,M.Geetha,Dr.N.Devarajan A novelcontrol algorithm for

The work presented in this paper is the comparative analysis
for elimination of harmonics; the simulation results for both
the models show the total harmonic distortion reduced to
13.74% for SAPF and 10.12% for HAPF eliminating all other
odd harmonic. HAPF shows better performance in comparison
to SAPF. Therefore HAPF is effective and economic for
solving harmonic problem. In addition to these simulation
works, FPGA based HCC for SAPF and HAPF has been
explained in detail for developing prototype laboratory set-up.
ACKNOWLEDGEMENT
Financial support obtained from the D.S.T Government of
INDIA, vide project no. SR/S3/EECE/0107/2011 is greatly
acknowledged.
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