Introduction of Logic Circuits

ME2201 FUNDAMENTALS OF DIGITAL LOGIC
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Copyright 2008 Prof. Stephen Brown.
ACKNOWLEDGEMENT
This powerpoint slides are reproduced from

hand-written manuscripts for Verilog-based
Introduction to Digital Logic - ECE241
by Prof. Stephen Brown,
University of Toronto, Canada
with permission
Copyright 2008 Prof. Stephen Brown. 2

1. Introduction to Logic
Circuits

Digital Hardware (1/2)
Logic circuits are implemented as integrated circuit
chips.
How complex are these chips?
Year 2006 2007 2010

No. of transistors 2.4 billion 3 billion 6 billion
$100 $40

Digital Hardware (2/2)
Why is a smaller chip less expensive?
Chips are built on silicon wafers of a fixed size. Eg. 10"
wafer
chip
package

Variables and Functions (1/5)
All logic circuits are built using transistors. We use
transistors as simple on/off switches.
x=1
S = switch
(transistor)
This switch is controlled by the input x. If x = 0, S is open; if

x = 1, S is closed.

Consider a simple circuit:
The state of the light is called L. If L = 1, light is on; if L = 0,

light is off.
Analysis: if x = 0, L = 0
x = 1, L = 1
L(x) = x;

This is a logic expression; L(x) is a logic function. The signal

x is an input variable, or just input.
We use the word logic is because all signals (x, L) can have
only two values: 0, 1. The 0 represents logic FALSE, and 1
represents logic TRUE. Classic Mathematics also calls this
Boolean Logic, named after George Boole.

Use two switches:
x1 x2
Logic: L(x) = L is 1 when:

x1 and x2 are 1.
L( x1 , x2 ) = x1 x2 where means AND.
Other ways: L = x1 & x2
= x1 x2
= x1 AND x2
= x1 x2

L( x1 , x2 ) = x1 OR x2
= x1 x2
= x1 AND x2
= x1 x2
Summary: AND series connection

OR parallel connection

Inversion
Consider:
R = limits
the current
that flows.
if x = 0, L = 1
x = 1, L = 0
This opposite relationship is called inversion, or

complement.
L = NOT x
= !x
= ~ x
= x
Truth Tables (1/2)
You will see that all logic circuitry can be specified using only
AND, OR, NOT.
Truth table: a way of specifying logic functions.
x1 x2 x1 x2 x1 x2 x1 + x2
0 0 0 0 0 0
0 1 0 0 1 1
1 0 0 1 0 1
1 1 1 1 1 1

Truth Tables (2/2)
Three Variables:
x1 x2 x3 x1 x2 x3 x1 + x2 + x3 f(x1, x2, x3)

0 0 0 0 0 0
0 0 1 0 1 1
0 1 0 0 1 0 x3
0 1 1 0 1 1
1 0 0 0 1 0
1 0 1 0 1 1
1 1 0 0 1 1
x1x2
1 1 1 1 1 1
f = x3 + x1 x 2

Logic Gates and Networks (1/2)
Because AND, OR, NOT are often used, they have
circuit symbols:
x1
x2 f = x1 x2 AND gate
x1
x2
f = x1 x 2 ... x n
xn
x1
x2 f = x1 + x2 OR gate
x1
x2
f = x1 + x2 + ...+ xn
xn
x f =x NOT gate

Logic Gates and Networks (2/2)
f = x +xx3 1 2

Example of a Logic Circuit Design (1/2)
We have two toggle switches, x and y, that control a
light, L. If x=y=0, then L=0. Whenever either x or y is
changed, up or down, L has to change value.

Example of a Logic Circuit Design (2/2)
x y L
0 0 0
0 1 1 (x=0 and y=1)
OR
1 0 1 (x=1 and y=0)
1 1 0 L = x y + xy
VDD
xy
Recall: AND series
OR parallel
x y + xy
xy
Note: =

Logic Circuit Design 2: Bubble Gum Factory
(1/5)
Sensors
f = reject gum
3 sensors
S3: generates 1 iff gum is too large
S2: generates 1 iff gum is too small
S1: generates 1 iff gum is too light
Requirement: Set f=1 (reject) iff a gum ball is too
large, or both too small and too light.

(2/5)
Design circuit
S3
S2
S1
By inspection:
f = S3 + S 2 S1
S2
S1
S3

(3/5)
Derive Truth Table:
S3 S2 S1 f
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1 S3=0, S2=1, S1=1
1 0 0 1 S3=1, S2=0, S1=0
1 0 1 1 S3=1, S2=0, S1=1
1 1 0 1 S3=1, S2=1, S1=0
1 1 1 1 S3=1, S2=1, S1=1
**
f = S 3 S 2 S1 + S 3 S 2 S1 + S 3 S 2 S1 + S 3 S 2 S1 + S 3 S 2 S1
But, we know also that f = S3 + S 2 S1 !!

(4/5)
** can be simplified:
f = S 3 S 2 S1 + S3 ( S 2 S1 + S 2 S1 + S 2 S1 + S 2 S1 )
= S3 S 2 S1 + S3 (1)
= S3 ( S 2 S1 ) + S3
S3 S2 S1 f
= S 2 S1 + S3 (We will learn this rule later)
0 0 0 0
Consider: g = S1S 3 + S1S 3 + S1S 2 0 0 1 0
Derive truth table 0 1 0 0
10
S1 0 1 1 1
S3 1 0 0 1
1 0 1 1
1 1 0 1
1
S2 1 1 1 1
(5/5)
Another way to describe a logic function: Timing
Diagram
S1
S3
1
S2
Boolean Algebra
This algebra is useful for simplifying (optimizing) logic
functions. It consists of axioms, rules, and identities.

Boolean Algebra (1/5)
This algebra is useful for simplifying (optimizing) logic
functions. It consists of axioms, rules, and identities.
Axioms 1. 0 0 = 0, 1 + 1 = 1
2. 1 1 = 1, 0+0=0
3. 0 1 = 1 0 = 0, 1 + 0 = 0 + 1 = 1
4. if x = 0 , x = 1, if x = 1, x = 0
These axioms imply rules:

5. x 0 = 0, x +1=1
6. x 1 = x , x+0 = x Duality: One can
7. x x = x, x+ x = x
always swap with +
and 0 with 1 and the
8. x x = 0, x+ x =1 expression still applies.
9. x = x

Identities
10. x y = y x, x + y = y + x (commutativ e)
11. x ( y z ) = ( x y ) z , x + ( y + z ) = ( x + y ) + z (associativ e)
12 . x ( y + z ) = xy + xz (distributi ve )
x + ( y z) = ( x + y) ( x + z)
Note: does not work with non-Boolean Algebra

Distributive Identity (1/3)
Proof by Perfect Induction x + ( y z) = ( x + y) ( x + z)
x y z y.z LHS x+y x+z RHS

0 0 0 0 0 0 0 0
0 0 1 0 0 0 1 0
0 1 0 0 0 1 0 0
0 1 1 1 1 1 1 1
1 0 0 0 1 1 1 1
1 0 1 0 1 1 1 1
1 1 0 0 1 1 1 1
1 1 1 1 1 1 1 1
Same!
Proof by Venn Diagram
Circle to represent variable
x
x y
x+y
x
x.y

Proof of x+yz=(x+y)(x+z)
+ .
=
=
Same!

13 . x + xy = x ( covering)
x (x + y) = x
x + xy Rule
= x(1 + y ) 12
. = = x(1) 5
=x 6
14 . xy + x y = x ( combining) xy + xy
( x + y )( x + y ) = x = x( y + y ) 12
= x(1) 8
=x 5
15 . xy = x + y DeMorgans
x + y = x y theorem
16 . x + xy = x + y
x (x + y) = x y x ( x + y)
= ( x x ) + ( x y ) 12
+ = = 0 + ( x y) 8
x y
Example of Algebraic Minimization
x y z f
1
0 0 0 1
0 0 1 1 2 f =1 x yz + 2 x yz + 3 x yz + 4 x yz + 5 xyz + 6 xyz
0 1 0 1 3
= x y ( z + z )12 + x y ( z + z )12 + xy ( z + z )12
0 1 1 1 4
= x y (1) + x y (1) + xy (1)
1 0 0 0 = x y + x y + xy
1 0 1 0
5
= x 14 + xy
1 1 0 1
1 1 1 1 6 = x + y16

Terminology (1/3)
xy + yz
Each AND term is called product term.
The OR is called a sum.
The expression is in sum-of-products (SOP) form.
Eg.
f = xx +x1 2 3
g = xxx +xxx +xxx +xxx +xxx

1 2 3 1 2 3 1 2 3 1 2 3 1 2 3
h= xx +xx +xx
1 3 2 3 1 2
It turns out that f=g=h, so these expressions are

representing the same function.

Terminology (2/3)
g = x1 x2 x3 + x1 x2 x3 + x1 x2 x3 + x1 x2 x
1
= x3 ( x1 x2 + x1 x2 + x1 x2 + x1 x2 ) + x1 x2 x3
= x3 + ( x1 x2 ) x3
1
(16) = ( x3 + ( x1 x2 )) ( x3 + x3 )
= x3 + x1 x2 = f
h = x1 x3 + x2 x3 + x1 x2
= x3 ( x1 + x2 ) + x1 x2
= x3 ( x1 x2 ) + x1 x2
(16) = x3 + x1 x2 = f

Terminology (3/3)
or use distributive
h = x x + x (x x )
1 2 3 1 2
1
= (( x x ) + x ) ( x x ) + ( x x ) )
1 2 3 1 2 1 2
= xx +x 1 2 3
Expressions like:
g = xxx +xxx +xxx +xxx +xxx
1 2 3 1 2 3 1 2 3 1 2 3 1 2 3
have the property that all of the product terms contain

all of the inputs to the function. This is called canonical
SOP form. Each of the product terms in the canonical
form are called minterms.

Minterms
For 3 inputs there are 8 minterms.
xx x
1 2 3
Minterm Label
0 0 0 xxx
1 2 3
m 0
0 0 1 xxx
1 2 3
m 1
0 1 0
0 1 1
. . .
. . .
1 0 0
1 0 1
1 1 0
1 1 1 xxx
1 2 3
m 7

Sum-of-Products Form
We can specify a function using minterms.
Eg. xx x
1 2f f =m +m +m +m
3
1 2 4 7
0 0 0 0
0 0 1 1 or
0 1 0 1
0 1 1 0 f = m(1,2,4,7)
1 0 0 1
1 0 1 0 f ( x , x , x ) = m(1,2,4,7)
1 2 3
1 1 0 0
1 1 1 1

Duality
Principle of Duality: we can reverse AND OR
as well as 0 1, and
always get a correct
expression.
Eg.
xx x f
x x x = 000
1 2 3
0 0 0 0 (x + x + x ) 1 2 3
1 2 3
0 0 1 1
0 1 0 1
0 1 1 0 (x + x + x )
1 2 3
1 0 0 1
1 0 1 0 (x + x + x )
1 2 3
1 1 0 0 (x + x + x )
1 2 3
1 1 1 1

Product-of-Sums Form (1/5)
f = (x + x + x ) (x + x + x ) (x + x + x ) (x + x + x )
1 2 3 1 2 3 1 2 3 1 2 3
This is the (canonical) product-of-sums form.

We refer to the sum terms in the canonical form as
maxterms.
xx x
1 2 3
Maxterm Label
0 0 0 x +x +x M
x +x +x
1 2 3 0
0 0 1 1 2 3
M 1
0 1 0
0 1 1 . . .
. . .
1 0 0
1 0 1
1 1 0
1 1 1 x +x +x
1 2 3 M 7

Our example function can be designated:
xx x
1 2 3 f f = M M M M 0 3 5 6
0 0 0 0
0 0 1 1 or
0 1 0 1
0 1 1 0 f = M (0,3,5,6)
1 0 0 1
1 0 1 0 f ( x , x , x ) = M (0,3,5,6)
1 2 3
1 1 0 0
1 1 1 1

Example
xx x
1 2 3 f
0 0 0 0 (x + x + x )
(x + x + x ) (x + x + x )
1 2 3
0 0 1 1
(x + x + x )
1 2 3 1 2 3
0 1 0 0
= (x + x ) + (x x )
1 2 3
0 1 1 1 1 3 2 2
1 0 0 0 (x + x + x )
1 0 1 1
1 2 3
=x +x 1 3
1 1 0 1
1 1 1 1
(
f = ( x1 + x3 ) x1 + x2 + x3 )

Implement using sum-of-products form:
xy f f
00 0 x y 1 f = x y + xy + xy
01 1 x y 0
10 1 xy 0 = y ( x + x) + x( y + y )
11 1 xy 0
= x+ y
But we could also implement f
f = xy f = f = xy = x + y (DeMorgans Theorem)
The key point here is that

f = m0 = M 0 where M0 is the maxterm for row 0.
Example
xy f SOP POS f SOP
00 1 xy 0
01 0 ------------ ( x + y ) 1 xy
10 1 0
11 1
xy 0
xy
f = xy ; f = f = xy = x + y
f = x y + xy + xy = y ( x + x) + x( y + y ) = y + x

Multiplexer Circuit (1/3)
Example Design
A circuit has three inputs. The output f has to be equal to x1
when s = 0, but equal to x2 when s = 1.
s x1 x2 f
0 0 0 0
0 0 1 0
f = s x + sx
0 1 0 1 sx x + sx x 1 2
s
1 2 1 2
0 1 1 1
1 0 0 0 = sx (x + x ) = sx
1 2 2 1
x 1
1 0 1 1
1 1 0 0
sx 2 f
1 1 1 1 x 2

Multiplexer Circuit (2/3)
This is called a 2-to-1 multiplexer.
Circuit symbol:
s
x1 0
x2 1
f
Using switches
s x s
1
or x 1
f
s x s
2
x 2

XOR Function (1/2)
s
sx f
x 1
0 0 0
f = s x + sx
1
0 1 1
s
1 1
1 0 1
x 2
1 1 0
This is called the exclusive-OR function, or XOR.

f = sx 1
= sx 1
= s XOR x 1

XOR Function (2/2)
For three variables:
(called odd function)
x y z f
0
0
0
0
0
1
0
1
f = x y z
0
0
1
1
0
1
1
0
= ( x y) z
1
1
0
0
0
1
1
0
= x ( y z)
1 1 0 0
1 1 1 1 (cant distribute or factor)
XOR cant be simplified!

x f
y
NAND and NOR Logic Networks
x1 x2 f
0 0 1 This is the complement of
0 1 1 AND, called NAND.
1 0 1
1 1 0
x1 x2 f This is the complement of

0 0 1 OR, called NOR.
0 1 0
1 0 0 In practice, NAND and NOR
1 1 0 use fewer transistors than
AND and OR. So NAND and
NOR are widely used.
Converting SOP to Use NAND
f = x1 x2 + x2 x3 = x1 x2 + x2 x3
= ( x1 x2 ) ( x2 x3 ) * DeMorgan
f = ( x1 x2 ) ( x2 x3 )

Converting POS to use NOR
f = ( x1 + x2 ) ( x2 + x3 )
= ( x1 + x2 ) ( x2 + x3 )
= ( x1 + x2 ) + ( x2 + x3 ) *NOR
= ( x1 x2 ) ( x2 x3 )
Note: We can build all logic

functions using only NAND (or
NOR)

Introduction to Field-Programmable
Gate Arrays (FPGAs) (1/4)
balls
FPGA chip
Logic
Array
Block
(LAB)
package
pins
Mini printed
circuit board
(pcb)

Logic element
(implements a truth
table)

programmable switch
1/0 - memory cell

(storage)

Logic Element (LE)
Contains storage called
lookup table (LUT); the LUT
is used to store a truth table
Eg. 2-input LUT (NOR)

Software Tools
FPGA Computer Aided Design (CAD) flow has four
major steps:
1. Optimize logic functions (like our algebraic manipulation)
2. Map the function from (1) into LUTs (eg. 6-input AND, it
might take 2 LUTs).
3. Place each LUT on the FPGA chip.
4. Choose wires Fitting
5. Produce FPGA programming file (assembly)
35k LUTs in FPGA circuit has 35k LUTs

35k solutions!

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Thank you for using the ME2201 Digital Systems courseware.

ME2201 is a FREE read-only version of the ME2200 Digital

There will be no updates or support for this version. To purchase

This powerpoint slides are reproduced from

Copyright 2008 Prof. Stephen Brown. 2

Copyright 2008 Prof. Stephen Brown. 3

Year 2006 2007 2010

Copyright 2008 Prof. Stephen Brown. 4

Copyright 2008 Prof. Stephen Brown. 5

This switch is controlled by the input x. If x = 0, S is open; if

Copyright 2008 Prof. Stephen Brown. 6

The state of the light is called L. If L = 1, light is on; if L = 0,

Copyright 2008 Prof. Stephen Brown. 7

This is a logic expression; L(x) is a logic function. The signal

Copyright 2008 Prof. Stephen Brown. 8

Logic: L(x) = L is 1 when:

Copyright 2008 Prof. Stephen Brown. 9

Summary: AND series connection

Copyright 2008 Prof. Stephen Brown. 10

This opposite relationship is called inversion, or

Copyright 2008 Prof. Stephen Brown. 12

x1 x2 x3 x1 x2 x3 x1 + x2 + x3 f(x1, x2, x3)

Copyright 2008 Prof. Stephen Brown. 13

Copyright 2008 Prof. Stephen Brown. 14

Copyright 2008 Prof. Stephen Brown. 15

Copyright 2008 Prof. Stephen Brown. 16

Copyright 2008 Prof. Stephen Brown. 17

Copyright 2008 Prof. Stephen Brown. 18

Copyright 2008 Prof. Stephen Brown. 19

Copyright 2008 Prof. Stephen Brown. 20

Copyright 2008 Prof. Stephen Brown. 22

These axioms imply rules:

Copyright 2008 Prof. Stephen Brown. 23

Copyright 2008 Prof. Stephen Brown. 24

x y z y.z LHS x+y x+z RHS

Copyright 2008 Prof. Stephen Brown. 26

Copyright 2008 Prof. Stephen Brown. 27

Copyright 2008 Prof. Stephen Brown. 30

g = xxx +xxx +xxx +xxx +xxx

It turns out that f=g=h, so these expressions are

Copyright 2008 Prof. Stephen Brown. 31

Copyright 2008 Prof. Stephen Brown. 32

have the property that all of the product terms contain

Copyright 2008 Prof. Stephen Brown. 33

Copyright 2008 Prof. Stephen Brown. 34

Copyright 2008 Prof. Stephen Brown. 35

Copyright 2008 Prof. Stephen Brown. 36

This is the (canonical) product-of-sums form.

Copyright 2008 Prof. Stephen Brown. 37

Copyright 2008 Prof. Stephen Brown. 38

Copyright 2008 Prof. Stephen Brown. 39

The key point here is that

Copyright 2008 Prof. Stephen Brown. 41

Copyright 2008 Prof. Stephen Brown. 42

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This is called the exclusive-OR function, or XOR.

Copyright 2008 Prof. Stephen Brown. 44

XOR cant be simplified!

x1 x2 f This is the complement of

Copyright 2008 Prof. Stephen Brown. 47

Note: We can build all logic

Copyright 2008 Prof. Stephen Brown. 48

Copyright 2008 Prof. Stephen Brown. 49