Sunteți pe pagina 1din 28

MASTERDRIVES VC function diagram - List of contents of the supplementary boards

Contents Sheet Contents Sheet Contents Sheet


Supplementary boards: List of contents X00 SCB expansions
- SCB1/2
TSY Board Peer-to-peer receiving Z01
- TSY Board X01 Peer-to-peer transmitting Z02
- Synchronizing status: - SCB2
Phase control and frequency measurement X02 USS receiving Z05
- Connection Examples X03 USS transmitting Z06
- SCB1 with SCI1
Terminal expansions Digital inputs slave 1 Z10
- EB1 No.1 Digital inputs slave 2 Z11
Analog inputs, combined digital inputs Y01 Digital outputs slave 1 Z15
Analog outputs Y02 Digital outputs slave 2 Z16
Digital inputs/outputs Y03 SCI1 - analog inputs slave 1 Z20
- EB1 No.2 SCI1 - analog inputs slave 2 Z21
Analog inputs, combined digital inputs Y04 SCI1 analog outputs slave 1 Z25
Analog outputs Y05 SCI1 analog outputs slave 2 Z26
Digital inputs/outputs Y06 - SCB1 with SCI2
- EB2 No.1 Digital inputs slave 1 Z30
Analog and digital inputs/outputs Y07 Digital inputs slave 2 Z31
- EB2 No.2 Digital outputs slave 1 Z35
Analog and digital inputs/outputs Y08 Digital outputs slave 2 Z36

1 2 3 4 5 6 7 8
List of contents fp_vc_X00_e.vsd Function diagram
- X00 -
Supplementary boards 21.08.00 MASTERDRIVES VC
Sync.Status:
U953.23 = ___(4) 0 = Sync. deactivated
Synchronizing with
Sync Status 1 = Frequency measurement active
Control Mode TSY board
r528 2 = Phase control active
0...5 3 = Synchronism achieved
-X110 P100.M (1) 4 = Synchronizing fault

/15
P24 Synchronizing selected
Sheet X02:
DE TSY inv B0297
Synchronizin
1 B5001 1. Freq. measurement
g Freq. measurement active
enable Src Sync Release
24 V DE TSY P582 (5002) 2. Phase measurement B0298
/20 and control
B5002 B Phase measurement active
5V 3. Adjust phase B0299
Ref. potential /21 deviation to 0
Digital input Synchronism achieved
to status word 2 bit 17 [210.1]
Drive Status r001=14 (Operation)
Fault during synchronizing
from sequence control 1)
to status word 2 bit 30 [210.1]

Alarms:
A066 fsyn > fmax
A067 fsyn < fmin
A068 fsyn <> fset
A069 HLG active
A070 Sync. Fault
A071 TSY missing
U953.24 = ___(4)

SrcDigOutpTSY
-X110
Sync reached P650.01 (134)
Synchronizing: B0134 B /16
- Converter (P534 = 1): from status word 2
The reference frequency of the synchronizing con- [210.6]
verter has to be run to the frequency of the
main converter /17
(target frequency).
- Line (P534 = 2): SrcDigOutpTSY
The synchronizing enable shall be granted No Sync.Fault P650.02 (161)
after pulse enable in the case of the starting converter, B0161 B /18
from status word 2
before pulse enable in the case of the return converter.
[210.6]
The direction of rotation enable is granted in P571 or P572.

1) The sequence control is the internal /19


control (software) for implementing the
drive status (r001).

1 2 3 4 5 6 7 8
TSY Board fp_vc_X01_e.vsd Function diagram
- X01 -
Not with Compact PLUS! 24.07.01 MASTERDRIVES VC
Frequency SyncTargetFreq n/f(max.pos.Spd) [316.6] n957.81= 4
f(set, gating unit)
measurement [420.3]
r533 n/f(max.neg.Spd) [316.6]

KK0200
SyncTargFreq
-X111 Frequency from y
KK0275 Alarm A66
main converter or target freq. >n/fmax
/13 line x
/14
Alarm A67
Target frequency target freq. <n/fmin
input
<1> TSY fmin=2Hz

/11
Frequency from Start phase control (s.u.)
+
Target frequency
/12 synchronizing converter

f P529 Alarm A068
output Frequency, synchronizing converter reached

P529 (0,10)
0.00 ... 1.00 Hz
Sync.Start Delta f

Phase
measurement, PI Controller f(set,gating unit)
Sync PhaseDiff from v/f control
Phase control K0276
KK0200
Kp Tn y
df(Sync.Reg.)
KK0277
x 0
to setpoint channel
[318.3], [328.3]
-1 <0
P530 (0.0)
-180 ... 179.9
Sync Angle(set)
P532 (0,20)
0.00 ... 1.00 Hz
1) connection to VSB board in case of Sync.Delta fmax
Synchronism achieved
max
line synchronization: Status word 2
Bit 17 [210.1]
VSB TSY
X4 / 1 X111 / 13
X4 / 2 X111 / 14
X3 / 1 X111 / 10 P531 (2.00)
X3 / 3 X111 / 9 1.0 ... 20.0
Sync Window

1 2 3 4 5 6 7 8
TSY Board Not with Compact PLUS! fp_vc_X02_e.vsd Function diagram
- X02 -
Synchronizing status: Phase control and frequency measurement 24.07.01 MASTERDRIVES VC
Connection example for digital inputs/outputs with internal power supply n957.82 = 4
-
L1 L2 L3
X1
7
TSY TSY 4
1
VSB
11 13 13 1
OU OU
IN 12 14 14 2 IN
T T
+24V M +24V M - - +24V IN M +24V M +24V M - - +24V M
- - X111 X111 - - - X111 X4 -
9 10 7 8 15 16 17 18 19 20 21 22 9 10 7 8 3 1
X111 X112 X110 X111 X112 X3

OU
T
OU
T

For converter synchronization Synchronizing converter For line synchronization


(main converter) (ramp-up or ramp-down converter) (voltage sensing)

Connection example for digital inputs/outputs with external power supply


-
L1 L2 L3
X1
7
TSY TSY 4
1
VSB
11 13 13 1
OU OU
IN 12 14 14 2 IN
T T
+24V M +24V M - - +24V IN M +24V M +24V M - - +24V M
- - X111 X111 - - - X111 X4 -
9 10 7 8 15 16 17 18 19 20 21 22 9 10 7 8 3 1
X111 X112 X110 X111 X112 X3

OU
T
OU
T

+24V M +24V M

For converter synchronization Synchronizing converter For line synchronization


(main converter) (ramp-up or ramp-down converter) (voltage sensing)

1 2 3 4 5 6 7 8
TSY Module fp_vc_X03_e.vsd Function Diagram
- X03 -
Connection Examples Not with Compact PLUS! 24.07.01 MASTERDRIVES VC
Analog input (differential input) U953.01 = ___
Offset
-100.00 ... +100.00 % P659.1 (0) P661.1 (1)
P657.1 (0.00) B B
Signal type 10 V = 100 %
(0/1 = 10 V / 20 mA) Normalization Time constant
20 mA = 100 %
P655.1 (0) 0.00 ... 100.00 P658.1 (0) 0 ... 1000 ms r662.1
P656.1 (1.00) P660.1 (0)

50 200 s 13 Bit + sign


-1 3 0% 0
A 0 K5101
x y [%] = y 2
u -1
i
D
x [%] * P656.1 1 -1 1 1
10 V 20 mA 0 Enable analog
Hardware Sign inversion Smoothing input
51 1 2 3
X488 smoothing
B5101
20 mA 10 V Wire break (i 2 mA)

Analog inputs (single-ended)


Offset
Can also be used as digital inputs U953.02 = ___
-100.00 ... +100.00 % P659.2 (0) P661.2 (1)
P657.2 (0.00) B B
10 V = 100 % Normalization Time constant
0.00 ... 100.00 P658.2 (0) 0 ... 1000 ms r662.2
P656.2 (1.00) P660.2 (0)

200 s 13 Bit + sign


-1 3 0% 0
52 A 0 K5102
x y [%] = y 2
10 V -1
D
x [%] * P656.2 1 -1 1 1
0 Enable analog
Hardware Sign inversion Smoothing input
smoothing
B5102
1 2 3 High at input (U_in > 8 V)
X486 Digital input
Offset
20 mA 10 V P659.3 (0) P661.3 (1)
-100.00 ... +100.00 %
P657.3 (0.00) B B
10 V = 100 % Normalization Time constant
0.00 ... 100.00 P658.3 (0) 0 ... 1000 ms r662.3
P656.3 (1.00) P660.3 (0)
53
200 s 13 Bit + sign 0
3 0%
A
-1 0
x y K5103
y [%] = 2
10 V -1
D
x [%] * P656.3 1 -1 1 1
24 V 0 Enable analog
+ Hardware Sign inversion Smoothing input
54 smoothing
B5103
1 2 3 High at input (U_in > 8 V)
X487 Digital input

10 V

1 2 3 4 5 6 7 8
Terminal expansion EB1 No. 1 fp_vc_Y01_e.vsd Function diagram
- Y01 -
Analog inputs, combined digital inputs 01.08.1998 MASTERDRIVES VC
Analog outputs U953.03 = ___

Offset K5104
Uout [V] = * Normalization [V] + Offset [V]
-200.00 ... +200.00 V 100 %
Time constant
Normalization P667.1 (0.00)
P664.1 (0) 0 ... 10000 ms
P665.1 (0) -200.00 ... +200.00 V
P666.1 (10.00)
r668.1 11 bit + sign
3
P663.1 (0)
-1 D
2 x x y 47
K -1 y [V] =
100 %
* P666.1
1 A
0 Uout = -10 V ... + 10 V
Smoothing K5104

Offset
-200.00 ... +200.00 V
Time constant
Normalization P667.2 (0.00)
P664.2 (0) 0 ... 10000 ms
P665.2 (0) -200.00 ... +200.00 V
P666.2 (10.00)
r668.2 11 bit + sign
3
P663.2 (0)
-1 D
2 x x y 48
K -1 y [V] =
100 %
* P666.2
1 A
0
Smoothing Uout = -10 V ... + 10 V
K5105

49

K5105
Uout [V] = * Normalization [V] + Offset [V]
100 %

1 2 3 4 5 6 7 8
Terminal expansion EB1 No. 1 fp_vc_Y02_e.vsd Function diagram
- Y02 -
Analog outputs 12.10.01 MASTERDRIVES VC
4 bidirectional digital inputs/outputs U953.04 = ___

38
24 V Outputs
- + 39
Inputs
P669.1 (0)
B
out
43 1 B5104
out in 20 B5105
in
P669.2 (0)
B
out
out
44 1 B5106
21 out/in B5107
5V in Attention!
in
If one of the terminals 43 to 46 is to be used as an
24 V P669.3 (0) input, the corresponding output has to be set to the
B value "0" (transistor blocks) !
out
45 1 B5108
Example: Terminal 45 = input => P669.3=0!
22 B5109
in

P669.4 (0)
B
out
46 1 B5110
23 B5111
in

3 digital inputs U953.05 = ___

5V 1 B5112
40
B5113
24 24 V
M_external

5V 1 B5114
41
B5115
25 24 V
M_external

5V 1 B5116
42
B5117
Inputs 26 24 V
M_external Display of the terminal statuses via r670.1 on the PMU:

r670.1

K5106 42 41 40 46 45 44 43

1 2 3 4 5 6 7 8
Terminal expansion EB1 No. 1 fp_vc_Y03_e.vsd Function diagram
- Y03 -
Digital inputs/outputs 01.08.1998 MASTERDRIVES VC
Analog input (differential input) U953.06 = ___
Offset
-100.00 ... +100.00 % P659.4 (0) P661.4 (1)
P657.4 (0.00) B B
Signaltyp 10 V = 100 %
(0/1 = 10 V / 20 mA) Normalization Time constant
20 mA = 100 % 0.00 ... 100.00 0 ... 1000 ms r662.4
P655.4 (0) P658.4 (0)
P656.4 (1.00) P660.4 (0)

50 200 s 13 Bit + sign


3 0% 0
A
-1 0
x y K5201
y [%] = 2
u -1
i
D
x [%] * P656.4 1 -1 1 1
10 V 20 mA 0 Enable analog
Hardware Sign inversion Smoothing input
51 1 2 3
X488 smoothing
B5201
20 mA 10 V Wire break (i 2 mA)

Analog inputs (single-ended)


Offset
Can also be used as digital inputs U953.07 = ___
-100.00 ... +100.00 % P659.5 (0) P661.5 (1)
P657.5 (0.00) B B
10 V = 100 % Normalization Time constant
0.00 ... 100.00 P658.5 (0) 0 ... 1000 ms r662.5
P656.5 (1.00) P660.5 (0)

200 s 13 Bit + sign 0


3 0%
52 A
-1 0
x y K5202
10 V y [%] = 2
-1
D
x [%] * P656.5 1 -1 1 1
0 Enable analog
Hardware Sign inversion Smoothing input
smoothing
B5202
1 2 3 High at input (U_in > 8 V)
X486 Digital input
Offset
20 mA 10 V P659.6 (0) P661.6 (1)
-100.00 ... +100.00 %
P657.6 (0.00) B B
10 V = 100 % Normalization Time constant
0.00 ... 100.00 P658.6 (0) 0 ... 1000 ms r662.6
P656.6 (1.00) P660.6 (0)
53
200 s 13 Bit + sign 0
3 0%
A
-1 0
x y K5203
y [%] = 2
10 V -1
D
x [%] * P656.6 1 -1 1 1
24 V 0 Enable analog
+ Hardware Sign inversion Smoothing input
54
smoothing
B5203
1 2 3 High at input (U_in > 8 V)
X487 Digital input

10 V

1 2 3 4 5 6 7 8
Terminal expansion EB1 No. 2 fp_vc_Y04_e.vsd Function diagram
- Y04 -
Analog inputs, combined digital inputs 01.08.1998 MASTERDRIVES VC
Analog outputs U953.08 = ___

K5204
Offset Uout [V] = * Normalization [V] + Offset [V]
-200.00 ... +200.00 V 100 %
Time constant
Normalization P667.3 (0.00)
P664.3 (0) 0 ... 10000 ms
P665.3 (0) -200.00 ... +200.00 V
P666.3 (10.00)
r668.3 11 bit + sign
3
P663.3 (0)
-1 D
2 x x y 47
K -1 y [V] =
100 %
* P666.3
1 A
0 Uout = -10 V ... + 10 V
Smoothing K5204

Offset
-200.00 ... +200.00 V
Time constant
Normalization P667.4 (0.00)
P664.4 (0) 0 ... 10000 ms
P665.4 (0) -200.00 ... +200.00 V
P666.4 (10.00)
r668.4 11 bit + sign
3
P663.4 (0)
-1 D
2 x x y 48
K -1 y [V] =
100 %
* P666.4
1 A
0
Smoothing Uout = -10 V ... + 10 V
K5205

49

K5205
Uout [V] = * Normalization [V] + Offset [V]
100 %

1 2 3 4 5 6 7 8
Terminal expansion EB1 No. 2 fp_vc_Y05_e.vsd Function diagram
- Y05 -
Analog outputs 12.10.01 MASTERDRIVES VC
4 bidirectional digital inputs/outputs U953.09 = ___

38
24 V Outputs
- + 39
Inputs
P669.5 (0)
B
out
43 1 B5204
out in 20 B5205
in
P669.6 (0)
B
out
out
44 1 B5206
21 out/in B5207
5V in Attention!
in
If one of the terminals 43 to 46 is to be used as an
24 V P669.7 (0) input, the corresponding output has to be set to the
B value "0" (transistor blocks) !
out
45 1 B5208
Example: Terminal 45 = input => P669.7=0!
22 B5209
in

P669.8 (0)
B
out
46 1 B5210
23 B5211
in

3 digital inputs U953.10 = ___

5V 1 B5212
40
B5213
24 24 V
M_external

5V 1 B5214
41
B5215
25 24 V
M_external

5V 1 B5216
42
B5217
Inputs 26 24 V
M_external Display of the terminal statuses via r670.2 on the PMU:

r670.2

K5206 42 41 40 46 45 44 43

1 2 3 4 5 6 7 8
Terminal expansion EB1 No. 2 fp_vc_Y06_e.vsd Function diagram
- Y06 -
Digital inputs/outputs 01.08.1998 MASTERDRIVES VC
Analog input (differential input) U953.11 = ___
Offset P681.1 (1)
-100.00 ... +100.00 % P679.1 (0)
B
P677.1 (0.00) B
Signal type 10 V = 100 %
(0/1 = 10 V / 20 mA) Normalization Time constant
20 mA = 100 % 0.00 ... 100.00 r682.1
P675.1 (0) P678.1 (0) 0 ... 1000 ms
P676.1 (1.00) P680.1 (0)

49 200 s 11 Bit + sign 3 0% 0


A
-1 0
x y K5111
y [%] = 2
u -1
i
D
x [%] * P676.1 1 -1 1 1
10 V 20 mA 0 Enable analog
50 1 Hardware Sign inversion Smoothing input
2 3
smoothing
X498
B5121
20 mA 10 V Wire break (i 2 mA)

Analog output U953.12 = ___ Offset


-200.00 ... +200.00 V
Time constant
Normalization P687.1 (0.00)
P684.1 (0) 0 ... 10000 ms
P685.1 (0) -200.00 ... +200.00 V K5112
P686.1 (10.00) Uout [V] = * Normalization [V] + Offset [V]
100 %
r688.1 9 Bit + sign
3
-1
P683.1 (0)
x x y + D Uout = -10 V ... + 10 V X499
2 3
K -1 y [V] = * P686.1
47
1 100 % 2
+ A
U
0
1
Smoothing K5112 Iout =
I
-20 mA...+ 20 mA

48

51 2 digital inputs U953.13 = ___ 4 digital relay outputs U953.14 = ___


Mextern
P674 (0) 38
24 V .01 22
+ B 39
52 .02
P24aux 1 B5122 B
B .03 40
5V .04 23
53 B 41
B5123
20 24 V 42
Mexternal 24
1 B5124 Display of the terminal 43
statuses via r673.1 on the PMU:
5V 44
54 K5113 25
B5125 45
21 24 V
Mexternal r673.1
46
45 43 41 39 54 53

1 2 3 4 5 6 7 8
Terminal expansion EB2 No. 1 fp_vc_Y07_e.vsd Function diagram
- Y07 -
analog and digital inputs/outputs 12.10.01 MASTERDRIVES VC
Analog input (differential input) U953.15 = ___
Offset P681.2 (1)
-100.00 ... +100.00 % P679.2 (0)
B
P677.2 (0.00) B
Signal type 10 V = 100 %
(0/1 = 10 V / 20 mA) Normalization Time constant
20 mA = 100 % 0.00 ... 100.00 0 ... 1000 ms r682.2
P675.2 (0) P678.2 (0)
P676.2 (1.00) P680.2 (0)

49 200 s 11 Bit + sign


3 0% 0
A
-1 0
x y K5211
y [%] = 2
u -1
i
D
x [%] * P676.2 1 -1 1 1
10 V 20 mA 0 Enable analog
50 1 Hardware Sign inversion Smoothing input
2 3
smoothing
X498
B5221
20 mA 10 V Wire break (i 2 mA)

Analog output U953.16 = ___ Offset


-200.00 ... +200.00 V
Time constant
Normalization P687.2 (0.00)
P684.2 (0) 0 ... 10000 ms
P685.2 (0) -200.00 ... +200.00 V K5212
P686.2 (10.00) Uout [V] = * Normalization [V] + Offset [V]
100 %
r688.2 9 Bit + sign
3
-1
P683.2 (0)
x x y + D Uout = -10 V ... + 10 V X499
2 3
K -1 y [V] = * P686.2
47
1 100 % 2
+ A
U
0
Smoothing 1
K5212 Iout =
I
-20 mA...+ 20 mA

48

51 2 digital inputs U953.17 = ___ 4 digital relay outputs U953.18 = ___


Mextern
P674 (0) 38
24 V .05 22
+ B 39
52 .06
P24aux 1 B5222 B
B .07 40
5V .08 23
53 B 41
B5223
20 24 V 42
Mexternal 1 B5224 Display of the terminal 24
43
statuses via r673.2 on the PMU:
5V 44
54 K5213 25
B5225
21 45
24 V
Mexternal r673.2
46
45 43 41 39 54 53

1 2 3 4 5 6 7 8
Terminal expansion EB2 No. 2 fp_vc_Y08_e.vsd Function diagram
- Y08 -
analog and digital inputs/outputs 12.10.01 MASTERDRIVES VC
U953.25 = ___(4)
Transmitting for
Peer transfer
SCB/SCI Values SCB:
r699.17 to 21 SCB:
B4500 Word 1 Bit 0
Receiving B4515 Word 1 Bit 15
Peer-to-Peer Telegram 1 K4501 SCB Word 1

B4600 Word 2 Bit 0

2 K4502 SCB Word 2 B4615 Word 2 Bit 15


Low
KK4532 SCB DWord 2 B4700 Word 3 Bit 0
High B4715 Word 3 Bit 15
3 Low
K4503 SCB Word 3
KK4533 SCB DWord 3 B4800 Word 4 Bit 0
High B4815 Word 4 Bit 15
4 Low
K4504 SCB Word 4
KK4534 SCB DWord 4 B4900 Word 5 Bit 0
High B4915 Word 5 Bit 15
5 K4505 SCB Word 5
Low

SCB Protocol
0 ... 5
P696 (0)
P696 (x)
x=0: Master for SCI boards SCB Diagnosis
x=1: 4-wire USS r697.xx <1>
x=2: 2-wire USS
x=3: Peer-to-peer

SCom Baud
1 ... 13
P701.3 (6)

SCom PcD #
SCB SCB TlgOFF
0 ... 5
configu- B0050
P703.3 (2)
ration

SCom TlgOFF
0 ... 6500 ms Fault Delay
P704.3 (0) 0.0 ... 100.0 s
P704.3 (x) P781.15 (0.0)
x=0 no monitoring Note: Bit 0 must be set in the first PZD word of the telegram
received via USS, so that the converter will accept the
T 0 to F079 process data as being valid. For this reason, the control
SCB word 1 must be transferred to the converter in the first
telegram failure PZD word.
SCB Peer2PeerExt <1> (xx) see parameter list
0 ... 1
P705 (Index 1 to 5)

1 2 3 4 5 6 7 8
SCB1/2 fp_vc_Z01_e.vsd Function diagram
- Z01 -
Peer-to-peer receiving Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
U953.26 = ___(4)

DPR
Transmit telegram
PZD Peer-to-peer

SCB/SCI Values Transmit


r699.01 to .05
Src SCB TrnsData
P706 (0)
.01

K 1

.02 PZD
K 2
words

K .03 3

.04
K 4

.05
K 5

Transmitting 32 bit words:


If the same double-word connector is interconnected to two consecutive connector
numbers, this is transferred as a 32-bit word.

Examples:
1.
P706 (0)
KK1000 1000 .02
KK1000 is transferred as
KK1000 1000 .03 a 32-bit word

2.
P706 (0)
KK2000 2000 .02
Only the high part of
KK1000 1000 .03 KK1000 and KK2000 is
.04 transferred as a 16-bit
KK900 900
word

1 2 3 4 5 6 7 8
SCB1/2 fp_vc_Z02_e.vsd Function diagram
- Z02 -
Peer-to-peer transmitting Not with Compact PLUS! 12.05.03 MASTERDRIVES VC
Note: Bit 10 must be set in the first PZD word of the Dual PKW Task U953.25 = ___(4)
PKW words
telegram received via USS so that the conver- Port RAM r738.9 to .12
ter will accept the process data as being valid. SCB
For this reason, the control word 1 must be
PZD SCB - SCom: SCB -SCom:
Config words Receive Data
transferred to the converter in the first PZD r699.17 to 32
area B4500 Word 1 Bit 0
word.
B4515 Word 1 Bit 15
<1> (xx) see parameter list
1 K4501 Word 1
PKW B4600 Word 2 Bit 0

2 K4502 Word 2 B4615 Word 2 Bit 15


Low
KK4532 DWord 2 B4700 Word 3 Bit 0
PZD High
3 K4503 Word 3 B4715 Word 3 Bit 15
Low
KK4533 DWord 3 B4800 Word 4 Bit 0
SCB Receive telegram Receive High B4815 Word 4 Bit 15
4 Low
K4504 Word 4
KK4534 DWord 4 B4900 Word 5 Bit 0
PZD
High B4915 Word 5 Bit 15
TLG end PKW TLG head 5 K4505 Word 5
16 15 15 3 2 1 Low
KK4535 DWord 5
High
6 K4506 Word 6
Low
KK4536 DWord 6
SCB Protocol High
0 ... 5
7 K4507 Word 7
Low
KK4537 DWord 7
P696 (0)
P696 (x) High
x=0: Master for SCI boards SCB Diagnosis 8 K4508 Word 8
Low
x=1: 4-wire USS r697.xx <1> KK4538 DWord 8
x=2: 2-wire USS High
x=3: Peer-to-peer 9 Low
K4509 Word 9
KK4539 DWord 9
SCom Baud Rate High
1 ... 13 10 K4510 Word 10
P701.3 (6) Low
KK4540 DWord 10
High
SCB SCB TlgOFF 11 K4511 Word 11
SCom PcD # Low
configu- B0050 KK4541 DWord 11
0 ... 5
P703.3 (2) ration High
12 K4512 Word 12
Low
KK4542 DWord 12
SCom TlgOFF Fault Delay
0.0 ... 100.0 s High
0 ... 6500 ms 13 K4513 Word 13
P704.3 (0) P781.15 (0.0) Low
KK4543 DWord 13
P704.3 (x)
High
x=0 no monitoring 14 K4514 Word 14
to F079 Low
T 0 KK4544 DWord 14
SCB
Telegram Failure High
15 K4515 Word 15
Low
KK4545 DWord 15
High
16 K4516 Word 16

1 2 3 4 5 6 7 8
SCB2 fp_vc_Z05_e.vsd Function diagram
- Z05 -
USS receiving Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
PKW Reply U953.26 = ___(4)
r739.9 to .12
PKW Word 1 USS SCB

PKW Word 2 USS SCB


PKW PKW
PKW Word 3 USS SCB Transmit telegram
processing words
DPR TxD
PKW Word 4 USS SCB
Transmit
SCB/SCI Values
Src SCB TrnsData r699.01 to .16 PZD
TLG

P706 (0) 16 15 14 3 2 1 PKW TLG head
.01 end

K 1

.02 PZD
K 2
words

K .03 3

.04
K 4

.05
K 5

.06
K 6

.07
K 7 Transmitting 32-bit words:
If the same double-word connector is interconnected to two consecutive connector
.08 numbers, this is transferred as a 32-bit word.
K 8

.09 Examples:
K 9
1.
.10
K 10 P706 (0)
KK1000 1000 .02
KK1000 is transferred as
.11 .03 a 32-bit word
K 11 KK1000 1000

K .12 12 2.

.13 P706 (0)


K 13 KK2000 2000 .02
Only the high part of
KK1000 1000 .03 KK1000 and KK2000 is
.14
K 14 .04 transferred as a 16-bit
KK900 900
word.
.15
K 15

.16
K 16

1 2 3 4 5 6 7 8
SCB2 fp_vc_Z06_e.vsd Function diagram
- Z06 -
USS transmitting Not with Compact PLUS! 12.05.03 MASTERDRIVES VC
SCB/SCI Values
-X427 r699.1
See function diagram "Digital outputs slave 1": U953.25 = ___(4)

B1 Binary output 8, driver P24 VDC


B2 Binary output 8, driver 100 mA external,
SCI-SL1:
short-circuit proof
DigIn 1
24 V B4100
20
B3 DigInN 1
5V 1 B4120
DigIn 2
24 V B4101
21
B4 DigInN 2
5V 1 B4121
DigIn 3
24 V B4102
22
B5 DigInN 3
5V 1 B4122
DigIn 4
24 V B4103
23
B6 DigInN 4
5V 1 B4123
DigIn 5
24 V B4104
24
B7 DigInN 5
5V 1 B4124
B8 Reference point binary inputs 1 to 5

B10, 11 External power supply connection P24 VDC


A1, B9 Aux. voltage P24 VDC for binary inputs
A2, 9, 10, 11 Aux. voltage M for binary inputs
DigIn 6
24 V B4105
25
A3 DigInN 6
5V 1 B4125
DigIn 7
24 V B4106
26
A4 DigInN 7
5V 1 B4126
DigIn 8
24 V B4107
27
A5 DigInN 8
5V 1 B4127
DigIn 9
24 V B4108
28
A6 DigInN 9
5V 1 B4128
DigIn 10
24 V B4109
29
A7 DigInN 10
5V 1 B4129

A8 Reference point binary inputs 6 to 10

1 2 3 4 5 6 7 8
SCB1 with SCI1 fp_vc_Z10_e.vsd Function diagram
- Z10 -
Digital inputs slave 1 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
SCB/SCI Values
-X427 r699.5
See function diagram "Digital outputs slave 2": U953.25 = ___(4)

B1 Binary output 8, driver P24 VDC


B2 Binary output 8, driver 100 mA external, short-circuit proof
SCI-SL2:
DigIn 1
24 V B4200
20
B3 DigInN 1
5V 1 B4220
DigIn 2
24 V B4201
21
B4 DigInN 2
5V 1 B4221
DigIn 3
24 V B4202
22
B5 DigInN 3
5V 1 B4222
DigIn 4
24 V B4203
23
B6 DigInN 4
5V 1 B4223
DigIn 5
24 V B4204
24
B7 DigInN 5
5V 1 B4224
B8 Reference point binary inputs 1 to 5

B10, 11 External power supply connection P24 VDC


A1, B9 Aux. voltage P24 VDC for binary inputs
A2, 9, 10, 11 Aux. voltage M for binary inputs
DigIn 6
24 V B4205
25
A3 DigInN 6
5V 1 B4225
DigIn 7
24 V B4206
26
A4 DigInN 7
5V 1 B4226
DigIn 8
24 V B4207
27
A5 DigInN 8
5V 1 B4227
DigIn 9
24 V B4208
28
A6 DigInN 9
5V 1 B4228
DigIn 10
24 V B4209
29
A7 DigInN 10
5V 1 B4229

A8 Reference point binary inputs 6 to 10

1 2 3 4 5 6 7 8
SCB1 with SCI1 fp_vc_Z11_e.vsd Function diagram
- Z11 -
Digital inputs slave 2 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
U953.26 = ___(4)

-X429:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

SCB/SCI Values
r699.9
Src SCI DigOut
P698 (0)
.01 20
B
.02 21
B
.03 22
B
.04 23
B
.05 24
B
.06 25
B -X427
.07 26
B B1 (see function
.08 27 diagram "Digital
B
inputs slave 1")
B2

1 2 3 4 5 6 7 8
SCB1 with SCI1 fp_vc_Z15_e.vsd Function diagram
- Z15-
Digital outputs slave 1 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
U953.26 = ___(4)

-X429:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

SCB/SCI Values
r699.13
Src SCI DigOut
P698 (0)
.13 20
B
.14 21
B
.15 22
B
.16 23
B
.17 24
B
.18 25
B -X427
.19 26
B B1 (see function
.20 27 diagram "Digital
B
inputs slave 2")
B2

1 2 3 4 5 6 7 8
SCB1 with SCI1 fp_vc_Z16_e.vsd Function diagram
- Z16 -
Digital outputs slave 2 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
-X428
+10 V/5 mA for potentiometer, U953.25 = ___(4)
.1
short-circuit proof

.2 -10 V/5 mA for potentiometer,


short-circuit proof
SCI AnaIn Conf
0 ... 2 <2> SCI AnaIn Offset SCI AnaInSmooth
3 P690.1 (0) -20.00 ... 20.00 V 0 ... 15 <1>
U P692.1 (0) P691.1 (2)
10 V
SCB/SCI Values
4 12 bit + sign
r699.2
.3 A
K4101 SCI Sl.1 AnaIn
4 .4
D
I
.5 Hardware smoothing
20 mA Smoothing
1 ms
5
SCI AnaIn Conf
0 ... 2 <2> SCI AnaIn Offset SCI AnaInSmooth
P690.2 (0) -20.00 ... 20.00 V 0 ... 15 <1>
P692.2 (0) P691.2 (2)
SCB/SCI Values
12 bit + sign
r699.3
.6 A
K4102 SCI Sl.1 AnaIn
.7
D
.8 Hardware smoothing
Smoothing
1 ms

SCI AnaIn Conf


0 ... 2 <2> SCI AnaIn Offset SCI AnaInSmooth
P690.3 (0) -20.00 ... 20.00 V 0 ... 15 <1>
P692.3 (0) P691.3 (2)
SCB/SCI Values
12 bit + sign
r699.4
.9 A
K4103 SCI Sl.1 AnaIn
.10
D
.11 Hardware smoothing
Smoothing
1 ms

Note: <1> Value range: <2> Signal type:


Examples of offset and Value range calculated acc. to following equation: Terminals Terminals
(For further terminals, gain in the case of frequency/ X428.3, .6, .9 X428.5, .8, .11
see function diagram speed definitions are given in T=2 ms2P691.x 0: -10 ... 10 V -20 ... 20 mA
"SCI1 - analog outputs slave1") function diagrams [316], [326] 1: 0 ... 10 V 0 ... 20 mA
2: - 4 ... 20 mA

1 2 3 4 5 6 7 8
SCB1 with SCI1 fp_vc_Z20_e.vsd Function diagram
- Z20 -
SCI1 - analog inputs slave 1 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
-X428
+10 V/5 mA for potentiometer, U953.25 = ___(4)
.1
short-circuit proof

.2 -10 V/5 mA for potentiometer,


short-circuit proof
SCI AnaIn Conf
0 ... 2 <2> SCI AnaIn Offset SCI AnaInSmooth
3 P690.4 (0) -20.00 ... 20.00 V 0 ... 15 <1>
U P692.4 (0) P691.4 (2)
10 V
SCB/SCI Values
4 12 bit + sign
r699.6
.3 A
K4201 SCI Sl.1 AnaIn
4 .4
D
I
.5 Hardware smoothing
20 mA Smoothing
1 ms
5
SCI AnaIn Conf
0 ... 2 <2> SCI AnaIn Offset SCI AnaInSmooth
P690.5 (0) -20.00 ... 20.00 V 0 ... 15 <1>
P692.5 (0) P691.5 (2)
SCB/SCI Values
12 bit + sign
r699.7
.6 A
K4202 SCI Sl.1 AnaIn
.7
D
.8 Hardware smoothing
Smoothing
1 ms

SCI AnaIn Conf


0 ... 2 <2> SCI AnaIn Offset SCI AnaInSmooth
P690.6 (0) -20.00 ... 20.00 V 0 ... 15 <1>
P692.6 (0) P691.6 (2)
SCB/SCI Values
12 bit + sign
r699.8
.9 A
K4203 SCI Sl.1 AnaIn
.10
D
.11 Hardware smoothing
Smoothing
1 ms

Note: <1> Value range: <2> Signal type:


(For further terminals,
Examples of offset and Value range calculated acc. to following equation: Terminals Terminals
see function diagram
gain in the case of frequency/ X428.3, .6, .9 X428.5, .8, .11
"SCI1 - analog outputs slave2")
speed definitions are given in T = 2 ms2P691.x 0: -10 ... 10 V 0 ... 20 mA
function diagrams [316], [326] 2: 4 ... 20 mA

1 2 3 4 5 6 7 8
SCB1 with SCI1 fp_vc_Z21_e.vsd Function diagram
- Z21 -
SCI1 - analog inputs slave 2 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
SCI AnaOut Gain U953.26 = ___(4)
-320 ... 320 V
SCB/SCI Values P694.1 (10) SCI AnaOutOffset
r699.10 -100 ... 100 V
P695.1 (0)
SCI AnaOut ActV 12 Bit -X428
P693.1 (0) x x D
K
y[ V ] = P694.1 .12
100% A .13

U
.14 R 500
I
SCI AnaOut Gain
Iout = 0 ... 20 mA
-320 ... 320 V
SCB/SCI Values P694.2 (10) SCI AnaOutOffset
r699.11 -100 ... 100 V
P695.2 (0)
SCI AnaOut ActV 12 Bit
P693.2 (0) x x D
K
y[ V ] = P694.2 .15
100% A .16

U
.17 R 500
I
SCI AnaOut Gain
Iout = 0 ... 20 mA
-320 ... 320 V
SCB/SCI Values P694.3 (10) SCI AnaOutOffset
r699.12 -100 ... 100 V
P695.3 (0)
Src SCI.AnaOut. 12 Bit
P693.3 (0) x x D
K
y[ V ] = P694.3 .18
100% A .19

U
Note on Setting: 20 R 500
B = Reference value (cf P350 ... P354) A max A min
P694 = B I
Smin = Smallest signal value (e.g. in Hz, V, A) S max S min
Smax = Largest signal value (e.g. in Hz, V, A) A min* S max A max* S min Iout = 0 ... 20 mA
P695 =
Amin = Smallest output value in V S max S min
Amax = Largest output value in V
(For further terminals,
see function diagram
Output values in the case of current output:
"SCI1 - analog inputs slave1")
4 mA Amin = + 6 V
20 mA Amax = - 10 V

1 2 3 4 5 6 7 8
SCB1 with SCI1 fp_vc_Z25_e.vsd Function diagram
- Z25 -
SCI1 analog outputs slave 1 Not with Compact PLUS! 12.05.03 MASTERDRIVES VC
SCI AnaOut Gain U953.26 = ___(4)
-320 ... 320 V
SCB/SCI Values P694.4 (10) SCI AnaOutOffset
r699.14 -100 ... 100 V
P695.4 (0)
SCI AnaOut ActV 12 Bit
-X428
P693.4 (0) x x D
K
y[ V ] = P694.4 .12
100% A .13

U
.14 R 500
I
SCI AnaOut Gain
Iout = 0 ... 20 mA
-320 ... 320 V
SCB/SCI Values P694.5 (10) SCI AnaOutOffset
r699.15 -100 ... 100 V
P695.5 (0)
SCI AnaOut ActV 12 Bit
P693.5 (0) x x D
K
y[ V ] = P694.5 .15
100% A .16

U
.17 R 500
I
SCI AnaOut Gain
Iout = 0 ... 20 mA
-320 ... 320 V
SCB/SCI Values P694.6 (10) SCI AnaOutOffset
r699.16 -100 ... 100 V
P695.6 (0)
SCI AnaOut ActV 12 Bit
P693.6 (0) x x D
K
y[ V ] = P694.6 .18
100% A .19

U
Note on Setting:
A max A min .20 R 500
B = Reference value (cf P350 ... P354) P694 = B
Smin = Smallest signal value (e.g. in Hz, V, A) S max S min I
Smax = Largest signal value (e.g. in Hz, V, A) A min* S max A max* S min Iout = 0 ... 20 mA
P695 =
Amin = Smallest output value in V S max S min
Amax = Largest output value in V

Output values in the case of current output:


(For further terminals,
4 mA Amin = + 6 V
see function diagram
20 mA Amax = - 10 V
"SCI1 - analog inputs slave 2")

1 2 3 4 5 6 7 8
SCB1 with SCI1 fp_vc_Z26_e.vsd Function diagram
- Z26 -
SCI1 analog outputs slave 2 Not with Compact PLUS! 12.05.03 MASTERDRIVES VC
U953.25 = ___(4)

[Z30.1]
SCB/SCI Values SCI-SL1: SCI-SL1:
-X437 r699.1
DigIn 1 DigIn 9
24 V B4100 24 V B4108
20 28
B1 DigInN 1 A1 DigInN 9
5V 1 B4120 5V 1 B4128
DigIn 2 DigIn 10
24 V B4101 24 V B4109
21 29
B2 DigInN 2 A2 DigInN 10
5V 1 B4121 5V 1 B4129
DigIn 3 DigIn 11
24 V B4102 24 V B4110
22 210
B3 DigInN 3 A3 DigInN 11
5V 1 B4122 5V 1 B4130
DigIn 4 DigIn 12
24 V B4103 24 V B4111
23 211
B4 DigInN 4 A4 DigInN 12
5V 1 B4123 5V 1 B4131
DigIn 5 DigIn 13
24 V B4104 24 V B4112
24 212
B5 DigInN 5 A5 DigInN 13
5V 1 B4124 5V 1 B4132
DigIn 6 DigIn 14
24 V B4105 24 V B4113
25 213
B6 DigInN 6 A6 DigInN 14
5V 1 B4125 5V 1 B4133
DigIn 7 DigIn 15
24 V B4106 24 V B4114
26 214
B7 DigInN 7 A7 DigInN 15
5V 1 B4126 5V 1 B4134
DigIn 8 DigIn 16
24 V B4107 24 V B4115
27 215
B8 DigInN 8 A8 DigInN 16
5V 1 B4127 5V 1 B4135

B9 Reference point binary inputs 1 to 8 A9 Reference point binary inputs 9 to 16


B10 Aux. voltage P24 VDC A10 Aux. voltage M for binary inputs
B11, 12 External power supply connection P24 VDC A11, 12 External power supply connection M

[Z30.5]

1 2 3 4 5 6 7 8
SCB1 with SCI2 fp_vc_Z30_e.vsd Function diagram
- Z30 -
Digital inputs slave 1 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
U953.25 = ___(4)

[Z31.1]
SCB/SCI Values SCI-SL2: SCI-SL2:
-X437 r699.4
DigIn 1 DigIn 9
24 V B4200 24 V B4208
20 28
B1 DigInN 1 A1 DigInN 9
5V 1 B4220 5V 1 B4228
DigIn 2 DigIn 10
24 V B4201 24 V B4209
21 29
B2 DigInN 2 A2 DigInN 10
5V 1 B4221 5V 1 B4229
DigIn 3 DigIn 11
24 V B4202 24 V B4210
22 210
B3 DigInN 3 A3 DigInN 11
5V 1 B4222 5V 1 B4230
DigIn 4 DigIn 12
24 V B4203 24 V B4211
23 211
B4 DigInN 4 A4 DigInN 12
5V 1 B4223 5V 1 B4231
DigIn 5 DigIn 13
24 V B4204 24 V B4212
24 212
B5 DigInN 5 A5 DigInN 13
5V 1 B4224 5V 1 B4232
DigIn 6 DigIn 14
24 V B4205 24 V B4213
25 213
B6 DigInN 6 A6 DigInN 14
5V 1 B4225 5V 1 B4233
DigIn 7 DigIn 15
24 V B4206 24 V B4214
26 214
B7 DigInN 7 A7 DigInN 15
5V 1 B4226 5V 1 B4234
DigIn 8 DigIn 16
24 V B4207 24 V B4215
27 215
B8 DigInN 8 A8 DigInN 16
5V 1 B4227 5V 1 B4235

B9 Reference point binary inputs 1 to 8 A9 Reference point binary inputs 9 to 16


B10 Aux. voltage P24 VDC A10 Aux. voltage M for binary inputs
B11, 12 External power supply connection P24 VDC A11, 12 External power supply connection M

[Z31.5]

1 2 3 4 5 6 7 8
SCB1 with SCI2 fp_vc_Z31_e.vsd Function diagram
- Z31 -
Digital inputs slave 2 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
U953.26 = ___(4)

-X439:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

SCB/SCI Values
r699.9
Src SCI DigOut
P698 (0)
.01 20
B
.02 21
B
.03 22
B
.04 23
B
.05 24
B
.06 25
B
.07 26
B
.08 27
B
.09 28 -X438:
B
.10 29
B B1
.11 210
B
.12 211
B B2
B3

B4
B5

B6

A1

A2
A3

A4
A5 Aux. voltage P24 VDC
A6 Aux. voltage M for binary outputs

1 2 3 4 5 6 7 8
SCB1 with SCI2 fp_vc_Z35_e.vsd Function diagram
- Z35 -
Digital outputs slave 1 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC
U953.26 = ___(4)

-X439:
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

SCB/SCI Values
r699.13
Src SCI DigOut
P698 (0)
.13 20
B
.14 21
B
.15 22
B
.16 23
B
.17 24
B
.18 25
B
.19 26
B
.20 27
B
.21 28 -X438:
B
.22 29
B B1
.23 210
B
.24 211
B B2
B3

B4
B5

B6

A1

A2
A3

A4
A5 Aux. voltage P24 VDC
A6 Aux. voltage M for binary outputs

1 2 3 4 5 6 7 8
SCB1 with SCI2 fp_vc_Z36_e.vsd Function diagram
- Z36 -
Digital outputs slave 2 Not with Compact PLUS! 16.05.01 MASTERDRIVES VC

S-ar putea să vă placă și