voltage level of 2/3 V+ (the normal voltage on pin 5).

The action of the threshold pin is level

sensitive, allowing slow rate-of-change waveforms. The voltage range that can safely be
applied to the threshold pin is between V+ and ground. A dc current, termed thethreshold
current, must also flow into this terminal from the external circuit. This current is typically
0.1A, and will define the upper limit of total resistance allowable from pin 6 to V+. For
either timing configuration operating at V+ = 5 volts, this resistance is 16 Mega- ohm. For 15
volt operation, the maximum value of resistance is 20 MegaOhms.

Pin 7 (Discharge):This pin is connected to the open collector of a npn transistor (Q14), the
emitter of which goes to ground, so that when the transistor is

turned "on", pin 7 is effectively shorted to ground. Usually the timing capacitor is connected
between pin 7 and ground and is discharged when the transistor turns "on". The conduction
state of this transistor is identical in timing to that of the output stage. It is "on" (low
resistance to ground) when the output is low and "off" (high resistance to ground) when the
output is high. In both the monostable and astable time modes, this transistor switch is used to
clamp the
appropriate nodes of the timing network to ground. Saturation voltage is typically below
100mV (milli-Volt) .

Pin 8 (V +):The V+ pin (also referred to as Vcc) is the positive supply voltage terminal of the
555 timer IC. Supply-voltage operating range for the 555 is +4.5 volts (minimum) to +16
volts (maximum), and it is specified for operation between +5 volts and +15 volts. The device
will operate essentially the same over this range of voltages without change in timing period.
Actually, the most significant operational difference is the output drive capability, which
increases for both current and voltage range as the supply voltage is increased. Sensitivity of
time interval to supply voltage change is low, typically 0.1% per volt. There are special and
military devices available that operate at voltages as high as 18 volts.

3.5. Monostable Multivibrator Circuit details

Pin 1 is grounded. Trigger input is applied to pin 2. In quiescent condition of output this input
is kept at + VCC. To obtain transition of output from stable state to quasi-stable state, a
negative-going pulse of narrow width (a width smaller than expected pulse width of output
waveform) and amplitude of greater than + 2/3 VCC is applied to pin 2. Output is taken from
pin 3. Pin 4 is usually connected to + VCC to avoid accidental reset. Pin 5 is grounded through
a 0.01 u F capacitor to avoid noise problem. Pin 6 (threshold) is shorted to pin 7. A resistor
RA is connected between pins 6 and 8. At pins 7 a discharge capacitor is connected while pin
8 is connected to supply VCC.

3.6. 555 monostable-multivibrator-operation

The operation of the circuit is explained below:

Initially, when the output at pin 3 is low i.e. the circuit is in a stable state, the transistor is on
and capacitor- C is shorted to ground. When a negative pulse is applied to pin 2, the trigger
input falls below +1/3 VCC, the output of comparator goes high which resets the flip-flop and
consequently the transistor turns off and the output at pin 3 goes high. This is the transition of
the output from stable to quasi-stable state, as shown in figure. As the discharge transistor is
cutoff, the capacitor C begins charging toward +VCC through resistance RA with a time
constant equal to RAC. When the increasing capacitor voltage becomes slightly greater than
+2/3 VCC, the output of comparator 1 goes high, which sets the flip-flop. The transistor goes
to saturation, thereby discharging the capacitor C and the output of the timer goes low, as
illustrated in figure.Thus the