Harmonic Analysis of Different Inverter Topologies For Solar Energy System

ISTANBUL TECHNICAL UNIVERSITY
FACULTY OF ELECTRICAL AND ELECTRONICS

ENGINEERING
INVESTIGATION OF POWER QUALITY ANALYSIS OF INVERTER

TOPOLOGIES FOR SOLAR ENERGY SYSTEMS
GRADUATION DESIGN PROJECT
MERT SALI
ELECTRICAL ENGINEERING
JANUARY 2017
ISTANBUL TECHNICAL UNIVERSITY
FACULTY OF ELECTRICAL AND ELECTRONICS
ENGINEERING

TOPOLOGIES FOR SOLAR ENERGY SYSTEMS
GRADUATION DESIGN PROJECT
MERT SALI
(040110424)
Advisor: Prof. Dr. Belgin TRKAY
Date of Submission: 6 January 2017
ELECTRICAL ENGINEERING
JANUARY 2017
FOREWORD
I would like to thank sincerely my advisor Prof. Dr. Belgin TRKAY for her
continuous support and encouragement throughout my project. In addition, I want to
thank to Murat SLSPR for his valuable help during the research.
Finally, I would like give my special thanks to my family especially my mom who
always supported and trusted me.
January 2017 Mert SALI
ii
TABLE OF CONTENTS
ABSTRACT ............................................................................................................. xi
1. INTRODUCTION...1
1.1. Purpose of the Project............1
1.2. Literature Review...1
1.3. Standards to be considered.3
2. INVERTER.4
2.1. Types of Inverters .4
2.1.1. Controlled source type .4
2.1.1.1. Current source inverter...4
2.1.1.2. Voltage source inverter...4
2.1.2. Output Waveform.....5
2.1.2.1. Square wave inverter...5
2.1.2.2. Modified square wave inverter....5
2.1.2.3. True sine wave inverter...6
2.2. Inverter Topologies...7
2.2.1. Single phase inverters topologies..8
2.2.1.1. Single phase half-bridge inverter....8
2.2.1.2. Single phase full-bridge inverter.9
2.2.1.2.1. Single phase 2-level full-bridge inverter...9
2.2.1.2.1. Single phase 3-level full-bridge inverter.....10
2.2.2. 3-Phase inverters topologies...12
2.2.2.1. 3-Phase full bridge 2-level inverter...12
2.2.2.2. 3-Phase full bridge cascade 3-level inverter.....14
2.3. Pulse Width Modulation (PWM)....15
2.3.1. Basic PWM techniques...15
2.3.1.1. Single pulse width modulation.....16
2.3.1.2. Multiple pulse width modulation......17
2.3.1.3. Sinusoidal pulse width modulation...17
iii
3. METHODOLOGY MODELLING AND SIMULATION....20
3.1. Methodology.......20
3.1.1. Fast Fourier Transform (FFT) Analysis..22
3.1.2. Total Harmonic Distortion (THD) analysis........................................22
3.2. Modelling and Simulation...23
3.2.1. Simulation softwares......23
3.2.1.1. Powersim (PSIM)..23
3.2.1.2. Matlab/Simulink....24
3.2.2. Simulation...24
3.2.2.1. Single phase inverter.24
3.2.2.1.1. Half-bridge inverter.24
3.2.2.1.2. Full-bridge inverter......25
3.2.2.1.2.1. Full-bridge inverter in Simulink..26
3.2.2.1.2.2. Full-bridge inverter 2-level SPWM in PSIM...27
3.2.2.1.2.3. Full-bridge inverter with 3-level SPWM in PSIM......28
3.2.2.2. 3-phase inverter.29
3.2.2.2.1. 3-phase Full-Bridge 2-level SPWM inverter....30
3.2.2.2.2. 3-phase Full-Bridge 2-level controlled SPWM inverter31
3.2.2.2.3. 3-phase 3-level cascade SPWM inverter..32
4. RESULTS AND COMPARISON.....34
4.1. Single Phase Inverter.......34
4.1.1. Half-bridge inverter...34
4.1.1.1. Gate pulses........34
4.1.1.2. Inverter output...36
4.1.1.3. Current and Voltage Waveform of Load......37
4.1.1.4. FFT and THD analysis..38
4.1.2. Full-Bridge Inverter in Simulink......40
4.1.2.1. Gate pulses40
iv
4.1.3. Full-bridge 2-level SPWM Inverter......................46
4.1.3.2. Inverter output......48
4.1.3.4. FFT and THD analysis......50
4.1.4. Full-bridge 3-level SPWM Inverter......52
4.1.4.3. Current and Voltage Waveform of Load..55
4.2. 3- Phase Inverter.58
4.2.1. 3-phase H-bridge 2-level SPWM inverter.....58
4.2.1.1. Gate pulses....58
4.2.2. 3-phase 2-level controlled SPWM inverter ..64
4.2.2.2. Inverter output.......65
4.2.2.4. FFT and THD analysis......67
4.2.3. 3-phase 3-level cascade SPWM inverter ......69
4.2.3.1. Gate pulses....69
4.3. Comparison of the Results .......76
5.CONCLUSION..81
REFERENCES ..........................................................................................................82
v
ABBREVIATIONS
DC : Direct Current
AC : Alternating Current
IEC : International Standards Organization
IEEE : The Institute of Electrical and Electronics Engineers
IGBT : Insulated Gate Bipolar Transistor
MOSFET : Metal Oxide Semiconductor Field Effect Transistor
VSI : Voltage Source of Inverter
CSI : Current Source of Inverter
CHB : Cascaded H-Bridge
SPWM : Sinusoidal Pulse-width modulation
PWM : Pulse-width modulation
THD : Total Harmonic Distortion
FFT : Fast Fourier Transform
vi
LIST OF TABLES
Table 2.1: Switching sequence 3 level single-phase full bridge....11

Table 2.2: Switching sequence 2 Level 3-phase full bridge for 180o conduction
Mode...13
Table 3.1 Parameters of single-phase half-bridge inverter with PWM generator..25
Table 3.2: Parameters of single-phase full-bridge inverter with PWM generator.26
Table 3.3 Parameters of single-phase 2-level SPWM full-bridge inverter....27
Table 3.4: Carrier signal parameters of single-phase 2-level SPWM full-bridge
inverter....28
Table 3.5 Parameters of single-phase 3-level SPWM full-bridge
inverter....29
Table 3.6 Carrier Signal Parameters of single-phase 3-level SPWM full-bridge
inverter....29
Table 3.7: Parameters of 3-Phase 2-level SPWM Full-Bridge Inverter....30
Table 3.8: Sinusoidal Wave reference signals parameters.....31
Table 3.9: Carrier Signal parameters for 3 phase 2-level SPWM inverter....31
Table 3.10: Sinusoidal Wave reference signals parameters...33
Table 3.11: Carrier signals parameters [26]...33
Table 4.1: THD of Single-Phase Inverters with C=3.16 F......76
Table 4.2: DC injection of Single-Phase Inverters with C=3.16 F..77
Table 4.3: THD of Single-Phase Inverters with C=100F....78
Table 4.4: THD of 3-Phase Inverters with C=3.16 F..79
Table 4.5: DC injection of 3-Phase Inverters with C=3.16 F..............................79
LIST OF FIGURES
Figure 2.1: Square wave inverter output 5
Figure 2.2: Modified square wave inverter output..5
Figure 2.3: True Sine wave inverter output6
Figure 2.4: Comparing output waveform of Inverters at 50Hz..6
Figure 2.5: Classification of inverter..8
Figure 2.6: Single phase half-bridge inverter circuit schema 9
Figure 2.7: Inverter output waveform ...9
Figure 2.8: Single Phase full-bridge inverter circuit schema10
Figure 2.9: Single Phase 3-level full-bridge inverter switching position..10
Figure 2.10: Output waveform of single-phase 3-level inverter...11
Figure 2.11: Diode Clamped Inverter Circuit Schema..12
Figure 2.12: 3-Phase full bridge topology.12
Figure 2.13: 3-Phase full-bridge Vab output and load voltage.................................14
Figure 2.14: 3-phase 3 level cascaded H-bridge circuit topology.15
Figure 2.15: Line to Line Output Voltage of 3-level CHB inverter..15
Figure 2.16: Single pulse width modulation and gate pulses....16
Figure 2.17: Multiple pulse width modulation and gate pulses.....17
Figure 2.18: Sinusoidal pulse width modulation and gate pulses..18
Figure 3.1: Single-Phase half-bridge inverter....25
Figure 3.2: Single-phase full- bridge inverter26
Figure 3.3: Single-phase 2-level SPWM full-bridge inverter27
Figure 3.4: Single-phase 3-level SPWM full-bridge inverter28
Figure 3.5: 3-Phase 2-level SPWM Full- bridge inverter..28
Figure 3.6: 3-Phase 2-level Controlled SPWM Full- bridge inverter32
Figure 3.7: 3-Phase 3-level cascade SPWM full- bridge inverter.33
Figure 4.1: Half-bridge gate pulses at 25% 50% 75% 100% loaded
respectively.....35
Figure 4.2: Half-bridge output at 25% 50% 75% 100% loaded respectively36
Figure 4.3: Half-bridge Current and voltage waveform at 25% 50% 75% 100%
loaded respectively.37
Figure 4.4: FFT analysis of Half-bridge load current at 25%, 50%, 75% 100%
loading respectively....39
viii
Figure 4.5: Full-bridge gate pulses at 25% 50% 75% 100% loaded respectively.41
Figure 4.6: 2-level Full-bridge inverter in Simulink output at 25% 50% 75%
100% respectively...42
Figure 4.7: 2 level Full-bridge inverter in Simulink Current and voltage waveform at
25% 50% 75% 100% respectively..43
Figure 4.8: FFT analysis for 2 level Full-bridge inverter in Simulink load current at
25%, 50%, 75% 100% loading respectively...45
Figure 4.9: Full-bridge 2-level SPWM inverter gate pulses at 25% 50% 75%
100% load respectively...47
Figure 4.10: Full-bridge 2-level SPWM inverter output at 25% 50% 75%
Figure 4.11: Full-bridge 2-level SPWM inverter current and voltage waveform at
25% 50% 75% 100% respectively..49
Figure 4.12: FFT analysis for Full-bridge 2-level SPWM inverter load current at
25%, 50%, and 75% 100% loading respectively51
Figure 4.13: Full-bridge 3-level SPWM inverter gate pulses at 25% 50% 75%,
100%load respectively....53
Figure 4.14: Full-bridge 3-level SPWM inverter output at 25% 50%75%,
25% 50% 75% 100% respectively......55
25%, 50%, and 75% 100% loading respectively....57
Figure 4.17: 3-Phase H-Bridge 2-level SPWM inverter gate pulses at 25% 50% 75%
Figure 4.18: 3-phase H-bridge 2-level SPWM inverter output at 25% 50% 75%
25% 50% 75% 100% respectively..61
25%, 50%, and 75% 100% loading respectively....63
Figure 4.21: 3-phase 2-level controlled SPWM inverter gate pulses at 25%, 50%
and 75% 100% loading respectively...64
ix
Figure 4.22: 3-phase 2-level controlled SPWM inverter output at 25% 50% 75%
Figure 4.23: 3-phase 2-level controlled SPWM inverter current and voltage
waveform at 25% 50% 75% 100% respectively.66
Figure 4.24: FFT analysis for 3-phase 2-level controlled SPWM inverter load
current at 25%, 50%, and 75% 100% loading respectively....68
Figure 4.25: 3-phase 3-level cascade SPWM inverter gate pulses at 25%, 50%, and
75% 100% loading respectively..70
Figure 4.26: 3-phase 3-level cascade SPWM inverter each H-bridge output at 25%
50% 75% 100% load respectively..71
Figure 4.27: 3-phase 3-level cascade SPWM inverter output as phase at 25% 50%
75% 100% load respectively...72
Figure 4.28: 3-phase 3-level cascade SPWM inverter current and voltage waveform
at 25% 50% 75% 100% respectively......73
Figure 4.29: FFT analysis for 3-phase 3-level cascade SPWM inverter load current
at 25%, 50%, and 75% 100% loading respectively....75
x
TOPOLOGIES FOR SOLAR ENERGY SYSTEM
ABSTRACT
Today's, renewable energy system are extending day by day and becoming more and
more popular. One of the most popular energy system is solar energy systems.. Due to
increasing to integration of solar energy system, effect of solar energy system on
quality of electric power are increasing day by day. Inverter is one of main component
of solar energy system Inverters are becoming popular with spread of the use of solar
energy systems. For these reasons, inverter design are important for quality of electric
power.
This project aims designing different inverter topologies for using solar energy system
at different load condition and give analyze of their characteristic in terms of current
waveform and comparing DC injection, total harmonic distortion and induvial
harmonics with help of PSIM and MATLAB Simulink.
xi
GNE ENERJ SSTEMLERNDE KULLANILAN EVRCLERLERN
ENERJ KALTE AISINDAN NCELENMES
ZET
Gnmzde, yenilenebilir enerji kaynaklar gnden gene yaygnlamakta ve

popular hale gelmektedir. Yaygn olarak kullanlan yenilenebilir enerji kaynaklarndan
biri gne enerji sistemleridir. Gne enerji sistemlerinin entegrasyonunun artmas
sebebiyle, enerji kalitesi zerine etkisi de gn getike artmaktadr. Eviriciler gne
enerji sistemlerinin ana ekipmanlarndan biridir. Eviriciler gne enerji sistemlerinin
yaygnlamasyla popular hale gelmektedir ve kullanm yaygnlamaktadr. Bu
sebeple evirici tasarmlar enerji kalitesi zerine nemli bir etkiye sahiptir.
Bu projede gne enerji sistemlerinde kullanlan farkl evirici topolojileri

tasarlanp,evirici karakteristikleri akm dalga formu kullanlarak farkl yklenme
durumlu iin PSIM ve Matlab/Simulink programlar yardmyla DC bileen, toplam
harmonik bozulum ve bireysel harmonikler parametleri bakmndan karlatrlmtr.
xii
1. INRODUCTION
1.1 Purpose of The Project
In todays, the interest in the use of alternative energy sources has gradually increased
because of economic and environmental problem for conventional energy reasons.
Electric power quality is getting more complicated because of increasing integration
of non-linear load and different renewable resources. Most of renewable resources are
wind turbines, fuel cells and solar cells. Inverters main component for the renewable
resources and affects directly the electric power quality. The graduation design project
aims investigation of power quality analysis such as DC bias, total demand distortion
and individual harmonics for different inverter topologies with renewable energy
sources such as wind turbines, fuel cells and solar cells, which shows the
characteristics of DC voltage sources and different control methodology at different
load condition such as 25%, 50%, 75%, 100% and comparing result with help of PSIM
and Matlab Simulink software.
1.2. Literature Review
David Prince probably coined the term inverter. It is unlikely that any living person
can now, establish with certainty that Prince (or anyone else) was the originator of this
commonly used engineering term. However, in 1925 Prince did publish an article in
the GE Review titled The Inverter Elf [1]. His article contains nearly all important
elements required by modern inverters and is the earliest such publication to use that
term in the open literature.
1
An Inverter is basically a converter that converts DC-AC power.In Todays there are
several topologies is used as single and three phase for the different purpose. Inverters
are used in a large number of power applications. Within the last decade, there have
been major upgrading in power electronics These DC-AC inverters have been widely
used for industrial applications such as uninterruptible power supply (UPS), AC motor
drives, and AC voltage regulators [13]. Recently, the inverters are also playing an
important role in various renewable energy applications as these are used for grid
connection of Wind Energy System or Photovoltaic System. In addition to this, the
control strategies used in the inverters are also similar to those in DC-DC converters.
Both current-mode control and voltage-mode control are employed in practical
applications.
Inverters can be classified according to output of inverter as 2- level and multilevel.

The concept of multilevel inverters has been introduced since 1975 [2]. The term
multilevel began with the three-level inverter. Subsequently, several multilevel
inverter topologies have been developed. In the 1980s, power electronics concerns
were focused on the inverter power increase (increasing voltage or current) [3]. In fact,
current source inverters were the main focus for researchers in order to increase the
current. However, other research group began to work on the idea of increasing the
voltage instead of the current. In order to achieve this objective, authors were
developing new inverter topologies.
Moreover, abundant modulation techniques and control paradigms have been

developed for multilevel inverters such as pulse width modulation (PWM), sinusoidal
pulse width modulation (SPWM), selective harmonic elimination (SHE-PWM), space
vector modulation (SVM), and others.
2
1.3. Standards to be considered
Standards that will be considered that comparing result in terms of power quality are
mentioned below.
IEEE 1547.2003: Series Standard for Interconnecting Distributed Resources with

Electric Power Systems
EN 50160:2001: European Standard, Voltage characteristics of electricity supplied by

public distribution systems, 2001.
IEEE Std.519-1992: IEEE Recommended Practices and Requirements for Harmonic

Control in Electrical Power Systems
3
2. INVERTER
An inverter is a device that converts electrical energy of DC form into that of AC. The
purpose of DC-AC inverter is to take DC power from a battery source and converts it
to AC. According to The Authoritative Dictionary of IEEE Standards Terms; a power
inverter, or inverter, is an electronic device or circuitry that changes direct current
(DC) to alternating current (AC) [4]. There is no producing any power in inverter
circuit; inverter provided by a DC source such as solar battery. The input voltage,
output voltage and frequency and overall power varies depend on design of circuit
topology circuit elements and control methodology.
2.1. Types of Inverters
It can be classify according to controlled source type as voltage source inverter (VSI)
and current source inverter (CSI) and output waveform as square wave, modified
square wave, true sine wave inverter.
2.1.1. Controlled source type
Inverters can be classified with controlled source type ; CSI and VSI .
2.1.1.1. Current source inverter (CSI)
When input current is maintained constant, then it is called Current Source Inverter
(CSI) or Current Fed Inverter (CFI). The output current waveform is mostly remaining
unaffected by the load. These are widely used in medium voltage industrial
applications, where high quality waveform is required [5].
2.1.1.2. Voltage source inverter (VSI)
The type of inverter where the independently controlled ac output is a voltage

waveform. The output voltage waveform is mostly remaining unaffected by the load.
Due to this property, the VSI have many industrial applications such as adjustable
speed drives (ASD) and in Power system for FACTS (Flexible AC Transmission) [5].
4
2.1.2. Output Waveform
2.1.2.1. Square wave inverter
This is the simplest form of output wave available in the cheapest form of inverters.
They can run simple appliances without problems but it has some limited number of
applications in household appliances. Square wave voltage can be easily generated
using a simple oscillator. With the help of a transformer, the generated square wave
voltage can be transformed into a value of 220 volt AC or higher.
Figure 2.1: Square wave inverter output
2.1.2.2. Modified square wave inverter
A modified sine wave as other name quasi-sine wave inverter actually has a waveform
more like a square wave, but with an extra step or so. Voltage rises and falls abruptly,
the phase angle also changes abruptly and it sits at 0 Volts for some time before
changing its polarity. Because the modified sine wave is noisier and rougher than a
pure sine wave, clocks and timers may run faster or not work at all. A modified sine
wave inverter will work fine with most equipment, although the efficiency or power
will be reduced with some but with most of the household appliances, it works well.
Figure 2.2: Modified square wave inverter output
5
2.1.2.3. True sine wave inverter
This type of inverter provides output voltage waveform, which is very similar to the
voltage waveform that is received from the grid. The sine wave has very little
harmonic distortion resulting in a very clean supply and makes it ideal for running
electronic systems such as computers, digital fx racks and other sensitive equipment
without causing problems or noise. Things like mains battery chargers also run better
on pure sine wave converters. There are some benefits for using true sine wave inverter
or as other named pure sine wave inverter [6]. Most of electrical and electronic
equipments are designing for the sine wave. Some electronic equipment does not
provide nominal power without sine wave such as variable motor, refrigerator,
microwave etc. Pure sine wave inverter harmonic content less.
Figure 2.3: True Sine wave inverter output
Figure 2.4: Comparing output waveform of Inverters at 50Hz
6
2.2. Inverter Topologies
As mentioned section in 2; Power electronic device which converts dc power into ac

power at desired output voltage and frequency is known as inverter. There are many
power electronic elements most likely using in inverter circuit MOSFETs and IGBTs
and there are many different circuit connections. There are so many inverter circuit
topologies with combined parameters. There are many different classification of
inverter: current and voltage source according to controlled source; single and 3-phase
according to number of phase; multilevel and 2-level according to inverter waveform;
single dc source, multiple dc source according to dc supply number; neutral point
clamp, flying capacitor, cascaded H bridge etc. according to circuit connection
schema. They can be classified in two groups as shown in Fig. 2.5, depending on the
number of independent DC source. The most famous working topologies are neutral
point clamped (NPC), flying capacitor (FC), and cascaded H-bridge (CHB). The FC
and CHB are also known as multi-cell inverter due to its modular structure. An NPC
inverter is basically composed of two conventional two-level voltage source inverters
stacked one over the other with some minor modifications. The FC topology is some
way similar to the NPC, with difference that the clamping diodes are replaced by flying
capacitors. CHBs are inverter constructed by series connection of two or more single-
phase H-bridge inverters, hence the name is given. A single H-bridge inverter is
generating three different voltage levels. CHB provides more redundancies than the
previous topologies, since each single H-bridge or modular structure has one redundant
switching state; the series connection itself produces more redundancies. Thus
redundancy increases as go on increasing power cells for higher levels. These
redundancies and the natural modularity of this topology are advantages that enable
fault tolerant operation. The main disadvantage of this topology is that each single H-
bridge cascaded inverter modules needs a separate DC supply source.
In this thesis, focuses H-bridge topologies; half bridge, full-bridge 2-level with SPWM
technics and PWM-generator for single phase; full bridge controlled and uncontrolled
as H-bridge 2- level and 3 level-cascaded H-bridge for 3 phase topologies.
7
Figure 2.5: Classification of inverter
The method, in which the low voltage DC power is inverted, is completed in two
steps. The first being the conversion of the low voltage DC power to a high voltage
DC source, and the second step being the conversion of the high DC source to an AC
waveform using pulse width modulation. Another method to complete the desired
outcome would be to first convert the low voltage DC power to AC, and then use a
transformer to boost the voltage to 220 volts or desired voltage level. This project
focused on the first method described and specifically the transformation of a high
voltage DC source into an AC output.
2.2.1. Single phase inverters topologies
2.2.1.1. Single phase half-bridge inverter
The most basic inverter topology is single-phase half-bridge inverter topology. This
circuit produces an output in two level square waveform. In this type of topology, a
midpoint or as other named 3-wired DC source is needed. In order to midpoint, two
series connected capacitors connect the parallel to a DC source [7]. The circuit diagram
of this two-level inverter is shown in Figure 2.5 and output of inverter is shown in
figure 2.7.
As shown in figure 2.6, single phase half-bridge inverter consist of 2 switching

elements. Transistors must be switched on and off alternately. If transistors switched
on same time there is a short-circuit in source and inverter can be damaged [15].
8
Figure 2.6: Single phase half-bridge inverter circuit schema
Figure 2.7: Inverter output waveform
When Q1 on, Q2 off, output voltage equal to Vs/2; the other state Q1 off, Q2 on, output
voltage equal to -Vs/2.
2.2.1.2. Single phase full-bridge inverter
2.2.1.2.1. Single phase 2-level full-bridge inverter
In this topology, in addition to single-phase half-bridge inverter there is two more

transistors [7].There is 4 transistors and 4 diodes in single phase full-bridge inverter as
shown in figure 2.8. The freewheeling diodes permit current to flow even if all
switches all switches are open. These diodes also permit lagging currents to flow in
inductive loads.
9
When Q1 on Q4 must be off, when Q3 on Q2 must be off, if same time closing would
cause short-circuit from DC supply to ground. This condition is known shoot-through.
Switching position according to output waveform is shown in fig 2.7 same as half
bridge [8]. When Q1, Q2 on and Q3,Q4 off output voltage equal to Vs/2; the other
state Q1,Q2 off and Q3,Q4 on output voltage equal to -Vs/2.
Figure 2.8: Single Phase full-bridge inverter circuit schema
2.2.1.2.2. Single phase 3-level full-bridge inverter
In this circuit, topology is a same as 2-level single-phase full-bridge inverter. There

are difference-switching position of transistors. The output waveform of 3- level
inverter is shown figure 2.10 and switching position in table 2.1 [7].
Figure 2.9: Single Phase 3-level full-Bridge inverter switching position
10
Figure 2.10: Output waveform of single-phase 3-level inverter
Table 2.1: Switching sequence 3 level single-phase full bridge

Output
Switching Position
voltage
Vo Q1 Q3 Q4 Q2
Vdc/2 1 0 0 1
-Vdc/2 0 1 1 0
0 1 0 0 0
0 1 1 0 0
0 0 0 1 0
0 0 0 1 1
11
2.2.2. 3-Phase inverters topologies
There are many 3-phase topologies as mentioned above such as diode clamped is
shown in fig 2.11. In this study focuses 3 phase H-bridge as 2 level and cascade
inverter as 3-level.
Figure 2.11: Diode Clamped Inverter Circuit Schema
2.2.2.1. 3-Phase full bridge 2 level inverter
Single-phase VSIs cover low-range power applications and three-phase VSIs cover
medium- to high-power applications [14]. The main purpose of these topologies is to
provide a three phase voltage source, where the amplitude, phase, and frequency of the
voltages should always be controllable. This topology is names as universal bridge
topology or 3-phase full-bridge topology. Switching position is shown table 2.2 and
inverter output and load voltage shown in fig 2.13 [8].
Figure 2.12: 3-Phase full bridge topology
12
There are two patterns of gating the transistors. In one pattern, each transistor conducts
for 180 degree and in the other, each transistor conducts for 120 degree. But in both
the patterns gating signals are applied and removed at 60 degree intervals of the output
voltage waveform. Both modes require a six step bridge inverter.
The power circuit diagram of this inverter is the same as shown in Figure 2.13 . The
120 degree mode VSI, each transistor conducts for 120 degree of a cycle. Like 180
Degree mode, 120 Degree mode inverter also requires six steps, each of 60 Degree
duration, for completing one cycle of the output AC voltage. During the first 120
degree, S1 conducts with S6 for 60 degree, and then conducts with S2 for another 60
degree. The S3 will conduct for 120 degree (from 120o to 240o ) for 60 (from 120o to
180o ) with S2 and then conduct another 60o (from 180o to 240o ) with S4. The S5 will
conducts 120o (from 240o to 360o ) with S4 for 60o (from 240o to 300o ) and then
conducts for another 60o (from 300o to 360o ) with S6. The conduction sequence can
be written as follows: S6S1, S1S2, S2S3, S3S4, S4S5, S5S6, and S6S1. The
disadvantage of 120o mode VSI is shoot through fault will occur during the conduction
period.
Table 2.2: Switching sequence 2 Level 3-phase full bridge for 180o conduction mode
Vab Vbc Vca S1 S2 S3 S4 S5 S6 State
Vi 0 -Vi 1 1 0 0 0 1 1
0 Vi -Vi 1 1 1 0 0 0 2
-Vi Vi 0 0 1 1 1 0 0 3
-Vi 0 Vi 0 0 1 1 1 4
0 -Vi Vi 0 0 0 1 1 1 5
Vi -Vi 0 1 0 0 0 1 1 6
0 0 0 1 0 1 0 1 0 7
0 0 0 0 1 0 1 0 1 8
13
As in single-phase full-bridge inverter, the switches of any leg of the inverter (S1 and
S4, S3 and S6, or S5 and S2) cannot be switched on simultaneously because this would
result in a short circuit across the dc link voltage supply. Similarly, in order to avoid
undefined states in the VSI, and thus undefined ac output line voltages, the switches
of any leg of the inverter cannot be switched off simultaneously as this will result in
voltages that will depend upon the respective line current polarity [9][14].
Figure 2.13: 3-Phase full-bridge Vab output and load voltage
2.2.2.2. 3-Phase full bridge cascade 3-level inverter
The cascaded H-Bridge is a type of full-bridge Multilevel Inverter (CHBMI)

conventionally required separate DC sources, and hence is well suited for various
renewable energy sources such as photovoltaic, fuel cell and biomass. This
configuration is also recently becomes very popular in AC power supply and
adjustable speed drive applications [10]. Multilevel inverters topologies have been
attracting wide industrial interest [11]. They are considered an attractive alternative in
order to reduce switch stress. The main characteristic of these converters is an output
waveform with multiple voltage levels [12]. The structure of a 3-phase CHBMI is
shown in figure 2.14 and line to line output voltage of inverter is shown in figure 2.15.
Each bridge can produce +Vdc, 0, -Vdc independently. As mentioned in 2.2.1.2.1
switching sequence of each phase same but there is phase shifted phase B and C [13].
One phase of cascaded H bridge inverter consists of where L is voltage level number:
1
= 2
=1 (2.1)
14
Figure 2.14: 3-phase 3 level cascaded H-bridge circuit topology
Figure 2.15: Line to Line Output Voltage of 3-level CHB inverter
2.3. Pulse Width Modulation (PWM)
Transistor which is used in inverter topology switching with using PWM. The Pulse
Width Modulation (PWM) is a technique which is characterized by the generation of
constant amplitude pulse by modulating the pulse duration by modulating the duty
cycle. Analog PWM control requires the generation of both reference and carrier
signals that are feed into the comparator and based on some logical output, the final
output is generated.
15
The reference signal is the desired signal output maybe sinusoidal or square wave,
while the carrier signal is either a saw-tooth or triangular wave at a frequency
significantly greater than the reference. There are various types of PWM techniques
[16].
2.3.1. Basic PWM techniques
There are three basic PWM techniques:
1. Single Pulse Width Modulation
2. Multiple Pulse Width Modulation
3. Sinusoidal Pulse Width Modulation
2.3.1.1. Single pulse width modulation
In this modulation there is an only one output pulse per half cycle. The output is
changed by varying the width of the pulses. The gating signals are generated by
comparing a rectangular reference with a triangular reference. The frequency of the
two signals is nearly equal. Single pulse width modulation and gate pulses is shown in
figure 2.16.
Figure 2.16: Single pulse width modulation and gate pulses
16
2.3.1.2. Multiple pulse width modulation
In this modulation there are multiple number of output pulse per half cycle and all
pulses are of equal width. The gating signals are generated by comparing a rectangular
reference with a triangular reference. Multiple pulse width modulation and gate pulses
is shown in 2.17. The frequency of the reference signal sets the output frequency (fo)
and carrier frequency (fc). The number of pulses per half cycle is determined by [16]:

= 20 (2.2)
Figure 2.17: Multiple pulse width modulation and gate pulses
2.3.1.3. Sinusoidal pulse width modulation
Sinusoidal PWM is a type of "carrier-based" pulse width modulation. Carrier based

PWM uses pre-defined modulation signals to determine output voltages. In sinusoidal
PWM, the modulation signal is sinusoidal, with the peak of the modulating signal
always less than the peak of the carrier signal. In this modulation technique are
multiple numbers of output pulse per half cycle and pulses are of different width. When
sinusoidal wave has magnitude higher than the triangular wave, the comparator output
is high, otherwise it is low. The width of each pulse is varying in proportion to the
amplitude of a sine wave evaluated at the center of the same pulse.The gating signal
17
are generated by comparing a sinusoidal reference with a high frequency triangular
signal. To measure the ability of a PWM method to deliver AC power, the term
Modulation Index is defined as [17]:

= (2.3)
Where Vsine is amplitude of sinusoidal signal and, Vcarrier is amplitude of carrier

signal.
Figure 2.18: Sinusoidal pulse width modulation and gate pulses
Advantages of SPWM [17]:
Low power consumption.
High energy efficient up to 90%.
High power handling capability.
No temperature variation-and ageing-caused drifting or degradation in

linearity.
Easy to implement and control.
Compatible with todays digital microprocessors.
18
Disadvantages of SPWM:
Attenuation of the wanted fundamental component of the waveform.
Drastically increased switching frequencies that leads to greater stresses on

associated
Switching devices and therefore derating of those devices.
Generation of high-frequency harmonic component
19
3. METHODOLOGY MODELLING AND SIMULATION
3.1. Methodology
In these thesis implement and design 7 circuit :Half-Bridge, Full-Bridge with PWM
generator in Simulink and Full-Bridge 2 level SPWM and 3-level SPWM as single
phase ; Full-Bridge 2 level controlled and uncontrolled and cascade 3 level inverter as
3-phase. MOSFET and IGBT transistors are used in these project.All transistors are
controlled with PWM. In these study PWM is produced with two technique SPWM
which is through comparing a low power sine wave reference with a high frequency
triangular wave and PWM Generator Pulse in Simulink. This PWM signal can be used
to control switches. Through an LC filter, the output of Full Wave Bridge Inverter with
SPWM signal will generate a wave approximately equal to a sine wave.
A low pass LC filter is required at the output terminal inverters to reduce harmonics
generated by the pulsating modulation waveform. While designing L-C filter, the cut-
off frequency is chosen such that most of the low order harmonics is eliminated. To
operate as an ideal voltage source, that means no additional voltage distortion even
though under the load variation or a nonlinear load, the output impedance of the
inverter must be kept zero. Therefore, the capacitance value should be maximized and
the inductance value should be minimized at the selected cut-off frequency of the low-
pass filter. For all inverter topology, same L and C values is used for comparing power
quality of inverter and L and C values are changed for reducing THD and kept the
THD in limits. Basically cut-off frequency of LC filter is [18]:

= (3.1)

Where L and C value of inductance capacitance. It is common that the filter

components are determined at the set of a small capacitance and a large inductance
and consequently the output impedance of the inverter is so high. For all circuit L is
determined 8 mH and C is determined 3.16 F for cut-off frequency 1000Hz.
20
All topology output power determined 10 kW as phase, in other words single phase
inverters power 10 kW and 3-phase inverter power is 30 kW. All topology output
voltage is determined 220V as phase voltage. All topology analyzed at 25%, 50%,
75% and 100% load condition so all topologies analyzed at power 2.5 kW, 5 kW, 7.5
kW and 10 kW resistive load condition. Resistive load is used for all power level. Load
resistance value is changed for the purpose of desired power.
For all inverters output voltage as phase is determined 220 V and frequency is
determined 50 Hz.
SPWM and 2 level-PWM which produced PWM generator in Simulink is used for
controlled switches. These PWM method of carried-based PWM method as mentioned
above there is a carrier frequency. In PWM generator in Simulink natural sampling
technique is determined, reference signal is internally generated. The natural sampling
technique models the behavior of an analog implementation of a PWM generator. For
all topology carrier frequency is determined 2000 Hz. If carrier frequency higher, the
output wave of inverter close to pure sine wave but high frequency causes high
switching losses.
As mentioned above, all topologies analyzed at 25%, 50%, 75% and 100% load
condition. Resistance value changing for changing output power. There is voltage
changing in phase because of resistance changing in phase but voltage must be kept
constant. Voltage of inverter kept constant at 220 V as phase voltage with changing
value of reference voltage amplitude. In SPWM technique sine wave amplitude is
changed and in 2-level PWM generator natural sampling reference voltage amplitude
voltage is changed and phase voltage is kept constant 220 V .In designed as 3-Phase
2 -level SPWM inverter circuit topology voltage regulator with Phase Locked Loop
(PLL) technique is used for voltage regulation for consistence of result. In application
nearly all inverter is close-loop designed due to keeping to voltage constant. There is
a small variance due to control system when voltage regulation. There is a very small
effects on power energy quality. Controlled system is designed for stability and
comparison the uncontrolled topologies. Fast Fourier Transform and Total Harmonic
Analyses Tool are used for analyzing output waveform of inverter.
On resistance of all transistor is determined 0.1 ohm according to literature research.
21
3.1.1. Fast Fourier Transform (FFT) Analysis
In PSIM software, Fast Fourier Transform block computes the fundamental

component of the input signal. The FFT algorithm is based on the radix-2/decimation-
in-frequency technique. The number of sampling points within one fundamental period
should be 2N (where N is an integer), the maximum number of sampling points
allowed is 1024 [19]. The output gives the peak amplitude and the phase angle of the
input fundamental component. When using FFT for harmonic analysis, one should
make sure that the following requirements are satisfied:
- The waveforms have reached the steady state.
- The length of the data selected for FFT should be the multiple integer of the
fundamental period
FFT block is used in Simulink software for FFT analysis. The FFT block computes the
fast Fourier transform (FFT) across the first dimension of an N-D input array, u. For
user-specified FFT lengths, not equal to P, zero padding or truncating, or modulo-
length data wrapping occurs before the FFT operation, as per Orfanidis [20].
3.1.2. Total Harmonic Distortion (THD) analysis
Calculating (THD) is an important phenomena, because converter is the largest source

of harmonics, its useful to determine its extent for being a factor used in accessing
power quality of an inverter output, THD is obtained from the relation [21],
(3.2)
In the above equation, V1 is the fundamental component, Vn is the amplitude of the

nth order odd harmonic. Using the eq. (3.9) the exact amount of harmonic distortion
present in a signal can only be calculated over an infinite range, which is practically
impossible. Therefore, ranges of harmonics need to be specified, first consideration
ranges of harmonics need to be specified, first consideration was given to harmonic
22
appeared below 25th order and vice versa. Eq. (3.2) applied throughout analysis in
determine THD performance.
In PSIM software THD tools is used in Simview and in Simulink THD block is used
for comparing and consistence of calculated value.
3.2. Modelling and Simulation
In this chapter focus on simulation sofware and simulation of topologies in used for
thesis.
3.2.1. Simulation softwares
In this thesis , topologies is analyzed with hepl of PowerSim(PSIM) and

Matlab/Simulink softwares.
3.2.1.1. Powersim (PSIM)
Powersim (PSIM) is a simulation software specifically designed for power electronics

and motor drives. With fast simulation and friendly user interface, PSIM provides a
powerful simulation environment for power electronics, analog and digital control
magnetics, and motor drive system studies [22].
PSIM includes the basic package, as well as the following add-on options. Motor Drive
Module, SimCoder2 Module, Digital Control Module, Renewable Energy Package
SimCoupler Module, MagCoupler Module, Thermal Module, and MagCoupler-RT
Module.
The PSIM simulation environment consists of the circuit schematic program PSIM,
the simulator engine, and the waveform processing program Simview. PSIM is one of
the fastest simulators for power electronics simulation. It achieves fast simulation
while retaining excellent simulation accuracy. This makes it particularly efficient in
simulating converter systems of any size, and performing multiple-cycle simulation
[22]. PSIM can simulate control circuit in various forms: in analog circuit, s-domain
transfer function block diagram, z-domain transfer function block diagram, custom C
code, or in Matlab/Simulink. PSIMs control library provides a comprehensive list of
components and function blocks, and makes it possible to build virtually any control
scheme quickly and conveniently.
23
3.2.1.2. Matlab/Simulink
Simulink, developed by MathWorks, is a graphical programming environment for

modeling, simulating and analyzing multi-domain dynamic systems. Its primary
interface is a graphical block diagramming tool and a customizable set of block
libraries. It offers tight integration with the rest of the MATLAB environment and can
either drive MATLAB or be scripted from it. Simulink is widely used in automatic
control and digital signal processing for multi-domain simulation and Model-Based
Design [23].
MathWorks claims that, coupled with another of their products. Simulink can
automatically generate C source code for real-time implementation of systems. As the
efficiency and flexibility of the code improves, this is becoming more widely adopted
for production systems. Consequently, Matlab/Simulink is very useful software for
engineering applications.
3.2.2. Simulation
In these part, circuit topologies are simulated Simulink and with PSIM and provided
information about circuit parameters
3.2.2.1. Single phase inverter
3.2.2.1.1. Half-bridge inverter
Half-bridge inverter is modelling with 2 IGBTs in Simulink, simulation of circuit

topology is shown fig 3.1 and circuit parameters is shown table 3.1. PWM is produced
with 2-level PWM generator in Matlab/Simulink. Reference signal is generated
internally. Vin determined 700V 2 times of full bridge inverter due to half bridge
inverter due to output of inverter:

= (3.3)

Where m is modulation index.
24
Figure 3.1: Single-Phase half-bridge inverter
Table 3.1 Parameters of single-phase half-bridge inverter with PWM generator
Vin Vout Amplitude Carrier Carrier Rload Pout

reference
(V) (V) Signal Signal (ohm) (kW)
signal
P Frequency(Hz) Amplitude
25% 700 220 0,995 2000 -1 /1 4,84 2,5
50% 700 220 0,945 2000 -1 /1 6,45 5
75% 700 220 0,915 2000 -1 /1 9,68 7,5
100% 700 220 0,895 2000 -1 /1 19,36 10
3.2.2.1.2. Full-bridge inverter
In these part there are 3 different full-bridge inverter which simulated with PWM
generator with 2 pulses in Simulink, 2-level SPWM and 3-level SPWM with PSIM
3.2.2.1.2.1. Full-bridge inverter in Simulink
Full-bridge inverter is modeled as H-bridge with 4 IGBTs in Simulink, simulation of

circuit topology is shown fig 3.2 and circuit parameters is shown table 3.2. PWM is
produced with Matlab/Simulink 2 level PWM generator. Reference signal is generated
internal.The gate signal G1 and G3 is different and G2 and G4 is opposite of signals.
25
Vin determined 350 V which as much as half of half-bridge inverter in Simulink due
to output of inverter is :
= (3.2)
Where m is modulation index.
Figure 3.2: Single-phase full- bridge inverter
Table 3.2: Parameters of single-phase full-bridge with PWM generator inverter

reference
signal
25% 350 220 0,995 2000 -1 /1 4,84 2,5
50% 350 220 0,945 2000 -1 /1 6,45 5
75% 350 220 0,915 2000 -1 /1 9,68 7,5
100% 350 220 0,895 2000 -1 /1 19,36 10
26
3.2.2.1.2.2. Full-bridge inverter 2-level SPWM in PSIM
Full-bridge inverter is modeled H-bridge with 4 MOSFETs in PSIM, simulation of

circuit diagram is shown fig 3.3 and circuit parameters is shown table 3.3 and 3.4.
SPWM is produced with compare a sine wave and carrier waveform.There should be
a carrier signal and sine wave for producing 2-level SPWM.
Vp1
Vp2
Figure 3.3: Single-phase 2-level SPWM full-bridge Inverter
Table 3.3 Parameters of single-phase 2-level SPWM full-bridge inverter

reference
signal
25% 350 220 0,9877 2000 -1 /1 4,84 2,5
50% 350 220 0,9548 2000 -1 /1 6,45 5
75% 350 220 0,9102 2000 -1 /1 9,68 7,5
100% 350 220 0,8845 2000 -1 /1 19,36 10
27
Table 3.4: Carrier signal parameters of single-phase 2-level SPWM full-bridge
inverter
Vc1
Vpeak-peak 2
Frequency 2000 Hz
Duty Cycle 0,5
Dc offset -1
Phase Delay 0
3.2.2.1.2.3. Full-bridge inverter with 3-level SPWM in PSIM
Full-bridge inverter is modeled as H-bridge with 4 MOSFETs in PSIM, simulation of

circuit diagram is shown fig 3.4 and circuit parameters and properties of carrier signals
is shown table 3.5 and 3.6. 3-level SPWM is produced with compare a sine wave and
2 different phase-shifted carrier waveform with phase-delay [24]. Reference signal is
sinusoidal with different amplitude accordingly loading of inverter at 50Hz.There
shoud be 2-different carrier signal for producing 3-level PWM.There is a phase-
oppositon between carrier signal.
Vp1
Vp2
Figure 3.4: Single-phase 3-level SPWM full-bridge inverter
28
Table 3.5 Parameters of single-phase 3-level SPWM full-bridge inverter

reference
(V) (V) Signal Signals (ohm) (kW)
signal
25% 350 220 0,9877 2000 -0.5 /0.5 4,84 2,5
50% 350 220 0,9548 2000 -0.5 /0.5 6,45 5
75% 350 220 0,9102 2000 -0.5 /0.5 9,68 7,5
100% 350 220 0,8845 2000 -0.5 /0.5 19,36 10
Table 3.6 Carrier Signal Parameters of single-phase 3-level SPWM full-bridge

inverter
Vc1 Vc2
Vpeak-peak 1 1
Frequency 2000 Hz 2000 Hz
Duty Cycle 0,5 0.5
Dc offset -1 0
Phase Delay 0 180
3.2.2.2. 3-phase inverter
In these part 3-Phase 3 SPWM inverter is modeled as 2-level SPWM inverter in PSIM
and same circuit topology is modeled with voltage controller in Simulink system due
to comparing stability of result , 3rd topology is 3-level H-bridge cascade SPWM
inverter.
29
3.2.2.2.1. 3-phase H-bridge 2-level SPWM inverter
3-phase Full-bridge inverter or in other words universal bridge is modeled with

MOSFETs in PSIM. There is 3 leg and 6 MOSFETs in circuit. Simulation of circuit
diagram is shown fig 3.5 and circuit parameters and properties of carrier signals and
reference signal is shown in table 3.7, 3.8 and 3.9. 2-level SPWM is produced with
compare a 3 sine wave and a carrier signal. Amplitude of sine wave is changed due to
voltage regulation.
Vp1
Vp2
Vp3
Figure 3.5: 3-Phase 2-level SPWM Full- Bridge Inverter
Table 3.7: Parameters of 3-Phase 2-level SPWM Full-Bridge Inverter
Vin Vphase Amplitude Carrier Carrier Rload Pout

reference
(V) (V) Signal Signals (phase) phase
signal
P Frequency(Hz) Amplitude (ohm) (kW)
25% 700 220 0,99 2000 -1/1 4,84 2,5
50% 700 220 0,9438 2000 -1/1 6,45 5
75% 700 220 0,9102 2000 -1/1 9,68 7,5
100% 700 220 0,889 2000 -1/1 19,36 10
30
Table 3.8: Sinusoidal Wave reference signals parameters
Vsin1 Vsin2 Vsin3
Frequency 50 Hz 50 Hz 50 Hz
Phase angle 0o -120o -240o
Table 3.9: Carrier Signal parameters for 3 phase 2-level SPWM inverter
Vc1
Vpeak-peak 2
Frequency 2000 Hz
Duty Cycle 0,5
Dc offset -1
Phase Delay 0
3.2.2.2.2. 3-phase 2-level controlled SPWM inverter
3-phase Full-bridge inverter or in other words universal bridge is modeled with

MOSFETs in Simulink. Simulation of circuit diagram is shown fig.3.6 and circuit
parameters and properties of carrier signals as same as uncontrolled 2-level SPWM
inverter in section 3.2.2.2.1.Amplitude of sine wave is changed due to voltage
regulation automatically. Inverter circuit is controlled with PLL, abc to dq0 transform
and PI controller. For voltage control, voltage regulator block is used which is in
Simulink library example. Reference signal amplitude so sine wave amplitude
controlled by voltage regulator and phase voltage is always 220 V.
31
Figure 3.6: 3-Phase 2-level Controlled SPWM Full- Bridge Inverter
3.2.2.2.3. 3-phase 3-level cascade SPWM inverter
In this topology, simulated circuit designed as 3-phase 3-level cascade connection

which used 3 H-bridge in PSIM software. Simulation of circuit diagram is shown fig
3.7 and parameters and properties of carrier signals and reference signal is shown in
table 3.10, 3.11. 3 different 3-level SPWM for each H-bridge is produced with
compare a 3 sine wave and a 6 different carrier signal [25]. There is phase disposition
and shifting between carrier waves.As mentioned 3-level single-phase topology,there
should be 2 carrier signal for each phase and a sin wave.Phase-shifting on any two
adjacent carrier waves is 180o [24]. Amplitude of sine waves is changed due to voltage
regulation for 3 H-bridge. As mentioned in circuit topologies, there is 3 H-bridge in 3-
level 3-phase cascade inverter so there is 3 different input source is needed for this
topology all input voltage is determined 350 V and output voltage and frequency is
same as other 3-phase topologies respectively 220 V as phase and 50 Hz.
32
Vp5
Vp4
Vp3
Vp1
Vp2
Vp6
Figure 3.7: 3-Phase 3-level cascade SPWM full- bridge inverter
Table 3.10: Sinusoidal Wave reference signals parameters
Vsin1 Vsin2 Vsin3
Frequency 50 Hz 50 Hz 50 Hz
Phase 0o 120o 240o
Amplitude 1/0,95/0,918/0,897 1/0,95/0,918/0,897 1/0,95/0,918/0,897
Table 3.11: Carrier signals parameters [26]
Vc1 Vc2 Vc3 Vc4 Vc5 Vc6
Vpeak-peak 1 1 1 1 1 1
Frequency(Hz) 2000 2000 2000 2000 2000 2000
Duty Cycle 0,5 0,5 0,5 0,5 0,5 0,5
Dc offset -1 0 -1 0 -1 0
Phase Delay 0o 180o 120o 300o 240o 60o
33
4. RESULTS AND COMPARISON
In this chapter focus on result of simulated topology as mentioned above. Simulation

results of topologies is compared end of the section as single and 3-phase.
4.1. Single Phase Inverter
Simulation results of topologies which is designed as single phases is mentioned in

this part at %25 %50 %75 %100 loaded condition.
4.1.1. Half-bridge inverter
This parts is mentions result of half bridge inverter firstly with same L and C value 8
mH and 3.16 F respectively as in other topology due to compare it with other
topologies.
Secondly C values is improved in order that reduce and to keeping within limits the
THD.
4.1.1.1. Gate pulses
Gate pulses is shown is in fig 4.1 which controls the IGBTs at 25% 50% 75% 100%
respectively.Gate pulses Vg1 and Vg2 is is shown fig 4.1.
34
Figure 4.1: Half-bridge gate pulses at 25% 50% 75% 100% loaded respectively
35
4.1.1.2. Inverter output
Inverter output is shown is in fig 4.2 at 25% 50% 75% 100% respectively.
Figure 4.2: Half-bridge inverter output at 25% 50% 75% 100% loaded respectively
36
4.1.1.3. Current and Voltage Waveform of Load
Current and voltage waveform is shown is in fig 4.3 at 25% 50% 75% 100%
respectively.Vrms is 220V for each condition and Irms is 11.28A, 22.78A, 34.19A,
45.27A respectively.
Figure 4.3: Half-bridge Current and voltage waveform at 25% 50% 75% 100%
loaded respectively.
37
4.1.1.4. FFT and THD analysis
FFT analysis is shown in fig. 4.4. THD is calculated as of 16.16%, 8.87%, 5.94% and
4.38% at 25% 50% 75% and 100% load condition respectively.
Harmonics is observed at 2 kHz and around of 2 kHz and around 4 kHz. Harmonics at
2 kHz is 13%, 7.5%, 4.75%, and 3.54% at 25% 50% 75% and 100% load condition
respectively. Harmonics are observed around 4 kHz is between 0.5% and 1%, base is
determined fundamental component.
DC component is observed 5.157 *10-9, 1.072 *10-9, 2.992 *10-10, and 8.799*10-7 at
25%, 50%, 75%, and 100% load condition respectively.
Due to decreasing THD and induvial harmonics capacitor value is increased at 100F.
THD is observed with help of THD block in Simulink as 0.99%, 0.82%, 0.73% and
THD can be decreased with increasing capacitance and inductance value.
38
Figure 4.4: FFT analysis of Half-bridge load current at 25%, 50%, 75% 100%
loading respectively
39
4.1.2. Full-Bridge Inverter in Simulink
This parts mentions result of full-bridge inverters in Simulink and with same L and C
value 8mH and 3.16 F respectively as in other topology due to compare it with
other topologies.
Secondly C values is improved in order that reducing the THD.
Gate pulses is shown is in fig 4.5 which controls the IGBTs at 25% 50% 75% 100%
respectively. The 2-gate pulses Vg1 and Vg3 is shown in fig 3.2 other 2 gate pulses
is opposite of these pulses.
40
Figure 4.5: Full-bridge gate pulses at 25% 50% 75% 100% loaded respectively
41
Figure 4.6: Full-bridge inverter in Simulink output at 25% 50% 75% 100%
respectively
42
Figure 4.7: Full-bridge inverter in Simulink Current and voltage waveform at 25%
50% 75% 100% respectively.
43
FFT analysis is shown in fig. 4.8. THD is calculated as 3.02%, 2.09%, 1.45%, and
Harmonics is observed at around 4 kHz because of switching frequency is 2 kHz.

Harmonics around 4 kHz is change between 1.2-1.8%, 0.8-1.2%, 0.7-0.8%, and 0.5-
0.6 % at 25% 50% 75% and 100% load condition respectively. Harmonics are
observed around 2 kHz is between 0.5% and 1%, base is determined as fundamental
component.
DC component is observed 4.196 *10-7, 1.806 *10-6, 3.1 *10-5, and 1.4*10-6 at 25%,
50%, 75%, and 100% load condition respectively.
THD is between limits there is no need different filter or increasing L and C value.
Due to comparing other topology and decreasing THD and induvial harmonics
capacitor value is increased at 100F. THD is observed with help of help of THD
block in Simulink as 0.20%, 0.12%, 0.065% and 0.063% respectively. THD can be
decreased with increasing a proper capacitance and inductance value.
44
Figure 4.8: FFT analysis for Full-bridge inverter in Simulink load current at 25%,
50%, 75% 100% loading respectively
45
4.1.3. Full-bridge 2-level SPWM Inverter
This parts mentions result of full-bridge inverter controlling with 2-level SPWM in
PSIM in with same L and C value 8mH and 3.16 F respectively as in other topology
due to compare it with other topologies.
Gate pulses is shown is in fig 4.9 which controls the MOSFETs at 25% 50% 75%
100% respectively. Gate signals Vp1 and Vp2 is shown in fig3.3 and signals are
opposite of each other.
46
Figure 4.9: Full-bridge 2-level SPWM inverter gate pulses at 25% 50% 75% 100%
load respectively
47
Figure 4.10: Full-bridge 2-level SPWM inverter output at 25% 50% 75% 100% load
respectively
48
25% 50% 75% 100% respectively.
49
FFT analysis is shown in fig. 4.12. THD is calculated as 16.05%, 8.94%, 5.95%, and
Harmonics is observed at 2 kHz and around of 4 kHz because of switching frequency

is 2 kHz. Harmonics around 2 kHz is change between 1.645-3.37%, 2.015-4.83%,
2.78-7.54%, and 4.76-14.28 % at 25% 50% 75% and 100% load condition
respectively. Harmonics are observed around 4 kHz is between 0.5% and 1%, base is
determined as fundamental component.
DC component is observed 1.77*10-1, 8.29 *10-2, and 1.31 *102, and 8.83*103 at
THD is observed with help of SIMVIEW as 0.72%, 0.725%, 0.8% and 0.828%
respectively.
THD can be decreased with increasing value of capacitance and inductance.
50
25%, 50%, and 75% 100% loading respectively
51
4.1.4. Full-bridge 3-level SPWM Inverter
This parts mentions result of full-bridge inverter with 3-level SPWM in PSIM in with
same L and C value 8mH and 3.16 F respectively as in other topology due to compare
it with other topologies.
100% respectively. The 2-gate pulses Vp1 and Vp2 is shown in fig 3.4 other 2 gate
pulses is opposite of these pulses.
52
Figure 4.13: Full-bridge 3-level SPWM inverter gate pulses at 25% 50% 75% 100%
load respectively
53
Figure 4.14: Full-bridge 3-level SPWM inverter output at 25% 50% 75% 100% load
respectively
54
55
FFT analysis is shown in fig. 4.16. THD is calculated as 8.89%, 4.84%, 3.2% and
Harmonics is observed at sidebands around the 2 kHz and 4 kHz because of switching
frequency is 2 kHz. Harmonics around 2 kHz is change between 1.08-1.25%, 1.31-
1.53%, 1.80-2.12%, and 3.04-3.76 % at 25% 50% 75% and 100% load condition
respectively. Harmonics are observed around 4 kHz is between 0.1% and 0.8%, base
is determined as fundamental component.
DC component is observed 1.53*10-1, 6.7 *10-2, and 2.06 *102, and 2.53*103 at
THD is observed with help of SIMVIEW as 0.31%, 0.323%, 0.349% and 0.357%
respectively.
THD can be decreased with increasing value of capacitance and inductance.
56
57
4.2. 3- Phase Inverter
Simulation results of topologies which is designed as 3-phase are mentioned in this

part at %25 %50 %75 %100 loaded condition.
4.2.1. 3-phase H-bridge 2-level SPWM inverter
This parts mentions result of 3-phase H-bridge inverter with 2-level SPWM in PSIM
in with same L and C value 8mH and 3.16 F respectively as in other topology due to
compare it with other topologies.
100% respectively. The 3 gate pulses Vp1, Vp2, Vp3 is shown in fig 3.5 other 3 gate
pulses is opposite of these pulses.
58
Figure 4.17: 3-Phase H-Bridge 2-level SPWM inverter gate pulses at 25% 50% 75%
100% load respectively
59
Inverter output as phase is shown is in fig 4.18 at 25% 50% 75% 100% respectively.
Figure 4.18: 3-phase H-bridge 2-level SPWM inverter phase-to-phase output at 25%
50% 75% 100% load respectively
60
respectively.Vrms is 220V as phase for each condition and Irms is 11.28A, 22.78A,
34.19A, 45.27A as phase respectively.
61
FFT analysis is shown in fig. 4.20. THD is calculated as 3.56%, 3%, 2.56% and 2.27%
at 25% 50% 75% and 100% load condition respectively.
Harmonics is observed at around 2 kHz and 4 kHz because of switching frequency is

2 kHz. Harmonics around 2 kHz is change between 2.09-2.53%, 1.78-2.08%, 1.56-
1.80%, and 1.35-1.53 % at 25% 50% 75% and 100% load condition respectively.
Harmonics are observed around 4 kHz is between 0.1% and 0.8%, base is determined
as fundamental component.
DC component is observed 9.18*10-3, 3.8 *10-4, 6.7 *10-2 and 1.57*10-1 at 25%, 50%,
75%, and 100% load condition respectively.
THD values in within certain limits but THD can be decreased with increasing value
of capacitance and inductance.
62
63
4.2.2. 3-phase 2-level controlled SPWM inverter
This parts mentions result of 3-phase controlled H-bridge inverter with 2-level SPWM
in Simulink in with same L and C value 8mH and 3.16 F respectively as in other
topology due to compare it with other topologies.
100% loaded respectively. The 3 gate pulses Vp1, Vp2, Vp3 is same as shown in fig
3.5 other 3 gate pulses is opposite of these pulses.
Figure 4.21: 3-phase 2-level controlled SPWM inverter gate pulses at 25%, 50%, and
75% 100% loading respectively
64
Inverter output as phase is shown is in fig 4.22 at 25% 50% 75% 100% loaded
respectively.
Figure 4.22: 3-phase 2-level controlled SPWM inverter phase-phase output at 25%
65
Figure 4.23: 3-phase 2-level controlled SPWM inverter current and voltage
waveform at 25% 50% 75% 100% respectively.
66

2 kHz. Harmonics around 2 kHz is change between 2.-2.55%, 1.8-2.0%, 1.6-1.8%, and
1.4-1.6 % at 25% 50% 75% and 100% load condition respectively. Harmonics are
observed around 4 kHz is between 0.1% and 0.8%, base is determined as fundamental
component.
DC component is observed 9.4*10-3, 2 *10-4, 2 *10-2 and 1.8*10-2 at 25%, 50%, 75%,
and 100% load condition respectively.
It can be cleary see that result of controlled and uncontrolled topology is very close so
uncontrolled topologies results are accetable and consistent.
67
Figure 4.24: FFT analysis for 3-phase 2-level controlled SPWM inverter load
current at 25%, 50%, and 75% 100% loading respectively
68
4.2.3. 3-phase 3-level cascade SPWM inverter
This parts mentions result of 3-phase 3-level cascade SPWM inverter in PSIM in with
same L and C value 8mH and 3.16 F respectively as in other topology due to compare
it with other topologies.
100% respectively. The 6 gate pulses Vp1, Vp2, Vp3, Vp4, Vp5, Vp6 is shown in fig
3.7 other 3 gate pulses is opposite of these pulses.
69
Figure 4.25: 3-phase 3-level cascade SPWM inverter gate pulses at 25%, 50%, and
75% 100% loading respectively
70
Inverter output as each bridge and as phases is shown is in fig 4.26 and fig 4.27 at 25%
50% 75% 100% loaded respectively.
Figure 4.26: 3-phase 3-level cascade SPWM inverter each H-bridge output at 25%
71
Figure 4.27: 3-phase 3-level cascade SPWM inverter output as phase at 25% 50%
75% 100% load respectively
72
Figure 4.28: 3-phase 3-level cascade SPWM inverter current and voltage waveform
at 25% 50% 75% 100% respectively.
73

2 kHz. Harmonics around 2 kHz is change between 1.93-2.56%, 1.57-1.91%, 1.29-
1.35%, and 0.9-1.12 % at 25% 50% 75% and 100% load condition respectively.
Harmonics are observed around 4 kHz is between 0.05% and 0.1%, base is determined
as fundamental component.
DC component is observed 2.5*10-3, 2 *10-2, 6.7 *10-2 and 1.52*10-1 at 25%, 50%,
75%, and 100% load condition respectively.
74
Figure 4.29: FFT analysis for 3-phase 3-level cascade SPWM inverter load current
at 25%, 50%, and 75% 100% loading respectively
75
4.3. Comparison of the Results
The both designed single phase inverters have same power output,frequency and
voltage as 10 kW,50 Hz and 220V. Also input voltage is same for all inverter as 350V
half bridge inverter is 700V because of topology. All inverters is analysed at 25%,
%50,%75% and %100 load condition.
THD is reduced as inverter loading is increased . Minimum THD is observed at 100%

load condition and maximum THD is observed at %25 loading. When inverters loaded
modulation index is increased due to keeping to voltage constant,modulation index
affect the inverter output and output of inverter is same as sine wave when amplitude
index increases.
THD of load current for half-bridge inverter is maximum.Minimum THD is observed
for full-bridge topology with controlled natural sampling PWM. 3-level SWPM
inverters THD is less than 2-level SPWM . THD at different load condition for all
single phase topology is shown in table 4.1.
Table 4.1 : THD of Single-Phase Inverters with C=3.16 F

Inverters Half-Bridge Full-Bridge 2-level SPWM 3-level SPWM
Load In Simulink In simulink Full-Bridge Full-Bridge
16.16% 3.02% 16.05% 8.89%

25%
8.87% 2.09% 8.94% 4.84%
50%
5.94% 1.45% 5.95% 3.2%
75%
4.38% 1.09% 4.39% 2.32%
100%
DC injection is another parameters for power quality. According to IEEE 1547.2003

system shall not inject dc current greater than 0.5% of the full rated output current. All
single phase inverter topologies DC injection is within in limits. DC injection is very
low for topologies which designed in Simulink with controlled PWM generator in
comparison with SPWM inverter topologies. All single phase inverter topologies DC
76
injection is within in limits. DC injection is shown in table 4.2 at different load case
for single phase topologies.
Table 4.2 : DC injection of Single-Phase Inverters with C=3.16 F

Load In simulink In simulink Full-Bridge Full-Bridge
3.21*10-6 % 1.12*10-5 % 0.055% 0.015%

25%
3.33*10-7 % 1.3*10-6 % 0.0409% 0.06%
50%
6.19*10-10 % 6.42*10-5 % 0.172% 0.14%
75%
1.34*10-6 % 2.1756*10-6 % 0.275% 0.238%
100%
Harmonics is observed around multiples of 2000 Hz , 2 kHz and 4 kHz it can be

explaing with carrier-based pwm switching frequency is 2kHz. In half-brigde
harmonics around 2kHz are change between 3.54%-13% and around 4 kHz is change
0.5%-1% to loading condition.For Full-bridge with PWM generator blocks, harmonics
around 2 kHz is lower than half-bridge which change between 0.5%-1% but around 4
kHz is change between 0.6-1% and higher than half-bridge topology. For 2-level
SPWM inverter harmonics around 2kHz are change between 3.37-14.28% also
around 4 kHz is change 0.5-1% accordingly load contion.For 3-level SPWM
harmonics is observed around 2 kHz change between 1.25-3.76% and also around 4
kHz change between 0.1-0.8% according to loading condition.
According to IEEE 1547.2003 Standarts THD is limited maximum 5.0%.Only full-

bridge inverter is within this limits. Due to reducing THD and keeping within in limits
capacitance value is increased at 100F for all topology THD is reduced at very low
percentage in comparison with capacitance value is 3.16 F. THD can be reduced
with proper higher capacitance and inductance value. Comparison of THD with higher
capacitance value is shown in table 4.3. DC injections is too low for with C=100 F.
77
Table 4.3 : THD of Single-Phase Inverters with C=100F
Load In Simulink In simulink Full-Bridge Full-Bridge
0.99% 0.20% 0.828% 0.357%

25%
0.82% 0.12% 0.80% 0.349%
50%
0.73% 0.065% 0.725% 0.323%
75%
0.36% 0.063% 0.72% 0.31%
100%
The both designed 3- phase inverters have same power output,frequency and output
voltage as phase 10 kW,50 Hz and 220V repectively. Input voltage of contolled and
uncontrolled 3-phase H-bridge inverter is 700 V and input voltages of cascaded H-
bridge inverter are 350V.All inverters is analysed at 25%, %50,%75% and %100 load
condition.
THD is reduced when inverter loading is increased . Minimum THD is observed at

%100 loading and maximum THD is observed at 25% load condition for all topologies
due to when inverter loaded modulation index should be increased because of keeping
the voltage constant. When modulation index increase , output of inverter is as same
as sine wave.
Controlled and uncontrolled H-bridge is designed for consistance of result and results
and very similar. THD of load current for controlled 3-phase 2-level H-bridge inverter
is maximum.Minimum THD is observed for 3-phase 3-level cascade H-bridge
inverter. THD at different load condition for all 3- phase topology is shown in table
4.4. According to IEEE 1547.2003[27] Standarts THD is limited maximum 5.0%. All
THD parameter is within in this limits. There is no need improving indunctance and
capacitance value.
78
Table 4.4 : THD of 3-Phase Inverters with C=3.16 F
Inverters 3-phase H-bridge 3-phase H-bridge 3-phase 3-level
Load uncontrolled controlled Cascaded H-bridge
25% 3.56% 3.67% 3.48%
50% 3% 3.06% 2.21%
75% 2.56% 2.57% 2.21%
100% 2.27% 2.25% 1.78%
DC injection is another parameters for power quality. According to IEEE

1547.2003[27] system shall not inject dc current greater than 0.5% of the full rated
output current. All 3-phase phase inverter topologies DC injection is within in limits.
DC injection is shown in table 4.5 at different load case for 3- phase topologies.
Table 4.5 : DC injection of 3-Phase Inverters with C=3.16 F
Inverters 3-phase H-bridge 3-phase H-bridge 3-phase 3-level
Load 2-level 2-level Cascaded H-bridge
uncontrolled controlled uncontrolled
25% 0.057% 0.058% 0.016%
50% 0.0011% 0.006% 0.064%
75% 0.149% %0.0421 0.14%
100% 0.244% 0.028% 0.23%
79
As single phase, comparison of full-bridge and half-bridge inverter which designed in
Simulink; THD of load current for full-bridge is lower as compared to half-bridge
inverter especially lower value of capacitance. When capacitor value is increased at
proper value, THD can be reduced to within certain limits and difference between THD
for full-bridge and half-bridge inverters is reduced at within certain limits. A single
phase half bridge inverter finds an extensive utilization in variable speed ac drives,
induction heating, standby power supplies, uninterruptible power supplies (UPS),
traction, HVDC, grid connection of renewable energy sources and so on due to simple
design and cost effective aspects. However, unlike single phase full bridge inverter the
maximum ac voltage is limited half the value of full dc voltage source. Again may
need a center tapped source. Now, if it is intended to get higher ac voltage then a step
up transformer can be used.
As single phase, comparison of 2-level SPWM and 3-level SPWM full-bridge inverter
which designed in PSIM; THD of load current for 2-level SPWM inverter is 2 times
higher than 3-level SPWM inverter. However there is two different signal is required
for 3-level SPWM inverter and control of 3-level SPWM inverter is more complex
than 2-level SPWM inverter.
As 3-phase inverter, result of uncontrolled and controlled 3-phase full-bridge inverter

is very similar, it can be explained with these results that open-loop result of inverters
in terms of power quality. Minimum THD is observed for 3-level cascaded inverter as
expected. 3-level cascaded inverter output is more similar sine wave as compared 2-
level. If level of output inverter increase, the output of inverter closes to sine wave and
THD reduces. However, when level of inverter increases, control topology is become
more complex and switches is increases and cost of inverter increases. Another
advantageous of CHB have been developed to use unequal dc bus voltage.
DC injection for all topologies is acceptable and very low within certain limits with
higher and proper capacitance value THD can be reduced within certain limits for both
topologies.
80
5. CONCLUSION
In these project different inverter topologies are designed as single and 3-phase. Half-
bridge inverter and full-bridge inverter as single phase which is used IGBTs controlled
with 2-level PWM-generator with help of Simulink software. 2-level SPWM full-
bridge and 3-level SPWM full-bridge inverter is modeled which used MOSFETs
control signal with 2-level SPWM and 3-level SPWM as single phase with help of
PSIM. As 3 phase, 2-level full-bridge uncontrolled and 3-level cascaded H-bridge
inverters with help of PSIM and, 2-level full-bridge inverter controlled inverter due to
comparison and consistence of result of open-loop system with help of Simulink.
For all topology is investigated with PSIM and Simulink softwares in respect to gate
pulses, inverter output, voltage and current waveform and THD and FFT analysis at
%25 50% 75% 100% load condition. Load current of inverters is analyzed with FFT
and comparing the results of inverters in respect to energy quality.
The results are compared with each other and consequences are obtained as expected.
Also results of the designed inverters are accurate with the analytical calculations
and assumptions.
81
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IEEE Transaction on Industry Application, vol. 1A-17, no. 5, pp. 518523,
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[4] IEEE, The Authoritative Dictionary of IEEE Standards Terms, Seventh Edition,
IEEE Press, 2000, page 588
[5]Aaron Vander Meulen and John Maurin, Current source inverter vs. Voltage
source inverter topology, EATON Whitepaper WP20001, June 2014
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http://www.samlexamerica.com/support/documents/130050612_AdvantagesofPureSi
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and design2nd edition, John Willey & sons, Singapore.
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Vol. 2, pp. 1271-1274, July 2000.
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[13] B. K. Bose, Power Electronics and AC Drives. Englewd Cliffs, NJ: PrenticeHall,
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& sons, 1964.
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Prentice Hall, 1996, p. 497.
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84
CIRRICULUM VITAE
Name Surname: Mert SALI
Place of Birth and Date: ADANA/Ceyhan 13.05.1993
Address: Fatih Mah. Fatih Koru Evleri 27.sok No.32 Belen/HATAY
University: Istanbul Technical University
85

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ISTANBUL TECHNICAL UNIVERSITY

FACULTY OF ELECTRICAL AND ELECTRONICS

INVESTIGATION OF POWER QUALITY ANALYSIS OF INVERTER

GRADUATION DESIGN PROJECT

INVESTIGATION OF POWER QUALITY ANALYSIS OF INVERTER

GRADUATION DESIGN PROJECT

Advisor: Prof. Dr. Belgin TRKAY

Date of Submission: 6 January 2017

January 2017 Mert SALI

Table 2.1: Switching sequence 3 level single-phase full bridge....11

Gnmzde, yenilenebilir enerji kaynaklar gnden gene yaygnlamakta ve

Bu projede gne enerji sistemlerinde kullanlan farkl evirici topolojileri

1.1 Purpose of The Project

1.2. Literature Review

Inverters can be classified according to output of inverter as 2- level and multilevel.

Moreover, abundant modulation techniques and control paradigms have been

IEEE 1547.2003: Series Standard for Interconnecting Distributed Resources with

EN 50160:2001: European Standard, Voltage characteristics of electricity supplied by

IEEE Std.519-1992: IEEE Recommended Practices and Requirements for Harmonic

2.1. Types of Inverters

2.1.1. Controlled source type

2.1.1.1. Current source inverter (CSI)

2.1.1.2. Voltage source inverter (VSI)

The type of inverter where the independently controlled ac output is a voltage

2.1.2.1. Square wave inverter

Figure 2.1: Square wave inverter output

2.1.2.2. Modified square wave inverter

Figure 2.2: Modified square wave inverter output

Figure 2.3: True Sine wave inverter output

Figure 2.4: Comparing output waveform of Inverters at 50Hz

As mentioned section in 2; Power electronic device which converts dc power into ac

2.2.1. Single phase inverters topologies

2.2.1.1. Single phase half-bridge inverter

As shown in figure 2.6, single phase half-bridge inverter consist of 2 switching

Figure 2.7: Inverter output waveform

2.2.1.2. Single phase full-bridge inverter

2.2.1.2.1. Single phase 2-level full-bridge inverter

In this topology, in addition to single-phase half-bridge inverter there is two more

Figure 2.8: Single Phase full-bridge inverter circuit schema

2.2.1.2.2. Single phase 3-level full-bridge inverter

In this circuit, topology is a same as 2-level single-phase full-bridge inverter. There

Figure 2.9: Single Phase 3-level full-Bridge inverter switching position

Table 2.1: Switching sequence 3 level single-phase full bridge

Figure 2.11: Diode Clamped Inverter Circuit Schema

2.2.2.1. 3-Phase full bridge 2 level inverter

Figure 2.12: 3-Phase full bridge topology

Vab Vbc Vca S1 S2 S3 S4 S5 S6 State

Figure 2.13: 3-Phase full-bridge Vab output and load voltage

2.2.2.2. 3-Phase full bridge cascade 3-level inverter

The cascaded H-Bridge is a type of full-bridge Multilevel Inverter (CHBMI)

Figure 2.15: Line to Line Output Voltage of 3-level CHB inverter

2.3. Pulse Width Modulation (PWM)

2.3.1. Basic PWM techniques

There are three basic PWM techniques:

1. Single Pulse Width Modulation

2. Multiple Pulse Width Modulation

3. Sinusoidal Pulse Width Modulation

2.3.1.1. Single pulse width modulation

Figure 2.16: Single pulse width modulation and gate pulses

Figure 2.17: Multiple pulse width modulation and gate pulses

2.3.1.3. Sinusoidal pulse width modulation

Sinusoidal PWM is a type of "carrier-based" pulse width modulation. Carrier based

Where Vsine is amplitude of sinusoidal signal and, Vcarrier is amplitude of carrier