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I. INTRODUCTION
Digital visual interface transmitter and receiver in a multimedia system allow for
transmitting of high definition video and audio data between the source and the
receiver across a serial link at high speeds. This project highlights a detailed
development of digital visual interface (DVI) transmitter and receiver in
multimedia system. These include developing the architecture DVI receiver and
transmitter, high speed serialize, clock and data recovery circuits and deserializer
through the efficient use of FPGA resources. The project makes use of TMDS
(Transition Minimized Differential Signaling) technique, that involves advanced
TMDS encoding and decoding algorithms using DC balanced transmission, and
helps reducing EMI over the transmission lines.
II. LITERATURE REVIEW
1. Paper Name- Review: Design And Implementation Of Reed Solomon
Encoder And Decoder
Author Name- Harshada l. Borkar1, prof. V.n. Bhonge2
The design of encoder and decoder is described in VHDL and will be implemented
on Spartan 6 FPGA device using Xilinx software. The RS Decoder corrects a
symbol, by replacing the incorrect symbol with the correct one, whether the error
was occurred in one bit or all of the bits. Thus, if a symbol is wrong, it might as
well be wrong in all of its bit positions and hence because of this reason RS codes
have tremendous burst noise advantages over binary codes [15]. For reliable
communication in the presence of noisy channel efficient error detection and
correction techniques are shown in this paper. RS codes can be extended or
shortened because they are based on the finite fields. Reed Solomon codes provide
a wide range of code values that can be chosen to optimize the performance. RS
codes have wide application and are used in Wireless Communication such as
mobile phones, microwave links, in Deep Space and Satellite Communications
Networks, mass storage devices such as hard disk drives, DVD, barcodes and
Broadband Modems (ADSL,VDSL, SDSL, HDSL etc).
2. Paper Name- Design of Ultra Low Power TMDS Encoder using QCA
(Quantum Cellular Automata) for Nanoscale Communications
Author Name- Skandha Deepsita S.
3. Paper Name- Speed Optimized Design of Serial Front Panel Data Port
(SFPDP) Protocol
Author Name- Sushma Pondugala
This paper presents design and realization of Serial Front Panel Data Port (SFPDP)
protocol for high speed data transfer. To communicate with any device must and
should there is a need of protocol either it may be serial communication or parallel
communication. This paper discuss about the serial communication protocol which
is serial front panel data protocol (SFPDP). The design should be modeled using
VHDL language. In the paper the transmitter and the receiver should be designed
using finite state machines. The frame format of the design contains IDLE ,START
OF FRAME, DATA, FIRST END OF FRAME ,SECOND END OF FRAME and
GO STOP states. Based on this frame format fields the FSM should be designed.
Each Frame is recognized by a specified 32 bit hexadecimal pattern. In this paper
the Xilinx ISE EDA\ Tool is used for synthesis and Modelsim is used for
simulation.
4. Paper Name- VHDL Implementation of optimized ADPLL and TMDS
encoder for serial communication.
Author Name- Supreetha Rao1, Kiran Kumar V.G2
ADPLL is a modified PLL (phase locked loop) which is designed using all digital
block for the processing. Its operation is analogous to that of the PLL. It finds
range of applications in the field of real time analog signals which synchronizes the
phase information. In this project, we propose a novel design of ADPLL which
should operate in synchronous with TDMS for data serialization. To obtain better
accuracy the ADPLL building blocks such as loop filter are implemented with the
new method in the digital domain.
With the advancement in communication System, the use of various protocols got
a sharp rise in the different applications. Especially in the VLSI design for FPGAs,
ASICS, CPLDs, the application areas got expanded to FPGA based technologies.
Today, it has moved from commercial application to the defence sectors like
missiles & aerospace controls. In this paper the use of FPGAs and its interface with
various application circuits in the communication field for data (textual & visual)
& control transfer is discussed. To be specific, the paper discusses the use of FPGA
in various communication protocols like SPI, I2C, and TMDS in synchronous
mode in Digital System Design using VHDL/Verilog.
III. METHODOLOGY
VII. APPLICATIONS
o KVM switches
o A/V receivers
o DVI/HDMI extenders
o Televisions/PC monitors/projectors
VIII. PHASE WISE PLAN
REFRENCES
[1] Digital Visual Interface, Revision 1.0, Digital Display Working Group,
http://www.ddwg.org.
[4] Journal of research and development, Volume 27, Number 5, Septem-ber 1983.