Mosfet Final

Understanding Characteristics of
MOSFET, FET & UJT

Nvis 6512A
Learning Material
Ver.1.0
Designed & Manufactured by:
141-B, Electronic Complex, Pardesipura, Indore- 452 010 India, Tel.: 91-731- 4211500,
Telefax: 91-731-4202959, Toll free: 1800-103-5050 E-mail: info@nvistech.com
Website: www.nvistech.com
Nvis 6512A
Nvis Technologies Pvt. Ltd. 2

Nvis 6512A
Understanding Characteristics of MOSFET, FET & UJT

Nvis 6512A
Table of Contents
1. Introduction 4
2. Features 5
3. Technical Specifications 6
4. Safety Instructions 7
5. Theory 8
6. MOSFET Theory 14
7. Experiment 1 28
To study and plot the VI characteristics of n channel MOSFET.
Drain Characteristics
Transfer Characteristics
8. FET Theory 33
9. Experiment 2 45
To study and plot the V-I characteristics of JFET and to evaluate following parameters:
DC Drain resistance
Transconductance &
Amplification factor
10. UJT Theory 51
11. Experiment 3 57
To plot the characteristics of UJT and calculate following parameters:
Intrinsic Stand- off Ratio &
Inter base resistance
12. Sample Results 61

13. Glossary 72
14. FAQs 75
15. Data Sheet 79
16. Warranty 83
17. List of Service center 84
18. List of Accessories 85

Nvis 6512A
Introduction
Nvis 6512A Understanding Characteristics of MOSFET, FET & UJT is a compact, ready to use
experiment board. This is useful for students to plot different characteristics of N-channel MOSFET, N-
channel FET and UJT and to understand operation of these power electronics devices in various regions.
Using this product student can also evaluate FET parameters (Drain resistance, Transconductance, and
Amplification factor) & UJT parameters (Inter base resistance and intrinsic standoff ratio). In-built DC
power supply, voltmeter and ammeter with DPM features make this product easy to operate and can be
used as standalone system. Bread-board allows student to construct circuits using external components
along with on-board resources.

Nvis 6512A
Features
Generalized design
Standalone operation
Inbuilt fixed and variable power supply
Toggle switch for selection of variable power supply
Inbuilt Ammeter and Voltmeter
Bread board
Resistance bank
10 turn potentiometer

Nvis 6512A
Technical Specifications
Mains Supply : 90-230V, 50/60Hz
DC Fixed Power Supply : -5V, +15V, +35V
DC Variable Power Supply : 1.5V to 14 V
1.5V to 34V
Voltmeter : 0-200V
Ammeter : 0-200mA
Bread Board
Dimension : 175x61x10mm
Distribution strips : 2
Distribution holes : 200
Terminal Strips : 1
Terminal holes : 640
Resistor Bank : M.F.R. 100E 1W (3 Nos.)

: M.F.R. 470E 1W (3 Nos.)
: M.F.R. 1K 1W (3 Nos.)
Variable Resistances : 5 K Ten turn Potentiometer (1 No.)

: 10 K Ten turn Potentiometer (1 No.)
: 5 K Single turn Potentiometer (1 No.)
Fuse : 500 mA, slow blow
Dimensions (mm) : 350 x D 280 x H 55

Nvis 6512A
Safety Instructions
Read the following safety instructions carefully before operating the instrument. To avoid any personal
injury or damage to the instrument or any product connected to the instrument.
Do not operate the instrument if suspect any damage to it.
The instrument should be serviced by qualified personnel only.
For your safety:
Use proper Mains cord : Use only the mains cord designed for this instrument. Ensure that the
mains cord is suitable for your country.
Ground the Instrument : This instrument is grounded through the protective earth conductor of the
mains cord. To avoid electric shock, the grounding conductor must be
connected to the earth ground. Before making connections to the input
terminals, ensure that the instrument is properly grounded.
Use in proper Atmosphere : Please refer to operating conditions given in the manual.
1. Do not operate in wet / damp conditions.
2. Do not operate in an explosive atmosphere.
3. Keep the product dust free, clean and dry.

Nvis 6512A
Theory
Power Electronics: Power electronics is the application of solid-state electronics for the control and
conversion of electric power. It also refers to a subject of research in electrical engineering which deals
with design, control, computation and integration of nonlinear, time varying energy processing electronic
systems with fast dynamics.
Power electronic converters can be found wherever there is a need to modify the form of electrical energy
(i.e. change its voltage, current or frequency).Therefore their power range from some mill watts (as in a
mobile phone) to hundreds of megawatts (e.g. in a HVDC transmission system). With "classical"
electronics, electrical currents and voltage are used to carry information, whereas with power electronics,
they carry power.
The first very high power electronic devices were mercury arc valves. In modern systems the conversion
is performed with semiconductor switching devices such as diodes, thyristors and transistors. In contrast
to electronic systems concerned with transmission and processing of signals and data, in power
electronics substantial amounts of electrical energy are processed. An AC/DC converter (rectifier) is the
most typical power electronics device found in many consumer electronic devices, e.g., television sets,
personal computers, battery chargers, etc. The power range is typically from tens of watts to several
hundred watts. In industry the most common application is the variable speed drive (VSD) that is used to
control an induction motor. The power range of VSDs starts from a few hundred watts and end at tens of
megawatts.
The power conversion systems can be classified according to the type of the input and output power
AC to DC (Rectifier)
DC to AC (Inverter)
DC to DC (Chopper)
AC to AC (Cycloconverter Or Frequency Changer)
Principle: As efficiency is at a premium in a power electronic converter, the losses that a power
electronic device generates should be as low as possible. The instantaneous dissipated power of a device
is equal to the product of the voltage across the device and the current through it (P = VI). From this, one
can see that the losses of a power device are at a minimum when the voltage across it is zero (the device
is in the On-State) or when no current flows through it (Off-State). Therefore, a power electronic
converter is built around one (or more) device operating in switching mode (either On or Off). With such
a structure, the energy is transferred from the input of the converter to its output by bursts.
Applications: Power electronic systems are virtually in every electronic device. For example, around us:
1. DC/DC converters are used in most mobile devices (mobile phone, PDA etc.) to maintain the
voltage at a fixed value whatever the charge level of the battery is. These converters are also used
for electronic isolation and power factor correction.
2. AC/DC converters (rectifiers) are used every time an electronic device is connected to the mains
(computer, television...)
3. AC/AC converters are used to change either the voltage level or the frequency (international power
adapters, light dimmer). In power distribution networks AC/AC converters may be used to
exchange power between utility frequency 50 Hz and 60 Hz power grids.

Nvis 6512A
4. DC/AC converters (inverters) are used primarily in UPS or emergency light. During normal
electricity condition, the electricity will charge the DC battery. During blackout time, the DC
battery will be used to produce AC electricity at its output to power up the appliances.
Power semiconductor device: Power semiconductor devices are semiconductor devices used as switches
or rectifiers in power electronic circuits (switch mode power supplies for example). They are also called
power devices or when used in integrated circuits, called power ICs. Most power semiconductor devices
are only used in "commutation mode" (i.e. they are either on or off), and are therefore optimized for this.
Most of them should not be used in linear operation.
Some common power devices are the power diode, thyristor, power MOSFET and IGBT. A power diode
or MOSFET operates on similar principles to its low-power counterpart, but is able to carry a larger
amount of current and typically is able to support a larger reverse-bias voltage in the off-state.
Field Effect Transistor: Field Effect Transistor (FET) is a solid state device in which an electric field
controls the flow of charge carriers through a conducting channel. Like BJTs, FETs are also used for
switching or dependent current source (Amplifier). FETs have lower noise than BJTs and often leads to
simpler and easier circuits because they have ideally infinite input impedance.
FETs divide by physical structure into two classes: Insulated gate field effect transistors (IGFETs) and
Junction gate field effect transistors (JGFETs). The junction gate FETs (JGFETs) consist of metal
semiconductor field effect transistors (MESFETs) and junction field effect transistors (JFETs). JFETs are
available in n-channel and p-channel form. The IGFETs are usually called metal oxide semiconductor field
effect transistors (MOSFETs). MOSFETs are subdivided into Enhancement type MOSFETs (EMOSFETs)
and Depletion type MOSFETs (DMOSFETs). These both t ypes of MOSFETs are available in
p-channel and n-channel t ype structure.

Nvis 6512A
Difference between FET and ordinary transistor:
FET and Transistor

Figure 1
1. The operation of FET depends upon the flow of majority carriers (i.e. electrons in N-channel and
holes in P-channels) only. It is, therefore, also called unipolar transistor. Whereas, the operation of
ordinary transistor relies upon two types of charges i.e. holes and electrons therefore, also called
bipolar transistor.
2. FET has high input impedance (in many mega-ohms) since its input circuit (i.e. gate to source) is
reverse biased. Whereas, the input circuit of an ordinary transistor is forward biased and hence low
input impedance.
3. As the gate is reverse biased, it carriers very small current. In fact, it is the input voltage which
controls the output current in FET similar to the vacuum tubes. Hence, FET is essentially a voltage
driven device. Whereas, in an ordinary transistor, the output current is controlled by the input current
and the device is basically a current operated device.
Current Controlled vs Voltage Controlled Devices:
Figure 2
4. In FET, for current conduction no junction is involved. The conduction is through an N-type or P-
type semiconductor. Therefore, the noise level in FET is very small.

Nvis 6512A
5. The gain of a bipolar transistor is characterised as current gain since the current between collector
and emitter is controlled by the base current whereas, the FET gain is characterised as a trans-
conductance (i.e. the ratio of change in output current or drain current to the gate voltage) because
in this case the drain current is controlled by gate voltage.
6. FET is simpler to fabricate and it occupies less space in integrated form
Comparison between a FET and a Bipolar Transistor:

Field Effect Transistors can be used to replace normal Bipolar Junction Transistors in electronic circuits
and a simple comparison between FET's and transistors stating both their advantages and their
disadvantages is given below.
S.No. Field Effect Transistor Bipolar Junction Transistor (BJT)

(FET)
1 Low voltage gain High voltage gain
2 High current gain Low current gain
3 Very input impedance Low input impedance
4 High output impedance Low output impedance
5 Low noise generation Medium noise generation
6 Fast switching time Medium switching time
7 Easily damaged by static Robust
8 Some require an input to turn it Requires zero input to turn it "OFF"
"OFF"
9 Voltage controlled device Current controlled device
10 More expensive than bipolar Cheap
11 Difficult to bias Easy to bias
Types of FETs
JFET Junction Field Effect Transistor
MOSFET Metal Oxide Semiconductor Field Effect Transistor
D MOSFET - Depletion Mode MOSFET
E MOSFET - Enhancement Mode MOSFET

Nvis 6512A
Biasing of the Gate for both the junction field effect transistor, (JFET) and the metal oxide semiconductor
field effect transistor, (MOSFET) configurations are given as:
Type Junction FET Metal Oxide Semiconductor FET

Depletion Depletion Enhancement Mode
Mode Mode
Bias ON OFF ON OFF ON OFF
N-channel 0v -ve 0v -ve +ve 0v
P-channel 0v +ve 0v +ve -ve 0v
Junction Field Effect Transistor (JFET): It is a three terminal semiconductor device in which
current conduction takes place by one type of charge carriers i-e electrons or holes. For this reason it is
also called a uni-polar transistor. In JFET current conduction is controlled by means of an electric field
between the gate and the conducting channel. The strength of electric field varies with the input
voltage. In other words we can say that the output current varies with variations in the input voltage. It
means we can control the output current with the help of input voltage. This concludes that JFET is a
voltage-controlled device.
JFET and MOSFET comparison:

JFETs and MOSFETs are quite similar in their operating principles and in their electrical
characteristics. However, they differ in some aspects, as detailed below:
1. JFETs can only be operated in the depletion mode whereas MOSFETs can be operated in either
depletion or in enhancement mode. In a JFET, if the gate is forward biased, excess- carrier
injunction occurs and the gate current is substantial. Thus channel conductance is enhanced to some
degree due to excess carriers but the device is never operated with gate forward biased because gate
current is undesirable.

Nvis 6512A
2. MOSFETs have input impedance much higher than that of JFETs. This is due to negligibly small
leakage current.
3. JFETs have characteristic curves more flat than those of MOSFETs indicating a higher drain
resistance.
4. When JFET is operated with a reverse bias on the junction, the gate current IG is larger than it would
be in a comparable MOSFET. The current caused by minority carrier extraction across a reverse-
biased junction is greater, per unit area, than the leakage current that is supported by the oxide layer
in a MOSFET. Thus MOSFET devices are more useful in electrometer applications than are the
JFETs.
For the above reasons, and also because MOSFETs are somewhat easier to manufacture, they are more
widely used than are the JFETs.

Nvis 6512A
MOSFET
A MOSFET transistor is a semiconductor device which is widely used to switch the amplification signals
in the electronic devices. MOSFET can be expanded metal-oxide-semiconductor field-effect transistor
that is used to influence the flow of electric charges by influencing the flow of the charges to greater
extent. MOSFETs are found in all the modern electronic devices which have four terminals namely the
source, gate, drain and the body. The body as the name suggests is the main plot where the source and the
drain are spaced while the gate is above these terminals and a special kind of separating material is used
as an insulation layer between the gate and the source, drain and body. It is referred to as the modern
integrated circuit because it is economic when used for mass production and can be used for solving
complex problems.
MOSFET transistors are made up of silicon alloy with germanium so that it possesses both the properties
of silicon and germanium. Doping is the process of adding some impurities to the semiconducting
material so that the properties of the material is altered and by the process of doping certain small
impurities are added with the above mentioned semi conducting materials so that its properties can be
altered to suit our requirements and the common impurities added are the boron, phosphorus, arsenic and
gallium.
The metaloxidesemiconductor field-effect transistor (MOSFET) is a device used for amplifying or

switching electronic signals. In MOSFETs, a voltage on the oxide-insulated gate electrode can induce a
conducting channel between the two other contacts called source and drain. The channel can be of n-type
or p-type and is accordingly called an nMOSFET or a pMOSFET (also commonly nMOS, pMOS). It is
by far the most common transistor in both digital and analog circuits, though the bipolar junction
transistor was at one time much more common.
Schematic Symbol of N-channel and P-channel MOSFET

Figure 3

Nvis 6512A
Schematic Symbol and IC View

Figure 4
Types of MOSFET: There are two basic types of MOSFETs
Depletion MOSFETs, or D-MOSFETs, can be operated in either the depletion mode or the
enhancement mode.
Enhancement MOSFETs, or E-MOSFETs, can be operated only in the enhancement mode.
The differences between the two are a result of the physical construction of each. MOSFET construction
can be represented as shown in below Figure.
Depletion-mode MOSFET
Structure of Depletion-mode MOSFET

Figure 5

Nvis 6512A
Depletion-mode MOSFET is a piece of N-type material with a small P-type region on the right, and on
the left side of the channel a thin layer of silicon dioxide (insulator) is deposited to create an insulated
gate. The electrons flowing from source to drain must travel through the channel between the gate and the
substrate.
Depletion-mode MOSFET with a negative gate voltage.

Figure 6
The VDD supplies free electrons to flow from the source to drain. These electrons flow through the
narrow channel on the left of the P-type substrate. (The gate voltage controls the width of the channel,
and as a result it controls the flow of the source, drain current of the device.)
Enhancement-mode MOSFET (E-MOSFET)
An E-MOSFET does not have an N-channel between the source and the drain.
Structure of Depletion-mode MOSFET

Figure 7
When the gate is positive it will attract free electrons into the P-type region. The free electrons will
combine with the holes located next to the silicon dioxide.

Nvis 6512A
At the time that the gate becomes positive enough, all the holes touching the silicon dioxide are filled
with free electrons, and they begin to flow from the source to the drain of the device. This effect is the
same as creating a thin layer of N-type material next to the silicon dioxide that the gate is connected to.
The thin conducting layer that is created is called the N-type inversion layer. While the N-type inversion
layer exists, free electrons can flow easily from source to drain. The amount of the minimum gate voltage
that is required to create the N-type inversion layer is called the threshold voltage, (Vth).
Metaloxidesemiconductor structure and channel formation:

A metaloxidesemiconductor field-effect transistor (MOSFET) is based on the modulation of charge
concentration by a MOS capacitance between a body electrode and a gate electrode located above the
body and insulated from all other device regions by a gate dielectric layer which in the case of a
MOSFET is an oxide, such as silicon dioxide. If dielectrics other than an oxide such as silicon dioxide
(often referred to as oxide) are employed the device may be referred to as a metalinsulator
semiconductor FET. Compared to the MOS capacitor, the MOSFET includes two additional terminals
(source and drain), each connected to individual highly doped regions that are separated by the body
region. These regions can be either p or n type, but they must both be of the same type, and of opposite
type to the body region. The source and drain (unlike the body) are highly doped as signified by a '+' sign
after the type of doping.
MOSFET Construction
Figure 8

Nvis 6512A
Structure of N-channel and P-channel MOSFET

Figure 9
Cross section of an NMOS without channel formed: OFF state

Figure 10

Nvis 6512A
Cross section of an NMOS with channel formed: ON state

Figure 11
If the MOSFET is an n-channel or nMOSFET, then the source and drain are 'n+' regions and the body is a
'p' region. As described above, with sufficient gate voltage, holes from the body are driven away from the
gate, forming an inversion layer or n-channel at the interface between the p region and the oxide. This
conducting channel extends between the source and the drain, and current is conducted through it when a
voltage is applied between source and drain.
For gate voltages below the threshold value, the channel is lightly populated, and only a very small
subthreshold leakage can flow between the source and the drain.
If the MOSFET is a p-channel current or pMOS FET, then the source and drain are 'p+' regions and the
body is a 'n' region. When a negative gate-source voltage (positive source-gate) is applied, it creates a p-
channel at the surface of the n region, analogous to the n-channel case, but with opposite polarities of
charges and voltages. When a voltage less negative than the threshold value (a negative voltage for p-
channel) is applied between gate and source, the channel disappears and only a very small subthreshold
current can flow between the source and the drain.
The source is so named because it is the source of the charge carriers (electrons for n-channel, holes for
p-channel) that flow through the channel; similarly, the drain is where the charge carriers leave the
channel.
The device may comprise a Silicon On Insulator (SOI) device in which a Buried OXide (BOX) is formed
below a thin semiconductor layer. If the channel region between the gate dielectric and a Buried Oxide
(BOX) region is very thin, the very thin channel region is referred to as an Ultra Thin Channel (UTC)
region with the source and drain regions formed on either side thereof in and/or above the thin
semiconductor layer. Alternatively, the device may comprise a SEMiconductor On Insulator (SEMOI)
device in which semiconductors other than silicon are employed. Many alternative semiconductor
materials may be employed. When the source and drain regions are formed above the channel in whole or
in part, they are referred to as Raised Source/Drain (RSD) regions.
The 'metal' in the name is now often a misnomer because the previously metal gate material is now often
a layer of polysilicon (polycrystalline silicon). Aluminium had been the gate material until the mid 1970s,
when polysilicon became dominant, due to its capability to form self-aligned gates. Metallic gates are

Nvis 6512A
regaining popularity, since it is difficult to increase the speed of operation of transistors without metal
gates. IGFET is a related term meaning insulated-gate field-effect transistor, and is almost synonymous
with MOSFET, though it can refer to FETs with a gate insulator that is not oxide. Another synonym is
MISFET for metalinsulatorsemiconductor FET.
FET with an oxide coating between gate and channel is called a MOSFET (metal- oxide semiconductor
field effect transistor) the figure below shows the oxide, insulating the gate from the channel. MOSFET
is voltage controlled device & required only small input current. Its switching speed is very high; it is
used in low power high frequency converter. But it has the problem of electrostatic discharge so require
special care in handling.
Structure of Depletion type MOSFET

Figure 12
(a) When VGS (Gate-source voltage) is not supplied
(b) When VGS (Gate-source voltage) is supplied
The Structure of an Enhancement Type MOSFET and its Operation

Figure 13
(a) When VGS (Gate-source voltage) is not supplied
(b) When VGS (Gate-source voltage) is supplied

Nvis 6512A
The MOSFET is also made in an enhancement-only mode, where a gate signal only induces or enhances
channel current, the gate signal never depletes the channel current. Naturally there are p-channel
enhancement MOSFETS, where a negative gate voltage enhances channel conductivity; and n-channel
enhancement mode MOSFETS where a positive gate voltage enhances channel conductivity. One final
note, breakdown voltage in MOS devices does not depend upon p-n junction stress but rather upon the
thickness and quality of the insulating oxide. When breakdown does occur, the oxide is punctured and the
device is destroyed.
Figure 14
Here drain current is cut-off until the gate to source voltage reaches a specific magnitude. So, current
control in n-channel is effected by +ve source to gate voltage. If VGS is set to zero, voltage applied
between D & S of the device, the absence of n-channel will result in current zero amperes. With VDS
some +ve voltage, VGS at zero volts & terminal is directly connected to source there are in fact two
reverse biased p-n junction between the n-doped & p-substrate to oppose any significant flow between
drain & source. Now of VGS & VDS are set at some +ve voltage greater than zero, hence established D-
gate at +ve potential with respect to source. As VGS is increase, then significant increase in drain current
(ID) is called threshold voltage & given by VT. Since channel is non-existence with VGS= 0V and
enhanced by the application of +ve gate-to-source voltage so this type of MOSFET is called enhancement
type. So with increase in VGS, drain current increase. If we hold VGS constant & increase in level of
VDS then ID will eventually reach saturation level. For value of VGS less than the threshold level the
drain current of an enhancement type MOSFET is 0 mA.
Mosfet Operation:
A traditional metaloxidesemiconductor (MOS) structure is obtained by growing a layer of silicon
dioxide (SiO2) on top of a silicon substrate and depositing a layer of metal or polycrystalline silicon. As
the silicon dioxide is a dielectric material, its structure is equivalent to a planar capacitor, with one of the
electrodes replaced by a semiconductor.
When a voltage is applied across a MOS structure, it modifies the distribution of charges in the
semiconductor. If we consider a P-type semiconductor (with NA the density of acceptors, p the density of
holes; p = NA in neutral bulk), a positive voltage, VGB, from gate to body creates a depletion layer by
forcing the positively charged holes away from the gate-insulator/semiconductor interface, leaving
exposed a carrier-free region of immobile, negatively charged acceptor ions. If V GB is high enough, a
high concentration of negative charge carriers forms in an inversion layer located in a thin layer next to
the interface between the semiconductor and the insulator. Unlike the MOSFET, where the inversion
layer electrons are supplied rapidly from the source/drain electrodes, in the MOS capacitor they are
produced much more slowly by thermal generation through carrier generation and recombination centers

Nvis 6512A
in the depletion region. Conventionally, the gate voltage at which the volume density of electrons in the
inversion layer is the same as the volume density of holes in the body is called the threshold voltage.
This structure with P-type body is the basis of the N-type MOSFET, which requires the addition of an N-
type source and drain regions.
Application of N channel MOSFET

Figure 15
Modes of operation:
The operation of a MOSFET can be separated into three different modes, depending on the voltages at
the terminals. In the following discussion, a simplified algebraic model is used that is accurate only for
old technology. Modern MOSFET characteristics require computer models that have rather more
complex behavior.
For an enhancement-mode, n-channel MOSFET, the three operational modes are:
Cutoff, subthreshold, or weak-inversion mode: When VGS < Vth

Where Vth is the threshold voltage of the device.
According to the basic threshold model, the transistor is turned off, and there is no conduction between
drain and source. In reality, the Boltzmann distribution of electron energies allows some of the more
energetic electrons at the source to enter the channel and flow to the drain, resulting in a subthreshold
current that is an exponential function of gatesource voltage. While the current between drain and
source should ideally be zero when the transistor is being used as a turned-off switch, there is a weak-
inversion current, sometimes called sub threshold leakage.
In weak inversion the current varies exponentially with gate-to-source bias VGS as given approximately
by:
Where ID0 = current at VGS = Vth and the slope factor n is given by
n = 1 + CD / COX,
With CD = capacitance of the depletion layer COx = capacitance of the oxide layer. In a long-channel
device, there is no drain voltage dependence of the current once V DS > > VT, but as channel length is
reduced drain-induced barrier lowering introduces drain voltage dependence that depends in a complex
way upon the device geometry (for example, the channel doping, the junction doping and so on).
Frequently, threshold voltage Vth for this mode is defined as the gate voltage at which a selected value of

Nvis 6512A
current ID0 occurs, for example, ID0 = 1A, which may not be the same Vth-value used in the equations
for the following modes.
Some micropower analog circuits are designed to take advantage of subthreshold conduction. By
working in the weak-inversion region, the MOSFETs in these circuits deliver the highest possible
transconductance-to-current ratio, namely: gm/ ID= 1 / (nVT), almost that of a bipolar transistor.
The subthreshold I-V curve depends exponentially upon threshold voltage, introducing a strong
dependence on any manufacturing variation that affects threshold voltage; for example: variations in
oxide thickness, junction depth, or body doping that change the degree of drain-induced barrier lowering.
The resulting sensitivity to fabricational variations complicates optimization for leakage and
performance.
Triode mode or linear region (also known as the ohmic mode

When VGS > Vth and VDS < ( VGS Vth )
The transistor is turned on, and a channel has been created which allows current to flow between the
drain and the source. The MOSFET operates like a resistor, controlled by the gate voltage relative to both
the source and drain voltages. As here, the voltage between transistor gate and source ( V GS) exceeds the
threshold voltage(Vth), it is known as Overdrive voltage. The current from drain to source is modelled as:
Where is the charge-carrier effective mobility, is the gate width, is the gate length and is
the gate oxide capacitance per unit area. The transition from the exponential subthreshold region to the
triode region is not as sharp as the equations suggest.
Saturation or active mode

When VGS > Vth and VDS ( VGS Vth )
The switch is turned on, and a channel has been created, which allows current to flow between the drain
and source. Since the drain voltage is higher than the gate voltage, the electrons spread out, and
conduction is not through a narrow channel but through a broader, two- or three-dimensional current
distribution extending away from the interface and deeper in the substrate. The onset of this region is also
known as pinch-off to indicate the lack of channel region near the drain. The drain current is now weakly
dependent upon drain voltage and controlled primarily by the gatesource voltage, and modelled
approximately as:
The additional factor involving , the channel-length modulation parameter, models current dependence
on drain voltage due to the early effect, or channel length modulation. According to this equation, a key
design parameter, the MOSFET transconductance is:
Where the combination Vov = VGS Vth is called the overdrive voltage, and where VDSsat = VGS Vth )
accounts for a small discontinuity in which would otherwise appear at the transition between the
triode and saturation regions.

Nvis 6512A
Another key design parameter is the MOSFET output resistance rout given by:
rout is the inverse of gDS where
.
ID is the expression in saturation region.
If is taken as zero, an infinite output resistance of the device results that leads to unrealistic circuit
predictions, particularly in analog circuits.
Characteristics of an EMOSFET
Figure 16
Drain characteristics of an N-channel E-MOSFET are shown in figure. The lowest curve is the VGST
curve. When VGS is lesser than VGST, ID is approximately zero. When VGS is greater than VGST, the device
turns- on and the drain current ID is controlled by the gate voltage. The characteristic curves have almost
vertical and almost horizontal parts. The almost vertical components of the curves correspond to the
ohmic region, and the horizontal components correspond to the constant current region. Thus E-
MOSFET can be operated in either of these regions i.e. it can be used as a variable-voltage resistor (WR)
or as a constant current source.

Nvis 6512A
Figure 17
Figure shows a typical transconductance curve. The current IDSS at VGS <=0 is very small, being of the
order of a few nano-amperes. When the VGS is made positive, the drain current ID increases slowly at
first, and then much more rapidly with an increase in VGS. The manufacturer sometimes indicates the
gate-source threshold voltage VGST at which the drain current ID attains some defined small value, say
10uA. A current ID (corresponding approximately to the maximum value given on the drain
characteristics and the values of VGS required to give this current VGs ON are also usually given on the
manufacturers data sheet.
The equation for the transfer characteristic does not obey equation. However it does follow a similar
square law type of relationship. The equation for the transfer characteristic of E-MOSFETs is given as
ID=K(VGS-VGST)2
Advantages of Mosfet
1. High input impedance, Voltage controlled device, Easy to drive:
To maintain on-state, base drive current which is 1/5 or 1/10 of collector current is required, and larger
reverse base drive current is needed for the high speed turn-off for the current controlled device, BJT.
Due to these characteristics base drive circuit design becomes complicated, and becomes expensive. On
the other hand, voltage controlled device MOSFET is a switching device which is driven by channel at
the semiconductor surface due to the field effect produced by the voltage applied to the gate electrode,
which is isolated from the semiconductor surface. And as the required gate current during switching
transient as well as on, off state is small, the drive circuit design is simple and the cost of it can be
reduced.
2. Unipolar device, Majority carrier device, Fast switching speed:

As there are no delay due to storage and recombination of minority carrier as in BJT, the switching speed
is faster than the BJT in the orders of magnitude. So it has advantage in the high frequency operation
circuit where the switching power loss is dominant.
3. Wide SOA (safe operating area):

Nvis 6512A
It has a wider SOA than BJT as it is applicable in short period of time with high voltage and high current
without any destructive device failure due to second breakdown.
4. Forward voltage drop with positive temperature coefficient, Easy to use in parallel:
When the temperature increases, the forward voltage drop also increases, and because of this, the current
flows equally through each device when the devices are in parallel. So, the MOSFET is more easy to use
in parallel than the BJT which has forward voltage drop with negative temperature coefficient.
The major advantage of the MOSFET transistor is that it uses low power for accomplishing its purpose
and the dissipation of power in terms of loss is very little, which makes it a major component in the
modern computers and electronic devices like the cell phones, digital watches, small robotic toys and
calculators.
Disadvantages of Mosfet
1. High resistance channels: In normal operation, the source is electrically connected to the substrate.
With no gate bias, the depletion region extends out from the N+ drain in a pseudo hemispherical
shape. The channel length L cannot be made shorter than the minimum depletion width required to
support the rated voltage of the device.
2. Channel resistance may be decreased by creating wider channels but this is costly since it uses up
valuable silicon real estate. It also slows down the switching speed of the device by increasing its gate
capacitance.
Application of MOSFET- MOSFET as Amplifier

MOSFETs can be used to make single stage class "A" amplifier circuits with the Enhancement mode N-
channel MOSFET common source amplifier being the most popular circuit. The depletion mode
MOSFET amplifiers are very similar to the JFET amplifiers, except that the MOSFET has much higher
input impedance. This high input impedance is controlled by the gate biasing resistive network formed by
R1 and R2. Also, the output signal for the enhancement mode common source MOSFET amplifier is
inverted because when VG is low the transistor is switched "OFF" and VD (Vout) is high. When VG is
high the transistor is switched "ON" and VD (Vout) is low as shown.
Enhancement-mode N-Channel MOSFET Amplifier

Figure 18

Nvis 6512A
The DC biasing of this common source MOSFET amplifier circuit is virtually identical to the JFET
amplifier. The MOSFET circuit is biased in class A mode by the voltage divider network formed by
resistors R1 and R2. The AC input resistance is given as RIN = RG = 1M.
Metal Oxide Semiconductor Field Effect Transistors are three terminal active devices made from
different semiconductor materials that can act as either an insulator or a conductor by the application of a
small signal voltage. The MOSFETs ability to change between these two states enables it to have two
basic functions: "switching" (digital electronics) or "amplification" (analogue electronics). Then
MOSFETs have the ability to operate within three different regions:
1. Cut-off Region: With VGS < Vthreshold the gate-source voltage is lower than the threshold voltage so
the transistor is switched "fully-OFF" and IDS = 0, the transistor acts as an open circuit
2. Linear (Ohmic) Region: With VGS > Vthreshold and VDS > VGS the transistor is in its constant
resistance region and acts like a variable resistor whose value is determined by the gate voltage, VGS
3. Saturation Region: With VGS > Vthreshold the transistor is in its constant current region and is
switched "fully-ON". The current IDS = maximum as the transistor acts as a closed circuit

Nvis 6512A
Experiment 1
Objective:
To study and plot the VI characteristics of MOSFET.
Drain Characteristics
Transfer characteristics
Equipments Needed:
1. 2mm Patch Cords
2. Mains Cord
Circuit diagram:
Figure 19
Drain Characteristics:
Connection Diagram:
Figure 20

Nvis 6512A
Procedure:
1. Make the connections as shown in the above figure.
2. Connect the +35V DC supply to terminal 22 of Potentiometer P2 and terminal 24 to ground.
3. Now connect terminal 23 of Potentiometer P2 to terminal 5 of Resistance R3.
4. Now connect +ve terminal of Ammeter to terminal 6 of Resistance R3 and ve terminal to Drain (D)
of MOSFET to measure Drain Current.
6. Now connect terminal 20 of P1 to terminal 17 of R9.
7. Connect terminal 18 of R9 to gate (G) of MOSFET to give a supply of 15V for gate.
8. Connect Source (S) of MOSFET to Ground.
9. Connect +ve terminal of voltmeter to Gate (G) of MOSFET and -ve terminal to ground to measure
drain voltage VGS.
Note: As Source (S) of MOSFET is already connected to ground so we can connect ve terminal of
Voltmeter to ground or Source of MOSFET.
10. Rotate both potentiometers P1 and P2 in fully anti clockwise direction.
11. Before performing experiment first connect the power cable to Power Supply box.
12. Connect the Power Supply with Techbook using given connectors of Power Supply Box.
13. Now switch On the power (press the rocker switch) from Power Supply box.
14. Now vary potentiometer P1 and set a value of gate voltage VGS at some constant value (5, 6, 7 & 8 V).
15. Now Remove Voltmeter between Gate (G) and ground, and connect between Drain (D) and ground
as shown in following figure to measure Drain Voltage VDS.
Figure 21

Nvis 6512A
16. Now vary the potentiometer P2 so as to increase the value of drain voltage VDS from zero to 30 V in
step and measure the corresponding values of drain current ID for different constant value of gate
voltage VGS.
17. Note down the readings in given observation table.
18. Repeat the above procedure for different value of gate voltage VGS.
19. Plot a curve between drain voltage VDS and drain current ID, using suitable scale with the help of
observation table. This curve is the required drain characteristic.
Observation Table:
S.No. Drain Voltage Drain Current ( ID) at constant Value of Gate Voltage (VGS)
(VDS)
VGS = 5V VGS = 6V VGS = 7V VGS = 8V
1.
2.
3.
4.
5.
6.
7.
8.

Nvis 6512A
Transfer Characteristics:
Connection diagram:
Figure 22
Procedure:
2. Now connect terminal 23 of Potentiometer P2 to terminal 17 of Resistance R9 and terminal 18 of
Resistance R9 to Gate (G) of MOSFET.
3. Connect Source (S) of MOSFET to Ground.
4. Select +35V variable DC power supply (by selecting the toggle switch at downward position) and
connect to terminal 5 of Resistance R3.
5. Now connect +ve terminal of Ammeter to terminal 6 of Resistance R3 and ve terminal to Drain
(D) of MOSFET to measure Drain Current ID (mA).
6. Rotate both of the potentiometer P2 and VR1 fully in anti-clockwise direction.
7. Connect +ve terminal of voltmeter to Drain (D) of MOSFET and -ve terminal to ground to
measure drain voltage VDS.
8. Now connect mains cord to the supply and Switch On the power supply.
9. Vary potentiometer VR1 and set a value of drain voltage VDS at some constant value (10, 20 &
28V).
10. Disconnect voltmeter between drain (D) and ground and connect between Gate (G) and ground as
shown in below figure.

Nvis 6512A
Figure 23
11. Vary the potentiometer P2 so as to increase the value of gate voltage VGS from zero to 15 V in step
and measure the corresponding values of drain current ID for different constant value of drain
voltage VDS.
13. Plot a curve between gate voltage VGS and drain current ID, using suitable scale with the help of
observation table. This curve is the required transfer characteristic.
14. Repeat the above procedure for different values of drain voltage VDS.
Observation Table:
Gate Drain Current ID (mA) at constant value of
Serial No. Voltage drain Voltage
VGS VDS = 10V VDS = 20V VDS = 28V
1.
2.
3.
4.
5.
6.
7.
8.
9.

Nvis 6512A
Field Effect Transistor

The field-effect transistor (FET) is a type of transistor that relies on an electric field to control the shape
and hence the conductivity of a 'channel' in a semiconductor material. Field-effect transistors are so
named because a weak electrical signal coming in through one electrode creates an electrical field
through the rest of the transistor.
Schematic symbol:
The vertical line in the symbol may be visualized as channel to which source and drain is connected. The
third terminal gate is connected at the centre of the vertical line. Since, in N-channel FET, the gate and
the channel form a PN junction, the gate arrow points inwards i.e. towards the channel. Whereas, in P-
channel FET, the gate and the channel form an NP junction, the gate arrow points outwards.
Schematic Symbol of n-channel and p-channel FET

Figure 24
FET Polarities:
The N-channel FET polarities and P-channel FET polarities are shown. In each case the voltage between
gate and source (VGS) is such that the gate is reversed biased. The width of the depletion layer depends
upon this reverse biasing which restricts the flow of majority carriers through the channel. A high voltage
supply (VDS) is connected between the drain and the source, this set up a flow of majority carriers
through the channel from source to drain. The drain and source terminals are interchangeable i.e. either
end can be used as source and the other end as drain. However, once the FET is connected in the circuit,
the terminals are fixed i.e. the terminals through which the majority carriers enter the bar is called source
and the other through which the majority carriers leave the bar is called drain.
Figure 25

Nvis 6512A
Composition:
The FET can be constructed from a number of semiconductors, silicon being by far the most common.
Most FETs are made with conventional bulk semiconductor processing techniques, using the single
crystal semiconductor wafer as the active region, or channel.
Among the more unusual body materials are amorphous silicon, polycrystalline silicon or other
amorphous semiconductors in thin-film transistors or organic field effect transistors that are based on
organic semiconductors and often apply organic gate insulators and electrodes.
Figure 26
Cleanliness is next to godliness applies to the manufacture of field effect transistors. Though it is
possible to make bipolar transistors outside of a clean room, it is a necessity for field effect transistors.
Even in such an environment, manufacture is tricky because of contamination control issues. The
unipolar field effect transistor is conceptually simple, but difficult to manufacture. Most transistors today
are a metal oxide semiconductor variety of the field effect transistor contained within integrated circuits.
However, discrete JFET devices are available.
FET Operation:
A field effect transistor (FET) is a unipolar device, conducting as current using only one kind of charge
carrier. If it is based on an N-type slab of semiconductor, the carriers are electrons. Conversely, a P-type
based device uses only holes. At the circuit level, field effect transistor operation is simple. A voltage
applied to the gate, input element, controls the resistance of the channel, the unipolar region between the
gate regions. Generally two types of FET are used: (1) Junction field effect transistor (JFET), (2) Metal
oxide semiconductor field effect transistor (MOSFET).
Construction of JFET:
The junction field effect transistor (JFET) is constructed in the following two ways:
1. N channel JFET
2. P channel JFET
N Channel JFET:
It consists of a thin bar of N type semiconductor with two junctions with the P type semiconductor near
the center, at opposite sides of the bar. Thus we get two P-N junctions on either side of the bar. Both the
P type semiconductors are internally connected together (i.e., both have the common one terminal). This
terminal is called the gate and is represented by the letter G. When this terminal is given a potential, the P
type semiconductor of both the junctions are at same potential.

Nvis 6512A
Figure 27
The region between the two junctions is called the channel. The terminals from the either ends of the N
type semiconductor are called the source and drain which are represented by the letters S and D
respectively in Figure 2. When a potential difference is applied between the drain D and the source S, the
majority charge carriers of N channel (i.e., electrons) move in accordance with the applied potential. As a
result, current flows through the channel.
Figure 28
P Channel JFET:
It consists of a thin bar of P type semiconductor with two junctions with the N type semiconductor near
the center, at opposite sides of the bar. Thus we get two P-N junctions on either side of the bar. Both the
N type semiconductors are internally connected together (i.e., both have the common one terminal) as
shown in Figure 4. The common terminal is called the gate G. The terminals extending out of two ends of
the P semiconductor are called the source S and drain D. When a potential difference is applied between
the drain D and the source S, the majority charge carriers of P channel (i.e., holes) move in accordance
with the applied potential. As a result, the current flows through the channel.

Nvis 6512A
Figure 29
Operation of JFET:
A field effect transistor (FET) is a unipolar device, conducting a current using only one type of charge
carrier. If based on an N-type slab of semiconductor, the carriers are electrons. Conversely, a P-type
based device uses only holes.
At the circuit level, field effect transistor operation is simple. A voltage applied to the gate, input
element, controls the resistance of the channel, the unipolar region between the gate regions. In an N-
channel device, this is a lightly doped N-type slab of silicon with terminals at the ends. The source and
drain terminals are analogous to the emitter and collector, respectively, of a BJT. In an N-channel device,
a heavy P-type region on both sides of the center of the slab serves as a control electrode, the gate. The
gate is analogous to the base of a BJT.
Junction field effect transistor cross-section.

Figure 30
A properly biased N-channel junction field effect transistor (JFET) is shown in above figure. The gate
constitutes a diode junction to the source to drain semiconductor slab. The gate is reverse biased. If a
voltage (or an ohmmeter) were applied between the source and drain, the N-type bar would conduct in
either direction because of the doping. Neither gate nor gate bias is required for conduction. If a gate
junction is formed as shown, conduction can be controlled by the degree of reverse bias.
Figure below (a) shows the depletion region at the gate junction. This is due to diffusion of holes from
the P-type gate region into the N-type channel, giving the charge separation about the junction, with a
non-conductive depletion region at the junction. The depletion region extends more deeply into the
channel side due to the heavy gate doping and light channel doping.

Nvis 6512A
N-channel JFET: Figure 31
(a) Depletion at gate diode. (b) Reverse biased gate diode increases depletion region.
(c) Increasing reverse bias enlarges depletion region. (d) Increasing reverse bias pinches-off the S-
D channel.
The thickness of the depletion region can be increased above figure (b) by applying moderate reverse
bias. This increases the resistance of the source to drain channel by narrowing the channel. Increasing the
reverse bias at (c) increases the depletion region, decreases the channel width, and increases the channel
resistance. Increasing the reverse bias VGS at (d) will pinch-off the channel current. The channel
resistance will be very high. This VGS at which pinch-off occurs is VP, the pinch-off voltage. It is
typically a few volts. In summation, the channel resistance can be controlled by the degree of reverse
biasing on the gate.
The source and drain are interchangeable, and the source to drain current may flow in either direction for
low level drain battery voltage (< 0.6 V). That is, the drain battery may be replaced by a low voltage AC
source. For a high drain power supply voltage, to 10's of volts for small signal devices, the polarity must
be as indicated in Figure below (a). This drain power supply, not shown in previous figures, distorts the
depletion region, enlarging it on the drain side of the gate. This is a more correct representation for
common DC drain supply voltages, from a few to tens of volts. As drain voltage VDS is increased, the
gate depletion region expands toward the drain. This increases the length of the narrow channel,
increasing its resistance a little. We say "a little" because large resistance changes are due to changing
gate bias. Figure below (b) shows the schematic symbol for an N-channel field effect transistor compared
to the silicon cross-section at (a). The gate arrow points in the same direction as a junction diode. The
pointing arrow and non-pointing bar correspond to P and N-type semiconductors, respectively.

Nvis 6512A
Figure 32
N-channel JFET electron current flow from source to drain (a) cross-section, (b) schematic symbol.
Above figure shows a large electron current flow from (-) battery terminal, to FET source, out the drain,
returning to the (+) battery terminal. This current flow may be controlled by varying the gate voltage. A
load in series with the battery sees an amplified version of the changing gate voltage.
P-channel field effect transistors are also available. The channel is made of P-type material. The gate is a
heavily dopped N-type region. All the voltage sources are reversed in the P-channel circuit (Figure
below) as compared with the more popular N-channel device. Also note, the arrow points out of the gate
of the schematic symbol (b) of the P-channel field effect transistor.
Figure 33
P-channel JFET: (a) N-type gate, P-type channel, reversed voltage sources compared with N-
channel device. (b) Note reversed gate arrow & voltage sources on schematic.
Characteristics of JFETs
There are two types of static characteristics viz,
(1) Output or drain characteristic and
(2) Transfer characteristic.

Nvis 6512A
Output / Drain Characteristics:

It is the curve plotted between output drain current ID versus output drain to source voltage VDS for
constant values of input Gate to source voltage VGS as shown in Figure 31.
Circuit Diagram for determining JFET Drain Characteristics

Figure 34
JFET Drain Characteristics showing different regions

Figure 35
The voltage VGS applied to the Gate controls the current flowing between the Drain and the Source
terminals. VGS refers to the voltage applied between the Gate and the Source while VDS refers to the
voltage applied between the Drain and the Source. Because a Junction Field Effect Transistor is a
voltage controlled device, "NO current flows into the gate!" then the Source current ( IS ) flowing out of
the device equals the Drain current flowing into it and therefore ( ID = IS ).
The characteristics curves are shown in above figure, shows the four different regions of operation for a
JFET and these are given as:

Nvis 6512A
Ohmic Region - When VGS = 0 the depletion layer of the channel is very small and the JFET acts
like a voltage controlled resistor.
Cut-off Region - This is also known as the pinch-off region were the Gate voltage, VGS is
sufficient to cause the JFET to act as an open circuit as the channel resistance is at maximum.
Saturation or Active Region - The JFET becomes a good conductor and is controlled by the
Gate-Source voltage, (VGS) while the Drain-Source voltage, (VDS) has little or no effect.
Breakdown Region - The voltage between the Drain and the Source, (VDS) is high enough to
causes the JFET's resistive channel to break down and pass uncontrolled maximum current.
The characteristics curves for a P-channel junction field effect transistor are the same as those above,
except that the Drain current ID decreases with an increasing positive Gate-Source voltage, VGS.
The Drain current is zero when VGS = VP. For normal operation, VGS is biased to be somewhere between
VP and 0. Then we can calculate the Drain current, ID for any given bias point in the saturation or active
region as follows:
Drain current in the active region
Note that the value of the Drain current will be between zero (pinch-off) and IDSS (maximum current).
By knowing the Drain current ID and the Drain-Source voltage VDS the resistance of the channel (ID ) is
given as:
Drain-Source channel resistance
Where: gm is the "transconductance gain" since the JFET is a voltage controlled device and which
represents the rate of change of the Drain current with respect to the change in Gate-Source voltage.
Conclusion from JFET Drain Curve

It is observed that as the negative gate bias voltage is increased
(1) The maximum saturation drain current becomes smaller because the conducting channel now
becomes narrower.
(2) Pinch-off voltage is reached at a lower value of drain current ID than when VGS = 0. When an
external bias of, say 1 V is applied between the gate and the source, the gate-channel junctions are
reverse-biased even when drain current, ID is zero. Hence the depletion regions are already penetrating
the channel to a certain extent when drain-source voltage, VDS is zero. Due to this reason, a smaller

Nvis 6512A
voltage drop along the channel (i.e. smaller than that for VGS = 0) will increase the depletion regions to
the point where 1 they pinch-off the current. Consequently, the pinch-off voltage VP is reached at a lower
1 drain current, ID when VGS = 0.
(3) The ohmic region portion decreases.
(4) Value of drain-source voltage VDS for the avalanche breakdown of the gate junction is reduced.
Value of drain-source voltage, VDS for breakdown with the increase in negative bias voltage is reduced
simply due to the fact that gate-source voltage, VGS keeps adding to the I reverse bias at the junction
produced by current flow. Thus the maximum value of VDS I that can be applied to a FET is the lowest
voltage which causes avalanche breakdown. It is also observed that with VGS = 0, ID saturates at IDSS and
the characteristic shows VP = 4 V. When an external bias of 1 V is applied, the gate-channel junctions
still require -4 V to achieve pinch-off. It means that a 3 V drop is now required along the channel instead
of the previous 4.0 V. Obviously, this drop of 3 V can be achieved with a lower value of drain current,
Similarly when VGS = 2 V and 3 V, pinch-off is achieved with 2 V and 1 V respectively, along the
channel. These drops of 2 V and 1 V are, of course, achieved with further reduced values of drain current,
ID. It is further observed that when the gate-source bias is numerically equal to pinch-off voltage, VP (-4
V in this case), no channel drop is required and, therefore, drain current, ID is zero. The gate-source
bias voltage required to reduce drain current, ID to zero is designated the gate-source cut-off voltage,
VGS /0FF).
Transfer characteristic:
It is the curve plotted between output drain current versus input Gate to source voltage for constant
values of output drain to source voltage as shown in below figure.
Transfer Characteristics of JFET
Figure 36
It is similar to the transconductance characteristics of a vacuum tube or a transistor. It is shows that
when VGS = 0, ID = IDSS and when ID = 0, VGS = VPO.

Nvis 6512A
Conclusion from JFET Transfer characteristics curve:

The transfer characteristic for a JFET can be determined experimentally, keeping drain-source voltage,
VDS constant and determining drain current, ID for various values of gate-source voltage, VGS. The curve
is plotted between gate-source voltage, VGS and drain current, ID. It is similar to the transconductance
characteristic of a vacuum tube or a transistor. It is observed that
1. Drain current decreases with the increase in negative gate-source bias

2. Drain current, ID = IDSS when VGS = 0
3. Drain current, ID = 0 when VGS = VD
The transfer characteristic can also be derived from the drain characteristic by noting values of drain
current, ID corresponding to various values of gate-source voltage, VGS for a constant drain-source
voltage and plotting them. It may be noted that a P-channel JFET operates in the same way and have the
similar characteristics as an N-channel JFET except that channel carriers are holes instead of electrons
and the polarities of VGS and VDS are reversed.
JFET Parameters
The various parameters of a JFET can be obtained from its two characteristics. The main parameters of a
JFET when connected in common source mode are:
AC Drain Resistance, rD:
It is the ac resistance between drain and source terminals when JFET is
operating in the pinch-off region. It is given by
An alternative name is dynamic drain resistance. It is given by the slope of the drain characteristics in the
pinch off region. It is sometimes written as rds emphasizing the fact that it is the resistance from drain to
source. Since rd is usually the output resistance of a JFET, it may also be expressed as output admittance
Yos. Obviously, Yos = 1/rd. It has a very high value.
Transconductance, gm:
It is simply the slope of transfer characteristics at constant VGS
Its unit is Siemens (S) /mho. It is also called forward transconductance (gfs) or forward transadmittance
YFS. The transconductance measured at IDSS is written as gmo.
Mathematically

Nvis 6512A
Amplification factor, :
It is given by
It can be proved from above that
DC drain resistance, RDS:

It is also called the static or ohmic resistance of the channel. It is given by
Advantages of FET: A FET is a voltage controlled device (similar to vacuum pentode) in which the
output current (drain current) is controlled by input gate voltage, therefore, it has following advantages:
1. FET has a very high input impedance (of the order of 100 mega-ohm) which shows a high degree of
isolation between the input and output circuit.
2. The operation FET depends upon the majority carriers (i.e. election in N-channel and holes in P-
channel) which does not cross junctions. Therefore, the inherent noise of tubes (because of high
temperature operation) and those of ordinary transistors (because of junctions) are not present in FET.
3. In FET, the risk of thermal runway is avoided since it has a high negative temperature coefficient of
resistance.
4. A FET has a smaller size, longer life and high efficiency.
5. The power gain of FET is very high which eliminated the necessity of using driver state while
applying it as a power amplifier.
6. FETs generate a lower noise level than the Bipolar Junction Transistor (BJT).
7. FETs are more stable than BJT with temperature.
8. FETs are easier to manufacture than the BJT, because they require fewer steps to be built and they
allow more integrated devices in the same IC.
9. FETs behave like resistors controlled by voltage for small drain-source voltage values.
10. The high input impedance of FET allows them to withhold loads long enough to allow its usage as
storage elements.
11. Power FETs can dissipate higher power and can switch very large currents.

Nvis 6512A
Disadvantages of FET: Since FET has high input impedance, the gate voltage has less control over the
drain current. Therefore, FET amplifier has much less voltage gain than a bipolar amplifier.
1. FETs have a poor frequency response due to its high input capacitance.
2. FETs have a poor linearity, and generally they are less linear than BJT.
3. FETs can be damaged due to the static electricity.
Applications of a FET
The input signal is applied between gate and source and amplified output signal is obtained across the
drain-source terminals. The gate-source circuit is always reverse biased due to which a depletion layer is
formed which reduces the channel width. When a weak input signal is applied across the gate and the
source, the reverse bias on the gate decreases during the positive half of the signal. This increases the
channel width and hence the drain current ID. However, during the negative half of the signal, the reverse
bias on the gate increases. This decreases the channel width and hence the drain current. Thus, a small
change in gate voltage produces a large change in drain current. These large variations in drain current
produces large output across the load resistor. Hence, it is seen that FET acts as an amplifier.
FET as an Amplifier
Figure 37

Nvis 6512A
Experiment 2
Objective:
Study of the characteristics of JFET (Junction Field Effect Transistor) in common source configuration
and to evaluate:
DC Drain resistance
Transconductance
Amplification factor
Equipments needed:
2 mm Patch Cords
Power Supply
Circuit diagram:
Figure 38
Drain Characteristics:
Connection Diagram:
Figure 39

Nvis 6512A
1. Make the connections as shown in the above figure.

of FET to measure Drain Current.
5. Connect the -5V DC supply to terminal 19 of Potentiometer P1 and terminal 21 to ground.
6. Now connect terminal 20 of Potentiometer P1 to terminal 1 of R1.
7. Connect terminal 2 of R1 to gate (G) of FET to give a supply of -5V.
8. Connect Source (S) of FET to Ground.
9. Connect +ve terminal of voltmeter to Gate (G) of FET and -ve terminal to ground to measure gate
voltage VGS.
Note: As Source (S) of FET is already connected to ground so we can connect ve terminal of
Voltmeter to ground or Source of FET.
10. Rotate both potentiometers P1 & P2 in fully anti-clock wise direction.

11. Now connect the mains cord to the Supply & switch On the power supply.
12. Now rotate potentiometer P1 and set the value of input gate to source voltage at some constant value
(0V, -1V, -2V).
13. Now Remove Voltmeter between Gate (G) and ground, and connect between Drain (D) and ground
to measure Drain Voltage VDS as shown in below figure.
Figure 40

Nvis 6512A
14. Now vary the potentiometer P2 so as to increase the value of drain voltage VDS from zero to 15 V in
step and measure the corresponding values of drain current ID for different constant value of gate
voltage VGS.
16. Repeat the above procedure for different value of gate voltage VGS.
17. Plot a curve between drain voltage VDS and drain current ID, using suitable scale with the help of
observation table. This curve is the required drain characteristic.
Observation Table:
Output Output Drain current ID (mA) at constant Value
S.No. Voltage of input voltage
VDS (volt) VGS = 0V VGS = -1V VGS = -2V
1.
2.
3.
4.
5.
6.
7.
8.

Nvis 6512A
Transfer Characteristics:
Connection Diagram:
Figure 41
Procedure:
1. Connect the -5V DC supply to terminal 22 of Potentiometer P2 and terminal 24 to ground.
2. Now connect terminal 23 of Potentiometer P2 to terminal 1 of Resistance R1 and terminal 2 of
Resistance R1 to Gate (G) of FET.
3. Connect Source (S) of FET to Ground.
4. Select +14V variable DC power supply (by selecting the toggle switch at upward position) and connect
to terminal 5 of Resistance R3.
of FET to measure Drain Current ID (mA).
6. Rotate the potentiometer P2 and VR1 fully in anti-clockwise direction.
7. Connect +ve terminal of voltmeter to Drain (D) of FET and -ve terminal to ground or Source to
measure drain voltage VDS.
9. Vary potentiometer VR1 and set a value of drain voltage VDS at some constant value (3, 4, 5V..).
10. Disconnect voltmeter between drain (D) and ground and connect between Gate (G) and ground.

Nvis 6512A
Figure 42
11. Vary the potentiometer P2 so as to increase the value of gate voltage VGS from zero to -5 V in step and
measure the corresponding values of drain current ID for different constant value of drain voltage VDS.
13. Plot a curve between gate voltage VGS and drain current ID, using suitable scale with the help of
observation table. This curve is the required transfer characteristic.
14. Repeat the above procedure for different values of drain voltage VDS.
Observation Table:
Output Drain current ID (mA) at constant value of Output

Input voltage
S. No. voltage
VGS (volt) VDS = 3V VDS = 4V
VDS = 5V
1.
2.
3.
4.
5.
6.
7.
8.

Nvis 6512A
Calculations:
Transconductance, gm:
To calculate transconductance determine slope of the transfer characteristics obtained from observation
table 2.
Its unit is Siemens (S) / mho.

Amplification factor, : It is given by
DC drain resistance, RDS:

It is also called the static or ohmic resistance of the channel. It is given by
Results:
Transconductance, gm = ________
Amplification factor = ________
DC drain resistance, RDS = _____________

Nvis 6512A
Unijunction Transistor
A unijunction transistor (originally called a double-based diode), commonly referred to as UJT, is an
electronic semiconductor device that has only one P-N junction. It has three terminals named as, Emitter
(E), Basel (BI) and Base2 (B2). Between Bl and B2 it behaves like an ordinary resistance. RB1 and RB2
are internal resistance respectively from B1 and B2.
The base is formed by lightly doped n-type bar of silicon. Two ohmic contacts B1 and B2 are attached at
its ends. The emitter is of p-type and it is heavily doped. The bar between the two bases is nearer to B2
than to B1. A p-n junction is formed between the p-type emitter and the n-type silicon bar. The lead
through the junction is called emitter lead, E.
The resistance between B1 and B2, when the emitter is open-circuit is called Inter-base resistance. The
basic construction and symbol of UJT are shown in the following figure.
Figure 43
Brief History
Unijunction transistor circuits were popular in hobbyist electronics circuits in the 1970's and early 1980's
because they allowed simple oscillators to be built using just one active device. Later, as integrated
circuits became more popular, oscillators such as IC 555 timer became more commonly used.
In addition to its use as the active device in relaxation oscillators, one of the most important applications
of UJTs or PUTs are to trigger thyristors (SCR, TRIAC, etc.). In fact, a DC voltage can be used to control
a UJT or PUT circuit such that the "on-period" increases with an increase in the DC control voltage. This
application is important for large AC current control.
Types of Unijunction Transistors

There are two types of unijunction transistor, which are as follows:
The original unijunction transistor, or UJT, is a simple device that is simply a bar of n-type
semiconductor material into which p-type material has been diffused somewhere along its length,
defining the device parameter . The 2N2646 is the most commonly used version of the UJT.

Nvis 6512A
Figure 44
The programmable unijunction transistor, or PUT, is a close cousin to the thyristor. Like thyristor, it
has four P-N layers and has an anode and a cathode connected to the first and the last layer, and a
gate connected to one of the inner layers. The PUTs are not directly interchangeable with
conventional UJTs but perform a similar function. In a proper circuit configuration with two
"programming" resistors for setting the parameter , they behave like a conventional UJT. The
2N6027 is an example of such a device.
Construction of UJT
The basic structure of a unijunction transistor is shown in figure. It essentially consists of a lightly-doped
N-type silicon bar with a small piece of heavily doped P-type material alloyed to its one side to produce
single P-N junction. The single P-N junction accounts for the terminology unijunction. The silicon bar, at
its ends, has two ohmic contacts designated as base-1 (B1) and base-2 (B2), as shown and the P-type
region is termed the emitter (E). The emitter junction is usually located closer to base-2 (B2) than base-1
(B1) so that the device is not symmetrical, because symmetrical unit does not provide optimum electrical
characteristics for most of the applications.
Figure 45
The symbol for unijunction transistor is shown in figure. The emitter leg is drawn at an angle to the
vertical line representing the N-type material slab and the arrowhead points in the direction of
conventional current when the device is forward-biased, active or in the conducting state. The basic
arrangement for the UJT is shown in figure.A complementary UJT is formed by diffusing an N-type
emitter terminal on a P-type base. Except for the polarities of voltage and current, the characteristics of a
complementary UJT are exactly the same as those of a conventional UJT.
Some important points about UJT are given below:

The device has only one junction, so it is called the unijunction device.
The device, because of one P-N junction, is quite similar to a diode but it differs from an ordinary
diode as it has three terminals.
The structure of a UJT is quite similar to that of an N-channel JFET. The main difference is that P-
type (gate) material surrounds the N-type (channel) material in case of JFET and the gate surface of
the JFET is much larger than emitter junction of UJT.

Nvis 6512A
In a unijunction transistor the emitter is heavily doped while the N-region is lightly doped, so the
resistance between the base terminals is relatively high, typically 4 to 10 kilo Ohm when the emitter
is open.
The N-type silicon bar has a high resistance and the resistance between emitter and base-1 is larger
than that between emitter and base-2. It is because emitter is closer to base-2 than base-1.
UJT is operated with emitter junction forward- biased while the JFET is normally operated with the
gate junction reverse-biased.
UJT does not have ability to amplify but it has the ability to control a large ac power with a small
signal. It exhibits a negative resistance characteristic and so it can be employed as an oscillator
Characteristics of UJT
The graph of Emitter to Base1 voltage (VE) vs. Emitter current (IE) at a given voltage between the bases
(VBB) is called UJT characteristics.
UJT characteristics are very different from the conventional bipolar junction transistor characteristics. It
is a pulse generator with the trigger or control signal applied at the emitter. This trigger in voltage is a
fraction () of inter base voltage, VBB. The characteristics curve is shown in figure 5.
The emitter terminal does not inject current into the base region until its voltage reaches V P. Once VP is
reached, the base circuit conducts and a positive pulse appears at B1 and a negative pulse at B2. The UJT
incorporates a negative resistance region, a low emitter current, and a high output pulse current at
terminals B1 and B2. Overall, the effect of negative resistance at the emitter terminal makes the UJT
useful as an ideal pulse trigger especially in simple oscillator circuits.
Figure 46
Basic operation:
The equivalent circuit shown in below figure has been developed to explain how the device works, and it
is necessary to define the terms used in this explanation.
1. RBB is known as the Inter Base Resistance and is the sum of RB1 and RB2. This is only true when the
emitter is an open circuit. It is given by
RBB = RB1 + RB2

Nvis 6512A
Figure 47
2.VRB1 is the voltage developed across RB1 which is given by the voltage divider rule as
VRB1 = (RB1 / RBB) x VBB
VRB1 = x VBB
= (RB1 / RBB)
The ratio RB1 / RBB is referred to as the Intrinsic Stand-off Ratio and is denoted by (the Greek letter
eta).
If an external voltage VE is connected to the emitter, the equivalent circuit can be redrawn as shown in
figure below.
Figure48
If VE is less than VRB1, the diode gets reverse-biased and the circuit behaves as though, the emitter was
open circuit.
However, if VE is increased so that it exceeds VRB1 by at least 0.7 volts, the diode becomes forward
biased and emitter current IE flows into the base1 region. Because of this, the value of RB1 decreases. It
has been suggested that this is due to the presence of additional charge carriers (holes) in the bar.
Further increase in VE, causes the emitter current to increase which in turn reduces RB1 and this causes a
further increase in current. This runaway effect is termed regeneration. Corresponding value of emitter

Nvis 6512A
current and voltage at this point is peak current (IP) and peak voltage (VP). The value of emitter voltage,
known as the peak voltage (VP) is given by:
VP = VBB + VD
As the emitter voltage is increased, the current is very small - just a few microamperes. After the peak
point is reached, an attempt to increase Ve is followed by a sudden increases in emitter current IE with
decrease in VE. This displayed in the negative resistance portion of the characteristics curve The negative
portion of the curve lasts until the valley point V is reached with valley point voltage (Vv) and valley
point current (Iv).
After the valley point, where the device runs into saturation. At this point RB1 is at its lowest value, which
is known as the saturation resistance. The difference VP-VV is a measure of a switching efficiency of UJT
fall of VBB decreases.
Characteristics curve:
The characteristics of the UJT are illustrated by the graph of emitter voltage against emitter current. It
operates in three different regions as follows:
Figure 49
1. Cut-off region:
Let voltage VE be applied between E and B1 where E is positive with respect to B1. Now increase
this voltage from zero until E to B1 unijunction is reverse biased i.e. until V E < VBB and emitter
current is negative as shown by the curve.
So, until VE = VBB + VD at point R as shown in figure 33, UJT operates in cut-off region.
Corresponding voltage and current at this point are known as Peak voltage, VP and peak current, IP.
2. Negative resistance region:

Nvis 6512A
At point R, when VE = VBB + VD, emitter starts to inject holes into lower base region B1. This is
because of increased number of carriers in the base region. Hence, the resistance RB1 of E-B1 junction
decreases.
Due to this potential decreases & current IE due to voltage VE increases, so this region is negative
resistance region shown by point R-S in figure 33.It is a stable region. Decrease in resistance is due to
the holes injected into the N-type slab to P-type when conduction is established.
3. Saturation region:
At point S in the figure 33 the entire base region is saturated & resistance RB1 does not decrease any
more. This region is called saturation region. Further increase in IE is accompanied by voltage VE,
where point is called valley point. Voltage and current at this point are called valley voltage (VV) &
valley current (IV).
Advantages of UJT:
It is a low cost device.
It is a low-power absorbing device under normal operating conditions.
It is very stable over a wide range of temperatures and allows a reduction of components when used
in place of conventional transistors.
A few applications of the UJT are as follows:
It is used to trigger SCRs and TRIACs
It is used in non-sinusoidal oscillators
It is used in phase control and timing circuits
It is used in saw tooth generators
It is used in oscillator circuit design
Sawtooth Oscillator using UJT

A Unijunction Transistor [UJT] is used in this example to function as a sawtooth oscillator. The UJT is
selected for its voltage range and frequency range so it matches that of the desired output signal. The
resistor and capacitor is selected for the frequency of oscillation, and example component values are
provided. No input signal is required for this circuit, other than the supply voltage. The output is taken
off the node between the resistor and capacitor.
UJT as a Saw Tooth Generator

Figure 50

Nvis 6512A
Experiment 3
Objective:
To plot the characteristics of UJT and calculate its Inter Base Resistance and Intrinsic Stand-Off Ratio.
Equipments Needed:
1. 2 mm Patch cords
2. Mains Cord
Circuit Diagram:
Figure 51
Connection Diagram:
Figure 52

Nvis 6512A
Procedure:
1. Connect the 15V DC supply to terminal 22 of Potentiometer P2 and terminal 24 to ground.
3. Now connect +ve terminal of Ammeter to terminal 11 of Resistance R6 and ve terminal to Emitter
(E) of UJT to measure emitter Current IE (mA).
4. Connect Base1 (B1) of UJT to Ground.
5. Select +15V variable DC power supply (by selecting the toggle switch at upward position) and connect
to terminal 7 of Resistance R4 and terminal 8 to Base2 (B2) of UJT.
6. Rotate both the potentiometer P2 and VR1 fully in anti-clockwise direction.
7. Connect +ve terminal of voltmeter to Base2 (B2) of UJT and -ve terminal to ground to measure Base
voltage VBB.
9. Vary potentiometer VR1 and set a value of Base voltage VBB at some constant value (4V, 8V, 12V).
10. Disconnect voltmeter between B2 and ground and connect between E and ground as shown in below
figure.
Figure 53
11. Vary the potentiometer P2 so as to increase the value of emitter voltage VE and measure the

Nvis 6512A
corresponding values of emitter current IE for different constant value of Base voltage VBB.
Note: In smallest steps possible for more precise observation.
12. Record the corresponding emitter current IE for each value of emitter voltage VE in the observation
table below.
13. Keep increasing VE until the value of VE drops down on the display, UJT fires and emitter current IE
flows rapidly.
14. Keep recording the corresponding emitter current IE for each value of emitter voltage VE in the
observation table given below until the pot P2 has fully rotated in clockwise direction.
15. Plot a curve between emitter voltage VE and emitter current IE, using suitable scale with the help of
observation table. This curve is the required characteristic of UJT.
16. Repeat the above procedure for different values of base voltage VBB.
Observation Table:
Emitter Emitter current, IE at constant value of output voltage

S. No. Voltage, VE ( milli Amperes )
(Volts) For VBB =4 V For VBB =8 V For VBB = 12 V
01.
2.
3.
4.
5.
6.
7.
8.
9.
10.
Calculation:
1. Intrinsic Stand-off Ratio ():

For VBB = 4 V
Intrinsic standoff ratio,
= (VP VD)/ VBB
Where,
VBB = 4 V,
VD = 0.7 V,

Nvis 6512A
VP = to be observed from graph plotted for VBB = 4V through above procedure.

= .
For VBB = 8 V
Intrinsic stand off ratio,
= (VP VD)/ VBB
Where,
VBB = 8 V,
VD = 0.7 V,
VP is to be observed from graph plotted for VBB = 8V through above procedure.
= .
For VBB = 12 V
Intrinsic stand off ratio,
= (VP VD)/ VBB
Where,
VBB = 12 V,
VD = 0.7 V,
VP is to be observed from graph plotted for VBB = 15V through above procedure.
= .
2. Inter Base Resistance, RBB

We had already measured the value of RBB in the step 2 of the above procedure.
RBB =
Note:
The value of Intrinsic Stand-off Ratio () ranges from 0.56 to 0.75. Since this parameter is a ratio, it
has no units.
The value of Inter base Resistance (RBB) ranges from 4 K to 10 K when IE = 0.
Result:
1. The values of Intrinsic Stand-off Ratio () for different values of VBB :
For VBB = 4V, = ..
For VBB = 8V, = ..
For VBB = 12V, = ..
2. The value of Inter Base Resistance (RBB) = ..

Nvis 6512A
Sample Results
Experiment 1
MOSFET Drain Characteristics
Drain Current ID
S.No. VDS
VGS = 5V VGS = 6V VGS = 7V VGS = 8V
1 0 0 0 0 0
2 2 10.1 10.1 10.2 10.2
3 4 14.9 20.4 20.4 20.5
4 6 15 25.2 31 31.9
5 8 15.1 25.2 34.9 41.8
6 10 15.1 25.2 34.9 44.7
7 12 15.2 25.3 34.9 44.8
8 14 15.3 25.3 35 44.9
9 16 15.4 25.4 35.1 45
10 18 15.5 25.5 35.2 45.1
11 20 15.6 25.6 35.4 45.3
12 22 15.7 25.7 35.5 45.4
13 24 15.8 25.8 35.6 45.6
14 26 15.9 25.9 35.8 45.7
15 28 16 26.1 36 45.9
16 30 16.1 26.3 36.1 46.1

Nvis 6512A
MOSFET Transfer Characteristics
Drain Current
S.No. VGS ID in mA
at VDS= 28V
1 0 0
2 1 0
3 2 0
4 3 0.9
5 4 7.4
6 5 16.8
7 6 26.2
8 7 36.2
9 8 46.8
10 9 55.7
11 10 66
12 11 76.4
13 12 86.3
14 13 94
15
14 94
Note: Similarly we can plot graph for VDS = 10V and 20V.

Nvis 6512A
Experiment 2
FET Drain Characteristics
Drain Current
S.No. VDS VGS=0 VGS= -1V VGS= -2V
1 0 0 0 0
2 0.5 11.3 8.6 4.7
3 1 22 14.2 7.6
4 1.5 27.8 18.4 9
5 2 32.8 20.9 9.7
6 2.5 35.8 22.3 10.1
7 3 37.7 23.2 10.3
8 3.5 38.3 23.4 10.5
9 4 39.1 23.7 10.6
10 4.5 39.3 23.8 10.7
11 5 39.3 23.8 10.8
12 5.5 39.5 23.9 10.9
13 6 39.2 23.9 11
14 6.5 39.1 23.9 11
15 7 39.1 23.9 11.1

Nvis 6512A
FET Transfer Characteristics
Drain Current ID (mA)

S.No. VGS
VDS= 3V VDS= 4V VDS= 5V
1 0 37 38.9 39.6
2 -0.5 29.7 29.9 29.4
3 -1 22.7 23 22.5
4 -1.5 16.2 16.5 16.6
5 -2 10 9.6 10.7
6 -2.5 5.1 5.2 5.6
7 -3 1.5 1.7 1.8
8 -3.5 0 0 0
9 -4 0 0 0
10 -4.5 0 0 0
11 -5 0 0 0
FET Parameters
DC Drain Resistance: As we know this resistance is static or ohmic resistance so we have to calculate
this in ohmic region of curve.
0.5V/11.3mA = 44.24
RDS = 44.24
Transconductance gm: To calculate transconductance determine slope of the transfer characteristics
obtained from observation table. It is simply the slope of transfer characteristics at constant VGS.

Nvis 6512A
VGS = -2.5 (-3) = 0.5V

ID = 23.2-22.3 = 0.9mA
gm = 0.9mA/0.5V = 1.8mA/V = 1.8mS
gm = 1.8mS
Amplification Factor
= 1.8 x 44.24 = 79.63

= 79.63

Nvis 6512A
Experiment 3
UJT V-I Characteristics
For VBB = 4V
IE (mA)
S.No. VE (Volts)
at VBB = 4V
1 0 0
2 0.5 0
3 1 0
4 1.5 0
5 2 0
6 2.5 0
7 3 0
8 1 1.42
9 1.04 3
10 1.05 3.8
11 1.06 4.8
12 1.07 5.5
13 1.08 6.2
14 1.09 7.3
15 1.1 8.2
16 1.11 9.2
17 1.12 10.3
18 1.13 11.5
19 1.14 12.3
20 1.15 13.6
21 1.16 14.9
22 1.17 16.3
23 1.18 18
24 1.19 19.1
25 1.2 20.1
26 1.21 21.8
27 1.22 22.7
28 1.24 25.4
29 1.25 27.3
30 1.25 27.9

Nvis 6512A
= (VP VD)/ VBB
VBB = 4 V, VD = 0.7 V, Vp = 3V
= 0.57 RBB = 6.7K

Nvis 6512A
For VBB = 8V
IE (mA)
VE
S.No. at VBB =
(Volts)
8V
1 0 0
2 0.5 0
3 1 0
4 1.5 0
5 2 0
6 2.5 0
7 3 0
8 3.5 0
9 4 0
10 4.5 0
11 5 0
12 5.5 0
13 1.1 2.9
14 1.11 4
15 1.12 5.1
16 1.13 6.2
17 1.14 7.3
18 1.15 8.5
19 1.16 9.9
20 1.17 11
21 1.18 12.1
22 1.19 13.6
23 1.2 14.7
24 1.21 16
25 1.22 17.7
26 1.23 19
27 1.24 20.2
28 1.25 22
29 1.26 24
30 1.28 27
31 1.28 27.5

Nvis 6512A
= (VP VD)/ VBB
VBB = 8V, VD = 0.7 V, Vp = 5.5V
= 0.6
RBB = 6.7K

Nvis 6512A
For VBB = 12V
IE (mA)
S.No. VE (Volts)
at VBB = 12V
1 0 0
2 1 0
3 2 0
4 3 0
5 4 0
6 5 0
7 6 0
8 7 0
9 8 0
10 1.16 4.5
11 1.17 5.7
12 1.18 7
13 1.19 8.3
14 1.2 9.8
15 1.21 11
16 1.22 12.6
17 1.23 13.7
18 1.24 15.3
19 1.25 16.7
20 1.26 18
21 1.27 19.1
22 1.28 21.1
23 1.3 23.6
24 1.31 25.7
25 1.32 26.3

Nvis 6512A
= (VP VD)/ VBB
VBB = 12V, VD = 0.7 V, Vp = 8V
= 0.60
RBB = 6.7K

Nvis 6512A
Glossary
1. Adjustment Potentiometer : A Potentiometer used to make a circuit adjustment.
2. Ampere : The basic unit of electrical current. Applying one volt across a one ohm resistor will
cause a current of one ampere to flow. The letter 'I' is used to denote current.
3. Amplifier : An electronic component that boosts the voltage or power level of a signal that is a
linear replica of the input signal, but with greater power or voltage level, and sometimes with an
impedance transformation.
4. Anode : An anode is an electrode through which electric current flows into a polarized electrical
device.
5. Bias :
On tubes, bias is a small direct voltage applied to the grid to move the operating point of the device
into a more linear range so as to reduce distortion.
On FETs, bias is a small direct voltage applied to the gate to move the operating point of the device
into a more linear range so as to reduce distortion.
One bipolar transistor, bias is a small direct current applied to the base to move the operating point
of the device into a more linear range so as to reduce distortion.
6. Circuit : The complete path of an electric current. A group of electrical components connected
together to perform some function.
7. Circuit symbol : Used in a schematic diagram as a graphic representation of a specific type of

electronic device.
8. Conductor : Any material that easily allows the flow of electricity. Metals are good conductors.
Such materials conduct electricity because electrons can move from one atom of a conductor to the
next, forming an electric current.
9. CMOS (Complementary MOSFET) : A combination of an N-channel and a P-channel MOSFET

in a single switching circuit. This circuit features very low power dissipation and the effective
elimination of an external load resistor. The device responds to a digital pulse at its input by turning
one section of the device ON and the other OFF, causing the turned OFF section to act as its high-
resistance load. When the input pulse reverts to zero, the state of the two sections of the device are
reversed.
10. Diode : A semiconductor device with two terminals, typically allowing the flow of current in one
direction only.
11. Direct Current [DC] : A current that flows in one direction only.
12. DC Voltage : Direct current voltage, meaning direct voltage that is one directional and basically
constant in amplitude.

Nvis 6512A
13. Drain : The output terminal of a JFET or MOSFET.
14. Dual In-Line Package [DIP] : An IC package having two parallel rows of performed leads which
contains an integrated circuit. DIP packages are available in a number of lengths and widths
depending on the amount of leads required and the complexity of the IC.
15. Electric Circuit : Path followed by electrons from a power source (generator or battery) through an
external line (including devices that use the electricity) and returning through another line to the
source.
16. Electric Current : The flow of electrons.
17. Field Effect Transistor (FET) : A particular type of transistor, an FET behaves in a similar
fashion to a triode (tube). There are actually several types of FETs, a common one in the pro audio
world being the MOSFET (Metal Oxide Field Effect Transistor). FETs have a high input
impedance, and respond in a linear fashion. This makes them ideal for condenser microphone
preamps, as well as for certain power amplifier designs.
18. Gate : The input or control terminal of an SCR, TRIAC, JFET or MOSFET.
19. Input : The current, voltage, power, or driving force applied to a circuit or device.
20. JFET (Junction Field-Effect Transistor) : A three-terminal semiconductor device constructed

with a PN junction at its input and a conducting channel as the output section. The PN junction of
the input section is reverse biased to provide an extremely high input resistance. It is generally
utilized in a high-input resistance, linear amplifier circuit.
21. Multi-Turn Potentiometer : A variable resistor or Potentiometer that requires more than one turn
to move from least value to full resistance.
22. Patch Cord : A cable used to connect two pieces of electrical equipment together.
23. Potential Difference : The voltage between two points.
24. Potentiometer : A variable resistor, used as a volume control or a position sensor in servo-systems,
having a terminal connected to each end of a resistive element and a third terminal connected to a
wiper contact. The output is a voltage that is variable depending upon the position of the wiper
contact. The potentiometer is commonly referred to as a variable voltage divider. It, in effect,
converts mechanical information into an electrical signal.
25. Resistance : The opposition a device or material offers to the flow of current. The effect of
resistance is to raise the temperature of the material or device carrying the current. A circuit element
designed to offer a predetermined resistance to current flow. A resistance of 1 ohm will allow a
current of 1 ampere to flow through it when a potential of 1 volt is applied.
R = E/I.
26. Resistivity : The reciprocal of conductivity.

Nvis 6512A
27. Resistor: The electrical component that offers resistance to the flow of current. It may be a coil of
fine wire or a composition rod.
28. Rocker Switch : A style of mechanical switch that uses a rocking action to turn the switch on and
off. A rocker switch may control one or more circuits.
29. Semiconductor : A semiconductor has electrical conductivity intermediate to that of a conductor

and an insulator.
30. Symbol : A simplified design representing a part in a schematic circuit diagram.
31. Terminal : A point of connection for two or more conductors in an electrical circuit; one of the
conductors is usually an electrical contact or lead of a component.
32. Trimmer: A circuit element or component used to make adjustments in a circuit. A variable
resistor or capacitor used to make circuit adjustments.
33. Volt : The term used for electrical potential, or potential difference. The unit of electromotive force
or electrical pressure. One volt is the pressure required to send 1 ampere of current through a
resistance of 1 ohm.
34. Voltage : The term used to signify electrical pressure. Voltage is a force that causes current to flow
through an electrical conductor. The voltage of a circuit is the greatest effective difference of
potential between any two conductors of the circuit. The effective (rms) potential difference
between any two conductors or between a conductor and ground.
35. Voltmeter : Device for measuring electrical voltage usually part of a multimeter.
36. Zero Potential : Earth ground, earth potential.

Nvis 6512A
Frequently Asked Questions
Q1. What is the foundation of a MOSFET called?

Ans. The substrate is called foundation of MOSFET.
Q2. In terms of physical construction what is difference between De- MOSFET and E-MOSFET?
Ans. The D-MOSFET has a physical channel that connects the source and drain materials. The E-
MOSFET has source and drain materials that are separated by the substrate (which is made of p-type
material in the component shown).
Q3. In terms of physical operating modes what is difference between De-MOSFET and E-
MOSFET?
Ans. Depletion MOSFETs, or D-MOSFETs, can be operated in either the depletion mode or the
enhancement mode while Enhancement MOSFETs, or E-MOSFETs, can be operated only in the
enhancement mode.
Q4. What is other name for MOSFET?

Ans: Other name for MOSFET is insulated-gate field-effect transistor (IGFET) another synonym is
MISFET for metalinsulatorsemiconductor FET.
Q5. Why FET is called a unipolar device?

Ans. In FET current is carried by only one type of charge particles, either electrons or holes. Hence FET
is called unipolar device.
Q6. How can a FET be used as a voltage controlled resistor?

Ans. In FET, the voltage applied between gate and source controls the drain current ID. Therefore, FET
is a voltage controlled device.
Q7. What are the advantages of FETs?

Ans. Advantages of FET are as follows:
In FET input resistance is high compared to BJT
Construction is smaller than BJT
Less sensitive to changes in applied voltage
Thermal stability is more
Thermal runaway does not exist in JFET
Thermal noise is much lower

Nvis 6512A
Q8. Define amplification factor in JFET.

Ans. It is defined as the ratio of change in drain-source voltage VDS to the change in gate-source voltage
VGS at constant drain current ID. It is also called mutual conductance.
Q9. Mention the three regions that are present in the drain source characteristics of JFET
Ans.
Saturation region
Break down region
Ohmic region
Q10. What is pinch-off voltage in FET?

Ans. In the VI characteristics of JFET, at some value of VDS, drain current ID cannot be increased
further, due to reduction in channel width. Any further increase in VDS does not increase the drain current
ID. ID approaches the constant saturation value. The voltage VDS at which the current ID reaches to its
constant saturation level is called Pinch-off voltage" Vp.
Q11. What are the parameters that control the Pinch off voltage?
Ans. Electron charge, donor or acceptor concentration, permittivity of channel material and half width of
channel bar.
Q12. List the characteristics of JFET.

Ans.
Drain characteristics
Transfer characteristics
Q13. Differentiate between BJT and JFET

Ans.
S.No BJT FET
1 Current controlled device Voltage controlled device
2 Bipolar device Unipolar device
3 Less input resistance Input resistance greater than BJT
4 Less thermal stability High thermal stability
5 More thermal noise Less thermal noise
Q14.Why MOSFET is called IGFET?

Ans: MOSFET is constructed with gate terminal insulated from the channel. So it is also called as
insulated gate FET or IGFET.
Q15.Comparison between JFET and MOSFET

Ans.
S.No JFET MOSFET
1 Gate is not insulated from channel Gate is insulated from channel by a thin layer
of SiO2
2 There are two types N-channel Four types - P-channel enhancement, P-
and P-channel channel depletion, N-channel enhancement,

Nvis 6512A
N-channel depletion
3 Cannot be operated in depletion Can be operated in depletion and
and enhancement modes enhancement modes
4 There is a continuous channel There is a continuous channel only in
depletion type, but not in enhancement type
Q16. List the JFET parameters.

Ans.
Transconductance (gm)
Input resistance and capacitance
Drain to source resistance (rd)
Amplification factor ()
Q17. How does the UJT differ from a conventional transistor?

Ans. The UJT has a second base instead of a collector.
Q18. What does UJT stands for? Justify the name UJT.
Ans. UJT stands for unijunction transistor. The UJT is a three terminal semiconductor device
having two doped regions. It has one emitter terminal (E) and two base terminals (B1and B2). It has only
one junction, moreover from the outlook; it resembles to a transistor hence the name unijunction
transistor.
Q19. Give the symbol and structure of UJT.

Ans.
Q20. Give the equivalent circuit of UJT.

Ans.
Q21. What is intrinsic standoff ratio of an UJT?

Ans. If a voltage VBB is applied between the bases with emitter open the circuit will behave as

Nvis 6512A
a potential divider. Thus the voltage VBB will be divided across RB1 and RB2
Voltage across resistance RB1,
VRB1 = (RB1 / RBB) x VBB
VRB1 = x VBB
= (RB1 / RBB)
The ratio RB1 / RBB is referred to as the Intrinsic Stand-off Ratio and is denoted by (the Greek letter
eta).
Q22. What is interbase resistance of UJT?

Ans. The resistance between the two bases (B1and B2) of UJT is called as interbase resistance.
Interbase resistance = RB1 + RB2
RB1- resistance of silicon bar between B1 and emitter junction.
RB2 - resistance of silicon bar between B2 and emitter junction
Q23. What are the regions in the VI characteristics of UJT?

Ans.
1. Cut-off region
2. Negative resistance region.
3. Saturation region
Q24. What is meant by negative resistance region of UJT?

Ans. In a UJT when the emitter voltage reaches the peak point voltage, emitter current starts flowing.
After the peak point any effort to increase in emitter voltage further leads to sudden increase in the
emitter current with corresponding decrease in emitter voltage, exhibiting negative resistance. This takes
place until the valley point is reached. This region between the peak point and valley point is called
negative resistance region.
Q25. Mention the applications of UJT.

Ans. Applications of UJT are as follows:
1. It is used in timing circuits
2. It is used in switching circuits
3. It is used in phase control circuits
4. It can be used as trigger device for SCR and triac.
5. It is used in saw tooth generator.
6. It is used for pulse generation.
Q26. Differentiate BJT and UJT.

Ans.
S.No BJT UJT
1 It has two PN junctions It has only one PN junctions
2 three terminals present are three terminals present are
emitter, base, collector emitter, base1,base2
3 basically a amplifying device basically a switching device

Nvis 6512A
Data Sheets
MOSFET

Nvis 6512A

Nvis 6512A
FET

Nvis 6512A
UJT

Nvis 6512A
Warranty
1. We guarantee the product against all manufacturing defects for 24 months from the date of sale by
us or through our dealers. Consumables like dry cell etc. are not covered under warranty.
2. The guarantee will become void, if
a) The product is not operated as per the instruction given in the learning material.
b) The agreed payment terms and other conditions of sale are not followed.
c) The customer resells the instrument to another party.
d) Any attempt is made to service and modify the instrument.
3. The non-working of the product is to be communicated to us immediately giving full details of the
complaints and defects noticed specifically mentioning the type, serial number of the product and
date of purchase etc.
4. The repair work will be carried out, provided the product is dispatched securely packed and insured.
The transportation charges shall be borne by the customer.

Nvis 6512A
List of Service Centres
Baroda Guwahati Indore

Flat No. A/1, Mudra Complex, Avijit Roy Building, A.K. Dev 94, Electronic Complex,
Behind Sudha Hotel, Ellora Road, Fatashil Ambari, Near Pardesipura, Indore-452 010
Park, Baroda-390023 (Gujarat) jalaram Mandir, Tel: 91-731-2570301/02,
Tel: +91-0265-3089505 Guwahati-25 Assam 4211100,
Fax : +91- 0265-3089506 Mobile: 09435144068 Fax: 91-731-2555643
email : baroda@scientech.bz email: guwahati@scientech.bz E-mail: info@scientech.bz
New Delhi Bangalore Kolkata
First Floor, C-19, F.I.E., 202/19, 4th Main Street, AC-101, Prafullla Kanan, Near
Patparganj Industrial Area, Ganganagar, Bangalore-560032 Kestopur Bus Stop, Krishnapur,
Delhi-110092 (INDIA) Ph.: +91-080-41285011 Kolkata- 700059 (West Bengal)
Ph: 011- 22157370, 22157371, T.Fax: +91-080-41285022 Tel: +91 33-65266800
Fax: +91-011-22157369 email: bangalore@scientech.bz Mob: 9433029888
email: ndel@scientech.bz email: kolkata@scientech.bz
Mumbai Jaipur Lucknow

E Type, Bldg No. 5/1/3, Sector Flat No. G-2, S-101, Bhagat First Floor, 279/54/20/A,
1,Vashi, Navi Mumbai-400703 Vatika North, Civil Lines, Chuhar Singh Colony, Pan
Ph: +91-022-27826616, Jaipur - 302006 (Raj.) Dariba, Lucknow (U.P.)
65266616 Mobile: 097998-10236 Mobile: 09918670737
email: mumbai@scientech.bz email: jaipur@scientech.bz email: lucknow@scientech.bz
Hyderabad Cochin/Kochi Chandigarh

Plot No. 24, Flat no. 203, Laxmi C/o Pragalbha Valsan, 201, 2nd floor KMB
Residency, Chandragiri Housing Poriyamadathil house, ABMS Hospitality Services, SCO 19,
Society, Trimulgherry Lane, Asoka Road, Near Kabir Petrol Pump,
Secunderabad- 500015. Near Mathrubhumi, Kaloor, Ambala-Zirakpur Highway
Ph:040-27740147, 9247712763 Kochi - 682 017 Zirakpur, Mohali - 140603
email: hyd@scientech.bz Ph: 0484-2409441 Ph.: 0172-6530329
email: kochi@scientech.bz email: chandigarh@scientech.bz
Pune Chennai Orissa
105/106, 1st floor, Ajinkyatara, Flat C, 1st Floor, Old No. 49 Plot No-67 (1st Floor)
Ganesh Mala, Sinhgad Road, New No. 64, Bajanai Koil Aerodrom Area,Vimpur mouza
Pune - 411030 Street, Sriram Nagar Extention, Near Vimpur Primary School
Ph.: +91-020-24254244/55 Pallipattu, Chennai-600113 Bhubaneswar- 751020
Fax: +91-020-24254244 Tel: 044-43514212, 43514213 Mobile: 09238307873
email: pune@scientech.bz email: chennai@scientech.bz email: orissa@scientech.bz

Nvis 6512A
List of Accessories
1. Mains Cord .................................................................................................................................1 No.
2. Power Supply .............................................................................................................................1 No.
3. 2mm Patch Cord Red 12 ..........................................................................................................8 Nos.
4. 2mm Patch Cord Black 12 .......................................................................................................8 Nos.
5. Learning Material CD ................................................................................................................1 No.

Mosfet Final

Încărcat de

Informații document

Descriere originală:

Titlu original

Drepturi de autor

Formate disponibile

Partajați acest document

Partajați sau inserați document

Opțiuni de partajare

Vi se pare util acest document?

Este necorespunzător acest conținut?

Drepturi de autor:

Formate disponibile

Mosfet Final

Încărcat de

Drepturi de autor:

Formate disponibile

Understanding Characteristics of

MOSFET, FET & UJT

Designed & Manufactured by:

Nvis Technologies Pvt. Ltd. 2

Understanding Characteristics of MOSFET, FET & UJT

12. Sample Results 61

Nvis Technologies Pvt. Ltd. 3

Nvis Technologies Pvt. Ltd. 4

Nvis Technologies Pvt. Ltd. 5

Mains Supply : 90-230V, 50/60Hz

DC Fixed Power Supply : -5V, +15V, +35V

DC Variable Power Supply : 1.5V to 14 V

Resistor Bank : M.F.R. 100E 1W (3 Nos.)

Variable Resistances : 5 K Ten turn Potentiometer (1 No.)

Dimensions (mm) : 350 x D 280 x H 55

Nvis Technologies Pvt. Ltd. 6

Do not operate the instrument if suspect any damage to it.

The instrument should be serviced by qualified personnel only.

For your safety:

1. Do not operate in wet / damp conditions.

2. Do not operate in an explosive atmosphere.

3. Keep the product dust free, clean and dry.

Nvis Technologies Pvt. Ltd. 7

Nvis Technologies Pvt. Ltd. 8

Nvis Technologies Pvt. Ltd. 9

Difference between FET and ordinary transistor:

FET and Transistor

Current Controlled vs Voltage Controlled Devices:

Nvis Technologies Pvt. Ltd. 10

Comparison between a FET and a Bipolar Transistor:

S.No. Field Effect Transistor Bipolar Junction Transistor (BJT)

Nvis Technologies Pvt. Ltd. 11

Type Junction FET Metal Oxide Semiconductor FET

JFET and MOSFET comparison:

Nvis Technologies Pvt. Ltd. 12

Nvis Technologies Pvt. Ltd. 13

The metaloxidesemiconductor field-effect transistor (MOSFET) is a device used for amplifying or

Schematic Symbol of N-channel and P-channel MOSFET

Nvis Technologies Pvt. Ltd. 14

Schematic Symbol and IC View

Structure of Depletion-mode MOSFET

Nvis Technologies Pvt. Ltd. 15

Depletion-mode MOSFET with a negative gate voltage.

Structure of Depletion-mode MOSFET

Nvis Technologies Pvt. Ltd. 16

Metaloxidesemiconductor structure and channel formation:

Nvis Technologies Pvt. Ltd. 17

Structure of N-channel and P-channel MOSFET

Cross section of an NMOS without channel formed: OFF state

Nvis Technologies Pvt. Ltd. 18

Cross section of an NMOS with channel formed: ON state

Nvis Technologies Pvt. Ltd. 19

Structure of Depletion type MOSFET

The Structure of an Enhancement Type MOSFET and its Operation

Nvis Technologies Pvt. Ltd. 20

Nvis Technologies Pvt. Ltd. 21

Application of N channel MOSFET

Cutoff, subthreshold, or weak-inversion mode: When VGS < Vth

Nvis Technologies Pvt. Ltd. 22

Triode mode or linear region (also known as the ohmic mode

Saturation or active mode

Nvis Technologies Pvt. Ltd. 23