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5 4 3 2 1

Project code: 91.4FN01.001


JV50-TR_8VRAM Block Diagram PCB P/N : 48.4FN02.001
REVISION : 09927-1
PCB STACKUP
DDR2 667/800MHz
TOP
SYSTEM DC/DC
D 667/800 MHz AMD Caspian CPU G792 RT8205A 46 D

16,17 INPUTS OUTPUTS


S1G3 (35W) 35 CRT VCC
5V_S5(6A)
DCBATOUT
20
DDR2 667/800MHz
638-Pin uFCPGA638
4,5,6,7
S 3D3V_S5(6A)

667/800 MHz LCD S SYSTEM DC/DC


16,17 19 GND TPS51124 47
INPUTS OUTPUTS

OUT
HDMI BOTTOM 1D1V_S0(7.5A)

IN
16X16 DCBATOUT
21 1D2V_S0(4A)
16X
VRAM SYSTEM DC/DC
North Bridge Madison
CLK GEN. 3 AMD RS880M
55,56,57,58,59 DDR3
60,61,62,63
RT8209B
INPUTS
48
OUTPUTS
ICS9LPRS480BKLFT 71.09480.A03 CPU I/F LVDS, CRT I/F
RTM880N-796-VB-GRT 71.00880.A03 DCBATOUT 1D8V_S3(11A)
INTEGRATED GRAHPICS LAN
Giga LAN TXFM RJ45 G9661 49
27 27
C
BCM5784 26 5V_S5 1D1V_M92 C

INT MIC 8,9,10


New card PWR SW DY RT9161 49
30 DY W83L351YG
34 28 3D3V_S0 2D5V_S0
A-Link PCIex1 (200mA)
Line In Codec AZALIA 4X4 Mini Card G957 49
30
ALC888S WLAN 33
3D3V_S0 1D5V_S0
28 (1A)
MIC In Mini Card
South Bridge DY 33 G9161 49
30 AMD SB710
LPC BUS
3D3V_S5 1D2V_S5
(400mA)
INT.SPKR USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb) BIOS CHARGER
30 OP AMP High Definition Audio KBC
MXIC
MX25L1605
LPC MAX8731 50
MAX978929 ATA 66/100 Winbond 37 DEBUG INPUTS OUTPUTS
WPC773 CONN.37
B 36 B
Line Out CHG_PWR
ACPI 1.1
(SPDIF) 18V 6.0A
LPC I/F DCBATOUT
UP+5V
30 Touch INT. 5V 100mA
PCI/PCI BRIDGE
11,12,13,14,15 Pad 38 KB 36 Daughter Board
Finger Printer Board CPU DC/DC
ISL6265AHR 45
08650-1
MODEM SATA USB INPUTS OUTPUTS
CardReader VCC_CORE_S0_0
RJ11 MDC Card MS/MS Pro/xD
31 Realtek 0~1.55V 18A
Mini USB /MMC/SD
RTS5159 32 5 in 1
32 VCC_CORE_S0_1
Blue Tooth 24 Daughter Board DCBATOUT
HDD SATA 0~1.55V 18A
Mini sensor Board
22 VDDNB
USB 08696-1 0~1.55V 18A
2 Port 25
ODD SATA
Finger
A 23 JV50-TR8 A
Printer 31
Camera Daughter Board Daughter Board
USB Board LED Board Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
08649-1 08651-1
Title

BLOCK DIAGRAM
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 05, 2009 Sheet 1 of 63
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

JV50-TR8

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB/PCIE Routing
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 05, 2009 Sheet 2 of 63

5 4 3 2 1
5 4 3 2 1

3D3V_S0 3D3V_CLK_VDD
3D3V_S0
1 R215 2 R221
0R0603-PAD 1 2 3D3V_48MPW R_S0

1
C500 C501 DY C502 C467 C453 C476 C462 C492 C504 Due to PLL issue on current clock chip, the SBlink clock

1
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY 2R3J-GP C511 C506
SC1U10V2KX-1GP need to come from SRC clocks for RS740 and RS780.
DY

SC4D7U6D3V3KX-GP
Future clock chip revision will fix this.

2
3000mA.80ohm
D D
Clock chip has internal serial terminations
3D3V_S0 for differencial pairs, external resistors are
reserved for debug purpose.
1 R197 2
0R0603-PAD
1D1V_CLK_VDDIO C508
SC39P50V2JN-1GP
R218
1 DY 2 1 2
1

1
C459 C460 C454 C461 C472 C464 C495 3D3V_CLK_VDD X5

1
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
10MR2J-L-GP X-14D31818M-35GP
U20 82.30005.891
2

2
1D1V_CLK_VDDIO C509 2ND = 82.30005.951 SB
26 61 GEN_XTAL_IN

2
VDDATIG X1 GEN_XTAL_OUT
25 VDDATIG_IO X2 62 1 2
CL=20pF0.2pF
48 SC39P50V2JN-1GP
VDDCPU CLK_SMBCLK R214 10R0402-PAD
47 VDDCPU_IO SMBCLK 2 2 SMBC0_SB 12,16,17
3 CLK_SMBDAT R213 10R0402-PAD
2
SMBDAT SMBD0_SB 12,16,17
16 VDDSRC
17 VDDSRC_IO
11 30 CLK_PCIE_PEG_1 R187 1 0R0402-PAD
2
3D3V_CLK_VDD VDDSRC_IO ATIG0T_LPRS CLK_PCIE_PEG#_1R188 CLK_PCIE_PEG 55
ATIG0C_LPRS 29 10R0402-PAD
2 CLK_PCIE_PEG# 55
35 28 CLK_NB_GFX_1 R1891 0R0402-PAD
2
VDDSB_SRC ATIG1T_LPRS CLK_NB_GFX#_1 R1901 0R0402-PAD CLK_NB_GFX 9
34 VDDSB_SRC_IO ATIG1C_LPRS 27 2 CLK_NB_GFX# 9
1 R238 2 40 VDDSATA
C 0R0603-PAD 4 23 CLKREQ0# C
VDD CLKREQ0# TP153 TPAD14-GP
1

C505 55 45
SC1U10V2KX-1GP VDD_REF 56
VDDHTT CLKREQ1#
44 CLKREQ2#
LAN_CLKREQ# 26 CLKREQ# Internal
VDDREF CLKREQ2# TP159 TPAD14-GP
3D3V_48MPW R_S0 63 39 W LAN_CLKREQ# 33 pull Low
2

VDD48 CLKREQ3#
CLKREQ4# 38 W LAN2_CLKREQ# 33
-1
PD# 51
R191 1 0R0402-PAD CLK_PCIE_SB_1 PD# CPU_CLK_1 R222 1 0R0402-PAD
11 CLK_PCIE_SB 2 CPUKG0T_LPRS 50 2 CPU_CLK 6
SB A-Link 11 CLK_PCIE_SB#
R192 1 0R0402-PAD
2 CLK_PCIE_SB#_1
CPUKG0C_LPRS 49 CPU_CLK#_1 R220 1 0R0402-PAD
2 CPU_CLK# 6
22 SRC0T_LPRS
26 CLK_PCIE_LAN R193 1 0R0402-PAD
2 CLK_PCIE_LAN_1 21 64 CLK_48 R169 10R2J-2-GP
SRC0C_LPRS 48MHZ_0 CLK48_USB 12
LAN 26 CLK_PCIE_LAN# R194 1 0R0402-PAD
2 CLK_PCIE_LAN#_1 20 SRC1T_LPRS 1 2
19 SRC1C_LPRS 1 2 CLK48_5158E 32
R198 1 0R0402-PAD
2 CLK_NB_GPPSB_1 15 59 REF0
NB A-Link 9 CLK_NB_GPPSB R199 1 0R0402-PAD CLK_NB_GPPSB#_1 SRC2T_LPRS REF0/SEL_HTT66 REF1 R170 33R2J-2-GP
9 CLK_NB_GPPSB# 2 14 SRC2C_LPRS REF1/SEL_SATA 58

1
13 57 REF2 EC49
SRC3T_LPRS REF2/SEL_27

1
33 CLK_PCIE_MINI1 R200 1 0R0402-PAD
2 CLK_PCIE_MINI1_1 12 EC50 DY
SRC3C_LPRS

SC22P50V2JN-4GP
MINI1 33 CLK_PCIE_MINI1# R204 1 0R0402-PAD
2 CLK_PCIE_MINI1#_1 9 SB DY

2
SRC4T_LPRS

SC22P50V2JN-4GP
8

2
R205 1 0R0402-PAD CLK_PCIE_MINI2_1 SRC4C_LPRS
33 CLK_PCIE_MINI2 2 42 SRC6T/SATAT_LPRS GNDSATA 43
MINI2 33 CLK_PCIE_MINI2# R206 1 0R0402-PAD
2 CLK_PCIE_MINI2#_1 41 24
SRC6C/SATAC_LPRS GNDATIG
6 SRC7T_LPRS/27MHZ_SS GND 7
34 CLK_PCIE_NEW R211 1 0R0402-PAD
2 CLK_PCIE_NEW _1 5 52
SRC7C_LPRS/27MHZ_NS GNDHTT
NEW 34 CLK_PCIE_NEW # R208 1 0R0402-PAD
2 CLK_PCIE_NEW #_1
GNDREF 60
GNDCPU 46
TPAD14-GP TP247 1 CLK_SRC0T_LPRS 37 1
SB_SRC0T_LPRS GND48
36 SB_SRC0C_LPRS
56 JTAG_TCK 2 1 R353 CLK_SRC0C_LPRS 32 SB_SRC1T_LPRS GNDSRC 10
0R2J-2-GP 31 18
B
DY
SB_SRC1C_LPRS GNDSRC for TR B
NB CLOCK INPUT TABLE
GNDSB_SRC 33
R217 1 0R0402-PAD
2 CLK_NBHT_CLK_1 54 NB CLOCKS RS740 RX780 RS780
9 CLK_NBHT_CLK
9 CLK_NBHT_CLK#
R216 1 0R0402-PAD
2 CLK_NBHT_CLK#_1 53
HTT0T_LPRS/66M
HTT0C_LPRS/66M GND 65
For SB710 HT_REFCLKP
66M SE(SINGLE END) 100M DIFF 100M DIFF
NB HT ICS9LPRS480BKLFT-GP HT_REFCLKN NC 100M DIFF 100M DIFF

REFCLK_P
71.09480.A03 R229
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
2ND = 71.00880.A03 REF1 1 2 REFCLK_N NC NC vref
33R2F-3-GP CLK_SB_14M 11
3D3V_S0 PD# GFX_REFCLK 100M DIFF 100M DIFF 100M DIFF(IN/OUT)*
RN70 R234 DY
8 1 2 1 GPP_REFCLK NC 100M DIFF NC or 100M DIFF OUTPUT
7 2 W LAN_CLKREQ#
3D3V_S5 6 3 W LAN2_CLKREQ# 75R2F-2-GP GPPSB_REFCLK 100M DIFF 100M DIFF 100M DIFF
3D3V_S0 5 4 RUNPW ROK_D -1
RUNPW ROK_D 42
SRN10KJ-6-GP * RS780 can be used as clock buffer to output two PCIE referecence clocks
By deault, chip will configured as input mode, BIOS can program it to output mode.
2

DY DY
27MHz non-spreading singled clock on pin 5
R231 R230 R228 SEL_27 1 and 27MHz spread clock on pin 6
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP REF2 R232
0* 100MHz differential spreading SRC clock 150R2F-1-GP
1

REF0 REF0 2 1
REF1 SEL_SATA 1 100MHz non-spreading differential SATA clock CLK_NB_14M 9
A REF2 REF1 2 1 JV50-TR8 A
0* 100MHz differential spreading SRC clock R235
2

DY 75R2F-2-GP
SEL_HTT66 1 66MHz 3.3V single ended HTT clock
R225 R224 R223 REF0 Wistron Corporation
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 0* 100MHz differential HTT clock 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
OSC_14M_NB
1

CPU_CLK(200MHz) Title
RS780M 1.1V 158R/90.9R
CLKGEN_ICS9LPRS480
Size Document Number Rev
A3 JV50-TR8 -1
Date: W ednesday, November 04, 2009 Sheet 3 of 63
5 4 3 2 1
5 4 3 2 1

D D

1D2V_S0

Place close to socket 1.5Amp

1
C705 C704 C706 C707 C703 C174 C177
DY DY DY DY
SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP
2

2
ACPU1A

D1 VLDT_A0 HT LINK VLDT_B0 AE2


D2 VLDT_A1 VLDT_B1 AE3
D3 VLDT_A2 VLDT_B2 AE4
D4 VLDT_A3 VLDT_B3 AE5

8 HT_NB_CPU_CAD_H0 E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CPU_NB_CAD_H0 8


8 HT_NB_CPU_CAD_L0 E2 L0_CADIN_L0 L0_CADOUT_L0 AC1 HT_CPU_NB_CAD_L0 8
8 HT_NB_CPU_CAD_H1 E1 L0_CADIN_H1 L0_CADOUT_H1 AC2 HT_CPU_NB_CAD_H1 8
8 HT_NB_CPU_CAD_L1 F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 HT_CPU_NB_CAD_L1 8
8 HT_NB_CPU_CAD_H2 G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 HT_CPU_NB_CAD_H2 8
8 HT_NB_CPU_CAD_L2 G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 HT_CPU_NB_CAD_L2 8
8 HT_NB_CPU_CAD_H3 G1 L0_CADIN_H3 L0_CADOUT_H3 AA2 HT_CPU_NB_CAD_H3 8
C H1 AA3 C
8 HT_NB_CPU_CAD_L3 L0_CADIN_L3 L0_CADOUT_L3 HT_CPU_NB_CAD_L3 8
8 HT_NB_CPU_CAD_H4 J1 L0_CADIN_H4 L0_CADOUT_H4 W2 HT_CPU_NB_CAD_H4 8
8 HT_NB_CPU_CAD_L4 K1 L0_CADIN_L4 L0_CADOUT_L4 W3 HT_CPU_NB_CAD_L4 8
8 HT_NB_CPU_CAD_H5 L3 L0_CADIN_H5 L0_CADOUT_H5 V1 HT_CPU_NB_CAD_H5 8
8 HT_NB_CPU_CAD_L5 L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CPU_NB_CAD_L5 8
8 HT_NB_CPU_CAD_H6 L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CPU_NB_CAD_H6 8
8 HT_NB_CPU_CAD_L6 M1 L0_CADIN_L6 L0_CADOUT_L6 U3 HT_CPU_NB_CAD_L6 8
8 HT_NB_CPU_CAD_H7 N3 L0_CADIN_H7 L0_CADOUT_H7 T1 HT_CPU_NB_CAD_H7 8
8 HT_NB_CPU_CAD_L7 N2 L0_CADIN_L7 L0_CADOUT_L7 R1 HT_CPU_NB_CAD_L7 8
8 HT_NB_CPU_CAD_H8 E5 L0_CADIN_H8 L0_CADOUT_H8 AD4 HT_CPU_NB_CAD_H8 8
8 HT_NB_CPU_CAD_L8 F5 L0_CADIN_L8 L0_CADOUT_L8 AD3 HT_CPU_NB_CAD_L8 8
8 HT_NB_CPU_CAD_H9 F3 L0_CADIN_H9 L0_CADOUT_H9 AD5 HT_CPU_NB_CAD_H9 8
8 HT_NB_CPU_CAD_L9 F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CPU_NB_CAD_L9 8
8 HT_NB_CPU_CAD_H10 G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 HT_CPU_NB_CAD_H10 8
8 HT_NB_CPU_CAD_L10 H5 L0_CADIN_L10 L0_CADOUT_L10 AB3 HT_CPU_NB_CAD_L10 8
8 HT_NB_CPU_CAD_H11 H3 L0_CADIN_H11 L0_CADOUT_H11 AB5 HT_CPU_NB_CAD_H11 8
8 HT_NB_CPU_CAD_L11 H4 L0_CADIN_L11 L0_CADOUT_L11 AA5 HT_CPU_NB_CAD_L11 8
8 HT_NB_CPU_CAD_H12 K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 HT_CPU_NB_CAD_H12 8
8 HT_NB_CPU_CAD_L12 K4 L0_CADIN_L12 L0_CADOUT_L12 W5 HT_CPU_NB_CAD_L12 8
8 HT_NB_CPU_CAD_H13 L5 L0_CADIN_H13 L0_CADOUT_H13 V4 HT_CPU_NB_CAD_H13 8
8 HT_NB_CPU_CAD_L13 M5 L0_CADIN_L13 L0_CADOUT_L13 V3 HT_CPU_NB_CAD_L13 8
8 HT_NB_CPU_CAD_H14 M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CPU_NB_CAD_H14 8
8 HT_NB_CPU_CAD_L14 M4 L0_CADIN_L14 L0_CADOUT_L14 U5 HT_CPU_NB_CAD_L14 8
8 HT_NB_CPU_CAD_H15 N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CPU_NB_CAD_H15 8
8 HT_NB_CPU_CAD_L15 P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CPU_NB_CAD_L15 8

8 HT_NB_CPU_CLK_H0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CPU_NB_CLK_H0 8


8 HT_NB_CPU_CLK_L0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 HT_CPU_NB_CLK_L0 8
8 HT_NB_CPU_CLK_H1 J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 HT_CPU_NB_CLK_H1 8
B B
8 HT_NB_CPU_CLK_L1 K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 HT_CPU_NB_CLK_L1 8

8 HT_NB_CPU_CTL_H0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CPU_NB_CTL_H0 8


8 HT_NB_CPU_CTL_L0 P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 HT_CPU_NB_CTL_L0 8
8 HT_NB_CPU_CTL_H1 P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 HT_CPU_NB_CTL_H1 8
8 HT_NB_CPU_CTL_L1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 HT_CPU_NB_CTL_L1 8

SKT-CPU638P,DANUB
62.10055.111
2ND = 62.10055.251
SKT-BGA638H176

A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_HT_LINK I/F_(1/4)
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 4 of 63
5 4 3 2 1
5 4 3 2 1

ACPU1C
MEM:DATA
16 MEM_MA_DATA0 G12 MA_DATA0 MB_DATA0 C11 MEM_MB_DATA0 17
16 MEM_MA_DATA1 F12 MA_DATA1 MB_DATA1 A11 MEM_MB_DATA1 17
16 MEM_MA_DATA2 H14 MA_DATA2 MB_DATA2 A14 MEM_MB_DATA2 17
16 MEM_MA_DATA3 G14 MA_DATA3 MB_DATA3 B14 MEM_MB_DATA3 17
16 MEM_MA_DATA4 H11 MA_DATA4 MB_DATA4 G11 MEM_MB_DATA4 17
16 MEM_MA_DATA5 H12 MA_DATA5 MB_DATA5 E11 MEM_MB_DATA5 17
16 MEM_MA_DATA6 C13 MA_DATA6 MB_DATA6 D12 MEM_MB_DATA6 17
16 MEM_MA_DATA7 E13 MA_DATA7 MB_DATA7 A13 MEM_MB_DATA7 17
Place near to CPU 16 MEM_MA_DATA8 H15 MA_DATA8 MB_DATA8 A15 MEM_MB_DATA8 17
16 MEM_MA_DATA9 E15 MA_DATA9 MB_DATA9 A16 MEM_MB_DATA9 17
D 4.7u x 4 0.22u X 2 180P x 6 16 MEM_MA_DATA10 E17 MA_DATA10 MB_DATA10 A19 MEM_MB_DATA10 17 D
16 MEM_MA_DATA11 H17 MA_DATA11 MB_DATA11 A20 MEM_MB_DATA11 17
16 MEM_MA_DATA12 E14 MA_DATA12 MB_DATA12 C14 MEM_MB_DATA12 17
1

1
C262 C736 C737 C263 C258 C254 C249 C255 C250 C256
DY C251 C252 F14 D14
16 MEM_MA_DATA13 MA_DATA13 MB_DATA13 MEM_MB_DATA13 17
DY DY DY DY DY 16 MEM_MA_DATA14 C17 MA_DATA14 MB_DATA14 C18 MEM_MB_DATA14 17
SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

SC4D7U6D3V3MX-2GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP
16 MEM_MA_DATA15 G17 D18 MEM_MB_DATA15 17
2

2
MA_DATA15 MB_DATA15
16 MEM_MA_DATA16 G18 MA_DATA16 MB_DATA16 D20 MEM_MB_DATA16 17
16 MEM_MA_DATA17 C19 MA_DATA17 MB_DATA17 A21 MEM_MB_DATA17 17
16 MEM_MA_DATA18 D22 MA_DATA18 MB_DATA18 D24 MEM_MB_DATA18 17
16 MEM_MA_DATA19 E20 MA_DATA19 MB_DATA19 C25 MEM_MB_DATA19 17
16 MEM_MA_DATA20 E18 MA_DATA20 MB_DATA20 B20 MEM_MB_DATA20 17
16 MEM_MA_DATA21 F18 MA_DATA21 MB_DATA21 C20 MEM_MB_DATA21 17
16 MEM_MA_DATA22 B22 MA_DATA22 MB_DATA22 B24 MEM_MB_DATA22 17
16 MEM_MA_DATA23 C23 MA_DATA23 MB_DATA23 C24 MEM_MB_DATA23 17
16 MEM_MA_DATA24 F20 MA_DATA24 MB_DATA24 E23 MEM_MB_DATA24 17
16 MEM_MA_DATA25 F22 MA_DATA25 MB_DATA25 E24 MEM_MB_DATA25 17
16 MEM_MA_DATA26 H24 MA_DATA26 MB_DATA26 G25 MEM_MB_DATA26 17
16 MEM_MA_DATA27 J19 MA_DATA27 MB_DATA27 G26 MEM_MB_DATA27 17
0D9V_S3 16 MEM_MA_DATA28 E21 MA_DATA28 MB_DATA28 C26 MEM_MB_DATA28 17
E22 D26
750 mA 16 MEM_MA_DATA29
H20
MA_DATA29 MB_DATA29
G23
MEM_MB_DATA29 17
CLOSE TO CPU 16 MEM_MA_DATA30
H22
MA_DATA30 MB_DATA30
G24
MEM_MB_DATA30 17
16 MEM_MA_DATA31 MA_DATA31 MB_DATA31 MEM_MB_DATA31 17
1D8V_S3 16 MEM_MA_DATA32 Y24 MA_DATA32 MB_DATA32 AA24 MEM_MB_DATA32 17
ACPU1B AB24 AA23
16 MEM_MA_DATA33 MA_DATA33 MB_DATA33 MEM_MB_DATA33 17
16 MEM_MA_DATA34 AB22 MA_DATA34 MB_DATA34 AD24 MEM_MB_DATA34 17
D10 VTT1 W10 16 MEM_MA_DATA35 AA21 AE24 MEM_MB_DATA35 17
C10 MEM:CMD/CTRL/CLK VTT5 AC10 W22
MA_DATA35 MB_DATA35
AA26
VTT2 VTT6 16 MEM_MA_DATA36 MA_DATA36 MB_DATA36 MEM_MB_DATA36 17

1
B10 AB10 C397 W21 AA25
VTT3 VTT7 16 MEM_MA_DATA37 MA_DATA37 MB_DATA37 MEM_MB_DATA37 17
R381 AD10 AA10 SCD1U10V2KX-4GP Y22 AD26
1D8V_S3 VTT4 VTT8 16 MEM_MA_DATA38 MA_DATA38 MB_DATA38 MEM_MB_DATA38 17
C 39D2R2F-L-GP A10 AA22 AE25 C
16 MEM_MA_DATA39 MEM_MB_DATA39 17

2
MEMZP VTT9 MA_DATA39 MB_DATA39
1 2 AF10 MEMZP VREF_DDR_CLAW 16 MEM_MA_DATA40 Y20 MA_DATA40 MB_DATA40 AC22 MEM_MB_DATA40 17
1 2 MEMZN AE10 Y10 VTT_SENSE 1 TP106TPAD14-GP RN48 AA20 AD22
MEMZN VTT_SENSE 16 MEM_MA_DATA41 MA_DATA41 MB_DATA41 MEM_MB_DATA41 17
R383 1 4 AA18 AE20
16 MEM_MA_DATA42 MA_DATA42 MB_DATA42 MEM_MB_DATA42 17
39D2R2F-L-GPTP111 1 MEM_RSVD_M1 H16 W17 2 3 AB18 AF20
RSVD_M1 MEMVREF 16 MEM_MA_DATA43 MA_DATA43 MB_DATA43 MEM_MB_DATA43 17
16 MEM_MA_DATA44 AB21 MA_DATA44 MB_DATA44 AF24 MEM_MB_DATA44 17
T19 B18 MEM_RSVD_M2 1 TP112 C391 C388 SRN1KJ-7-GP AD21 AF23
16,18 MEM_MA0_ODT0 MA0_ODT0 RSVD_M2 16 MEM_MA_DATA45 MA_DATA45 MB_DATA45 MEM_MB_DATA45 17

1
16,18 MEM_MA0_ODT1 V22 MA0_ODT1 16 MEM_MA_DATA46 AD19 MA_DATA46 MB_DATA46 AC20 MEM_MB_DATA46 17

SC1KP50V2KX-1GP

SCD1U10V2KX-4GP
U21 MA1_ODT0 MB0_ODT0 W26 MEM_MB0_ODT0 17,18 16 MEM_MA_DATA47 Y18 MA_DATA47 MB_DATA47 AD20 MEM_MB_DATA47 17
V19 W23 MEM_MB0_ODT1 17,18 16 MEM_MA_DATA48 AD17 AD18 MEM_MB_DATA48 17

2
MA1_ODT1 MB0_ODT1 MA_DATA48 MB_DATA48
MB1_ODT0 Y26 16 MEM_MA_DATA49 W16 MA_DATA49 MB_DATA49 AE18 MEM_MB_DATA49 17
16,18 MEM_MA0_CS#0 T20 MA0_CS_L0 16 MEM_MA_DATA50 W14 MA_DATA50 MB_DATA50 AC14 MEM_MB_DATA50 17
16,18 MEM_MA0_CS#1 U19 MA0_CS_L1 MB0_CS_L0 V26 MEM_MB0_CS#0 17,18 16 MEM_MA_DATA51 Y14 MA_DATA51 MB_DATA51 AD14 MEM_MB_DATA51 17
U20 MA1_CS_L0 MB0_CS_L1 W25 MEM_MB0_CS#1 17,18 16 MEM_MA_DATA52 Y17 MA_DATA52 MB_DATA52 AF19 MEM_MB_DATA52 17
V20 MA1_CS_L1 MB1_CS_L0 U22 16 MEM_MA_DATA53 AB17 MA_DATA53 MB_DATA53 AC18 MEM_MB_DATA53 17
16 MEM_MA_DATA54 AB15 MA_DATA54 MB_DATA54 AF16 MEM_MB_DATA54 17
16,18 MEM_MA_CKE0 J22 MA_CKE0 MB_CKE0 J25 MEM_MB_CKE0 17,18 16 MEM_MA_DATA55 AD15 MA_DATA55 MB_DATA55 AF15 MEM_MB_DATA55 17
16,18 MEM_MA_CKE1 J20 MA_CKE1 MB_CKE1 H26 MEM_MB_CKE1 17,18 16 MEM_MA_DATA56 AB13 MA_DATA56 MB_DATA56 AF13 MEM_MB_DATA56 17
16 MEM_MA_DATA57 AD13 MA_DATA57 MB_DATA57 AC12 MEM_MB_DATA57 17
N19 MA_CLK_H5 MB_CLK_H5 P22 16 MEM_MA_DATA58 Y12 MA_DATA58 MB_DATA58 AB11 MEM_MB_DATA58 17
N20 MA_CLK_L5 MB_CLK_L5 R22 16 MEM_MA_DATA59 W11 MA_DATA59 MB_DATA59 Y11 MEM_MB_DATA59 17
16 MEM_MA_CLK0_P E16 MA_CLK_H1 MB_CLK_H1 A17 MEM_MB_CLK0_P 17 16 MEM_MA_DATA60 AB14 MA_DATA60 MB_DATA60 AE14 MEM_MB_DATA60 17
16 MEM_MA_CLK0_N F16 MA_CLK_L1 MB_CLK_L1 A18 MEM_MB_CLK0_N 17 16 MEM_MA_DATA61 AA14 MA_DATA61 MB_DATA61 AF14 MEM_MB_DATA61 17
16 MEM_MA_CLK1_P Y16 MA_CLK_H7 MB_CLK_H7 AF18 MEM_MB_CLK1_P 17 16 MEM_MA_DATA62 AB12 MA_DATA62 MB_DATA62 AF11 MEM_MB_DATA62 17
16 MEM_MA_CLK1_N AA16 MA_CLK_L7 MB_CLK_L7 AF17 MEM_MB_CLK1_N 17 16 MEM_MA_DATA63 AA12 MA_DATA63 MB_DATA63 AD11 MEM_MB_DATA63 17
P19 MA_CLK_H4 MB_CLK_H4 R26
P20 MA_CLK_L4 MB_CLK_L4 R25 16 MEM_MA_DM0 E12 MA_DM0 MB_DM0 A12 MEM_MB_DM0 17
16 MEM_MA_DM1 C15 MA_DM1 MB_DM1 B16 MEM_MB_DM1 17
16,18 MEM_MA_ADD0 N21 MA_ADD0 MB_ADD0 P24 MEM_MB_ADD0 17,18 16 MEM_MA_DM2 E19 MA_DM2 MB_DM2 A22 MEM_MB_DM2 17
B B
16,18 MEM_MA_ADD1 M20 MA_ADD1 MB_ADD1 N24 MEM_MB_ADD1 17,18 16 MEM_MA_DM3 F24 MA_DM3 MB_DM3 E25 MEM_MB_DM3 17
16,18 MEM_MA_ADD2 N22 MA_ADD2 MB_ADD2 P26 MEM_MB_ADD2 17,18 16 MEM_MA_DM4 AC24 MA_DM4 MB_DM4 AB26 MEM_MB_DM4 17
16,18 MEM_MA_ADD3 M19 MA_ADD3 MB_ADD3 N23 MEM_MB_ADD3 17,18 16 MEM_MA_DM5 Y19 MA_DM5 MB_DM5 AE22 MEM_MB_DM5 17
16,18 MEM_MA_ADD4 M22 MA_ADD4 MB_ADD4 N26 MEM_MB_ADD4 17,18 16 MEM_MA_DM6 AB16 MA_DM6 MB_DM6 AC16 MEM_MB_DM6 17
16,18 MEM_MA_ADD5 L20 MA_ADD5 MB_ADD5 L23 MEM_MB_ADD5 17,18 16 MEM_MA_DM7 Y13 MA_DM7 MB_DM7 AD12 MEM_MB_DM7 17
16,18 MEM_MA_ADD6 M24 MA_ADD6 MB_ADD6 N25 MEM_MB_ADD6 17,18
16,18 MEM_MA_ADD7 L21 MA_ADD7 MB_ADD7 L24 MEM_MB_ADD7 17,18 16 MEM_MA_DQS0_P G13 MA_DQS_H0 MB_DQS_H0 C12 MEM_MB_DQS0_P 17
16,18 MEM_MA_ADD8 L19 MA_ADD8 MB_ADD8 M26 MEM_MB_ADD8 17,18 16 MEM_MA_DQS0_N H13 MA_DQS_L0 MB_DQS_L0 B12 MEM_MB_DQS0_N 17
16,18 MEM_MA_ADD9 K22 MA_ADD9 MB_ADD9 K26 MEM_MB_ADD9 17,18 16 MEM_MA_DQS1_P G16 MA_DQS_H1 MB_DQS_H1 D16 MEM_MB_DQS1_P 17
16,18 MEM_MA_ADD10 R21 MA_ADD10 MB_ADD10 T26 MEM_MB_ADD10 17,18 16 MEM_MA_DQS1_N G15 MA_DQS_L1 MB_DQS_L1 C16 MEM_MB_DQS1_N 17
16,18 MEM_MA_ADD11 L22 MA_ADD11 MB_ADD11 L26 MEM_MB_ADD11 17,18 16 MEM_MA_DQS2_P C22 MA_DQS_H2 MB_DQS_H2 A24 MEM_MB_DQS2_P 17
16,18 MEM_MA_ADD12 K20 MA_ADD12 MB_ADD12 L25 MEM_MB_ADD12 17,18 16 MEM_MA_DQS2_N C21 MA_DQS_L2 MB_DQS_L2 A23 MEM_MB_DQS2_N 17
16,18 MEM_MA_ADD13 V24 MA_ADD13 MB_ADD13 W24 MEM_MB_ADD13 17,18 16 MEM_MA_DQS3_P G22 MA_DQS_H3 MB_DQS_H3 F26 MEM_MB_DQS3_P 17
16,18 MEM_MA_ADD14 K24 MA_ADD14 MB_ADD14 J23 MEM_MB_ADD14 17,18 16 MEM_MA_DQS3_N G21 MA_DQS_L3 MB_DQS_L3 E26 MEM_MB_DQS3_N 17
16,18 MEM_MA_ADD15 K19 MA_ADD15 MB_ADD15 J24 MEM_MB_ADD15 17,18 16 MEM_MA_DQS4_P AD23 MA_DQS_H4 MB_DQS_H4 AC25 MEM_MB_DQS4_P 17
16 MEM_MA_DQS4_N AC23 MA_DQS_L4 MB_DQS_L4 AC26 MEM_MB_DQS4_N 17
16,18 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 17,18 16 MEM_MA_DQS5_P AB19 MA_DQS_H5 MB_DQS_H5 AF21 MEM_MB_DQS5_P 17
16,18 MEM_MA_BANK1 R23 MA_BANK1 MB_BANK1 U26 MEM_MB_BANK1 17,18 16 MEM_MA_DQS5_N AB20 MA_DQS_L5 MB_DQS_L5 AF22 MEM_MB_DQS5_N 17
16,18 MEM_MA_BANK2 J21 MA_BANK2 MB_BANK2 J26 MEM_MB_BANK2 17,18 16 MEM_MA_DQS6_P Y15 MA_DQS_H6 MB_DQS_H6 AE16 MEM_MB_DQS6_P 17
16 MEM_MA_DQS6_N W15 MA_DQS_L6 MB_DQS_L6 AD16 MEM_MB_DQS6_N 17
16,18 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 17,18 16 MEM_MA_DQS7_P W12 MA_DQS_H7 MB_DQS_H7 AF12 MEM_MB_DQS7_P 17
16,18 MEM_MA_CAS# T22 MA_CAS_L MB_CAS_L U24 MEM_MB_CAS# 17,18 16 MEM_MA_DQS7_N W13 MA_DQS_L7 MB_DQS_L7 AE12 MEM_MB_DQS7_N 17
16,18 MEM_MA_W E# T24 MA_WE_L MB_WE_L U23 MEM_MB_W E# 17,18
SKT-CPU638P,DANUB
SKT-CPU638P,DANUB

62.10055.111
A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_DDR_(2/4)
Size Document Number Rev
A3 -1
JV50-TR8
Date: Monday, October 26, 2009 Sheet 5 of 63
5 4 3 2 1
5 4 3 2 1

The Processor has


1D8V_S0 reached a preset
maximum operating
temperature. 100

8
7
6
5
RN40
1DY 2
IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491
LYAOUT:ROUTE VDDA TRACE APPROX. I=Active HTC
SRN300J-1-GP C196 50mils WIDE(USE 2X25 mil TRACES TO O=FAN
-1 SC100P50V2JN-3GP 2D5V_S0 2D5V_VDDA_S0 EXIT BALL FIELD) AND 500 mils LONG.

1
2
3
4
D 11,52 CPU_LDT_RST# 1 R78 2 LDT_RST#_CPU 9 1 R401 2 D
0R0402-PAD 0R0603-PAD

1
1 R86 2 LDT_PW ROK C739 C745 C227 C752 C264 1D8V_S0
11,52 CPU_PW RGD 1D8V_S3

SC10U10V5ZY-1GP

SC4D7U10V5ZY-3GP

SC3300P50V2KX-1GP

SC10U10V5ZY-1GP

SCD22U16V3ZY-GP
0R0402-PAD DY DY DY 1D8V_S3
11 CPU_LDT_STOP# 1 R79 2

2
0R0402-PAD LDT_STP#_CPU 9

1
1 2 CPU_LDT_REQ#_CPU R1205
9 ALLOW _LDTSTOP

1
R72 0R2J-2-GP R1204

8
7
6
5

1
1KR2J-1-GP
DY DY R1203
ACPU1D

1KR2J-1-GP
1KR2J-1-GP R366
for TR 300R2J-4-GP
DY

2
1D8V_S3 Cloce To CPU F8 M11 RN84

2
VDDA1 KEY1 SRN300J-1-GP
F9 W18

2
VDDA2 KEY2
1 2

1
2
3
4
1 2 R386 169R2F-GP CLKCPU_IN A9 A6
2 3 CPU_CLK CLKIN_H SVC CPU_SVC 45
C7341 2SC3900P50V2KX-2GP CLKCPU#_IN A8 A4
3 CPU_CLK# CLKIN_L SVD CPU_SVD 45
R364 C732 SC3900P50V2KX-2GP
390R2J-1-GP LDT_RST#_CPU B7
LDT_PW ROK RESET_L CPU_DBREQ#
A7 PWROK
LDT_STP#_CPU F10 AF6 THERMTRIP#
1

HDT_RST# CPU_LDT_REQ#_CPU LDTSTOP_L THERMTRIP_L PROCHOT#


1 2 C6 LDTREQ_L PROCHOT_L AC7 1 R67 2 PROCHOT#_SB 11
CPU_SIC R74 AA8 CPU_MEMHOT# 0R0402-PAD
0R0402-PAD TPAD14-GP MEMHOT_L
For HDT DBG TP186 1 CPU_SIC AF4 SIC internal pull high 300 ohm
TPAD14-GP TP185 1 CPU_SID AF5
TPAD14-GP SID
1D2V_S0 TP87 1CPU_ALERT# AE6 ALERT_L THERMDC W7 H_THERMDC 35
1D8V_S3 W8
CPU_HTREF0 R6 THERMDA H_THERMDA 35
DY 1 2 HT_REF0 1 2
R84 1 2 44D2R2F-GP CPU_HTREF1 P6 DY C213SC3300P50V2KX-1GP
HT_REF1
1 R616 2CPU_TEST25_H R83 44D2R2F-GP
C 510R2J-1-GP R110 10R0402-PAD
2CPU_VDD0_RUN_FB_H_RF6 W9 CPU_VDDIO_SUS_FB_H 1 TP99
C
45 CPU_VDD0_RUN_FB_H VDD0_FB_H VDDIO_FB_H
R108 10R0402-PAD
2CPU_VDD0_RUN_FB_L_R E6 Y9 CPU_VDDIO_SUS_FB_L 1 TP100
45 CPU_VDD0_RUN_FB_L VDD0_FB_L VDDIO_FB_L
1 R617 2CPU_TEST25_L
510R2J-1-GP R104 10R0402-PAD
2CPU_VDD1_RUN_FB_H_RY6 H6
45 CPU_VDD1_RUN_FB_H VDD1_FB_H VDDNB_FB_H CPU_VDDNB_RUN_FB_H 45
DY R105 10R0402-PAD
2CPU_VDD1_RUN_FB_L_R
AB6 G6
45 CPU_VDD1_RUN_FB_L VDD1_FB_L VDDNB_FB_L CPU_VDDNB_RUN_FB_L 45
CPU_DBRDY
CPU_TMS
G10
AA9
DBRDY
E10 CPU_DBREQ#
LAYOUT: Route FBCLKOUT_H/L
CPU_TCK TMS DBREQ_L
CPU_TRST#
AC9
AD9
TCK
AE9 CPU_TDO
differentially impedance 80
1D8V_S3 CPU_TDI TRST_L TDO
AF9 TDI
R614 TP93 1 CPU_TEST23 AD7 J7 CPU_TEST28_H 1 TP92
TEST23 TEST28_H 1D2V_S0
for TR 1 2CPU_TEST25_L TEST28_L H8 CPU_TEST28_L 1 TP98
510R2J-1-GP CPU_TEST18 H10
CPU_TEST19 TEST18 CPU_TEST17
G9 TEST19 TEST17 D7 1 TP89 DY

2
1 2CPU_TEST25_H TEST16 E7 CPU_TEST16 1 TP90
510R2J-1-GP TP105 1CPU_TEST25_H E9 F7 CPU_TEST15 1 TP91 R610
R615 TP103 TEST25_H TEST15
1CPU_TEST25_L E8 TEST25_L TEST14 C7 CPU_TEST14 1 TP88 300R2J-4-GP

TP104 1 CPU_TEST21 CPU_TEST21 AB8 C3

1
TP97 CPU_TEST20 CPU_TEST20 TEST21 TEST7 CPU_TEST10
1 AF7 TEST20 TEST10 K8
TP94 1 CPU_TEST24 AE7
1D8V_S3 CPU_TEST22 TEST24
AE8 TEST22 TEST8 C4
TP95 1 CPU_TEST12 AC8
3D3V_S0 TP187 CPU_TEST27 TEST12
1 AF8 TEST27
1

C9 CPU_TEST29H 1 TP101
TEST29_H
8
7
6
R81 5 1 R77 2 CPU_TEST9 C2 TEST9 TEST29_L C8 CPU_TEST29L 1 TP102
1

B R101
DY 2K2R2J-2-GP RN42
SRN300J-1-GP
0R0402-PAD AA6 TEST6 B
10KR2J-3-GP DY A3 H18
B 2

LDT_PW ROK_G RSVD1 RSVD10


A5 RSVD2 RSVD9 H19
DY B3 AA7
2

1
2
3
4

Q8 RSVD3 RSVD8
B5 D5
45 CPU_PW RGD_SVID_REG C
MMBT3904-4-GP
E LDT_PW ROK C1
RSVD4
RSVD5
RSVD7
RSVD6 C5 HDT Connectors
SKT-CPU638P,DANUB
1

C205 DY HDT1
SCD1U16V2ZY-2GP 1 2
-1_20091021 DY
2

Near CPU PIN 3 4


5 6
CPU_DBREQ# 7 8
CPU_DBRDY 9 10
CPU_PW RGD_SVID_REG 1 R375 2 LDT_PW ROK 1 2 LDT_PW ROK_R CPU_TCK 11 12
0R0402-PAD R1314 0R2J-2-GP CPU_TMS 13 14
DY CPU_TEST18 CPU_TEST19 CPU_TEST22 CPU_TDI 15 16
CPU_TRST# 17 18

2
LDT_PW ROK_R CPU_TDO 19 20
9,11,26,33,36,55 PLT_RST1#
R612 R611 R613 21 22
300R2J-4-GP 300R2J-4-GP 300R2J-4-GP 1D8V_S3 23 24
1

C723 DY DY DY 26
R1312 SC1U10V3KX-3GP 1

1
17K8R2F-GP SMC-CONN26A-FP
1 2 HDT_RST#
2

A LDT_PW ROK_R Q24 DY JV50-TR8 A


MMBT3904-4-GP
B
1

R1313 Wistron Corporation


20KR2F-L-GP THERMTRIP# E C 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
RSMRST# 35,36 Taipei Hsien 221, Taiwan, R.O.C.
84.T3904.C11
2

2ND = 84.03904.L06 Title


CPU_Control&Debug_(3/4)
CPU exceeds to 125 Size Document Number Rev
A3 -1
JV50-TR8
Date: Monday, October 26, 2009 Sheet 6 of 63
5 4 3 2 1
5 4 3 2 1

ACPU1F VCC_CORE_S0_0 36A for VDD0&VDD1


ACPU1E VCC_CORE_S0_1
AA4 VSS1 VSS66 J6
AA11 VSS2 VSS67 J8 Bottom Side Decoupling Bottom Side Decoupling
AA13 VSS3 VSS68 J10 G4 VDD0_1 VDD1_1 P8
AA15 VSS4 VSS69 J12 H2 VDD0_2 VDD1_2 P10
AA17 VSS5 VSS70 J14 J9 VDD0_3 VDD1_3 R4
D AA19 VSS6 VSS71 J16 J11 VDD0_4 VDD1_4 R7 D
AB2 VSS7 VSS72 J18 J13 VDD0_5 VDD1_5 R9
AB7 K2 C239 C281 C286 C295 C206 C244 C315 J15 R11 C193 C154 C308 C280 C253 C293 C312
VSS8 VSS73 VDD0_6 VDD1_6

1
AB9 VSS9 VSS74 K7 K6 VDD0_7 VDD1_7 T2
AB23 VSS10 VSS75 K9 DY DY K10 VDD0_8 VDD1_8 T6 DY DY
AB25 K11 K12 T8

2
VSS11 VSS76 VDD0_9 VDD1_9
AC11 VSS12 VSS77 K13 K14 VDD0_10 VDD1_10 T10

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD22U6D3V2KX-1GP

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
AC13 VSS13 VSS78 K15 L4 VDD0_11 VDD1_11 T12
AC15 VSS14 VSS79 K17 L7 VDD0_12 VDD1_12 T14
AC17 VSS15 VSS80 L6 L9 VDD0_13 VDD1_13 U7
AC19 VSS16 VSS81 L8 L11 VDD0_14 VDD1_14 U9
AC21 VSS17 VSS82 L10 L13 VDD0_15 VDD1_15 U11
AD6 VSS18 VSS83 L12 L15 VDD0_16 VDD1_16 U13
AD8 VSS19 VSS84 L14 M2 VDD0_17 VDD1_17 U15
AD25 VSS20 VSS85 L16 M6 VDD0_18 VDD1_18 V6
AE11 VSS21 VSS86 L18 M8 VDD0_19 VDD1_19 V8
AE13 VSS22 VSS87 M7 M10 VDD0_20 VDD1_20 V10
AE15 VSS23 VSS88 M9 N7 VDD0_21 VDD1_21 V12
AE17 VSS24 VSS89 AC6 N9 VDD0_22 VDD1_22 V14
AE19 VSS25 VSS90 M17 N11 VDD0_23 VDD1_23 W4
AE21 N4 VDDNB Y2
AE23
VSS26 VSS91
N8 add 0.1U 3A for VDDNB K16
VDD1_24
AC4
B4
VSS27 VSS92
N10 M16
VDDNB_1 VDD1_25
AD2
3A for VDDIO
VSS28 VSS93 VDDNB_2 VDD1_26 1D8V_S3
B6 VSS29 VSS94 N16 P16 VDDNB_3 Place near to CPU
B8 N18 C316 C324 C808 T16 Y25
VSS30 VSS95 VDDNB_4 VDDIO27
1

1
B9 VSS31 VSS96 P2 V16 VDDNB_5 VDDIO26 V25
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
B11 VSS32 VSS97 P7 DY VDDIO25 V23
B13 P9 H25 V21
2

2
VSS33 VSS98 VDDIO1 VDDIO24 C351 C362 C385 C379 C375 C365 C358 C361 C347 C363 C378
B15 VSS34 VSS99 P11 J17 VDDIO2 VDDIO23 V18
C B17 P17 K18 U17 C
VSS35 VSS100 VDDIO3 VDDIO22

1
B19 VSS36 VSS101 R8 K21 VDDIO4 VDDIO21 T25 DY DY DY
B21 VSS37 VSS102 R10 K23 VDDIO5 VDDIO20 T23 DY DY DY DY
B23 R16 K25 T21

2
VSS38 VSS103 VDDIO6 VDDIO19
B25 VSS39 VSS104 R18 L17 VDDIO7 VDDIO18 T18

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SC4D7U6D3V3MX-2GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP
D6 VSS40 VSS105 T7 M18 VDDIO8 VDDIO17 R17 -1
D8 T9 M21 P25
D9
VSS41 VSS106
T11
3A for VDDIO M23
VDDIO9 VDDIO16
P23
VSS42 VSS107 1D8V_S3 VDDIO10 VDDIO15
D11 VSS43 VSS108 T13 M25 VDDIO11 VDDIO14 P21
D13 VSS44 VSS109 T15 Bottom Side Decoupling N17 VDDIO12 VDDIO13 P18
D15 VSS45 VSS110 T17
D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6 SKT-CPU638P,DANUB
D21 VSS48 VSS113 U8
D23 U10 C392 C398 C381 C356 C372 C349
VSS49 VSS114
1

D25 VSS50 VSS115 U12


E4 VSS51 VSS116 U14 DY DY DY DY
F2 U16
2

VSS52 VSS117
F11 VSS53 VSS118 U18
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD22U6D3V2KX-1GP

SCD22U6D3V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

F13 VSS54 VSS119 V2


F15 VSS55 VSS120 V7
F17 VSS56 VSS121 V9
F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
F23 VSS59 VSS124 V15
F25 VSS60 VSS125 V17
H7 VSS61 VSS126 W6
H9 VSS62 VSS127 Y21
H21 VSS63 VSS128 Y23
B B
H23 VSS64 VSS129 N6
J4 VSS65
SKT-CPU638P,DANUB

A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU_Power_(4/4)
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 05, 2009 Sheet 7 of 63
5 4 3 2 1
5 4 3 2 1

ANB1A
4 HT_CPU_NB_CAD_H0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_NB_CPU_CAD_H0 4
4 HT_CPU_NB_CAD_L0 Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25 HT_NB_CPU_CAD_L0 4
4 HT_CPU_NB_CAD_H1 V22 HT_RXCAD1P HT_TXCAD1P E24 HT_NB_CPU_CAD_H1 4
4 HT_CPU_NB_CAD_L1 V23 HT_RXCAD1N HT_TXCAD1N E25 HT_NB_CPU_CAD_L1 4
4 HT_CPU_NB_CAD_H2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_NB_CPU_CAD_H2 4
4 HT_CPU_NB_CAD_L2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_NB_CPU_CAD_L2 4
4 HT_CPU_NB_CAD_H3 U24 HT_RXCAD3P HT_TXCAD3P F23 HT_NB_CPU_CAD_H3 4
4 HT_CPU_NB_CAD_L3 U25 HT_RXCAD3N HT_TXCAD3N F22 HT_NB_CPU_CAD_L3 4
4 HT_CPU_NB_CAD_H4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_NB_CPU_CAD_H4 4
4 HT_CPU_NB_CAD_L4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_NB_CPU_CAD_L4 4
P22 J25

HYPER TRANSPORT CPU I/F


4 HT_CPU_NB_CAD_H5 HT_RXCAD5P HT_TXCAD5P HT_NB_CPU_CAD_H5 4
4 HT_CPU_NB_CAD_L5 P23 HT_RXCAD5N HT_TXCAD5N J24 HT_NB_CPU_CAD_L5 4
D 4 HT_CPU_NB_CAD_H6 P25 HT_RXCAD6P HT_TXCAD6P K24 HT_NB_CPU_CAD_H6 4 D
4 HT_CPU_NB_CAD_L6 P24 HT_RXCAD6N HT_TXCAD6N K25 HT_NB_CPU_CAD_L6 4
4 HT_CPU_NB_CAD_H7 N24 HT_RXCAD7P HT_TXCAD7P K23 HT_NB_CPU_CAD_H7 4
4 HT_CPU_NB_CAD_L7 N25 HT_RXCAD7N HT_TXCAD7N K22 HT_NB_CPU_CAD_L7 4

4 HT_CPU_NB_CAD_H8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_NB_CPU_CAD_H8 4


4 HT_CPU_NB_CAD_L8 AC25 HT_RXCAD8N HT_TXCAD8N G21 HT_NB_CPU_CAD_L8 4
4 HT_CPU_NB_CAD_H9 AB25 HT_RXCAD9P HT_TXCAD9P G20 HT_NB_CPU_CAD_H9 4
4 HT_CPU_NB_CAD_L9 AB24 HT_RXCAD9N HT_TXCAD9N H21 HT_NB_CPU_CAD_L9 4
4 HT_CPU_NB_CAD_H10 AA24 HT_RXCAD10P HT_TXCAD10P J20 HT_NB_CPU_CAD_H10 4
4 HT_CPU_NB_CAD_L10 AA25 HT_RXCAD10N HT_TXCAD10N J21 HT_NB_CPU_CAD_L10 4
4 HT_CPU_NB_CAD_H11 Y22 HT_RXCAD11P HT_TXCAD11P J18 HT_NB_CPU_CAD_H11 4
4 HT_CPU_NB_CAD_L11 Y23 HT_RXCAD11N HT_TXCAD11N K17 HT_NB_CPU_CAD_L11 4
4 HT_CPU_NB_CAD_H12 W21 HT_RXCAD12P HT_TXCAD12P L19 HT_NB_CPU_CAD_H12 4
4 HT_CPU_NB_CAD_L12 W20 HT_RXCAD12N HT_TXCAD12N J19 HT_NB_CPU_CAD_L12 4
4 HT_CPU_NB_CAD_H13 V21 HT_RXCAD13P HT_TXCAD13P M19 HT_NB_CPU_CAD_H13 4
4 HT_CPU_NB_CAD_L13 V20 HT_RXCAD13N HT_TXCAD13N L18 HT_NB_CPU_CAD_L13 4
4 HT_CPU_NB_CAD_H14 U20 HT_RXCAD14P HT_TXCAD14P M21 HT_NB_CPU_CAD_H14 4
4 HT_CPU_NB_CAD_L14 U21 HT_RXCAD14N HT_TXCAD14N P21 HT_NB_CPU_CAD_L14 4
4 HT_CPU_NB_CAD_H15 U19 HT_RXCAD15P HT_TXCAD15P P18 HT_NB_CPU_CAD_H15 4
4 HT_CPU_NB_CAD_L15 U18 HT_RXCAD15N HT_TXCAD15N M18 HT_NB_CPU_CAD_L15 4

4 HT_CPU_NB_CLK_H0 T22 HT_RXCLK0P HT_TXCLK0P H24 HT_NB_CPU_CLK_H0 4


4 HT_CPU_NB_CLK_L0 T23 HT_RXCLK0N HT_TXCLK0N H25 HT_NB_CPU_CLK_L0 4
4 HT_CPU_NB_CLK_H1 AB23 HT_RXCLK1P HT_TXCLK1P L21 HT_NB_CPU_CLK_H1 4
4 HT_CPU_NB_CLK_L1 AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_NB_CPU_CLK_L1 4

4 HT_CPU_NB_CTL_H0 M22 HT_RXCTL0P HT_TXCTL0P M24 HT_NB_CPU_CTL_H0 4


4 HT_CPU_NB_CTL_L0 M23 HT_RXCTL0N HT_TXCTL0N M25 HT_NB_CPU_CTL_L0 4
C R21 P19 C
4 HT_CPU_NB_CTL_H1
R20
HT_RXCTL1P HT_TXCTL1P
R18
HT_NB_CPU_CTL_H1 4 Placement: close RS780
4 HT_CPU_NB_CTL_L1 HT_RXCTL1N HT_TXCTL1N HT_NB_CPU_CTL_L1 4
1 2 R344 HT_RXCALP C23 HT_RXCALP HT_TXCALP B24 HT_TXCALP 1 2 R343
301R2F-GP HT_RXCALN A24 B25 HT_TXCALN 301R2F-GP
HT_RXCALN HT_TXCALN
Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24
RS780M-GP-U2
Placement: close RS780
ANB1B
PEG_RXP0 D4 A5 GTXP0 DIS 1 2 C617 SCD1U16V2KX-3GP PEG_TXP0
PEG_RXN0 GFX_RX0P GFX_TX0P GTXN0 C616 SCD1U16V2KX-3GP PEG_TXN0
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5 DIS 1 2
PEG_RXP1 A3 A4 GTXP1 DIS 1 2 C592 SCD1U16V2KX-3GP PEG_TXP1
PEG_RXN1 GFX_RX1P GFX_TX1P GTXN1 C593 SCD1U16V2KX-3GP PEG_TXN1 PEG_TXP[15..0] 55
B3 GFX_RX1N GFX_TX1N B4 DIS 1 2 PEG_TXN[15..0] 55
PEG_RXP2 C2 C3 GTXP2 DIS 1 2 C614 SCD1U16V2KX-3GP PEG_TXP2
PEG_RXN2 GFX_RX2P GFX_TX2P GTXN2 C615 SCD1U16V2KX-3GP PEG_TXN2
C1 GFX_RX2N GFX_TX2N B2 DIS 1 2
PEG_RXP3 E5 D1 GTXP3 DIS 1 2 C591 SCD1U16V2KX-3GP PEG_TXP3
PEG_RXN3 GFX_RX3P GFX_TX3P GTXN3 C590 SCD1U16V2KX-3GP PEG_TXN3
F5 GFX_RX3N GFX_TX3N D2 DIS 1 2 RS780M Display Port Support(muxed on GFX)
PEG_RXP4 G5 E2 GTXP4 DIS 1 2 C613 SCD1U16V2KX-3GP PEG_TXP4
PEG_RXN4 GFX_RX4P GFX_TX4P GTXN4 C612 SCD1U16V2KX-3GP PEG_TXN4
G6 GFX_RX4N GFX_TX4N E1 DIS 1 2 DP0 GFX_TX0,TX1,TX2,TX3,AUX0,HPD0
PEG_RXP5 H5 F4 GTXP5 DIS 1 2 C589 SCD1U16V2KX-3GP PEG_TXP5
PEG_RXN5 GFX_RX5P GFX_TX5P GTXN5 C588 SCD1U16V2KX-3GP PEG_TXN5
H6 GFX_RX5N GFX_TX5N F3 DIS 1 2 DP1 GFX_TX4,TX5,TX6,TX7,AUX1,HPD1
PEG_RXP6 J6 F1 GTXP6 DIS 1 2 C611 SCD1U16V2KX-3GP PEG_TXP6
PEG_RXN6 GFX_RX6P GFX_TX6P GTXN6 C610 SCD1U16V2KX-3GP PEG_TXN6
55 PEG_RXN[15..0] J5 GFX_RX6N GFX_TX6N F2 DIS 1 2
PEG_RXP7 J7 H4 GTXP7 DIS 1 2 C587 SCD1U16V2KX-3GP PEG_TXP7
PEG_RXN7 GFX_RX7P GFX_TX7P GTXN7 C586 SCD1U16V2KX-3GP PEG_TXN7 GTXP0 C30 SCD1U16V2KX-3GP
55 PEG_RXP[15..0] J8 GFX_RX7N GFX_TX7N H3 DIS 1 2 UMA 1 2 HDMI_DATA2+ 21
PEG_RXP8 L5 H1 GTXP8 DIS 1 2 C609 SCD1U16V2KX-3GP PEG_TXP8 GTXN0 UMA C29 1 2 SCD1U16V2KX-3GP HDMI_DATA2- 21
PEG_RXN8 GFX_RX8P GFX_TX8P GTXN8 C608 SCD1U16V2KX-3GP PEG_TXN8 GTXP1 C27 SCD1U16V2KX-3GP
L6 GFX_RX8N GFX_TX8N H2 DIS 1 2
for TR UMA 1 2 HDMI_DATA1+ 21
PEG_RXP9 M8 J2 GTXP9 DIS 1 2 C585 SCD1U16V2KX-3GP PEG_TXP9 GTXN1 UMA C26 1 2 SCD1U16V2KX-3GP HDMI_DATA1- 21
B PEG_RXN9 GFX_RX9P GFX_TX9P GTXN9 C584 SCD1U16V2KX-3GP PEG_TXN9 GTXP2 C25 SCD1U16V2KX-3GP B
L8 GFX_RX9N GFX_TX9N J1 DIS 1 2 UMA 1 2 HDMI_DATA0+ 21
PEG_RXP10 P7 K4 GTXP10 DIS 1 2 C607 SCD1U16V2KX-3GP PEG_TXP10 GTXN2 UMA C22 1 2 SCD1U16V2KX-3GP
PCIE I/F GFX

GFX_RX10P GFX_TX10P HDMI_DATA0- 21


PEG_RXN10 M7 K3 GTXN10 DIS 1 2 C606 SCD1U16V2KX-3GP PEG_TXN10 GTXP3 UMA C21 1 2 SCD1U16V2KX-3GP HDMI_CLK+ 21
PEG_RXP11 GFX_RX10N GFX_TX10N GTXP11 C583 SCD1U16V2KX-3GP PEG_TXP11 GTXN3 C19 SCD1U16V2KX-3GP
P5 GFX_RX11P GFX_TX11P K1 DIS 1 2 UMA 1 2 HDMI_CLK- 21
PEG_RXN11 M5 K2 GTXN11 DIS 1 2 C582 SCD1U16V2KX-3GP PEG_TXN11
PEG_RXP12 GFX_RX11N GFX_TX11N GTXP12 C605 SCD1U16V2KX-3GP PEG_TXP12
R8 GFX_RX12P GFX_TX12P M4 DIS 1 2
PEG_RXN12 P8 M3 GTXN12 DIS 1 2 C604 SCD1U16V2KX-3GP PEG_TXN12
PEG_RXP13 GFX_RX12N GFX_TX12N GTXP13 C581 SCD1U16V2KX-3GP PEG_TXP13
R6 GFX_RX13P GFX_TX13P M1 DIS 1 2
PEG_RXN13 R5 M2 GTXN13 DIS 1 2 C580 SCD1U16V2KX-3GP PEG_TXN13
PEG_RXP14 GFX_RX13N GFX_TX13N GTXP14 C602 SCD1U16V2KX-3GP PEG_TXP14
P4 GFX_RX14P GFX_TX14P N2 DIS 1 2
PEG_RXN14 P3 N1 GTXN14 DIS 1 2 C603 SCD1U16V2KX-3GP PEG_TXN14
PEG_RXP15 GFX_RX14N GFX_TX14N GTXP15 C579 SCD1U16V2KX-3GP PEG_TXP15
T4 GFX_RX15P GFX_TX15P P1 DIS 1 2
PEG_RXN15 T3 P2 GTXN15 DIS 1 2 C578 SCD1U16V2KX-3GP PEG_TXN15
GFX_RX15N GFX_TX15N
AE3 AC1 TXP0 C621 1 2 SCD1U16V2KX-3GP
26 PCIE_RXP1
AD4
GPP_RX0P GPP_TX0P
AC2 TXN0 C622 1 2 SCD1U16V2KX-3GP
PCIE_TXP1 26 LAN
LAN 26 PCIE_RXN1
AE2
GPP_RX0N GPP_TX0N
AB4 TXP1 C597 1 2 SCD1U16V2KX-3GP
PCIE_TXN1 26
33 PCIE_RXP2
AD3
GPP_RX1P GPP_TX1P
AB3 TXN1 C596 1 2 SCD1U16V2KX-3GP
PCIE_TXP2 33 MINICARD1
MINICARD1 33 PCIE_RXN2
AD1
GPP_RX1N GPP_TX1N
AA2 TXP3 C599 1 2 SCD1U16V2KX-3GP
PCIE_TXN2 33
33 PCIE_RXP3 GPP_RX2P GPP_TX2P PCIE_TXP3 33
AD2 PCIE I/F GPP AA1 TXN3 C598 1 2 SCD1U16V2KX-3GP
MINICARD2 33 PCIE_RXN3
V5
GPP_RX2N GPP_TX2N
Y1 TXP5 C600 1 2 SCD1U16V2KX-3GP
PCIE_TXN3 33 MINICARD2
34 PCIE_RXP5 GPP_RX3P GPP_TX3P PCIE_TXP5 34
W6 Y2 TXN5 C601 1 2 SCD1U16V2KX-3GP
NEW CARD 34 PCIE_RXN5
U5
GPP_RX3N GPP_TX3N
Y4
PCIE_TXN5 34 NEW CARD
GPP_RX4P GPP_TX4P
U6 GPP_RX4N GPP_TX4N Y3
TPAD14-GP GPP_RX5P U8 V1 GPP_TX5P
TP21 GPP_RX5P GPP_TX5P TP16 TPAD14-GP
TPAD14-GP GPP_RX5N U7 V2 GPP_TX5N
TP20 GPP_RX5N GPP_TX5N TP17 TPAD14-GP

11 ALINK_NBRX_SBTX_P0 AA8 AD7 ALINK_NBTX_SBRX_P0 C642 1 2 SCD1U16V2KX-3GP


SB_RX0P SB_TX0P ALINK_NBTX_C_SBRX_P0 11
A 11 ALINK_NBRX_SBTX_N0 Y8 AE7 ALINK_NBTX_SBRX_N0 C640 1 2 SCD1U16V2KX-3GP JV50-TR8 A
SB_RX0N SB_TX0N ALINK_NBTX_C_SBRX_N0 11
11 ALINK_NBRX_SBTX_P1 AA7 AE6 ALINK_NBTX_SBRX_P1 C632 1 2 SCD1U16V2KX-3GP
SB_RX1P SB_TX1P ALINK_NBTX_C_SBRX_P1 11
Y7 AD6 ALINK_NBTX_SBRX_N1 C637 1 2 SCD1U16V2KX-3GP
A-LINK 11 ALINK_NBRX_SBTX_N1 SB_RX1N
PCIE I/F SB
SB_TX1N ALINK_NBTX_SBRX_P2 C627 SCD1U16V2KX-3GP
ALINK_NBTX_C_SBRX_N1 11
11
11
ALINK_NBRX_SBTX_P2
ALINK_NBRX_SBTX_N2
AA5
AA6
SB_RX2P
SB_RX2N
SB_TX2P
SB_TX2N
AB6
AC6 ALINK_NBTX_SBRX_N2 C629
1
1
2
2 SCD1U16V2KX-3GP
ALINK_NBTX_C_SBRX_P2
ALINK_NBTX_C_SBRX_N2
11
11
Wistron Corporation
W5 AD5 ALINK_NBTX_SBRX_P3 C624 1 2 SCD1U16V2KX-3GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
11 ALINK_NBRX_SBTX_P3 SB_RX3P SB_TX3P ALINK_NBTX_C_SBRX_P3 11
Y5 AE5 ALINK_NBTX_SBRX_N3 C625 1 2 SCD1U16V2KX-3GP Taipei Hsien 221, Taiwan, R.O.C.
11 ALINK_NBRX_SBTX_N3 SB_RX3N SB_TX3N ALINK_NBTX_C_SBRX_N3 11
AC8 PCE_PCAL 1 2 Title
PCE_CALRP
PCE_CALRN AB8 PCE_NCAL R315 1 2 1K27R2F-L-GP 1D1V_S0
ATi-RS880M_HT LINK&PCIe(1/3)
R16 2KR2F-3-GP
Size Document Number Rev
RS780M-GP-U2 A3
Place < 100mils from pin AC8 and AB8
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 8 of 63
5 4 3 2 1
5 4 3 2 1

3D3V_S0 3D3V_S0
L3
220ohm 200mA STRAP_DEBUG_BUS_GPIO_ENABLEb
1 2 3D3V_S0_AVDD
SBK160808T-221Y-N-GP Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#)

1
1
1ST 68.00217.711 C70
2ND = 68.00119.111 DYSCD1U10V2KX-4GP R563 R562
3K3R3J-L-GP
*1 :Disable 0 : Enable
C71 3K3R3J-L-GP

2
SC1U10V2KX-1GP RS780: Enables Side port memory ( RS780 use HSYNC#)

2
2
R21 0R2J-2-GP
1 DY 2 1D8V_S0 GMCH_VSYNC
*1 :Disable 0 : Enable
6 LDT_RST#_CPU
GMCH_HSYNC
D
11,26,33,36,55 PLT_RST1# 1 R17 2 SYSREST# 1 R41 2 1D8V_S0_AVDDDI D
0R0402-PAD 0R0603-PAD SUS_STAT#

1
C88 C89 Selects Loading of STRAPS From EEPROM

1
SC1U10V2KX-1GP SCD1U10V2KX-4GP
-1 C37 1ST 68.00217.711 *10 :: Bypass the loading of EEPROM straps and use Hardware Default Values

2
SC220P50V2KX-3GP 1D8V_S0 I2C Master can load strap values from EEPROM if connected,
2ND = 68.00119.111

2
or use default values if not connected
1 2 ANB1C
R43

1
SBK160808T-221Y-N-GP C99 F12 A22 GMCH_TXAOUT0+ 19
AVDD1 TXOUT_L0P

1
Close to NB ball TC2 220ohm 200mA C80 SCD1U10V2KX-4GP E12 PART 3 OF 6 B22 GMCH_TXAOUT0- 19
AVDD2 TXOUT_L0N

ST100U6D3VBM-5GP
DY SC1U10V2KX-1GP F14 A21 GMCH_TXAOUT1+ 19

2
AVDDDI TXOUT_L1P
G15 B21 GMCH_TXAOUT1- 19

2
GMCH_BLUE 1D8V_S0_AVDDQ AVSSDI TXOUT_L1N
H15 AVDDQ TXOUT_L2P B20 GMCH_TXAOUT2+ 19
H14 AVSSQ TXOUT_L2N A20 GMCH_TXAOUT2- 19
GMCH_GREEN A19
TXOUT_L3P
E17 C_Pr TXOUT_L3N B19
GMCH_RED F17 Y
F15 B18 GMCH_TXBOUT0+ 19

CRT/TVOUT
COMP_Pb TXOUT_U0P
1

R36 R37 R38 A18 GMCH_TXBOUT0- 19


TXOUT_U0N
20 GMCH_RED G18 RED TXOUT_U1P A17 GMCH_TXBOUT1+ 19
150R2F-1-GP

150R2F-1-GP

140R2F-GP

G17 REDb TXOUT_U1N B17 GMCH_TXBOUT1- 19


20 GMCH_GREEN E18 GREEN TXOUT_U2P D20 GMCH_TXBOUT2+ 19
F18 D21 GMCH_TXBOUT2- 19
2

1D8V_S0 GREENb TXOUT_U2N


20 GMCH_BLUE E19 BLUE TXOUT_U3P D18
for TR F19 BLUEb TXOUT_U3N D19
1

SB 20 GMCH_HSYNC A11 DAC_HSYNC TXCLK_LP B16 GMCH_TXACLK+ 19


R609 B11 A16 GMCH_TXACLK- 19
20 GMCH_VSYNC DAC_VSYNC TXCLK_LN
C -1 1KR2F-3-GP F8 D16 GMCH_TXBCLK+ 19
C
20 GMCH_DDCCLK DAC_SCL TXCLK_UP
E8 D17 GMCH_TXBCLK- 19 1D8V_S0
20 GMCH_DDCDATA DAC_SDA TXCLK_UN
1ST 68.00217.711 L34
2

6 LDT_STP#_CPU 1 R14 2 NB_LDT_STOP# 1D1V_S0


L33 2ND = 68.00119.111 1 R33 2DAC_RSET G14 DAC_RSET
0R0402-PAD 715R2F-GP A13 1D8V_S0_VDDLP18 1 2
R24 1D1V_S0_PLLVDD VDDLTP18 SBK160808T-221Y-N-GP
1 2 A12 PLLVDD VSSLTP18 B13 1ST 68.00217.711

1
6 ALLOW _LDTSTOP 1 2 NB_ALLOW _LDTSTOP SBK160808T-221Y-N-GP 1 1D8V_S0_PLVDD18 D14 PLLVDD18 2ND = 68.00119.111

1
0R2J-2-GP 220ohm 200mA C643 B12 A15 C649 DY
C644 PLLVSS VDDLT18_1
R69 BOM Option DY DY SCD1U10V2KX-4GP B15 SC1U10V2KX-1GP C648

2
VDDLT18_2

LVTM
SC1U10V2KX-1GP VDDA18HTPLL H17 A14 SCD1U10V2KX-4GP
2

2 VDDA18HTPLL VDDLT33_1

PLL PWR
1D8V_S0 CRT B14 L35
L4 VDDLT33_2
220ohm 200mA D7 1D8V_S0_VDDLT18 1 2 68.00206.121
for TR 1 2 VDDA18PCIEPLL E7
VDDA18PCIEPLL1
C14 PBY201209T-221Y-N-GP 2ND = 68.00216.161
VDDA18PCIEPLL2 VSSLT1

1
SBK160808T-221Y-N-GP D15
VSSLT2
1

TC1 1ST 68.00217.711 C78 SYSREST# D8 C16 C652 DY C653


SYSRESET# VSSLT3
1

SC1U10V2KX-1GP

80.10715.L04 2ND = 68.00119.111 CRT DY C77 A10 C18 SC4D7U6D3V3MX-2GP SCD1U10V2KX-4GP


12,42 NB_PW RGD

2
POWERGOOD VSSLT4
ST100U6D3VBML1GP

2ND = 77.C1071.081 NB_LDT_STOP# C10 C20


2

C82 SCD1U10V2KX-4GP NB_ALLOW _LDTSTOP LDTSTOP# VSSLT5


11 NB_ALLOW _LDTSTOP C12 E20
2

SC47U6D3V5MX-1-GP ALLOW_LDTSTOP VSSLT6


VSSLT7 C22

CLOCKs PM
3 CLK_NBHT_CLK C25 HT_REFCLKP -1
3 CLK_NBHT_CLK# C24 HT_REFCLKN
1D1V_S0
RN11 E11
3 CLK_NB_14M REFCLK_P/OSCIN
1 4 NB_REFCLK_N F11 E9
1ST 68.00217.711
ENABLE External CLK GEN 2 3
REFCLK_N LVDS_DIGON
F7 GMCH_BL_ON
GMCH_LCDVDD_ON 19
LVDS_BLON GMCH_BL_ON 36
2ND = 68.00119.111 UMA-->L4-->2R 0603 CLK_NB_GFX T2 G12 LVDS_ENA_BL
3 CLK_NB_GFX GFX_REFCLKP LVDS_ENA_BL TP26 TPAD14-GP
1D8V_S0 SRN1KJ-7-GP CLK_NB_GFX# T1 RN10
L5 C82-->47U/6.3V 3 CLK_NB_GFX# GFX_REFCLKN
2 3
B
1 2 VDDA18HTPLL DIS-->L4-->Bead TPAD14-GP
TP180
CLK_NBGPP_CLK U1 GPP_REFCLKP 1 4
B
220ohm 200mA TPAD14-GP CLK_NBGPP_CLK# U2
C82-->DY TP181 GPP_REFCLKN
1

SBK160808T-221Y-N-GP C97 SB SRN4K7J-8-GP


C86 DY SCD1U10V2KX-4GP V4 R31 UMA
3 CLK_NB_GPPSB GPPSB_REFCLKP
SC1U10V2KX-1GP V3 1 2
3 CLK_NB_GPPSB#
2

GPPSB_REFCLKN
B9 4K7R2J-2-GP
19 CLK_DDC_EDID I2C_CLK
A9 D9
19 DAT_DDC_EDID
TPAD14-GP DDC_DATA0/AUX0N B8
I2C_DATA MIS. TMDS_HPD
D10 NB_DVI_HPD HDMI_DETECT# 21
TP188 DDC_CLK0/AUX0P DDC_DATA0/AUX0N HPD TP24 TPAD14-GP
1D8V_S0 TPAD14-GP DDC_CLK0/AUX0P A8
L1 TP239 DDC_DATA0/AUX0N DDC_CLK0/AUX0P
21 GMCH_HDMI_CLK GMCH_HDMI_CLK B7 D12 SUS_STAT# 2 1 3D3V_S0
VDDA18PCIEPLL GMCH_HDMI_DATA DDC_CLK1/AUX1P SUS_STAT# R29 10KR2J-3-GP
1 2 21 GMCH_HDMI_DATA A7 DDC_DATA1/AUX1N
220ohm 200mA AE8 RS780_DXP3_1
THERMALDIODE_P TP23 TPAD14-GP
1

SBK160808T-221Y-N-GP C42 STRP_DATA B10 AD8 RS780_DXN3_1


STRP_DATA THERMALDIODE_N TP22 TPAD14-GP
C41 DY SCD1U10V2KX-4GP GPIO MODE
SC1U10V2KX-1GP G11 D13 TESTMODE_NB
2

RESERVED TESTMODE
STRP_DATA 0 *1

1
RS780_AUX_CAL C8 AUX_CAL R347
1ST 68.00217.711 VCC_NB 1.1V 1.0V
1

2ND = 68.00119.111 1K8R2F-GP


R294 RS780M-GP-U2
150R2F-1-GP

2
2

3D3V_S0
1

A R19 1 2 LVDS_ENA_BL JV50-TR8 A


DY 2K2R2J-2-GP R576 0R2J-2-GP
UMA
Wistron Corporation
2

STRP_DATA GMCH_BL_ON
36,56 BLON_IN 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
19,56 BRIGHTNESS_AMD 1 2
R578 0R2J-2-GP Title

for TR
UMA ATi-RS880M_LVDS&CRT_(2/3)
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 9 of 63
5 4 3 2 1
5 4 3 2 1

ANB1F

1D1V_S0
0.6A per ANT Rev1.1, Page3
-1 A25 VSSAHT1 VSSAPCIE1 A2
L36 D23 PART 6/6 B1
+1.1V_RUN_VDDHT 1D1V_S0 VSSAHT2 VSSAPCIE2
1 2 ANB1E E22 VSSAHT3 VSSAPCIE3 D3
PBY201209T-221Y-N-GP C655 C91 C659 C94 300mil Width G22 D5
VSSAHT4 VSSAPCIE4

1
SC4D7U6D3V3MX-2GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
220 ohm @ 100MHz,2A J17 VDDHT_1 VDDPCIE_1 A6 G24 VSSAHT5 VSSAPCIE5 E4
DY DY K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6 G25 VSSAHT6 VSSAPCIE6 G1

1
68.00206.121 L16 C6 C83 C49 C55 C68 H19 G2

2
VDDHT_3 VDDPCIE_3 VSSAHT7 VSSAPCIE7

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
D 2ND = 68.00216.161 M16 D6 DY DY C40 J22 G4 D
VDDHT_4 VDDPCIE_4 VSSAHT8 VSSAPCIE8

SCD1U10V2KX-4GP
P16 E6 SC4D7U6D3V3MX-2GP L17 H7

2
VDDHT_5 VDDPCIE_5 VSSAHT9 VSSAPCIE9
R16 VDDHT_6 VDDPCIE_6 F6 L22 VSSAHT10 VSSAPCIE10 J4
T16 VDDHT_7 VDDPCIE_7 G7 -1 L24 VSSAHT11 VSSAPCIE11 R7
VDDPCIE_8 H8 L25 VSSAHT12 VSSAPCIE12 L1
H18 VDDHTRX_1 VDDPCIE_9 J9 M20 VSSAHT13 VSSAPCIE13 L2
1D1V_S0 0.45A per ANT Rev1.1, Page3 G19 K9 N22 L4
L40 VDDHTRX_2 VDDPCIE_10 VSSAHT14 VSSAPCIE14
-1 F20 VDDHTRX_3 VDDPCIE_11 M9 P20 VSSAHT15 VSSAPCIE15 L7
1 2 +1.1V_RUN_VDDHTRX E21 L9 1103 R19 M6
PBY201209T-221Y-N-GP C677 C674 C106 C102 VDDHTRX_4 VDDPCIE_12 VSSAHT16 VSSAPCIE16
D22 VDDHTRX_5 VDDPCIE_13 P9 10A per ANT Rev1.1, Page3 R22 VSSAHT17 VSSAPCIE17 N4
1

1
SC4D7U6D3V3MX-2GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
220 ohm @ 100MHz,2A B23 VDDHTRX_6 VDDPCIE_14 R9 +NB_VCORE R24 VSSAHT18 VSSAPCIE18 P6

SCD1U10V2KX-4GP
DY DY A23 VDDHTRX_7 VDDPCIE_15 T9 Per check list (Rev 0.02) R25 VSSAHT19 VSSAPCIE19 R1
68.00206.121 V9 H20 R2
2

2
VDDPCIE_16 1D1V_S0 VSSAHT20 VSSAPCIE20
2ND = 68.00216.161 AE25 VDDHTTX_1 VDDPCIE_17 U9 RS780M: 1V ~ 1.1V, check PWR team U22 VSSAHT21 VSSAPCIE21 R4
AD24 VDDHTTX_2 V19 VSSAHT22 VSSAPCIE22 V7

GROUND
AC23 VDDHTTX_3 VDDC_1 K12 W22 VSSAHT23 VSSAPCIE23 U4
1D2V_S0 AB22 J14 W24 V8
VDDHTTX_4 VDDC_2 VSSAHT24 VSSAPCIE24

1
-1 AA21 U16 C52 C36 C74 C90 C60 C79 C46 C85 C76 W25 V6
VDDHTTX_5 VDDC_3 VSSAHT25 VSSAPCIE25

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
L38 Y20 J11 DY DY DY DY Y21 W1
VDDHTTX_6 VDDC_4 VSSAHT26 VSSAPCIE26

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
1 2 +1.2V_RUN_VDDHTTX W19 K15 AD25 W2

2
PBY201209T-221Y-N-GP C673 C111 C104 C95 C101 VDDHTTX_7 VDDC_5 VSSAHT27 VSSAPCIE27
V18 VDDHTTX_8 VDDC_6 M12 VSSAPCIE28 W4
1

1
SC4D7U6D3V3MX-2GP

SCD1U10V2KX-4GP

POWER
220 ohm @ 100MHz,2A U17 VDDHTTX_9 VDDC_7 L14 L12 VSS11 VSSAPCIE29 W7
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY DY T17 VDDHTTX_10 VDDC_8 L11 M14 VSS12 VSSAPCIE30 W8
68.00206.121 R17 M13 N13 Y6
2

VDDHTTX_11 VDDC_9 VSS13 VSSAPCIE31


2ND = 68.00216.161 P17 VDDHTTX_12 VDDC_10 M15 P12 VSS14 VSSAPCIE32 AA4
M17 VDDHTTX_13 VDDC_11 N12 P15 VSS15 VSSAPCIE33 AB5
VDDC_12 N14 R11 VSS16 VSSAPCIE34 AB1
J10 VDDA18PCIE_1 VDDC_13 P11 R14 VSS17 VSSAPCIE35 AB7
1D8V_S0 P10 P13 T12 AC3
C VDDA18PCIE_2 VDDC_14 VSS18 VSSAPCIE36 C
K10 VDDA18PCIE_3 VDDC_15 P14 U14 VSS19 VSSAPCIE37 AC4
L2 80mil Width M10 R12 U11 AE1
+1.8V_RUN_VDDA18PCIE VDDA18PCIE_4 VDDC_16 VSS20 VSSAPCIE38
1 2 L10 VDDA18PCIE_5 VDDC_17 R15 U15 VSS21 VSSAPCIE39 AE4
PBY201209T-221Y-N-GP W9 T11 V12 AB2
VDDA18PCIE_6 VDDC_18 VSS22 VSSAPCIE40
1

220 ohm @ 100MHz,2A C63 C62 C53 C57 C61 C47 H9 T15 W11
VDDA18PCIE_7 VDDC_19 VSS23
SC4D7U6D3V3KX-GP

SC4D7U6D3V3MX-2GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY DY DY T10 VDDA18PCIE_8 VDDC_20 U12 W15 VSS24


68.00206.121 R10 T14 AC12 AE14
2

VDDA18PCIE_9 VDDC_21 VSS25 VSS1


2ND = 68.00216.161 Y9 VDDA18PCIE_10 VDDC_22 J16 AA14 VSS26 VSS2 D11
AA9 VDDA18PCIE_11 Y18 VSS27 VSS3 G8
-1 AB9 AE10 VDD_MEM 1 R316 2 AB11 E14
VDDA18PCIE_12 VDD_MEM1 0R0603-PAD VSS28 VSS4
AD9 VDDA18PCIE_13 VDD_MEM2 AA11 AB15 VSS29 VSS5 E15
AE9 VDDA18PCIE_14 VDD_MEM3 Y11 AB17 VSS30 VSS6 J15
1D8V_S0 U10 AD10 AB19 J12
VDDA18PCIE_15 VDD_MEM4 VSS31 VSS7
VDD_MEM5 AB10 AE20 VSS32 VSS8 K14
F9 AC10 3D3V_S0 AB21 M11
VDD18_1 VDD_MEM6 VSS33 VSS9
G9 VDD18_2 K11 VSS34 VSS10 L15
1

C59 1 R320 2 +1.8V_RUN_VDD18_MEM AE11 H11


VDD18_MEM1 VDD33_1
SC1U10V2KX-1GP

0R0603-PAD AD11 H12 +3.3V_RUN_VDD33 1 R30 2


VDD18_MEM2 VDD33_2 0R0603-PAD RS780M-GP-U2
2

C651
RS780M-GP-U2

1
SC1U10V2KX-1GP

C65
C66 DY SCD1U10V2KX-4GP
2

SCD1U10V2KX-4GP

2
B B
ANB1D
MEM_COMP_P and MEM_COMP_N trace
PAR 4 OF 6
AB12 AA18 width >=10mils and 10mils spacing from
MEM_A0 MEM_DQ0/DVO_VSYNC
AE16 MEM_A1 MEM_DQ1/DVO_HSYNC AA20 other Signals in X,Y,Z directions
V11 MEM_A2 MEM_DQ2/DVO_DE AA19
AE15 MEM_A3 MEM_DQ3/DVO_D0 Y19
AA12 V17 1D8V_S0
MEM_A4 MEM_DQ4
AB16 MEM_A5 MEM_DQ5/DVO_D1 AA17
AB14 MEM_A6 MEM_DQ6/DVO_D2 AA15 1 R339 2
AD14 Y15 0R0402-PAD
MEM_A7 MEM_DQ7/DVO_D4
AD13 MEM_A8 MEM_DQ8/DVO_D3 AC20
AD15 MEM_A9 MEM_DQ9/DVO_D5 AD19
AC16 AE22
SBD_MEM/DVO_I/F

MEM_A10 MEM_DQ10/DVO_D6
AE13 MEM_A11 MEM_DQ11/DVO_D7 AC18
AC14 MEM_A12 MEM_DQ12 AB20
Y14 MEM_A13 MEM_DQ13/DVO_D9 AD22
AC22 +1.8V_IOPLLVDD18 1D1V_S0
MEM_DQ14/DVO_D10
AD16 MEM_BA0 MEM_DQ15/DVO_D11 AD21
AE17 MEM_BA1 1 R341 2
AD17 Y17 0R0402-PAD
MEM_BA2 MEM_DQS0P/DVO_IDCKP
MEM_DQS0N/DVO_IDCKN W18
W12 MEM_RAS# MEM_DQS1P AD20
Y12 MEM_CAS# MEM_DQS1N AE21
AD18 MEM_WE#
AB13 MEM_CS# MEM_DM0 W17
AB18 MEM_CKE MEM_DM1/DVO_D8 AE19
V14 MEM_ODT
A IOPLLVDD18 AE23 JV50-TR8 A
V15 AE24 +1.1V_IOPLLVDD
MEM_CKP IOPLLVDD
W14 MEM_CKN
AE12 MEM_COMPP
IOPLLVSS AD23
Wistron Corporation
AD12 AE18 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
MEM_COMPN MEM_VREF Taipei Hsien 221, Taiwan, R.O.C.
RS780M-GP-U2
Title

ATi-RS880M_Side Port&PWR&GND(3/3)
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 05, 2009 Sheet 10 of 63
5 4 3 2 1
5 4 3 2 1

ASB1A
R146
33R2J-2-GP
1 2 NB_RST# N2
SB700 P4 PCI_CLK0_R
6,9,26,33,36,55 PLT_RST1# A_RST# PCICLK0 TP204 TPAD14-GP
Part 1 of 5 P3 PCI_CLK1_R TP203 TPAD14-GP
C774 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P0 PCICLK1 PCI_CLK2_R

PCI CLKS
8 ALINK_NBRX_SBTX_P0 1 2 V23 PCIE_TX0P PCICLK2 P1 1 2 PCI_CLK2 15
C777 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N0 V22 P2 PCI_CLK3_R R144 10R0402-PAD
2 PCI_CLK3 15
8 ALINK_NBRX_SBTX_N0 PCIE_TX0N PCICLK3
C779 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P1 V24 T4 PCI_CLK4_R R141 10R0402-PAD
2 CLK_PCI4 15
8 ALINK_NBRX_SBTX_P1 PCIE_TX1P PCICLK4
C787 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N1 V25 T3 PCI_CLK5_R R137 10R0402-PAD
2 CLK_PCI_LOM 15
8 ALINK_NBRX_SBTX_N1 PCIE_TX1N PCICLK5/GPIO41
C794 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P2 U25 R138 0R0402-PAD
8 ALINK_NBRX_SBTX_P2 PCIE_TX2P

EC42

EC41

EC39

EC40
C791 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N2 U24
8 ALINK_NBRX_SBTX_N2 PCIE_TX2N
C802 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_P3 T23
8 ALINK_NBRX_SBTX_P3 PCIE_TX3P
C801 1 2 SCD1U16V2KX-3GP ALINK_NBRX_C_SBTX_N3 T22 N1 PCIRST#_SB TP138 TPAD14-GP
8 ALINK_NBRX_SBTX_N3 PCIE_TX3N PCIRST#

1
D D
U22

PCI EXPRESS INTERFACE


8 ALINK_NBTX_C_SBRX_P0 PCIE_RX0P
8 ALINK_NBTX_C_SBRX_N0 U21 U2

2
PCIE_RX0N AD0
8 ALINK_NBTX_C_SBRX_P1 U19 PCIE_RX1P AD1 P7 DY DY DY DY
8 ALINK_NBTX_C_SBRX_N1 V19 PCIE_RX1N AD2 V4

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP
8 ALINK_NBTX_C_SBRX_P2 R20 PCIE_RX2P AD3 T1
8 ALINK_NBTX_C_SBRX_N2 R21 PCIE_RX2N AD4 V3
8 ALINK_NBTX_C_SBRX_P3 R18 PCIE_RX3P AD5 U1
8 ALINK_NBTX_C_SBRX_N3 R17 PCIE_RX3N AD6 V1
1D2V_S0 +1.2V_RUN_PCIE_PVDD PCIE_VDDR V2
R143 AD7
1 2 562R2F-GP PCIE_CALRP T25 PCIE_CALRP AD8 T2
R147 1 2 2K05R2F-GP PCIE_CALRN T24 W1
PCIE_CALRN AD9
L24 >15mil Width 43 mA AD10 T9
1 2 P24 PCIE_PVDD AD11 R6
PBY201209T-221Y-N-GP R7
AD12
1

220 ohm 2A C810 P25 R5


C811 PCIE_PVSS AD13
AD14 U8
SC1U10V2KX-1GP

SC1U10V2KX-1GP

Place R <100mils form pins T25,T24 U5


2

AD15
68.00206.121 AD16 Y7
2ND = 68.00216.161 AD17 W8
AD18 V9
AD19 Y8
AD20 AA8
AD21 Y4
AD22 Y3
AD23 Y2 PCI_AD23 15
AD24 AA2 PCI_AD24 15
AD25 AB4 PCI_AD25 15
3 CLK_PCIE_SB N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1 PCI_AD26 15
C N24 AB3 C
3D3V_S5 3 CLK_PCIE_SB# PCIE_RCLKN/NB_LNK_CLKN AD27 PCI_AD27 15
AD28 AB2 PCI_AD28 15
K23 NB_DISP_CLKP AD29 AC1 PCI_AD29 15
K22 NB_DISP_CLKN AD30 AC2 PCI_AD30 15

PCI INTERFACE
AD31 AD1
U16A
14

M24 NB_HT_CLKP CBE0# W2


M25 NB_HT_CLKN CBE1# U7
1 CBE2# AA7
3 PLT_RST1#_B 32,33,34,37 P17 CPU_HT_CLKP CBE3# Y1
6,9,26,33,36,55 PLT_RST1# 2 M18 CPU_HT_CLKN FRAME# AA6
DEVSEL# W5
TSLVC08APW -1-GP M23 AA5
7

SLT_GFX_CLKP IRDY#
M22 SLT_GFX_CLKN TRDY# Y5
PAR U6
J19 GPP_CLK0P STOP# W6
73.07408.L16 J18 GPP_CLK0N PERR# W4
2ND = 73.07408.L15 SERR# V7
3RD = 73.07408.02B L20 AC3 PCI_REQ#0
L19
GPP_CLK1P REQ0#
AD4 PCI_REQ#1
TP124 TPAD14-GP 090917-remove Muxless circuit
for TR GPP_CLK1N REQ1#
AB7 PCI_REQ#2
TP119 TPAD14-GP
REQ2# TP198 TPAD14-GP
M19 AE6 PCI_REQ#3 TP115 TPAD14-GP
For SB710 M20
GPP_CLK2P REQ3#/GPIO70
AB6 PCI_REQ#4

CLOCK GENERATOR
GPP_CLK2N REQ4#/GPIO71 TP197 TPAD14-GP
AD2 PCI_GNT#0 TP117 TPAD14-GP
GNT0# PCI_GNT#1
N22 GPP_CLK3P GNT1# AE4 TP121 TPAD14-GP
P22 AD5 PCI_GNT#2 TP118 TPAD14-GP
GPP_CLK3N GNT2# PE_GPIO1
1 DY 2 GNT3#/GPIO72 AC6 TP262 TPAD14-GP
R162 10MR2J-L-GP 1 R440 2CLK_SB_14M_1 L18 AE5 PCI_GNT#4 TP120 TPAD14-GP
3 CLK_SB_14M 25M_48M_66M_OSC GNT4#/GPIO73
0R0402-PAD AD6
CLKRUN# PM_CLKRUN# 36
2 1 C424 32K_X1
LOCK# V5 PCI_LOCK# TP201 TPAD14-GP

1
B SC18P50V2JN-1-GP TP209 B
J21 25M_X1
-1 TPAD14-GP AD3 INT_PIRQE# TP116 TPAD14-GP R126
INTE#/GPIO33 INT_PIRQF# 10KR2J-3-GP
INTF#/GPIO34 AC4 TP191 TPAD14-GP DY
AE2 INT_PIRQG# TP123 TPAD14-GP
INTG#/GPIO35
3

TP210 J20 AE3 PE_GPIO TP263 TPAD14-GP LPC_LAD[0..3]


LPC_LAD[0..3] 36,37

2
R164 TPAD14-GP 25M_X2 INTH#/GPIO36
X-32D768KHZ-38GPU X4 10MR2J-L-GP RN51
82.30001.691 G22 LPCCLK0_R 1 4 SRN22-3-GP PCLK_FW H 15,37
LPCCLK0 LPCCLK1_R
2ND = 82.30001.A81 E22 2 3 PCLK_KBC 15,36
2

LPCCLK1 EC48
A3 H24 LPC_LAD0 36,37 1 DY 2
2

X1 LAD0 EC47
LAD1 H23 LPC_LAD1 36,37 1 DY 2SC22P50V2JN-4GP
RTC XTAL

J25 SC22P50V2JN-4GP
LAD2 LPC_LAD2 36,37
LAD3 J24 LPC_LAD3 36,37
LPC

2 1 32K_X2 B3 H25
X2 LFRAME# LDRQ0# LPC_LFRAME# 36,37 ARTC1
LDRQ0# H22 TP213 TPAD14-GP
C433 SC18P50V2JN-1-GP AB8 LDRQ1#
LDRQ1#/GNT5#/GPIO68 TP193 TPAD14-GP
AD7 PCI_REQ#5 1
BMREQ#/REQ5#/GPIO65 PCI_REQ#5 12 PWR
SERIRQ V15 INT_SERIRQ 36 2 GND
SB NP1 NP1

1
F23 RTC_AUX_S5 C409 NP2
9 NB_ALLOW _LDTSTOP ALLOW_LDTSTP RTC_CLK 15,35 NP2

SCD1U16V2ZY-2GP
6 PROCHOT#_SB F24 PROCHOT# RTCCLK C3 DY
6,52 CPU_PW RGD F22 C2 INTRUDER# TPAD14-GP
TP148

2
LDT_PG INTRUDER_ALERT# RTC_AUX_S5_R BAT-CON2-1-GP-U
CPU

6 CPU_LDT_STOP# G25 LDT_STP# VBAT B2 1 2


RTC

6,52 CPU_LDT_RST# G24 R158 62.70001.011


LDT_RST# 510R2J-1-GP
1

1
C407 C408

SC1U10V2KX-1GP

SCD1U16V2ZY-2GP
SB700-1-GP-U1
2

2
A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-SB710_PCIE&PCI_(1/5)
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 11 of 63
5 4 3 2 1
5 4 3 2 1

9,42 NB_PW RGD 2 1 NB_PW RGD_R ASB1D


R422 0R2J-2-GP
DY SB700 Part 4 of 5
1D8V_S0 SB E1 TP143 1ICH_PME# PCI_PME#/GEVENT4#
E2 TP142 1 RI# RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 CLK48_USB
CLK48_USB 3
H7 TP211 1 S2# SLP_S2/GPM9#
F5 G8 USB_PCOMP 1 2
34,35,36,42,44,49,53,54 PM_SLP_S3# SLP_S3# USB_RCOMP R167
G1 1 DY 2CLK48_USB_R2 C432
1 DY2

USB MISC
NB_PW RGD 34,36,48 PM_SLP_S5# SLP_S5# 11K8R2F-GP R161
1 2 H2

ACPI / WAKE UP EVENTS


R419 300R2J-4-GP 36,52 PM_PW RBTN# PWR_BTN# 10KR2J-3-GP SC10P50V2JN-4GP
3D3V_S0 42 SB_PW RGD H1
PM_SUS_STAT# K3 PWR_GOOD 1%
D
TPAD14-GP
TP208
SB_TEST2 SUS_STAT# Place these close SB700 D
H5 TEST2 USB_FSD13P E6
SB_TEST1 H4 E7 Place R near pin14. Route it with 10mils
FP_ID SB_TEST0 TEST1 USB_FSD13N
1
R411
DY 2
10KR2J-3-GP
H3 TEST0 Trace width and 25mils spacing to any
36 KA20GATE Y15 F7

USB 1.1
GA20IN/GEVENT0# USB_FSD12P signals in X, Y, Z directions.
36 KBRCIN# W15 KBRST#/GEVENT1# USB_FSD12N E8
36 ECSCI#_1 K4 LPC_PME#/GEVENT3#
3D3V_S5 ECSMI#_KBC K24 H11 USBPP10 32
TPAD14-GP GEVENT5# LPC_SMI#/EXTEVNT1# USB_HSD11P
TP141 F1 S3_STATE/GEVENT5# USB_HSD11N J10 USBPN10 32
1 DY 2 SB_TEST2 TPAD14-GP SYS_RST# J2
TP139 SYS_RESET#/GPM7#
R445 2K2R2F-GP 26,34 PCIE_W AKE# H6 E11 USBPP8 19
SB_TEST1 EC_TMR WAKE#/GEVENT8# USB_HSD10P
1 DY 2 36 EC_TMR F2 BLINK/GPM6# USB_HSD10N F11 USBPN8 19 USB
R443 2K2R2F-GP SMB_ALERT# J6
SB_TEST0 3D3V_S0 NB_PW RGD_R SMBALERT#/THRMTRIP#/GEVENT2#
1 DY 2 W14 NB_PWRGD USB_HSD9P A11 USBPP4 33 Pair Device
R442 2K2R2F-GP B11
USB_HSD9N USBPN4 33
RSMRST#_KBC_SB D3
42 RSMRST#_KBC_SB RSMRST#
USB_HSD8P C10 USBPP3 25 11 CardReader

2
1 DY 2 ICH_PME# D10
USB_HSD8N USBPN3 25
R154 10KR2J-3-GP R410 10 WEBCAM
1 DY 2 PCIE_W AKE# 1KR2F-3-GP 38 FP_ID FP_ID AE18 G11
SATA_IS0#/GPIO10 USB_HSD7P USBPP1 25
R444 10KR2J-3-GP GPIO6 AD18 H12 9 MINIC2
TP190 CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USBPN1 25
1 DY 2 SMB_ALERT# TPAD14-GP GPIO4 AA19
TP194

1
R441 10KR2J-3-GP GPIO0/HDMI TPAD14-GP SMARTVOLT/SATA_IS2#/GPIO4
W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBPP2 25 8 USB4 OCP1#
GPIO39 V17 E14
RN97 for TR TPAD14-GP TP192
W20
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N USBPN2 25
7 USB3
PM_SLP_S5# CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
8 1 28 ACZ_SPKR W21 SPKR/GPIO2 USB_HSD5P C12 USBPP5 24

USB 2.0
7 2 ECSCI#_1 SMBC0_SB AA18 D12 USBPN5 24 6 USB2
ECSW I# SMBD0_SB W18 SCL0/GPOC0# USB_HSD5N
6 3 SDA0/GPOC1#
5 4 PM_SLP_S3# SMB_CLK K1 B12 5 Bluetooth
C SMB_DATA SCL1/GPOC2# USB_HSD4P C
K2 SDA1/GPOC3# USB_HSD4N A12

GPIO
SRN10KJ-6-GP TPAD14-GP DDC1_SCL AA20 4 NC
TP196 DDC1_SCL/GPIO9
TPAD14-GP DDC1_SDA Y18 G12 USBPP6 38
TP199 DDC1_SDA/GPIO8 USB_HSD3P
TPAD14-GP SATA_DET# C1 G14 USBPN6 38 3 Fringer print
TP149 LLB#/GPIO66 USB_HSD3N
TPAD14-GP GPIO5 Y19
TP200 SHUTDOWN#/GPIO5
3D3V_S5 R570 1 2 RSMRST#_KBC_SB TPAD14-GP GEVENT7# G5 H14 USBPP9 34 2 NEW1
TP218 DDR3_RST#/GEVENT7# USB_HSD2P
10KR2J-3-GP H15 USBPN9 34
R571 1 ECSMI#_KBC USB_HSD2N
3D3V_S0 2 1 MINIC1
10KR2J-3-GP A13 USBPP7 33
R572 1 USB_HSD1P
2 PCI_REQ#5 PCI_REQ#5 11 USB_HSD1N B13 USBPN7 33 0 USB1 OCP0#
10KR2J-3-GP
36 ECSW I# USB_HSD0P B14 USBPP0 25
B9 USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N A14 USBPN0 25
Close to SB710 TPAD14-GP USB_OC#5 B8
TP151 USB_OC5#/IR_TX0/GPM5#
25 USB_OC#4 USB_OC#4 A8 A18
USB_OC4#/IR_RX0/GPM4# IMC_GPIO8

USB OC
RN49 34 CPPE# A9 B18
SRN33J-5-GP-U TPAD14-GP USB_OC#2 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
SB TP220 E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
28 ACZ_BITCLK 1 4 TPAD14-GP USB_OC#1 F8 D21
TP150 USB_OC1#/GPM1# SCL2/IMC_GPIO11
31 ACZ_BTCLK_MDC 2 3 25 USB_OC#0 E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
SCL3_LV/IMC_GPIO13 E20
31 ACZ_SDATAOUT_MDC 1 R172 2 ACZ_BIT_CLK M1 AZ_BITCLK SDA3_LV/IMC_GPIO14 E21
28 ACZ_SDATAOUT 1 33R2J-2-GP
2 ACZ_SDATAOUT_R M2 E19
R173 33R2J-2-GP AZ_SDOUT IMC_PWM1/IMC_GPIO15
28 ACZ_SDATAIN0 J7 AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 D19 SB_GPO16 15
31 ACZ_SDATAIN1 J8 AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 E18 SB_GPO17 15

HD AUDIO
TPAD14-GP ACZ_SDIN2 L8
TP206 AZ_SDIN2/GPIO44
RN96 TPAD14-GP ACZ_SDIN3 M3 G20
TP205 AZ_SDIN3/GPIO46 IMC_GPIO18
SRN33J-5-GP-U ACZ_SYNC_R
28,31 ACZ_SYNC
28,31 ACZ_RST#
1
2
4
3
L6
ACZ_RST#_R M4 AZ_SYNC IMC_GPIO19 G21
D25
Strap Pin / define to use LPC or SPI ROM
TP207 GPM8# L5 AZ_RST# IMC_GPIO20
1 AZ_DOCK_RST#/GPM8# IMC_GPIO21 D24

INTEGRATED uC
B B
IMC_GPIO22 C25
2

EC45 EC44 EC43 EC80 EC82 C24


IMC_GPIO23
2

R151 ACZ_RST#_R 15 B25


IMC_GPIO24
SC12P50V2JN-3GP

SC12P50V2JN-3GP

SC12P50V2JN-3GP

SC12P50V2JN-3GP

SC12P50V2JN-3GP

10KR2J-3-GP

R439 R448 C23


IMC_GPIO25
10KR2J-3-GP

10KR2J-3-GP

DY TO STRAPS
1

DY DY B24
1

IMC_GPIO26
DY DY DY DY DY B23
1

IMC_GPIO27
IMC_GPIO28 A23
IMC_GPIO29 C22
IMC_GPIO30 A22
IMC_GPIO31 B22
IMC_GPIO32 B21
IMC_GPIO33 A21
TP212 1 IMC_GPIO0 H19 D20
3D3V_S0 TP214 IMC_GPIO1 IMC_GPIO0 IMC_GPIO34
1 H20 IMC_GPIO1 IMC_GPIO35 C20

INTEGRATED uC
3D3V_S5 3D3V_S0 R152 TP216 1 IMC_GPIO2 H21 A20
IDE_RST# SPI_CS2#/IMC_GPIO2 IMC_GPIO36
1 DY 2 F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
NEWCARD /GLAN IMC_GPIO38 B19
10KR2J-3-GP TP221 1 IMC_GPIO4 D22 A19
IMC_GPIO4 IMC_GPIO39
5
6
7
8

TP147 1 IMC_GPIO5 E24 D18


RN53 TP145 IMC_GPIO6 IMC_GPIO5 IMC_GPIO40
1 E25 IMC_GPIO6 IMC_GPIO41 C18
TP222 1 IMC_GPIO7 D23
SRN4K7J-10-GP IMC_GPIO7
4
3
2
1

SB700-1-GP-U1
26,33,34 SMB_CLK
26,33,34 SMB_DATA
A 3,16,17 SMBC0_SB JV50-TR8 A
3,16,17 SMBD0_SB

Wistron Corporation
1

C859 C857 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


SC100P50V2JN-3GP SC100P50V2JN-3GP Taipei Hsien 221, Taiwan, R.O.C.
2

Title

ATi-SB710_USB&GPIO_(2/5)
Size Document Number Rev
A3
JV50-TR8 -1
Date: W ednesday, November 11, 2009 Sheet 12 of 63
5 4 3 2 1
5 4 3 2 1

PLACE SATA AC DECOUPLING


CAPS CLOSE TO SB710
ASB1B

D C370 1 2SCD01U50V2KX-1GP SATA_TXP0_C AD9


SB700 AA24 D
22 SATA_TXP0 SATA_TX0P IDE_IORDY
22 SATA_TXN0 C371 1 2SCD01U50V2KX-1GP SATA_TXN0_C AE9 Part 2 of 5 AA25
SATA_TX0N IDE_IRQ
SATA HDD IDE_A0 Y22
22 SATA_RXN0 C687 1 2SCD01U50V2KX-1GP SATA_RXN0_C AB10 AB23
C686 1 SATA_RX0N IDE_A1
22 SATA_RXP0 2SCD01U50V2KX-1GP SATA_RXP0_C AC10
SATA_RX0P IDE_A2 Y23
IDE_DACK# AB24
23 SATA_TXP1 C369 1 2SCD01U50V2KX-1GP SATA_TXP1_C AE10 AD25
C368 1 SATA_TX1P IDE_DRQ
23 SATA_TXN1 2SCD01U50V2KX-1GP SATA_TXN1_C AD10
SATA_TX1N IDE_IOR# AC25
SATA ODD IDE_IOW# AC24
23 SATA_RXN1 C449 1 2SCD01U50V2KX-1GP SATA_RXN1_C AD11 Y25
C446 1 SATA_RX1N IDE_CS1#
23 SATA_RXP1 2SCD01U50V2KX-1GP SATA_RXP1_C AE11
SATA_RX1P IDE_CS3# Y24

AB12 SATA_TX2P IDE_D0/GPIO15 AD24


AC12 SATA_TX2N IDE_D1/GPIO16 AD23
IDE_D2/GPIO17 AE22

ATA 66/100/133
AE12 SATA_RX2N IDE_D3/GPIO18 AC22
AD12 AD21 CLK_ID_0
SATA_RX2P IDE_D4/GPIO19 CLK_ID_1
IDE_D5/GPIO20 AE20
AD13 SATA_TX3P IDE_D6/GPIO21 AB20 Dummy CKG select

SERIAL ATA
AE13 SATA_TX3N IDE_D7/GPIO22 AD19
IDE_D8/GPIO23 AE19
AB14 SATA_RX3N IDE_D9/GPIO24 AC20
AC14 AD20 3D3V_S0
SATA_RX3P IDE_D10/GPIO25
IDE_D11/GPIO26 AE21
AE14 SATA_TX4P IDE_D12/GPIO27 AB22
AD14 SATA_TX4N IDE_D13/GPIO28 AD22

1
IDE_D14/GPIO29 AE23
R407 R412
AD15
AE15
SATA_RX4N IDE_D15/GPIO30 AC23
10KR2J-3-GP 10KR2J-3-GP
CLK_ID
SATA_RX4P
C
RTM SEG (1,0) C

Very Close to SB710 AB16

2
SATA_TX5P
C373
SC15P50V2JN-2-GP
AC16 SATA_TX5N SB_SPI_MISO
CLK_ID_1
CLK_ID_0
ICS: 0,0
G6 TP217 TPAD14-GP
2 1 AE16 SATA_RX5N
SPI_DI/GPIO12
SPI_DO/GPIO11 D2 SPI_MOSI_R TP146 TPAD14-GP SEG: 0,1
R434 AD16 D1 ICH_SPICLK
SATA_RX5P SPI_CLK/GPIO47 TP144 TPAD14-GP RTM: 1,0
1

1
1KR2F-3-GP F4 SB_SPI_HOLD TP215 TPAD14-GP
SPI_HOLD#/GPIO31

SPI ROM
XTAL-25MHZ-120-GP-U X3 R127 1 2 SATA_CAL V12 F3 ICH_SPICS0# TP219 TPAD14-GP R416 R413
10MR2J-L-GP SATA_CAL SPI_CS#/GPIO32 10KR2J-3-GP 10KR2J-3-GP
1ST 82.30020.851 SATA_X1 Y12 U15 LAN_RST# TP202 TPAD14-GP ICS+SEG ICS+RTM
2

SATA_X1 LAN_RST#/GPIO13 ROM_RST#


J1 TP140 TPAD14-GP
2

2
SATA_X2_R SATA_X2AA12 ROM_RST#/GPIO14
2ND = 82.30020.791 2 1 1 2 SATA_X2
SB R128 300R2J-4-GP M8
C367 FANOUT0/GPIO3
39 MEDIA_LED# W11 SATA_ACT#/GPIO67 FANOUT1/GPIO48 M5
SC15P50V2JN-2-GP M7
FANOUT2/GPIO49
93 mA
1D2V_S0 PLLVDD_SATA AA11 P5
PLLVDD_SATA FANIN0/GPIO50

SATA PWR
>15mil Width FANIN1/GPIO51 P8
1 R426 2 W12 XTLVDD_SATA FANIN2/GPIO52 R8
0R0603-PAD
1

C784 C785 C6
TEMP_COMM
SCD1U10V2KX-4GP

SC1U10V2KX-1GP DY B6
TEMPIN0/GPIO61
A6
2

TEMPIN1/GPIO62
TEMPIN2/GPIO63 A5

HW MONITOR
TEMPIN3/TALERT#/GPIO64 B5 ALERT# 35
A4 PSW _CLR#
VIN0/GPIO53
VIN1/GPIO54 B4
3D3V_S0 C4
B XTLVDD_SATA VIN2/GPIO55 B
VIN3/GPIO56 D4
>15mil Width VIN4/GPIO57 D5
1 R428 2 VIN5/GPIO58 D6
0R0603-PAD A7 PSW _CLR#
VIN6/GPIO59
1

C778 B7
VIN7/GPIO60

2
SC1U10V2KX-1GP
AVDD_HW M 3D3V_S5 G106
2

>15mil Width
AVDD F6 1 R163 2 GAP-OPEN
0R0603-PAD

1
G7 C418
AVSS

1
C423

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP
DY
SB700-1-GP-U1

2
3D3V_S0

R573 1 210KR2J-3-GP MEDIA_LED# Layout connect to Cap then GND


R574 1 210KR2J-3-GP PSW _CLR#

R575 1 210KR2J-3-GP ALERT#

A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-SB710_SATA-IDE_(3/5)
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 13 of 63
5 4 3 2 1
5 4 3 2 1

ASB1C
ASB1E
131 mA SB700 510 mA 1D2V_S0
L9 VDDQ_1 VDD_1 L15 >100mil Width
M9 VDDQ_2 Part 3 of 5 VDD_2 M12 SB700 Part 5 of 5
3D3V_S0 T15 M14 A2
VDDQ_3 VDD_3 VSS_1

1
U9 N13 C806 C805 C815 C814 C386 A25
VDDQ_4 VDD_4 VSS_2

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V3MX-GP
3D3V_S0

CORE S0
U16 VDDQ_5 VDD_5 P12 DY DY DY VSS_3 B1
U17

PCI/GPIO I/O
P14 D7

2
VDDQ_6 VDD_6 VSS_4
V8 VDDQ_7 VDD_7 R11 T10 AVSS_SATA_1 VSS_5 F20
W7 VDDQ_8 VDD_8 R15 U10 AVSS_SATA_2 VSS_6 G19
1

1
C435 C781 C800 C799 C807 C773 Y6 T16 U11 H8
VDDQ_9 VDD_9 AVSS_SATA_3 VSS_7

SC10U6D3V3MX-GP

SC4D7U6D3V3KX-GP

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY DY AA4 VDDQ_10 U12 AVSS_SATA_4 VSS_8 K9
D AB5 V11 K11 D
2

2
VDDQ_11 AVSS_SATA_5 VSS_9
AB21 VDDQ_12 V14 AVSS_SATA_6 VSS_10 K16
W9 AVSS_SATA_7 VSS_11 L4
Y9 AVSS_SATA_8 VSS_12 L7
>50mil Width CKVDD 1D2V_S0 Y11 L10
AVSS_SATA_9 VSS_13
Y14 AVSS_SATA_10 VSS_14 L11
Y20 VDD33_18_1 CKVDD_1.2V_1 L21 1 R148 2 Y17 AVSS_SATA_11 VSS_15 L12
71 mA AA21 L22 0R0402-PAD AA9 L14
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_12 VSS_16

1
C403 C400 C402 C401

IDE/FLSH I/O

CLKGEN I/O
AA22 VDD33_18_3 CKVDD_1.2V_3 L24 AB9 AVSS_SATA_13 VSS_17 L16

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB11 AVSS_SATA_14 VSS_18 M6
DY DY DY DY AB13 M10

2
1D2V_S0 AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
PCIE_VDDR AB17 M13
AVSS_SATA_17 VSS_21
L25 >100mil Width 600 mA AC8 AVSS_SATA_18 VSS_22 M15
1 2 AD8 AVSS_SATA_19 VSS_23 N4
PBY201209T-221Y-N-GP AE8 N12
AVSS_SATA_20 VSS_24
1

1
220 ohm 2A C394 C809 C389 C395 C396 N14
POWER VSS_25
SC4D7U6D3V3MX-2GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY DY VSS_26 P6
P9
2

2
3D3V_S5 VSS_27
68.00206.121 VSS_28 P10
2ND = 68.00216.161 P18 32 mA >20mil Width A15 P11
PCIE_VDDR_1 AVSS_USB_1 VSS_29
-1 P19 PCIE_VDDR_2 B15 AVSS_USB_2 VSS_30 P13
P20 PCIE_VDDR_3 C14 AVSS_USB_3 VSS_31 P15

1
A-LINK I/O
P21 A17 C404 C414 C419 C405 D8 R1
PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_4 VSS_32

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3MX-2GP
R22 PCIE_VDDR_5 S5_3.3V_2 A24 DY DY D9 AVSS_USB_5 VSS_33 R2
R24 B17 D11 R4

2
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_6 VSS_34
R25 PCIE_VDDR_7 S5_3.3V_4 J4 D13 AVSS_USB_7 VSS_35 R9

3.3V_S5 I/O
-1

GROUND
S5_3.3V_5 J5 D14 AVSS_USB_8 VSS_36 R10
S5_3.3V_6 L1 D15 AVSS_USB_9 VSS_37 R12
C L2 E15 R14 C
1D2V_S0 AVDD_SATA S5_3.3V_7 AVSS_USB_10 VSS_38
>50mil Width F12 AVSS_USB_11 VSS_39 T11
L23 567 mA F14 T12
AVSS_USB_12 VSS_40
1 2 AA14 AVDD_SATA_1 G9 AVSS_USB_13 VSS_41 T14
PBY201209T-221Y-N-GP AB18 113 mA 1D2V_S5 H9 U4
AVDD_SATA_4 AVSS_USB_14 VSS_42
1

C786 C770 C772 AA15 >30mil Width H17 U14


AVDD_SATA_2 AVSS_USB_15 VSS_43
1

SATA I/O
SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY EC81 C354 C366 AA17 AVDD_SATA_3 S5_1.2V_1 G2 J9 AVSS_USB_16 VSS_44 V6


SCD1U16V2ZY-2GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

CORE S5
DY DY AC18 G4 J11 Y21
2

AVDD_SATA_5 S5_1.2V_2 AVSS_USB_17 VSS_45

1
AD17 C427 C431 C422 C417 C434 J12 AB1
2

AVDD_SATA_6 AVSS_USB_18 VSS_46

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AE17 AVDD_SATA_7
197 mA DY DY SC10U6D3V3MX-GP J14 AVSS_USB_19 VSS_47 AB19
DY DY J15 AB25

2
AVSS_USB_20 VSS_48
USB_PHY_1.2V_1 A10 K10 AVSS_USB_21 VSS_49 AE1
68.00206.121 USB_PHY_1.2V_2 B10 K12 AVSS_USB_22 VSS_50 AE24
2ND = 68.00216.161 K14 AVSS_USB_23
K15 AVSS_USB_24
PCIE_CK_VSS_9 P23
PCIE_CK_VSS_10 R16
5V_S0 R19
R406 PCIE_CK_VSS_11
Use Plane Shape for +3.3V_AVDD_USB >10mil Width PCIE_CK_VSS_12 T17
A16 AE7 V5_VREF 2 1 U18
AVDDTX_0 V5_VREF PCIE_CK_VSS_13
B16 AVDDTX_1 H18 PCIE_CK_VSS_1 PCIE_CK_VSS_14 U20

1
3D3V_S5 C16 J16 AVDDCK_3D3V C769 C766 1KR2J-1-GP J17 V18
AVDDTX_2 AVDDCK_3.3V 3D3V_S0 PCIE_CK_VSS_2 PCIE_CK_VSS_15

SCD1U10V2KX-4GP

SC1U10V2KX-1GP
68.00206.121 L27 658 mA D16 AVDDTX_3 DY D26 J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20
2ND = 68.00216.161 1 2 AVDD_USB D17 K17 AVDDK_1D2V 3D3V_S5 K25 V21

2
AVDDTX_4 AVDDCK_1.2V PCIE_CK_VSS_4 PCIE_CK_VSS_17
PLL

PBY201209T-221Y-N-GP >50mil Width E17 L28 K A M16 W19


AVDDTX_5 3D3V_AVDDC PCIE_CK_VSS_5 PCIE_CK_VSS_18
F15
USB I/O

AVDDRX_0 AVDDC E9 1 2 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22


F17 AVDDRX_1
17mA PBY201209T-221Y-N-GP
RB751V-40-2-GP M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
1

1
C428 C429 C416 C415 C420 C421 F18 C437 C436 68.00206.121 P16 W25
AVDDRX_2 PCIE_CK_VSS_8 PCIE_CK_VSS_21
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1U10V2KX-1GP
B DY DY DY G15 AVDDRX_3 DY 2ND = 68.00216.161 83.R2004.B8F B
G17 2ND = 83.R0304.A8F F9 L17
2

2
AVDDRX_4 AVSSC AVSSCK
G18 AVDDRX_5 >15mil Width
SB700-1-GP-U1
SB700-1-GP-U1

47 mA 3D3V_S0
>15mil Width
AVDDCK_3D3V 2 L26 1
0R0603-PAD

1
C425 C426
SCD1U10V2KX-4GP SC1U10V2KX-1GP DY
2

2
62 mA 1D2V_S0

AVDDK_1D2V
>15mil Width L52 2
1
0R0603-PAD
1

1
C816 C817
SCD1U10V2KX-4GP DY SC1U10V2KX-1GP
A JV50-TR8 A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-SB710_POWER&GND_(4/5)
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 05, 2009 Sheet 14 of 63
5 4 3 2 1
5 4 3 2 1

REQUIRED STRAPS
REQUIRED SYSTEM STRAPS
D D

3D3V_S0 3D3V_S5

R145 R142 R136 R140 R153 R155 R160 R430 R171


1

1
DY DY DY DY DY DY DY DY DY
2

2
10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

2K2R2F-GP
PCI_CLK2 11
PCI_CLK3 11
CLK_PCI4 11
CLK_PCI_LOM 11
PCLK_FW H 11,37
PCLK_KBC 11,36
RTC_CLK 11,35
C ACZ_RST#_R 12 C
SB_GPO17 12

1
2
R135 R139 R159 R429
2
1

1
RN52
1
2

RN46 SRN2K2J-1-GP
SRN10KJ-5-GP DY DY DY
RN50
SRN10KJ-5-GP
DEBUG STRAPS
2

4
3
3
4

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
SB_GPO16 12
4
3

1
TPAD14-GP TP137
R166 TPAD14-GP PCI_AD23 11
TP136 PCI_AD24 11
DY 2K2R2F-GP TPAD14-GP
TPAD14-GP
TP195 PCI_AD25 11
TP135 PCI_AD26 11
TPAD14-GP TP134

2
TPAD14-GP PCI_AD27 11
TP133 PCI_AD28 11
TPAD14-GP TP130
TPAD14-GP PCI_AD29 11
TP129 PCI_AD30 11

B
CLK_PCI_LOM PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD30 B
PCI_CLK2 PCI_CLK3 CLK_PCI4 PCLK_FWH PCLK_KBC RTCCLK AZ_RST# SB_GPO17 , SB_GPO16 PCI_AD29
ROM TYPE: USE USE PCI USE ACPI USE IDE USE DEFAULT
PULL WatchDOG USE CLKGEN INTERNAL ENABLE PCI PULL LONG PLL BCLK PLL PCIE STRAPS Reserved
(NB_PWRGD) DEBUG IMC ENABLED RTC ROM BOOT H, H = Reserved
HIGH HIGH RESET
ENABLED STRAPS ENABLED
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
(Use Internal) DEFAULT H, L = SPI ROM Reserved
RESERVED
EXT. RTC DISABLE PCI USE BYPASS BYPASS BYPASS IDE USE EEPROM Reserved
PULL WatchDog IGNORE IMC CLKGEN (PD on X1, L, H = LPC ROM DEFAULT PULL
ROM BOOT SHORT PCI PLL ACPI PLL PCIE STRAPS
LOW (NB_PWRGD) DEBUG DISABLED DISABLED apply LOW RESET BCLK
DISABLED STRAPS (Use External) 32KHz to DEFAULT L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)

Note: SB700 has 15K internal PU FOR PCI_AD[30:23]


NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK

A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-SB710_STRAPPING_(5/5)
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 15 of 63
5 4 3 2 1
5 4 3 2 1

ADIMM2

5,18 MEM_MA_ADD0 102 A0 RAS# 108 MEM_MA_RAS# 5,18


5,18 MEM_MA_ADD1 101 A1 WE# 109 MEM_MA_WE# 5,18
5,18 MEM_MA_ADD2 100 A2 CAS# 113 MEM_MA_CAS# 5,18
5,18 MEM_MA_ADD3 99 A3
5,18 MEM_MA_ADD4 98 A4 CS0# 110 MEM_MA0_CS#0 5,18
5,18 MEM_MA_ADD5 97 A5 CS1# 115 MEM_MA0_CS#1 5,18
5,18 MEM_MA_ADD6 94 A6
5,18 MEM_MA_ADD7 92 A7 CKE0 79 MEM_MA_CKE0 5,18
5,18 MEM_MA_ADD8 93 A8 CKE1 80 MEM_MA_CKE1 5,18
5,18 MEM_MA_ADD9 91 A9
5,18 MEM_MA_ADD10 105 30 MEM_MA_CLK0_P 5
A10/AP CK0
5,18 MEM_MA_ADD11 90 32 MEM_MA_CLK0_N 5
A11 CK0#
5,18 MEM_MA_ADD12 89
D A12 D
5,18 MEM_MA_ADD13 116 164 MEM_MA_CLK1_P 5
A13 CK1
5,18 MEM_MA_ADD14 86 166 MEM_MA_CLK1_N 5
A14 CK1#
5,18 MEM_MA_ADD15 84
A15
85 10 MEM_MA_DM0 5
A16/BA2 DM0
5,18 MEM_MA_BANK2 26 MEM_MA_DM1 5
DM1
5,18 MEM_MA_BANK0 107 52 MEM_MA_DM2 5
BA0 DM2
5,18 MEM_MA_BANK1 106 67 MEM_MA_DM3 5
BA1 DM3
130 MEM_MA_DM4 5
DM4
147 MEM_MA_DM5 5
DM5
5 MEM_MA_DATA0 5 170 MEM_MA_DM6 5
DQ0 DM6
5 MEM_MA_DATA1 7 185 MEM_MA_DM7 5
DQ1 DM7
5 MEM_MA_DATA2 17 DQ2
5 MEM_MA_DATA3 19 DQ3
5 MEM_MA_DATA4 4 DQ4 SDA 195 SMBD0_SB 3,12,17
6 197 3D3V_S0
5 MEM_MA_DATA5 DQ5 SCL SMBC0_SB 3,12,17
5 MEM_MA_DATA6 14 DQ6
5 MEM_MA_DATA7 16 DQ7 VDDSPD 199
5 MEM_MA_DATA8 23 DQ8

1
25 198 C458 C456
5 MEM_MA_DATA9 DQ9 SA0
35 200 SC2D2U6D3V3KX-GP SCD1U10V2KX-4GP
5 MEM_MA_DATA10 DQ10 SA1
37 DY DY

2
5 MEM_MA_DATA11 DQ11
20 50
5
5
MEM_MA_DATA12
MEM_MA_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A0)
5 MEM_MA_DATA14 DQ14 NC#83
5 MEM_MA_DATA15 38 DQ15 NC#120 120
5 MEM_MA_DATA16 43 DQ16 NC#163/TEST 163
45 1D8V_S3
5 MEM_MA_DATA17 DQ17
55

NORMAL TYPE
5 MEM_MA_DATA18 DQ18
5 MEM_MA_DATA19 57 DQ19 VDD 81
5 MEM_MA_DATA20 44 DQ20 VDD 82
5 MEM_MA_DATA21 46 DQ21 VDD 87
5 MEM_MA_DATA22 56 DQ22 VDD 88
C
5 MEM_MA_DATA23 58 DQ23 VDD 95 PLACE CLOSE TO PROCESSOR C

5 MEM_MA_DATA24 61 DQ24 VDD 96 WITHIN 1.5 INCH


5 MEM_MA_DATA25 63 DQ25 VDD 103
5 MEM_MA_DATA26 73 DQ26 VDD 104
75 111 MEM_MA_CLK0_P
5 MEM_MA_DATA27 DQ27 VDD
5 MEM_MA_DATA28 62 DQ28 VDD 112

1
64 117 C338
5 MEM_MA_DATA29 DQ29 VDD
74 118 SC1D5P50V2CN-1GP
5 MEM_MA_DATA30 DQ30 VDD
76

2
5 MEM_MA_DATA31 DQ31 MEM_MA_CLK0_N
5 MEM_MA_DATA32 123 3
DQ32 VSS
5 MEM_MA_DATA33 125 8
DQ33 VSS MEM_MA_CLK1_P
5 MEM_MA_DATA34 135 9
DQ34 VSS
5 MEM_MA_DATA35 137 12
DQ35 VSS

1
124 15 C331
5 MEM_MA_DATA36 DQ36 VSS
126 18 SC1D5P50V2CN-1GP
5 MEM_MA_DATA37 DQ37 VSS
134 21

2
5 MEM_MA_DATA38 DQ38 VSS
136 24 MEM_MA_CLK1_N
5 MEM_MA_DATA39 DQ39 VSS
5 MEM_MA_DATA40 141 27
DQ40 VSS
5 MEM_MA_DATA41 143 28
DQ41 VSS
5 MEM_MA_DATA42 151 33
DQ42 VSS
5 MEM_MA_DATA43 153 34
DQ43 VSS
5 MEM_MA_DATA44 140 39
DQ44 VSS
5 MEM_MA_DATA45 142 40
DQ45 VSS
5 MEM_MA_DATA46 152 41
DQ46 VSS
5 MEM_MA_DATA47 154 42
DQ47 VSS
5 MEM_MA_DATA48 157 47
DQ48 VSS
5 MEM_MA_DATA49 159 48
DQ49 VSS
5 MEM_MA_DATA50 173 53
DQ50 VSS
5 MEM_MA_DATA51 175 54
DQ51 VSS
5 MEM_MA_DATA52 158 59
DQ52 VSS
5 MEM_MA_DATA53 160 60
DQ53 VSS
174 65

DDR_VREF
5 MEM_MA_DATA54 DQ54 VSS
B 5 MEM_MA_DATA55 176 66 B
DQ55 VSS
5 MEM_MA_DATA56 179 71
DQ56 VSS
5 MEM_MA_DATA57 181 72
DQ57 VSS
5 MEM_MA_DATA58 189 77
DQ58 VSS
5 MEM_MA_DATA59 191 78
DQ59 VSS
5 MEM_MA_DATA60 180 121
DQ60 VSS 1D8V_S3 VREF_DDR_MEM
5 MEM_MA_DATA61 182 122
DQ61 VSS
5 MEM_MA_DATA62 192 127
DQ62 VSS
5 MEM_MA_DATA63 194 128
DQ63 VSS
132
VSS

1
11 133 C844
5 MEM_MA_DQS0_N DQS0# VSS
29 138 SCD1U10V2KX-4GP
5 MEM_MA_DQS1_N DQS1# VSS
49 139 RN100

2
5 MEM_MA_DQS2_N DQS2# VSS
5 MEM_MA_DQS3_N 68 144 1 4
DQS3# VSS
5 MEM_MA_DQS4_N 129 145 2 3
DQS4# VSS

1
146 149 C834 C832
5 MEM_MA_DQS5_N DQS5# VSS

SCD1U10V2KX-4GP
167 150 SRN1KJ-7-GP
5 MEM_MA_DQS6_N DQS6# VSS
186 155 SC1KP50V2KX-1GP

2
5 MEM_MA_DQS7_N DQS7# VSS
156
VSS
5 MEM_MA_DQS0_P 13 161
DQS0 VSS
5 MEM_MA_DQS1_P 31 162
DQS1 VSS
5 MEM_MA_DQS2_P 51 165
DQS2 VSS
5 MEM_MA_DQS3_P 70 168
DQS3 VSS
131 171
5
5
MEM_MA_DQS4_P
MEM_MA_DQS5_P 148
DQS4
DQS5
VSS
VSS
172 LAYOUT: Locate close to DIMM
5 MEM_MA_DQS6_P 169 177
DQS6 VSS
5 MEM_MA_DQS7_P 188 178
DQS7 VSS
183
VSS
5,18 MEM_MA0_ODT0 114 184
OTD0 VSS
5,18 MEM_MA0_ODT1 119 187
OTD1 VSS
190
VSS
VREF_DDR_MEM 1 VREF VSS 193
A 2 VSS VSS 196 A
1

SCD1U10V2KX-4GP

C845 C847 202 201 JV50-TR8


SC2D2U6D3V3KX-GP GND GND
2

MH1 MH1 MH2 MH2


Wistron Corporation
SKT-SODIMM20020U4GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
62.10017.661
Title
2ND = 62.10017.A41
Place C2.2uF and 0.1uF <
3RD = 62.10017.G81
DDR_SO-DIMM SKT_1
500mils from DDR connector LOW 5.2 mm Size Document Number Rev
Custom
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 16 of 63
5 4 3 2 1
5 4 3 2 1

ADIMM1

5,18 MEM_MB_ADD0 102 A0 RAS# 108 MEM_MB_RAS# 5,18


5,18 MEM_MB_ADD1 101 A1 WE# 109 MEM_MB_WE# 5,18
5,18 MEM_MB_ADD2 100 A2 CAS# 113 MEM_MB_CAS# 5,18
5,18 MEM_MB_ADD3 99 A3
5,18 MEM_MB_ADD4 98 A4 CS0# 110 MEM_MB0_CS#0 5,18
5,18 MEM_MB_ADD5 97 A5 CS1# 115 MEM_MB0_CS#1 5,18
5,18 MEM_MB_ADD6 94 A6
5,18 MEM_MB_ADD7 92 A7 CKE0 79 MEM_MB_CKE0 5,18
5,18 MEM_MB_ADD8 93 A8 CKE1 80 MEM_MB_CKE1 5,18
5,18 MEM_MB_ADD9 91 A9
5,18 MEM_MB_ADD10 105 30 MEM_MB_CLK0_P 5
A10/AP CK0
5,18 MEM_MB_ADD11 90 32 MEM_MB_CLK0_N 5
A11 CK0#
5,18 MEM_MB_ADD12 89
D A12 D
5,18 MEM_MB_ADD13 116 164 MEM_MB_CLK1_P 5
A13 CK1
5,18 MEM_MB_ADD14 86 166 MEM_MB_CLK1_N 5
A14 CK1#
5,18 MEM_MB_ADD15 84
A15
85 10 MEM_MB_DM0 5
A16/BA2 DM0
5,18 MEM_MB_BANK2 26 MEM_MB_DM1 5
DM1
5,18 MEM_MB_BANK0 107 52 MEM_MB_DM2 5
BA0 DM2
5,18 MEM_MB_BANK1 106 67 MEM_MB_DM3 5
BA1 DM3
130 MEM_MB_DM4 5
DM4
147 MEM_MB_DM5 5
DM5
5 MEM_MB_DATA0 5 170 MEM_MB_DM6 5
DQ0 DM6
5 MEM_MB_DATA1 7 185 MEM_MB_DM7 5
DQ1 DM7
5 MEM_MB_DATA2 17 DQ2
5 MEM_MB_DATA3 19 DQ3
5 MEM_MB_DATA4 4 DQ4 SDA 195 SMBD0_SB 3,12,16
6 197 3D3V_S0
5 MEM_MB_DATA5 DQ5 SCL SMBC0_SB 3,12,16
5 MEM_MB_DATA6 14 DQ6
5 MEM_MB_DATA7 16 DQ7 VDDSPD 199
5 MEM_MB_DATA8 23 DQ8

1
25 198 DIMM2_SA1 1 2 C499
5 MEM_MB_DATA9 DQ9 SA0
35 200 R203 10KR2J-3-GP C507 DY DY SCD1U10V2KX-4GP
5 MEM_MB_DATA10 DQ10 SA1
37 SC2D2U6D3V3KX-GP

2
5 MEM_MB_DATA11 DQ11
20 50
5 MEM_MB_DATA12
5 MEM_MB_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A2)
5 MEM_MB_DATA14 DQ14 NC#83
5 MEM_MB_DATA15 38 DQ15 NC#120 120
5 MEM_MB_DATA16 43 DQ16 NC#163/TEST 163
45 1D8V_S3
5 MEM_MB_DATA17 DQ17
5 MEM_MB_DATA18 55 DQ18
5 MEM_MB_DATA19 57 DQ19 VDD 81
5 MEM_MB_DATA20 44 DQ20 VDD 82 PLACE CLOSE TO PROCESSOR
5 MEM_MB_DATA21 46 DQ21 VDD 87 WITHIN 1.5 INCH
5 MEM_MB_DATA22 56 DQ22 VDD 88
C C
5 MEM_MB_DATA23 58 DQ23 VDD 95
61 96 MEM_MB_CLK0_P
5 MEM_MB_DATA24 DQ24 VDD
5 MEM_MB_DATA25 63 DQ25 VDD 103

1
73 104 C348
5 MEM_MB_DATA26 DQ26 VDD
75 111 SC1D5P50V2CN-1GP
5 MEM_MB_DATA27 DQ27 VDD
62 112

2
5 MEM_MB_DATA28 DQ28 VDD
64 117 MEM_MB_CLK0_N
5 MEM_MB_DATA29 DQ29 VDD
5 MEM_MB_DATA30 74 118
DQ30 VDD MEM_MB_CLK1_P
5 MEM_MB_DATA31 76
DQ31
5 MEM_MB_DATA32 123 3
DQ32 VSS

1
125 8 C340
5 MEM_MB_DATA33 DQ33 VSS
135 9 SC1D5P50V2CN-1GP
5 MEM_MB_DATA34 DQ34 VSS
137 12

2
5 MEM_MB_DATA35 DQ35 VSS MEM_MB_CLK1_N
5 MEM_MB_DATA36 124 15
DQ36 VSS
5 MEM_MB_DATA37 126 18
DQ37 VSS
5 MEM_MB_DATA38 134 21
DQ38 VSS
5 MEM_MB_DATA39 136 24
DQ39 VSS
5 MEM_MB_DATA40 141 27
DQ40 VSS
5 MEM_MB_DATA41 143 28
DQ41 VSS
151 33

NORMAL TYPE
5 MEM_MB_DATA42 DQ42 VSS
5 MEM_MB_DATA43 153 34
DQ43 VSS
5 MEM_MB_DATA44 140 39
DQ44 VSS
5 MEM_MB_DATA45 142 40
DQ45 VSS
5 MEM_MB_DATA46 152 41
DQ46 VSS
5 MEM_MB_DATA47 154 42
DQ47 VSS
5 MEM_MB_DATA48 157 47
DQ48 VSS
5 MEM_MB_DATA49 159 48
DQ49 VSS
5 MEM_MB_DATA50 173 53
DQ50 VSS
5 MEM_MB_DATA51 175 54
DQ51 VSS
5 MEM_MB_DATA52 158 59
DQ52 VSS
5 MEM_MB_DATA53 160 60
DQ53 VSS
5 MEM_MB_DATA54 174 65
B DQ54 VSS B
5 MEM_MB_DATA55 176 66
DQ55 VSS
5 MEM_MB_DATA56 179 71
DQ56 VSS
5 MEM_MB_DATA57 181 72
DQ57 VSS
5 MEM_MB_DATA58 189 77
DQ58 VSS
5 MEM_MB_DATA59 191 78
DQ59 VSS
5 MEM_MB_DATA60 180 121
DQ60 VSS
5 MEM_MB_DATA61 182 122
DQ61 VSS
5 MEM_MB_DATA62 192 127
DQ62 VSS
5 MEM_MB_DATA63 194 128
DQ63 VSS
132
VSS
5 MEM_MB_DQS0_N 11 133
DQS0# VSS
5 MEM_MB_DQS1_N 29 138
DQS1# VSS
5 MEM_MB_DQS2_N 49 139
DQS2# VSS
5 MEM_MB_DQS3_N 68 144
DQS3# VSS
5 MEM_MB_DQS4_N 129 145
DQS4# VSS
5 MEM_MB_DQS5_N 146 149
DQS5# VSS
5 MEM_MB_DQS6_N 167 150
DQS6# VSS
5 MEM_MB_DQS7_N 186 155
DQS7# VSS
156
VSS
5 MEM_MB_DQS0_P 13 161
DQS0 VSS
5 MEM_MB_DQS1_P 31 162
DQS1 VSS
5 MEM_MB_DQS2_P 51 165
DQS2 VSS
5 MEM_MB_DQS3_P 70 168
DQS3 VSS
5 MEM_MB_DQS4_P 131 171
DQS4 VSS
5 MEM_MB_DQS5_P 148 172
DQS5 VSS
5 MEM_MB_DQS6_P 169 177
DQS6 VSS
5 MEM_MB_DQS7_P 188 178
DQS7 VSS
183
VSS
5,18 MEM_MB0_ODT0 114 184
OTD0 VSS
5,18 MEM_MB0_ODT1 119 187
OTD1 VSS
190
VSS
VREF_DDR_MEM 1 VREF VSS 193
A A
2 VSS VSS 196
1

SCD1U10V2KX-4GP

JV50-TR8
C854 C855 202 201
GND GND
2

SC2D2U6D3V3KX-GP MH1 MH1 MH2 MH2


Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DDR2-200P-22-GP-U3 Taipei Hsien 221, Taiwan, R.O.C.
62.10017.A61 Title
2ND = 62.10017.A51 3RD = 62.10017.G71
Place C2.2uF and 0.1uF <
1ST change to 62.10017.E21 DDR_SO-DIMM SKT_2
Size Document Number Rev
500mils from DDR connector HI 9.2mm Custom
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 17 of 63
5 4 3 2 1
5 4 3 2 1

Decoupling Capacitor
0D9V_S3
Put decap near power(0.9V) and pull-up resistor

1
C450 DY C451 C452 C470 C468 C469 C498 DY C497 C496 C515 C514 C516
DY C513

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP
D DY DY D

PARALLEL TERMINATION

2
Put decap near power(0.9V) and pull-up resistor
0D9V_S3 0D9V_S3

RN63 RN55
1 8 MEM_MA0_ODT1 5,16 1 8 MEM_MB_ADD4 5,17
2 7 MEM_MA0_CS#1 5,16 2 7 MEM_MB_ADD11 5,17
3 6 MEM_MA_W E# 5,16 3 6 MEM_MB_ADD5 5,17
4 5 MEM_MA_CAS# 5,16 4 5 MEM_MB_ADD8 5,17
SRN47J-4-GP
RN66
SRN47J-4-GP
RN58
Place these Caps near DM1
1 8 MEM_MA_ADD8 5,16 1 8 MEM_MB_ADD6 5,17
2 7 2 7 1D8V_S3
MEM_MA_ADD5 5,16 MEM_MB_ADD2 5,17
3 6 MEM_MA_CKE1 5,16 3 6 MEM_MB_ADD0 5,17
4 5 MEM_MA_ADD15 5,16 4 5 MEM_MB_BANK1 5,17

1
SRN47J-4-GP SRN47J-4-GP C482 C480 C838 C841 C886 C884 C484 Layout Note:

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
RN68 RN59 DY
Place one cap close to every 2 pullup

SCD1U16V2ZY-2GP
1 8 MEM_MA_ADD4 5,16 1 8 MEM_MB_RAS# 5,17

2
2 7 MEM_MA_ADD2 5,16 2 7 MEM_MB0_CS#0 5,17 resistors terminated to 0D9V_S3
3 6 MEM_MA_BANK1 5,16 3 6 MEM_MB0_ODT0 5,17
4 5 MEM_MA_ADD0 5,16 4 5 MEM_MB_ADD13 5,17
SRN47J-4-GP SRN47J-4-GP
C RN61 RN54 C
1 8 MEM_MA_ADD12 5,16 1 8 MEM_MB_ADD9 5,17
2 7 MEM_MA_ADD9 5,16 2 7 MEM_MB_ADD12 5,17
3 6 3 6
4 5
MEM_MA_BANK2 5,16
MEM_MA_CKE0 5,16 4 5
MEM_MB_BANK2 5,17
MEM_MB_CKE0 5,17 Place these Caps near DM2 1D8V_S3
SRN47J-4-GP SRN47J-4-GP
RN62 RN60
1 8 MEM_MA_BANK0 5,16 1 8 MEM_MB_CKE1 5,17
2 7 MEM_MA_ADD10 5,16 2 7 MEM_MB_ADD15 5,17

1
3 6 3 6 C840 C481 C487 C839 C885 C887 C483 C888 Layout Note:
MEM_MA_ADD3 5,16 MEM_MB_ADD14 5,17

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP
4 5 MEM_MA_ADD1 5,16 4 5 MEM_MB_ADD7 5,17 DY DY
Place one cap close to every 2 pullup

2
SRN47J-4-GP SRN47J-4-GP resistors terminated to 0D9V_S3
RN67 RN56
1 8 MEM_MA_ADD14 5,16 1 8 MEM_MB_BANK0 5,17
2 7 MEM_MA_ADD7 5,16 2 7 MEM_MB_ADD10 5,17
3 6 MEM_MA_ADD11 5,16 3 6 MEM_MB_ADD1 5,17
4 5 MEM_MA_ADD6 5,16 4 5 MEM_MB_ADD3 5,17
SRN47J-4-GP SRN47J-4-GP
RN69 RN57
1 8 MEM_MA0_CS#0 5,16 1 8 MEM_MB0_CS#1 5,17
2 7 MEM_MA_RAS# 5,16 2 7 MEM_MB0_ODT1 5,17
3 6 MEM_MA0_ODT0 5,16 3 6 MEM_MB_CAS# 5,17 1D8V_S3
4 5 MEM_MA_ADD13 5,16 4 5 MEM_MB_W E# 5,17 0D9V_S3 Place these Caps near PARALLEL TERMINATION
SRN47J-4-GP SRN47J-4-GP
C488

1
B B

SCD1U16V2ZY-2GP
C523 C524 C525 C526 C527 C490 C491 C479

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
DY DY DY DY DY

2
Do not share the Term resistor between
the DDR addess and Control Signals.

1
C478 C440 C441 C442 C444 C443 C477 C489 C475

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
DY DY DY DY DY DY

2
A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR_DAMPING & TERMINATION


Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 18 of 63
5 4 3 2 1
5 4 3 2 1

RN23
for TR 56 LVDS_TXACLK- LVDS_TXACLK- 1 8 LCD_TXACLK-

LCD/INVERTER/CCD CONN LCDVDD


56
56
56
LVDS_TXACLK+
LVDS_TXAOUT2-
LVDS_TXAOUT2+
LVDS_TXACLK+
LVDS_TXAOUT2-
LVDS_TXAOUT2+
2
3
4

DIS SRN0J-7-GP
7
6
5
LCD_TXACLK+
LCD_TXAOUT2-
LCD_TXAOUT2+

RN22 Inverter Pin


-1 56 LVDS_TXAOUT0- LVDS_TXAOUT0- 1 8 LCD_TXAOUT0-
56 LVDS_TXAOUT0+ LVDS_TXAOUT0+ 2 7 LCD_TXAOUT0+ Pin Symbol

1
LCD1 C1 56 LVDS_TXAOUT1- LVDS_TXAOUT1- 3 6 LCD_TXAOUT1-
41 SC10U10V5ZY-1GP 56 LVDS_TXAOUT1+ LVDS_TXAOUT1+ 4 5 LCD_TXAOUT1+ 1 Vin
D -1 36 LCD_CB_SEL 40 1 D

2
DIS SRN0J-7-GP 2 Vin
12 USBPP8 1 2 USBPP8_R 39 2
12 USBPN8 R2531 0R0402-PAD
2 USBPN8_R 38 3 CCD_PW R RN25 3 Brightness
R254 0R0402-PAD 37 4 56 LVDS_TXBCLK- LVDS_TXBCLK- 1 8 LCD_TXBCLK-
36 5 LCD_TXBCLK+ 56 LVDS_TXBCLK+ LVDS_TXBCLK+ 2 7 LCD_TXBCLK+ 4 BLON
36 DBC_EN 35 6 LCD_TXBCLK- 56 LVDS_TXBOUT2- LVDS_TXBOUT2- 3 6 LCD_TXBOUT2-
3D3V_S0 34 7 LCD_TXBOUT2+ 56 LVDS_TXBOUT2+ LVDS_TXBOUT2+ 4 5 LCD_TXBOUT2+ 5 GND
LCD_EDID_CLK_1 33 8 LCD_TXBOUT2-
LCD_EDID_DAT_1 32 9 LCD_TXBOUT1+ DIS SRN0J-7-GP 6 GND
31 10 LCD_TXBOUT1-
30 11 LCD_TXBOUT0+ RN24
29 12 LCD_TXBOUT0- 56 LVDS_TXBOUT0- LVDS_TXBOUT0- 1 8 LCD_TXBOUT0-
BRIGHTNESS_CN 28 13 LCD_TXACLK+ 56 LVDS_TXBOUT0+ LVDS_TXBOUT0+ 2 7 LCD_TXBOUT0+ CCD Pin
BLON_OUT_1 27 14 LCD_TXACLK- 56 LVDS_TXBOUT1- LVDS_TXBOUT1- 3 6 LCD_TXBOUT1-
26 15 LCD_TXAOUT2+ 56 LVDS_TXBOUT1+ LVDS_TXBOUT1+ 4 5 LCD_TXBOUT1+ Pin Symbol
25 16 LCD_TXAOUT2-
24 17 LCD_TXAOUT1+ DIS SRN0J-7-GP 1 CCD_PWR
DCBATOUT 23 18 LCD_TXAOUT1-
F1 22 19 LCD_TXAOUT0+ 2 USB-
1 2 DCBATOUT_LCD1 21 20 LCD_TXAOUT0-
42 RN17 3 USB+
1

POLYSW -1D1A24V-GP 9 GMCH_TXAOUT2+ GMCH_TXAOUT2+ 1 8 LCD_TXAOUT2+


69.50007.A31 C5 ACES-CONN40C-4-GP 9 GMCH_TXAOUT2- GMCH_TXAOUT2- 2 7 LCD_TXAOUT2- 4 GND
SC10U35V0ZY-GP

2ND = 69.50007.A41 9 GMCH_TXACLK+ GMCH_TXACLK+ 3 6 LCD_TXACLK+


2

9 GMCH_TXACLK- GMCH_TXACLK- 4 5 LCD_TXACLK- 5 GND


UMA SRN0J-7-GP

C
20.F1296.040 C
2ND = 20.F1557.040 RN16
SB 9 GMCH_TXAOUT1+ GMCH_TXAOUT1+ 1 8 LCD_TXAOUT1+
9 GMCH_TXAOUT1- GMCH_TXAOUT1- 2 7 LCD_TXAOUT1-
9 GMCH_TXAOUT0+ GMCH_TXAOUT0+ 3 6 LCD_TXAOUT0+
DY 9 GMCH_TXAOUT0- GMCH_TXAOUT0- 4 5 LCD_TXAOUT0-
USBPN8_R 1 2 EC56
SC22P50V2JN-4GP UMA SRN0J-7-GP
USBPP8_R 1 2 EC57
DY SC22P50V2JN-4GP RN19
9 GMCH_TXBOUT2+ GMCH_TXBOUT2+ 1 8 LCD_TXBOUT2+
9 GMCH_TXBOUT2- GMCH_TXBOUT2- 2 7 LCD_TXBOUT2-
9 GMCH_TXBCLK+ GMCH_TXBCLK+ 3 6 LCD_TXBCLK+
9 GMCH_TXBCLK- GMCH_TXBCLK- 4 5 LCD_TXBCLK-

UMA SRN0J-7-GP
RN18
9 GMCH_TXBOUT1+ GMCH_TXBOUT1+ 1 8 LCD_TXBOUT1+
9 GMCH_TXBOUT1- GMCH_TXBOUT1- 2 7 LCD_TXBOUT1-
9 GMCH_TXBOUT0+ GMCH_TXBOUT0+ 3 6 LCD_TXBOUT0+
9 GMCH_TXBOUT0- GMCH_TXBOUT0- 4 5 LCD_TXBOUT0-
F2
1 2 3D3V_S0 UMA SRN0J-7-GP

FUSE-1D1A6V-4GP-U
1 2 BRIGHTNESS_AMD 9,56
69.50007.691 R508 33R2J-2-GP
CCD_PW R 2ND = 69.50007.771 DY
BRIGHTNESS_CN 1 2 BRIGHTNESS 36
1

B C555 C554 BLON_OUT_1 R588 33R2J-2-GP B


1 2 BLON_OUT 36
DY SCD1U16V2ZY-2GP R589 33R2J-2-GP

2
SC4D7U6D3V5KX-3GP

-1
2

1
D35 C4 C3

SC100P50V2JN-3GP

SC100P50V2JN-3GP
DY DY R3
PESD5V0S1BB-GP-U 10KR2J-3-GP

2
-1 3D3V_M92 3D3V_S0
DY

2
for TR

1
3D3V_S0

4
3

4
3
UMA RN111 RN2
LCDVDD SRN4K7J-8-GP SRN4K7J-8-GP
9 GMCH_LCDVDD_ON 1 2 Close to connector LCD1 DY
R2 0R2J-2-GP Layout 40 mil
U1 DIS RN14

1
2

1
2
56 LCDVDD_ON 1 2 LCDVDD_ON_1 1 5 1 4 LCD_EDID_CLK_1
R25 0R2J-2-GP EN IN#5 56 LCD_EDID_CLK LCD_EDID_DAT_1
2 GND 56 LCD_EDID_DAT 2 3
DIS 3 OUT IN#4 4
R1 SRN0J-10-GP-U
1

1
C7
1

DY C6 C2 G5285T11U-GP RN13 C856 C701


SC4D7U6D3V5KX-3GP
SCD1U16V2ZY-2GP

DY 74.05285.07F -1 9 CLK_DDC_EDID 2 3
2

2
SC4D7U6D3V5KX-3GP

100KR2J-1-GP 9 DAT_DDC_EDID 1 4 SC220P50V2KX-3GP


2

-1 SRN0J-10-GP-U SC220P50V2KX-3GP
2

UMA
A JV50-TR8 A

for TR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD CONN
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 19 of 63
5 4 3 2 1
5 4 3 2 1

UMA
RN21
8 1
9 GMCH_BLUE 7 2
9 GMCH_GREEN 6 3
9 GMCH_RED 5 4

SRN0J-7-GP
Ferrite bead impedance: 10 ohm@100MHz
for TR 68.00230.021
D CRT_R_1
2ND = 68.00119.081
1
L18
2 CRT_R
3D3V_S0
Hsync & Vsync level shift D
5V_S0
FCB1608CF-GP
68.00230.021 L16
2ND = 68.00119.081

1
CRT_G_1 1 2 CRT_G

4
3
C700
FCB1608CF-GP RN37 DY SCD1U16V2ZY-2GP For System CRT

2
68.00230.021 L15 SRN2K2J-1-GP
2ND = 68.00119.081
CRT_B_1 CRT_B U46A

14
1 2

1
DIS DIS RN36

1
2
1

1
RN114 EC32 EC30 EC27 FCB1608CF-GP RN34 SRN22-3-GP

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP

SC3P50V2CN-1-GP
8 1 DY DY DY C215 C203 C176 2 3 HSYNC_1 2 3 CRT_HSYNC1_1 1 4 CRT_HSYNC1
R489 R488 R490 56,59 CRT_HSYNC CRT_VSYNC1

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP
7 2 1 4 2 3

2
56 CRT_RED 56,59 CRT_VSYNC TSAHCT125PW -GP
56 CRT_GREEN 6 3
150R2F-1-GP 150R2F-1-GP SRN0J-10-GP-U U46B 73.74125.L13

14
5 4

7
56 CRT_BLUE

4
150R2F-1-GP 2ND = 73.74125.L12 CRT
2

2
SRN0J-7-GP Change SB
VSYNC_1 5 6 CRT_VSYNC1_1
UMA
RN31 UMA-->33R for flicker
for TR 1 4 TSAHCT125PW -GP

7
9 GMCH_VSYNC
R489 PU & TR-DIS-->150R EC31 DY 9 GMCH_HSYNC 2 3 73.74125.L13
2ND = 73.74125.L12
TR-UMA & TR-MUX-->140R SRN0J-10-GP-U

CRT_R 1 2
Layout Note:
C Place these resistors for TR C
close to the CRT-out MLVG04023R0QV05-GP
connector EC29 DY

CRT_G 1 2

MLVG04023R0QV05-GP
Layout Note: DY
* Must be a ground return path between this ground and the ground on
EC28
DDC_CLK & DATA level shift
the VGA connector. CRT_B 1 5V_CRT_S0
2
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT 5V_S0
MLVG04023R0QV05-GP 83.00016.F11
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN. 2ND = 83.00016.B11

1
F3
FUSE-1D1A6V-4GP-U D25 3D3V_S0
BAS16PT-GP
69.50007.691

2
3D3V_M92
2ND = 69.50007.771

3
3D3V_S0

CRT I/F & CONNECTOR 5V_CRT_DDC


500mA

8
7
6
5
B B

4
3

4
3
CRT1 RN35
17 RN112 RN26 SRN10KJ-6-GP
6 SRN2K2J-1-GP SRN2K2J-1-GP
DY
CRT_R 1 11

1
2
3
4
7

1
2

1
2
5V_CRT_S0 CRT_G 2 12 DAT_DDC1_5 CRT_IN#_R
8
CRT_B 3 13 CRT_HSYNC1 DIS U69
9 RN33
4 14 CRT_VSYNC1 2 3 DAT_DDC1_5_Q 4 3 DAT_DDC1 1 R49 2DAT_DDC1_5
56 CRT_DDCDATA
C722 10 1 4 0R0402-PAD
56 CRT_DDCCLK
CRT_IN#_R 5 15 CLK_DDC1_5 5 2
SCD01U16V2KX-3GP 16 SRN0J-10-GP-U -1
6 1
D-SUB-15-37-GP UMA
CRT_VSYNC1 RN20 2N7002KDW -GP
CRT_HSYNC1 2 3 CLK_DDC1_5_Q 84.2N702.A3F
9 GMCH_DDCCLK
1

20.20378.015 9 GMCH_DDCDATA 1 4
C150 2ND = 84.DM601.03F
CLK_DDC1_5 2ND = 20.20813.015 SRN0J-10-GP-U CLK_DDC1 1 R50 2CLK_DDC1_5
SC15P50V2JN-2-GP

SB
2

DAT_DDC1_5 0R0402-PAD
1

C161 C142
for TR
1

C148
SC15P50V2JN-2-GP

DY -1
2

SC100P50V2JN-3GP

DY SC100P50V2JN-3GP 2009/04/28 For 2KV ESD protect


2

R64
A JV50-TR8 A
2 1CRT_IN#_R
36 CRT_DEC#
470R2J-2-GP DY
EC24 Wistron Corporation
1

-1 C129 DY 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


SC100P50V2JN-3GP Taipei Hsien 221, Taiwan, R.O.C.
2

1 2
Title
UMA-->C150, C161 DY for flicker MLVG04023R0QV05-GP CRT Connector
Size Document Number Rev

JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 20 of 63
5 4 3 2 1
5 4 3 2 1

5V_S0
5V_S0

HDMI1
RN6
18 15 TDMS_A_CLK 3 2
+5V_POWER SCL TDMS_A_DAT
SDA 16 4 1

HDMI_TX0+ 7
HDMI_TX0- TMDS_DATA0+ HDMI_A_CEC TP14 TPAD14-GP SRN1K5J-GP
9 TMDS_DATA0- CEC 13 1
HDMI_TX1+ 4 17 DY 66.15236.04L
TMDS_DATA1+ DDC/CEC_GROUNG

1
D HDMI_TX1- 6 19 HDMI_A_HPD_CN EC66 DY D
HDMI_TX2+ TMDS_DATA1- HOT_PLUG_DETECT EC65
1 TMDS_DATA2+

SC220P50V2JN-3GP
HDMI_TX2- 3 14 EC64

2
TMDS_DATA2- RESERVED#14

SC220P50V2JN-3GP
MLVG04023R0QV05-GP
8 TMDS_DATA0_SHIELD
5 TMDS_DATA1_SHIELD DY
2 TMDS_DATA2_SHIELD
20

2
GND
11 TMDS_CLOCK_SHIELD GND 21
HDMI_TXC+ 10 22
HDMI_TXC- TMDS_CLOCK+ GND 3D3V_M92 3D3V_S0
12 TMDS_CLOCK- GND 23

SKT-HDMI19P-11-GP-U2 for TR
62.10078.171

4
3

4
3
2ND = 62.10078.121
RN113 RN79
SRN1K5J-GP SRN1K5J-GP
DY
UMA 66.15236.04L 66.15236.04L

1
2

1
2
DIS
RN32 RN43
9 GMCH_HDMI_CLK 2 3 HDMI_A_CLK_1 2 3 HDMI_A_CLK 56
9 GMCH_HDMI_DATA 1 4 HDMI_A_DAT_1 1 4 HDMI_A_DAT 56
SRN0J-6-GP SRN0J-6-GP
3D3V_S0
3D3V_S0
56 TMDS_A_TXC-
C 56 TMDS_A_TXC+ C

2
C32 C34 C28 C638 RN8
56 TMDS_A_TX0-

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DY DY DY DY TMDS_A_TX0- 2 3 HDMI_TX0-
56 TMDS_A_TX0+ TMDS_A_TX0+ 1 4 HDMI_TX0+

1
SRN0J-10-GP-U
56 TMDS_A_TX1- RN9
56 TMDS_A_TX1+

2
2
R282 TMDS_A_TX1- 2 3 HDMI_TX1-
R281 4K7R2J-2-GP TMDS_A_TX1+ 1 4 HDMI_TX1+
56 TMDS_A_TX2- 4K7R2J-2-GP SRN0J-10-GP-U
56 TMDS_A_TX2+ RN12
DY DY TMDS_A_TX2- 2 3 HDMI_TX2-

1
1
From VGA TMDS_A_TX2+ 1 4 HDMI_TX2+
SRN0J-10-GP-U
RN7
TMDS_A_TXC- 3 HDMI_TXC-

11
15
21
26
33
40
46

35
34
2
for TR

2
U35 TMDS_A_TXC+ 1 4 HDMI_TXC+
SRN0J-10-GP-U

NC#35
NC#34
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
UMA HDMI_TXC-
8 HDMI_CLK- 2 3 38 IN_D1- OUT_D1- 23
8 HDMI_CLK+ 1 4 RN27 39 IN_D1+ OUT_D1+ 22 HDMI_TXC+
UMA SRN0J-10-GP-U
8 HDMI_DATA0- 2 3 41 20 HDMI_TX0-
IN_D2- OUT_D2- 3D3V_S0
8 HDMI_DATA0+ 1 4 RN28 42 IN_D2+ OUT_D2+ 19 HDMI_TX0+
UMA SRN0J-10-GP-U
8 HDMI_DATA1- 2 3 44 17 HDMI_TX1-
IN_D3- OUT_D3-
8 HDMI_DATA1+ 1 4 RN29 45 IN_D3+ OUT_D3+ 16 HDMI_TX1+
UMA SRN0J-10-GP-U
8 HDMI_DATA2- 2 3 47 14 HDMI_TX2-
IN_D4- OUT_D4-

2
B B
8 HDMI_DATA2+ 1 4 RN30 48 IN_D4+ OUT_D4+ 13 HDMI_TX2+
SRN0J-10-GP-U R492
From NB Recommended Equalization: [PC1,PC0]=01, 4dB 2K2R2F-GP
3D3V_S0 R301 2 DY 4K7R2J-2-GP
1 PC0 3 8 HDMI_A_DAT_1
R302 2 4K7R2J-2-GP PC1 PC0 SDA HDMI_A_CLK_1
1 4 9

1
PC1 SCL HPD
DY HPD 7

REXT_HDMI 6
RT_EN#_8101 REXT HDMI_A_HPD_CN
10 RT_EN# HPD_SINK 30
3D3V_S0 3D3V_S0 OE#_8101 25 29 TDMS_A_DAT
OE# SDA_SINK
3D3V_S0 2 R283 1 DDC_EN_PS8101 32 DDC_EN SCL_SINK 28 TDMS_A_CLK
DY
U72
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
4K7R2J-2-GP 5V_S0
1

DY DY HDMI_A_CLK_1 2 1 DDC_OE
A1 BE1
2

R295 R288 HDMI_A_DAT_1 5 7


1
5
12
18
24
27
31
36
37
43
49 A2 BE2
20KR2F-L-GP R303 PS8101-GP
4K7R2J-2-GP DY 499R2F-2-GP 71.P8101.003 8
DY TDMS_A_CLK 3
VCC
2

TDMS_A_DAT B1
6 4
1

OE#_8101 B2 GND

RT_EN#_8101 PI5C3305L-GP
73.53305.A0B

DY UMA
D

Q19
JV50-TR8
A R305 R477 A
9 HDMI_DETECT# HDMI_DETECT# 2 HPD
1 1 2 HDMI_A_HPD_CN
HDMI_A_HPD_CN G 0R2J-2-GP 0R2J-2-GP
56 HDMI_A_HPD 1 2 HDMI Wistron Corporation
2N7002EW -1-GP R304 10KR2J-3-GP R477 : PU & TR-DIS-->0R 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DIS Taipei Hsien 221, Taiwan, R.O.C.
S

PU & TR-UMA & MUXLESS-->5.1K


1

Title
R306
100KR2J-1-GP HDMI HDMI Connector
R306 : PU & TR-DIS-->100K Size Document Number Rev
for TR JV50-TR8 -1
2

PU & TR-UMA & MUXLESS-->10K


Date: Monday, October 26, 2009 Sheet 21 of 63

5 4 3 2 1
5 4 3 2 1

D D

SATA Connector

SATA1
23
NP1
1

2
3
4
5 5V_S0
6
7
8
9

K
1

1
10
C 11 TC22 DY C685 D23 C
12 SS24-GP

2
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP
13
14 MP

A
15 83.2R004.08G
16 2ND = 83.2R004.J8M
17
SATA_RXP0 13
3RD = 83.2R004.H8M
18
19 SATA_RXN0 13
20
21 SATA_TXN0 13
22 SATA_TXP0 13
NP2
24

SKT-SATA22P-27-GP-U1
62.10065.471
2ND = 62.10065.551
3RD = 62.10065.661

SATA_TXP0
SATA_RXN0
SATA_RXP0

SATA_TXN0

MP

B B
3

DY DY DY DY
3

D21
BAV99PT-GP-U D22 D19 D24
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
1

3D3V_S0 3D3V_S0
83.00099.K11 3D3V_S0 3D3V_S0
83.00099.K11 83.00099.K11 83.00099.K11

JV50-TR8
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDD
Size Document Number Rev

JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 22 of 63

5 4 3 2 1
5 4 3 2 1

D
SATA ODD Connector D

ODD1
13
S1

13 SATA_TXP1 S2
13 SATA_TXN1 S3
S4
13 SATA_RXN1 S5
13 SATA_RXP1 S6
S7
R165 DY
5V_S0 10KR2J-3-GP
1 2ODD_DP P1
P2
P3
1ODD_MD P4

1
DY P5
C430 TC9 TP152 P6

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP
D4 TPAD14-GP 14

2
83.2R004.H8M
C SSM24PT-GP SKT-SATA7P+6P-59-GP C

A
62.10065.751
2ND = 62.10065.851
3RD = 62.10065.B01

-1
SATA_RXP1

MP
SATA_RXN1

SATA_TXN1
SATA_TXP1
3

DY D5 DY DY DY
3

BAV99PT-GP-U D6 D8
BAV99PT-GP-U BAV99PT-GP-U D7
BAV99PT-GP-U
1

3D3V_S0 3D3V_S0
83.00099.K11 3D3V_S0 3D3V_S0
B
83.00099.K11 83.00099.K11 B

83.00099.K11

A A
JV50-TR8

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ODD
Size Document Number Rev

JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 23 of 63
5 4 3 2 1
5 4 3 2 1

D
BLUETOOTH MODULE D
1.5A / High Active Voltage 2V

3D3V_S0
3D3V_BT_S0
U68 C920
SC4D7U10V5ZY-3GP
3D3V_BT_S0 1 5 1 DY 2
OUT IN
2 GND
3 NC#3 EN 4
1

EC98 DY BLUETOOTH_EN 36
SCD1U16V2ZY-2GP
G5240B1T1U-GP
2

74.05240.A7F
2ND = 74.09711.A7F R527
0R0402-PAD
2 1
EC21 put near
BLUE1 / all
USB put one
choke near
6
connector by
EMI request USB_5-
4 USBPN5 12
C 3 USB_5+ C
USBPP5 12
2

BT1 1 3D3V_BT_S0
ACES-CON4-1-GP-U2
20.D0197.104
2ND = 20.F0984.004
5

USB_5- 1 AFTE14P-GP TP235


2 1 USB_5+ 1 AFTE14P-GP TP236
3D3V_BT_S0 1 AFTE14P-GP TP237
R528
0R0402-PAD

B B

JV50-TR8
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
BLUETOOTH
Size Document Number Rev
JV50-TR8 -1
Date: Thursday, November 12, 2009 Sheet 24 of 63

5 4 3 2 1
5 4 3 2 1

5V_USB1_S0
USB1
USB1
6
R156 1 5V_USB1_S0
0R0402-PAD
2 1 USB_2- 2 5V_S5
12 USBPN2
2 1 USB_2+ 3 U54
12 USBPP2
4
R157 5 1 8
0R0402-PAD GND VOUT
2 VIN VOUT 7
SKT-USB-268-GP 3 6
USB_PW R_EN# VIN VOUT
D 22.10321.111 4 EN# FLG# 5 USB_OC#0 12 D
2ND = 22.10218.W51
EC84

1
RT9715DGF-GP SCD1U16V2ZY-2GP

1
3RD = 22.10218.P01 DY
C836
74.09715.079

2
SC4D7U6D3V3MX-2GP

2
5V_USB1_S0
2ND = 74.00547.A79
USB2
2008/11/06
USB3
6
R133 1
0R0402-PAD
2 1 USB_0- 2
12
12
USBPN0
USBPP0 2 1 USB_0+ 3 -1_20091019
4
R134 5
0R0402-PAD
SKT-USB-268-GP 5V_USB1_S0
22.10321.111
2ND = 22.10218.W51 100 mil

1
3RD = 22.10218.P01 TC29 TC24 EC79 DY EC83

SE220U6D3VM-7GP

SE220U6D3VM-7GP

SCD1U16V2ZY-2GP
DY
79.22710.6AL

SC1000P50V3JN-GP-U
2

2
2ND = 77.92271.021
C C

USBCN1

17
USB_OC#4 1 TP173 AFTE14P-GP
12 USB_OC#4 15
USBPN1 1 TP174 AFTE14P-GP 14 5V_USB1_S0
12 USBPN1 13
USBPP1 1 TP176 AFTE14P-GP 12 U14
12 USBPP1
11
12 USBPN3 10 1 4
12 USBPP3 9
8
7 USBPN0 2 3 USBPP0
36 USB_PW R_EN# 6
5
4 DY AOZ8001J-GP-U1
5V_S5 3
B
2 83.08000.AAE B
SCD1U16V2ZY-2GP

SC1U10V3ZY-6GP
1

EC85 C837 1
DY
16
2

-1 5V_USB1_S0
ACES-CON15-8-GP-U1
U17
20.F1290.015
1 4
2ND = 20.F1035.015
3RD = 21.D0214.115 USBPN2 2 3 USBPP2

DY AOZ8001J-GP-U1
83.08000.AAE

1.U75 as close to the USB2 as possible


2.U76 as close to the USB1 as possible

JV50-TR8
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
USB
Size Document Number Rev
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 25 of 63

5 4 3 2 1
5 4 3 2 1

LAN_AVDD
1D2V_LAN_S5 3D3V_S5 3D3V_LAN_S5 3D3V_LAN_S5
3D3V_LAN_S5
1 R46 2 CO-Layout BCM5764 and BCM5784
0R0603-PAD
modify BOM :71.05784.M03
1

1
C110 C103 C64 C93
SC4D7U6D3V3MX-2GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
R549

56
61
15
19

38
52
68
R44

6
U4 10KR2J-3-GP
2

2
1 2XTALVDD_G

VDDIO
VDDIO
VDDIO
VDDIO
VDDIO

DC#38
DC#52
NC#68
1D2V_LAN_S5 3D3V_LAN_S5

2
D U3 FCM1608K-601T03GP D

1
2D5V_1D2V_LAN C100
1 A0 VCC 8 68.00217.241
36 BIASVDD_G 2 7 EE_WP SCD1U10V2KX-4GP
BIASVDDH A1 WP

1
5 3 6 SCLK

2
VDDC_IO A2 SCL SO C939
55 VDDC_IO 4 GND SDA 5 R20
13 SCD1U10V2KX-4GP

2
VDDC XTALVDD_G
20 VDDC XTALVDDH 23 AT24C02BN-SH-T-GP 1 2BIASVDD_G
1

C107 C54 C114 34 72.24C02.R01


VDDC

1
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

60 2ND = 72.24C02.M01 FCM1608K-601T03GP C44


VDDC SCD1U10V2KX-4GP
68.00217.241
2

DY

2
48 LAN_AVDD
AVDDH R27
42 LAN_AVDD
AVDDH
1 2LAN_AVDD

AVDDL_G 39 FCM1608K-601T03GP
AVDDL

1
AVDDL_G 45 68.00217.241 C67 C48
AVDDL

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
AVDDL_G 51 AVDDL

2
3D3V_LAN_S0
3D3V_S0 49
TRD3_N MDI3- 27
TRD3_P 50 MDI3+ 27
1 R26 2 GPHY_PLLVDD 35
0R0603-PAD GPHY_PLLVDDL Place PLLVDD/AVDDL
TRD2_N 47 MDI2- 27
C56 46 MDI2+ 27 CKT as close to chip as
TRD2_P
1

SCD1U10V2KX-4GP possible
TRD1_N 43 MDI1- 27
44 MDI1+ 27
2

C PCIE_PLLVDD TRD1_P 3D3V_AUX_S5 C


30 PCIE_PLLVDDL
27 PCIE_PLLVDDL TRD0_N 41 MDI0- 27
TRD0_P 40 MDI0+ 27

1
R35
2 3D3V_LAN_S5 DY 10KR2J-3-GP
PCIE_SDSVDD LINKLED#
33 PCIE_VDDL SPD100LED# 1 10M/100M/1G_LED# 27
24 67

2
PCIE_VDDL SPD1000LED#
1

66 LAN_ACT_LED# 27 ENERGY_DET
C69 TRAFFICLED#

1
SCD1U10V2KX-4GP
2

8 GPIO2 R40
GPIO_2

1
TP59 TPAD14-GP C98 C113 C108 C72 C115 DY 10KR2J-3-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3MX-2GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
2

2
9 UART_MODE
UART_MODE EE_WP TP61 TPAD14-GP 1D2V_LAN_S5
7
SCD1U16V2KX-3GP 1 GPIO_1/SERIAL_DI
8 PCIE_RXP1 2 C87 PCIE_RXDP 26
PCIE_TXD_P GPIO_0/SERIAL_DO
4 GPIO0
R18
8 PCIE_RXN1 SCD1U16V2KX-3GP 1 2 C96 PCIE_RXDN 25 TP183TPAD14-GP
PCIE_TXD_N
8 PCIE_TXP1 31
PCIE_RXD_P 1 2 AVDDL_G
8 PCIE_TXN1 32 FCM1608K-601T03GP
PCIE_RXD_N

SCD1U10V2KX-4GP
12,34 PCIE_WAKE# 12 68.00217.241 C43
WAKE#

1
6,9,11,33,36,55 PLT_RST1# 1 R48 2 LAN_RST 10
PERST#
RN104
0R0402-PAD 3 CLK_PCIE_LAN 29 65 SCLK 5 4 C50
PCIE_REFCLK_P SCLK/EECLK
1

3 CLK_PCIE_LAN# 28 63 SI 6 3 SC4D7U6D3V3MX-2GP

2
PCIE_REFCLK_N SI SO
DY SO/EEDATA
64 7 2 R23
C117 62 CS# 8 1
2

SC47P50V2JN-3GP CS#
1 2GPHY_PLLVDD
SRN4K7J-10-GP 2D5V_1D2V_LAN FCM1608K-601T03GP
68.00217.241

1
B C45 B

SCD1U10V2KX-4GP
59 ENERGY_DET 36 C38
ENERGY_DET SC4D7U6D3V3MX-2GP

2
1

1
VAUX_PRESENT54 C112 C116
VAUX_PRSNT

SCD1U10V2KX-4GP
36 LOW_PWR VMAINPRSNT 53 SCD1U10V2KX-4GP 1 R32 2PCIE_PLLVDD
LOW_PWR VMAIN_PRSNT 0R0603-PAD
3

2
LOW_PWR

1
2 R47
DY 1
0R2J-2-GP 2D5V_1D2V_LAN C75 C81

SCD1U10V2KX-4GP
12,33,34 SMB_CLK
R39 1 2 LAN_SMB_CLK 58 17 SC4D7U6D3V3MX-2GP

2
TEST1 VDDC_IO
12,33,34 SMB_DATA
R34 10R0402-PAD 2 LAN_SMB_DATA 57
TEST2
0R0402-PAD
LAN_XO_R 2 1LAN_X0
82.30020.851 R45 200R2J-L1-GP 22 18 3D3V_LAN_S5 1 R28 2PCIE_SDSVDD
XTALO REGOUT12_IO 0R0603-PAD
2ND = 82.30020.791 1 2 21
XTALI

1
LAN_XI
C92 X1 XTAL-25MHZ-102-GP C51
1

1
C105 1 R22 2RDAC 37 C109 SC4D7U6D3V3MX-2GP

2
RDAC

1
SC15P50V2JN-2-GP

SC4D7U6D3V3MX-2GP
DY C84
SC15P50V2JN-2-GP

R42 SCD1U10V2KX-4GP
2

1K24R2F-GP 1D5R3F-GP

2
2

REGCTL12 Q5
14
REGCTL12
3

BCP69-GP
1
2

A
1ST 84.DCP69.01B A
2ND = 84.00069.B1B 1D2V_LAN_S5
JV50-TR8
3 LAN_CLKREQ# LAN_CLKREQ# 11
3D3V_LAN_S0 CLKREQ#

Wistron Corporation
1

3D3V_LAN_S5 RN15 C58 C73


SC10U10V5ZY-1GP

1 8 VMAINPRSNT 16 SCD1U10V2KX-4GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


LAN_CLKREQ# SUPER_IDDQ Taipei Hsien 221, Taiwan, R.O.C.
2 7
GND

3 6 VAUX_PRESENT
4 5 Title
BCM5784MKMLG-GP
BCM5784MKMLG
69

SRN1KJ-10-GP-U
71.05784.M03 Size Document Number Rev
Custom
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 26 of 63
5 4 3 2 1
A B C D E

LAN Connector
1.route on bottom as differential pairs.
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends. LAN_ACT_LED#

4.pairs must be equal lengths. 10M/100M/1G_LED#


5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
4 7.Must not cross ground moat,except 4

RJ-45 moat. DY DY
C11 C558
SC1KP50V2KX-1GP SC1KP50V2KX-1GP

GIGA Lan Transformer A2(+) A1(-)::GREEN


XF1
A2(+) A3(-):ORANGE
26 MDI1+ 1 12 RJ45_3

2D5V_1D2V_LAN MCT2
DY 3 10

1 R15 2 XRF_TDC 26 MDI1- 2 11 RJ45_6


0R2J-2-GP
26 MDI0+ 5 8 RJ45_1

LAN Connector
1

C39 C31 4 9 MCT1


SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

26 MDI0- 6 7 RJ45_2
2

RJ45
9
XFORM-271-GP 26 10M/100M/1G_LED# A1
CONN_PW R A2
1ST 68.HD081.30B A3
2ND = 68.68160.30B RJ45_1 1
3 RJ45_2 2 3
XF2 RJ45_3 3
26 MDI3+ 1 12 RJ45_7 RJ45_4 4
RJ45_5 5
3 10 MCT4 RJ45_6 6
RJ45_7 7
26 MDI3- 2 11 RJ45_8 RJ45_8 8
CONN_PW R2 B1
26 MDI2+ 5 8 RJ45_4
26 LAN_ACT_LED# B2
4 9 MCT3 10

26 MDI2- 6 7 RJ45_5 RJ45-125-GP-U1


1

1
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

22.10277.021
C16 C14 2ND = 22.10277.231
XFORM-271-GP
2

1ST 68.HD081.30B B1(+) B2(-):YELLOW


2ND = 68.68160.30B

DOC_TIP,DOC_RING,TIP,RING:
W/S : 10/100 @ Surface layers
10/20 @ Inner layers
2 2

RN5
3D3V_LAN_S5 1 8 CONN_PW R2
2 7 CONN_PW R
3 6
4 5

2
SRN470J-3-GP EC11 EC60

1
SC100P50V2JN-3GP

SC100P50V2JN-3GP
DY DY
MCT1
MCT2
MCT3
MCT4

8
7
6
5
RN77
SRN75J-1-GP

1
2
3
4
MCT_R
1 JV50-TR8 1

1
C570
SC1KP2KV6KX-GP Wistron Corporation

2
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN CONN
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 27 of 63
A B C D E
5 4 3 2 1

3D3V_S0

1
C898
SC10U10V5ZY-1GP
D D

2
5VA_S0
"VAUX" Pull high to enable standby mode

1
C909
SC10U10V5ZY-1GP C912
3D3V_S0 SCD1U10V2KX-4GP

2
RN108 C901

1
KBC_BEEP_1 1 4 AUDIO_BEEP 1 2 AUDIP_PC_BEEP C900
2 3 SCD1U10V2KX-4GP
SC1U10V3KX-3GP
C897

2
SRN47K-2-GP-U SC33P50V2JN-3GP

1
2 1
R515 C896
1K91R2F-1-GP SC100P50V2JN-3GP -1

2
RESET# 1 R516 2 ACZ_RST# 12,31
0R0402-PAD ACZ_SYNC 12,31 R520

2
BCLK 1 R514 2 ACZ_BITCLK 12 1 2 LINEOUT_JD# 30
36 KBC_BEEP 1 2 0R0402-PAD 39K2R2F-L-GP
C SCD47U16V3ZY-3GP C893 1 2 C
C895 DY R519
12 ACZ_SPKR 1 2 SPKR_SB_1 SC22P50V2JN-4GP ALC268_SENSE 1 2 LINEIN_JD# 30
SCD47U16V3ZY-3GP C894 10KR2F-2-GP
C899
2DY R518

25
38

12
11
10

33

44
43

34
13
1

1
9

6
U64 1 2 MIC_JD# 30
SC22P50V2JN-4GP 20KR2F-L-GP

AVDD1
AVDD2

RESET#
DVDD_IO

AGPIO
DVDD

SYNC

CENTER
BEEP

BCLK

LFE

SENSE_B
SENSE_A
Sense resistors need close codec

30 LINE_IN_L SC4D7U6D3V3MX-2GP
1 2C907 ALC861_LINE_IN_L 23 5 ACZ_SDATAOUT 12
30 LINE_IN_R SC4D7U6D3V3MX-2GP LINE1_L SDATA_OUT
1 2C911 ALC861_LINE_IN_R 24 LINE1_R SDATA_IN 8 AC97_DATIN 1 2 ACZ_SDATAIN0 12
14 R517 39R2J-L-GP
LINE2_L
-1 15 LINE2_R
48 AUD_SPDIF_OUT
SPDIFO1 ALC_EAPD AUD_SPDIF_OUT 30
29 LINE1_VREFO SPDIFI/EAPD 47 ALC_EAPD 29
RN103 31

30 INT_MIC
30 AUD_MICIN_L
4
3
2
5
6
7MIC1-L_PORT-B_1 SC4D7U6D3V3MX-2GP
1 2C905 MIC1-L_PORT-B 21
LINE2_VREFO

MIC1_L
ALC888S SIDESURR_L
SIDESURR_R
45
46
30 AUD_MICIN_R 1 8MIC1-R_PORT-B_1SC4D7U6D3V3MX-2GP1 2C906 MIC1-R_PORT-B 22
MIC1_R
INT_MIC_2 SC1U10V3ZY-6GP
1 2C902 IMT_MIC1-L 16

GPIO0/DMIC_CLK/SPDIFO2
SRN75J-1-GP SC1U10V3ZY-6GP MIC2_L
1 2C904 IMT_MIC1-R 17
MIC2_R SURR_L 39 FRONTL 29
-1 SURR_R 41 FRONTR 29

GPIO1/DMIC_DATA
RN109 MIC1V_R 32
MIC1V_L MIC1_VREFO_R
1 8 28 MIC1_VREFO_L FRONT_L 35 SOUNDL 29
B MIC2-VREFO B
PIN37_VREFO
2 7 30 MIC2_VREFO FRONT_R 36 SOUNDR 29
3 6
4 5

CD_GND
1

C914 C916 C915


AVSS1
AVSS2

JDREF
DVSS
DVSS
SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

CD_R
VREF

CD_L
SRN2K2J-2-GP
-1
2

ALC888S-VC2-GR-GP
26
42
4
7

27

40
37

2
3

18
20
19
71.00888.D0G

DMIC_CLK 1
TP225 TPAD14-GP
JDREF

MXM_SPDIF 1
TP223 TPAD14-GP
1 DMIC_DAT MONO-OUT
1
TPAD14-GP TP224 VREF TP234 TPAD14-GP
1
1
1

C919 C917 R521


DY SC10U10V5ZY-1GP SCD47U16V3ZY-3GP 20KR2F-L-GP
2
2

JV50-TR8
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Azalia codec ALC888
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 28 of 63

5 4 3 2 1
A B C D E

5V_S0 +5V_SPK_AMP
Close to U70.8 Close to U70.18 +5V_SPK_AMP
+5V_SPK_AMP

2 R532 1 +5V_SPK_AMP
0R0603-PAD

SC1U10V3KX-3GP

SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
1

1
C922

C923

C924

SC10U6D3V5KX-1GP
1

1
C928

C929
SCD1U10V2KX-4GP
4 4
60ohm 100MHz C930

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
2

2
DY DY DY SC1U6D3V2KX-GP
3000mA 0.05ohm DC

2
1

1
C925

C926

C927
2

2
Close to Pin9

18

17

30
8

9
U70

PVDD
PVDD

CPVDD

HPVDD

VDD
SPKR_L+ 6 10 AMP_C1P C933 1 2 SC1U10V3KX-3GP
30 SPKR_L+ SPKR_L- OUTL+ C1P AMP_C1N
30 SPKR_L- 7 OUTL- C1N 12
SPKR_R- 19
30 SPKR_R- SPKR_R+ OUTR- AUD_LIN_R 2 R533
30 SPKR_R+ 20 OUTR+ SPKR_INR 2 1 8K2R2F-1-GP AUD_LIN_R_1 1 2C931 SC1U10V3KX-3GP SOUNDR 28
3 AUD_LIN_L 2 1 8K2R2F-1-GP AUD_LIN_L_1 1 2C932 SC1U10V3KX-3GP
SPKR_INL SOUNDL 28
R534
SPKR_R+1 15 R535 2 1 100KR2J-1-GP
DY +5V_SPK_AMP
SC1U25V3KX-1-GP 2K2R2J-2-GP 30 SPKR_R+1 SPKR_L+1 HPR AUD_SPK_ENABLE# R537 1
30 SPKR_L+1 16 HPL SPKR_EN# 23 2 0R0402-PAD MAX9789A_SHDN#
C935 R541 25 AMP_MUTE#_R R536 2 1 0R2J-2-GP
DY
MUTE# AMP_SHUTDOW N# 36
28 FRONTR 1 2 AUD_HP1_OUT_R1 1 2 AUD_HP1_OUT_R2 26 HP_INR HP_EN 22 R538
28 FRONTL 1 2 AUD_HP1_OUT_L1 1 2 AUD_HP1_OUT_L2 27 HP_INL LDO_EN 4 AMP_REGEN 2 1 5V_S0
LDO_OUT 29 5VA_S0
C934 R539 AUD_AMP_GAIN1 31 24 AUD_BIAS 100KR2J-1-GP
SC1U25V3KX-1-GP 2K2R2J-2-GP AUD_AMP_GAIN2 GAIN1 BIAS AUD_SET
32 1

SC1U10V3KX-3GP
GAIN2 LDO_SET

CPGND

CPVSS

SC4D7U6D3V3MX-2GP
2
PGND
PGND

PVSS
3 3

GND
GND

1
C936

C937
R540
0R0402-PAD
MAX9789CETJ-GP

21
5

28
33

11

13

14

2
1
74.09789.B13

C938
2 1AUD_CPVSS

SC1U10V3KX-3GP

GAIN SETTING
AMP_SHUTDOW N# 36
+5V_SPK_AMP
Signal inverter for speaker shutdown
28 ALC_EAPD
1

1
2 R545 R546 2

1
100KR2J-1-GP 100KR2J-1-GP D32
DY +5V_SPK_AMP R543 BAW 56-3-GP
0R0402-PAD
2

AUD_AMP_GAIN1 AUD_AMP_GAIN2 DY
1

3
1

R542
R544
R547 R548 100KR2J-1-GP
100KR2J-1-GP 100KR2J-1-GP MAX9789A_SHDN# 1 2 3D3V_S0
DY
2

AUD_SPK_ENABLE#
2

10KR2J-3-GP
U71
DY
AMP_MUTE#_R G
. .

D
.
.
.

GAIN1 GAIN2 GAIN S

0 0 6dB 2N7002E-1-GP
0 1 10dB
84.2N702.D31
1 0 15.6dB 2ND = 84.2N702.E31
1 1 21.6dB
JV50-TR8
1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AUDIO AMP
Size Document Number Rev

JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 29 of 63

A B C D E
5 4 3 2 1

LINE IN
Internal Speaker NP2
LIN1

NP1
D RN107 28 LINEIN_JD# 5 D
29 SPKR_L- SPKR_L- 4

METAL
29 SPKR_L+ SPKR_L+ 2 3 LINE_IN_R_CONN 3
SPKR_R- 28 LINE_IN_R
29 SPKR_R- 28 LINE_IN_L 1 4 6
29 SPKR_R+ SPKR_R+ LINE_IN_L_CONN 2
1
SRN75J-2-GP-U

1
1

R512
R513
PHONE-JK329-GP-U

1
EC97 EC96 1ST 22.10133.I51
DYDY 2ND = 22.10088.H21

10KR2J-3-GP
10KR2J-3-GP

MLVG04023R0QV05-GP

MLVG04023R0QV05-GP
3RD = 22.10133.I41

2
2
SPKR_R1
3

2
SPKR_R+ 1

SPKR_R-
DY DY
2
4

ACES-CON2-12-GP-U 20.F1240.002
2ND = 20.F1561.002
SPKR_L1 -1
3
SPKR_L+

SPKR_L-
1

2
MIC IN MICIN1
4
C NP2 C

ACES-CON2-12-GP-U 20.F1240.002 NP1


1

EC1 EC2 EC67 EC68 2ND = 20.F1561.002 28 MIC_JD# 5


DY DY DY DY RN41 4

METAL
-1 2 3 AUD_MICIN_R_2 3
2

28 AUD_MICIN_R
SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

28 AUD_MICIN_L 1 4 6
SRN0J-10-GP-U AUD_MICIN_L_2 2
1

1
EC94 EC95
DY

1
1

R498
R500
PHONE-JK330-GP

MLVG04023R0QV05-GP

MLVG04023R0QV05-GP
1ST 22.10133.I61
DY
2ND = 22.10088.H11

10KR2J-3-GP
10KR2J-3-GP

2
3RD = 22.10133.I21

2
2
DYDY
AUD_SPDIF_OUT 1 AFTE14P-GP TP164
5V_SPDIF_S0 1 AFTE14P-GP TP158
LINEOUT_JD# 1 AFTE14P-GP TP154
LOUT_R+1 1 AFTE14P-GP TP163
LOUT_L+1 1 AFTE14P-GP TP155
MIC_JD# 1 AFTE14P-GP TP168
AUD_MICIN_R_2 1 AFTE14P-GP TP166
AUD_MICIN_L_2 1 AFTE14P-GP TP165

INT_MIC_1 1 AFTE14P-GP TP4


B LINEIN_JD#

LINE_IN_R_CONN 1
1 AFTE14P-GP

AFTE14P-GP
TP172

TP171
INT MIC -1
B

AMIC1
LINE_IN_L_CONN 1 AFTE14P-GP TP170 3
1 INT_MIC_1 1 ER1 2
0R0402-PAD INT_MIC 28
2

1
4

LINE OUT NP2


LOUT1
ACES-CON2-12-GP-U

20.F1240.002
MLVG0402220NV05BP-GP-U
EC58
NP1 2ND = 20.F1561.002 69.80024.011

2
TX
74.05240.B7F 28 AUD_SPDIF_OUT C
5V_SPDIF_S0
IC
U56 2ND = 74.09711.07F B DRIVE -1
A LED
LINEOUT_JD# 4 3 28 LINEOUT_JD# 5
EN# NC#3
GND 2 4
5V_S0 5 1 5V_SPDIF_S0 1R551 2 LOUT_L+1 3
METAL

IN OUT 29 SPKR_L+1
29 SPKR_R+1 1R550 2 LOUT_R+1 2
1

76D8R3F-2-GP 1
1

C851 C853 76D8R3F-2-GP 7


G5240B2T1U-GP-U
1

SCD1U16V2ZY-2GP EC104 EC105 6 JV50-TR8


2

SCD1U16V2ZY-2GP DY
DY
2

DY PHONE-JK332-GP
MLVG04023R0QV05-GP

MLVG04023R0QV05-GP

R472 2 DY 1 1ST 22.10133.H91


A
0R2J-2-GP DY Wistron Corporation A

2ND = 22.10257.091 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2

Taipei Hsien 221, Taiwan, R.O.C.


3RD = 22.10133.I31
Title

AUDIO JACK
Size Document Number Rev

JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 30 of 63

5 4 3 2 1
5 4 3 2 1

D
MDC 1.5 CONN -1
D

1
C539
MDC1 SC4D7U6D3V5KX-3GP

2
12 ACZ_SDATAOUT_MDC ACZ_SDATAOUT_MDC 13 15
NP1 14
1 2 3D3V_S5
3 4
5 6 3D3V_S5 -1
12,28 ACZ_SYNC R437 1 2 ACZ_SYNC_A 7 8
12 ACZ_SDATAIN1 R245 1 0R0402-PAD
2 ACZ_SDATAIN1_A 9 10
33R2J-2-GP 11 12 ACZ_BTCLK_MDC_1 1 R244 2 ACZ_BTCLK_MDC 12
12,28 ACZ_RST# 1 R438 2ACZ_RST#_MDC NP2 17 -1 0R0402-PAD
0R0402-PAD 16 18

1
C540
1 11

1
-1 TYCO-CONN12A-2-GP-U1
1

20.F0917.012 R243 C541


13 16

SC4D7U6D3V5KX-3GP
2

100KR2J-1-GP
DY C534 2ND = 20.F0604.012 DUMMY-C2

1
SC22P50V2JN-4GP C536
14 17
2

SC100P50V2JN-3GP

2
15 18
2

2 12

C C

B B

JV50-TR8
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
MDC
Size Document Number Rev
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 31 of 63
5 4 3 2 1
5 4 3 2 1

3D3V_S0 3D3V_D_S0

SD_CLK/XD_D1/MS_CLK
SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2

SD_DAT6/XD_D7/MS_D3
1 R487 2
0R0603-PAD

SD_DAT4/XD_WP#

SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
SD_DAT1/XD_D4

SD_DAT5/XD_D0
XD_D5/MS_BS
XD_D3/MS_D1
-1

MS_INS#

XD_R/B#
XD_CD#

SD_CD#

XD_CE#
XD_CLE
D D

XD_ALE
CARD_3D3V_S0

SD_WP
2
C876
DY SC1U10V3KX-3GP

1
U58

19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43
RTS5159-GR-GP

SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19
2
C872

2
SC1U10V3KX-3GP -1 C874
SCD1U16V2ZY-2GP 9 24

1
CARD_3V3 MS_D5
22

1
VREG MS_D4
1 R493 2 AV_PLL 1 AV_PLL
-1 0R0402-PAD
VREG 10 VREG
NC#30 30
3D3V_S0 1 R491 2 3V_VBUS_S0 8 3V3_IN NC#7 7
0R0603-PAD 3
NC#3
3D3V_D_S0 33 D3V3

2
C871 C875 -1 11 D3V3

1
SC4D7U6D3V5KX-3GP SCD1U16V2ZY-2GP DY C852
DY C873 SCD1U16V2ZY-2GP

1
SCD1U16V2ZY-2GP

2
MODE_SEL 45
LED1 SD_CMD MODE_SEL
36 SD_CMD GND 6
3D3V_S0 1 R484 2 VBUS_R ADY K VBUS_LED 14 GPIO0 GND 12
DY68R2F-GP R494 2 32
RREF GND

XTAL_CTR
LED-W -23-GP 1 2 RREF 44 46
C 6K19R2F-GP RST# GND C

EEDO
EECS
EESK
XTLO
RST# 1 R480 2

EEDI
XTLI
3D3V_D_S0

DM
0R0402-PAD

DP
71.05159.00G

5
4

13

47
48

17
16

15
18
1

MODE_SEL -1 -1
DY

2
R474

1
100KR2J-1-GP R482 1 R496 2 USB_10+

XDAL_CTR
C864 12 USBPP10 0R0402-PAD
2

0R0402-PAD
1 R479 2RST# SC47P50V2JN-3GP 1 R495 2 USB_10-

12M_XO
11,33,34,37 PLT_RST1#_B

2
0R0402-PAD 12 USBPN10 0R0402-PAD
DY

1
1

C858
-1 SC33P50V2JN-3GP
2

3D3V_D_S0 1 R485 2 -1
0R0402-PAD

3 CLK48_5158E 1 R486 2 12M_XO


SB -1 0R0402-PAD

B B

5 IN1 CARD-READER (SD/MMC/MS/MS PRO/XD)


CARD_3D3V_S0

CARD1

CARD_3D3V_S0 23 25 SD_DAT0/XD_D6/MS_D0_1 R471 2 1 SD_DAT0/XD_D6/MS_D0


SD_VCC SD_DAT0
1

C880 C881 14 29 SD_DAT1/XD_D4_1 R475 2 10R0402-PAD SD_DAT1/XD_D4


SC4D7U6D3V5KX-3GP SCD1U16V2ZY-2GP MS_VCC SD_DAT1 SD_DAT2/XD_RE#_1 R476
33 XD_VCC SD_DAT2 10 2 10R0402-PAD SD_DAT2/XD_RE#
DY 11 SD_DAT3/XD_W E#_1 R473 2 10R0402-PAD SD_DAT3/XD_W E#
2

SD_DAT3 0R0402-PAD
-1
SD_DAT5/XD_D0 2 1 R506 SD_DAT5/XD_D0_1 8 12 SD_CMD_1 R470 2 1 SD_CMD
0R0402-PAD SD_CLK/XD_D1/MS_CLK XD_D0 SD_CMD SD_CLK/XD_D1/MS_CLK 0R0402-PAD
9 XD_D1 SD_CLK 24
SD_DAT7/XD_D2/MS_D2_1 26 36 SD_CD#
XD_D3/MS_D1 XD_D2 SD_CD_SW
2 1 R502 XD_D3/MS_D1_1 27 XD_D3 SD_WP_SW 35 SD_W P
0R0402-PAD SD_DAT1/XD_D4_1 28
XD_D5/MS_BS_1 XD_D4
30 XD_D5
SD_DAT0/XD_D6/MS_D0_1 31 19 SD_DAT0/XD_D6/MS_D0_1
SD_DAT6/XD_D7/MS_D3_1 XD_D6 MS_DATA0 XD_D3/MS_D1_1
32 XD_D7 MS_DATA1 20
18 SD_DAT7/XD_D2/MS_D2_1 R501 2 10R0402-PAD SD_DAT7/XD_D2/MS_D2
XD_R/B# MS_DATA2 SD_DAT6/XD_D7/MS_D3_1 R507 2
1 XD_R/B MS_DATA3 16 10R0402-PAD SD_DAT6/XD_D7/MS_D3
SD_DAT2/XD_RE#_1 2
XD_CE# XD_RE XD_D5/MS_BS_1 R503 2
3 XD_CE MS_BS 21 10R0402-PAD XD_D5/MS_BS
XD_CLE 4 17 MS_INS#
XD_ALE XD_CLE MS_INS SD_CLK/XD_D1/MS_CLK
5 XD_ALE MS_SCLK 15
SD_DAT3/XD_W E#_1 6 XD_WE JV50-TR8
A SD_DAT4/XD_W P# 2 1 R505 SD_DAT4/XD_W P#_1 7 A
0R0402-PAD XD_CD# XD_WP
34 XD_CD_SW 4IN1_GND 13
22
NP1 NP1
4IN1_GND
4IN1_GND 38 Wistron Corporation
SD_DAT0/XD_D6/MS_D0_1 1 2 NP2 37 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SD_DAT1/XD_D4_1 EC88 SCD1U25V2ZY-1GP NP2 4IN1_GND Taipei Hsien 221, Taiwan, R.O.C.
DY 1 2
SD_DAT2/XD_RE#_1 DY EC90 1 2 SCD1U25V2ZY-1GP
SD_DAT3/XD_W E#_1 DY EC92 1 2 SCD1U25V2ZY-1GP CARD-PUSH-36P-5-GP-U Title
SD_W P DY EC89 1 2 SCD1U25V2ZY-1GP 20.I0081.011
SD_CD# DY EC93 1 2 SCD1U25V2ZY-1GP CARDREADER- RTS5159
SD_CMD_1 DY EC91 1 2 SCD1U25V2ZY-1GP 2ND = 20.I0109.001 Size Document Number Rev
SD_CLK/XD_D1/MS_CLK DY EC86 1 2 SCD1U25V2ZY-1GP
DY EC87 SCD1U25V2ZY-1GP JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 32 of 63

5 4 3 2 1
A B C D E

Mini Card Connector(WLAN) Mini Card Connector(Robson2 and 3G) 3D3V_S0 3D3V_S5 3D3V_S0
3D3V_S5

1D5V_S0

1
DY

1
7.3/9.2mm R296 R331
0R2J-2-GP R336 DY 0R2J-2-GP
MINI1 R297 0R2J-2-GP
4 0R2J-2-GP 4

2
53

2
NP1
1 2 MINI3_PW R
MINI2_PW R
H=6.0/8.0mm 3D3V_MINI 3D3V_MINI R629
3 4
5 6
1D5V_S0 1 2 W LAN2_CLKREQ#_1 7 8
MINI2 3 W LAN2_CLKREQ# 0R2J-2-GP 9 10 -1_20091022

2
53 3 CLK_PCIE_MINI2# 11 12
NP1 R250 13 14 C639 R312
3 CLK_PCIE_MINI2 SC100P50V2JN-3GP 10KR2J-3-GP
1 2 0R0603-PAD 15 16

1
1 DY 2
3 4 2E51_RxD_1 17 R310 1 18

1
R620 36 E51_RxD R307 0R0402-PAD
5 6 36 E51_TxD 2E51_TxD_1 19 1 20 W IRELESS2_EN 36
3 W LAN_CLKREQ# 1 DY 2 W LAN_CLKREQ#_1 7 8 21 0R0402-PAD
22 PLT_RST1#_MINI2 1 2 PLT_RST1# 6,9,11,26,36,55
0R2J-2-GP 9 10 8 PCIE_RXN3 C631 1 RXN3 232 24 R300 100R2J-2-GP
11 12 8 PCIE_RXP3 C628 1 RXP3 252SCD1U16V2KX-3GP
26
3 CLK_PCIE_MINI1#

2
13 14 27 SCD1U16V2KX-3GP
28 RN78
3 CLK_PCIE_MINI1 C552 SMB_CLK_MINI2
15 16 29 30 1 DY 4SRN33J-5-GP-U SMB_CLK 12,26,34
SC100P50V2JN-3GP DY 10KR2J-3-GP 8 PCIE_TXN3 31 32 SMB_DATA_MINI2 2 3 SMB_DATA 12,26,34

1
DY 1 DY 2 8 PCIE_TXP3 33 34
17 18 R252 35 36 USBPN4_1 1 2
36 E51_RxD USBPN4 12
19 20 37 38 USBPP4_1 R292 1 0R0402-PAD
2
36 E51_TxD W IRELESS_EN 36 USBPP4 12
21 22 PLT_RST1#_MINI1 1 2 3D3V_S0 R289
1 23D3V_S0_MIN1_1 39 40 R291 0R0402-PAD
C550 1 RXN2 R251 0R2J-2-GP PLT_RST1#_B 11,32,34,37 0R2J-2-GP LED_W W AN2# TP15 TPAD14-GP
8 PCIE_RXN2 DY 2 23 24 41 42 1
8 PCIE_RXP2 C549 1 2 RXP2 25 26 DY 3D3V_S5 1 2 43 44 W LAN2_LED#_MC 41
DY SCD1U16V2KX-3GP 27 28 RN72 SRN33J-5-GP-U R290DY0R2J-2-GP 45 46
SCD1U16V2KX-3GP 29 30 SMB_CLK_MINI1 1 DY 4 47 48
SMB_CLK 12,26,34
3
8 PCIE_TXN2 31 32 SMB_DATA_MINI1 2 3 49 50 3
SMB_DATA 12,26,34
8 PCIE_TXP2 33 34 5V_S5 1 R280 2 5V_S5_MIN1 51 52
35 36 USBPN7_1 1 DY 2 0R0402-PAD NP2
USBPN7 12
37 38 USBPP7_1 R248
1 0R2J-2-GP
2 54
USBPP7 12
3D3V_MINI 39 40 R246DY0R2J-2-GP
41 42 LED_W W AN# 1 TP169 TPAD14-GP SKT-MINI52P-20-GP
43 44 W LAN_LED#_MC 41
45 46 20.F1117.052
47 48
49 50 2ND = 62.10043.391
5V_S5 2 R241 1 5V_S5_MIN2 51 52
0R0402-PAD NP2
54

SKT-MINI52P-13-GP

1ST 20.F1517.052
2ND = 62.10043.511
SB

2 2

R239 0R2J-2-GP
3D3V_S0 1 DY 2 3D3V_MINI

R240 0R2J-2-GP
3D3V_S5 1 DY 2

Place near MINI2

3D3V_S0 1D5V_S0

3D3V_MINI

C521 C519 C522 C553 C530 C538


1

1
SC1U10V3ZY-6GP

SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY TC13 DY DY DY DY DY
ST100U6D3VBM-8GP
2

DY Place near MINI1

3D3V_S0 1D5V_S0
-1 MINI2_PW R
JV50-TR8
1 1
C667 C658 C594 C630
1

1
C618 TC20
Wistron Corporation
SC10U6D3V5KX-1GP

SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
DY
ST100U6D3VBM-8GP

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


2

2
Taipei Hsien 221, Taiwan, R.O.C.

Title

MINI CARD
Size Document Number Rev

JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 33 of 63

A B C D E
5 4 3 2 1

NEWCARD Connector
NEW 2
DY
1 2

D D

CARDBUS2P-21-GP-U
21.H0182.001

NEW 1 3D3V_S5
NP2
26 12,36,48 PM_SLP_S5#
8 PCIE_TXP5 25
8 PCIE_TXN5 24
DY 23
C532 1 2 SCD1U16V2KX-3GP RXP5

21
20
19
18
17
16
8 PCIE_RXP5 22
8 PCIE_RXN5 C531 1 2 SCD1U16V2KX-3GP RXN5 21 U26
DY 20

SHDN#
OC#

NC#16
GND

RCLKEN
AUXIN
3 CLK_PCIE_NEW 19
3D3V_NEW _S0 18
3 CLK_PCIE_NEW # CPPE#
12 CPPE# 17
NEW _PIN16 16 12,35,36,42,44,49,53,54 PM_SLP_S3# 1 15
STBY# AUXOUT 3D3V_NEW _LAN_S5
TP167 15 2 14
3D3V_S0 3_3VIN NC#14 1D5V_S0
14 3D3V_NEW _S0 3 3_3VOUT NC#13 13 1D5V_NEW _S0
3D3V_NEW _LAN_S5 TPS2231_PERST# 13 4 12
3D3V_S0 NC#4 1_5VIN 1D5V_S0
12 3D3V_NEW _S0 5 NC#5 1_5VOUT 11 1D5V_NEW _S0
1DY PCIE_W AKE#_NEW

SYSRST#
12,26 PCIE_W AKE# 2 11

CPUSB#
PERST#
R226 0R2J-2-GP 10 DY

CPPE#
1D5V_NEW _S0
RN64 9

GND
12,26,33 SMB_DATA 1 DY 4 SMB_DATA_NEW 8
C
12,26,33 SMB_CLK 2 3 SMB_CLK_NEW 7 C
SRN33J-5-GP-U CONN_TP1 6 W 83L351YG-GP

6
7
8
9
10
TP162 CONN_TP2 5 DY R242
DY TP161 CPUTSB# 4 11,32,33,37 PLT_RST1#_B 2 1 PLT_RST1#_NEW CARD
R210 1 2 0R2J-2-GP USBPP9_1 3 0R2J-2-GP 3D3V_S5
12 USBPP9 R207 1 2 0R2J-2-GP USBPN9_1 2 TPS2231_PERST# RN71
12 USBPN9 DY 2 1 CPUTSB# 2 3
1 DY DY CPPE# 1 DY 4
NP1 C533
SC100P50V2JN-3GP 74.83351.073 SRN100KJ-6-GP
CARDBUS26P-20GP-U
62.10081.131

Place them Near to Chip Place them Near to Connector

3D3V_S0 3D3V_NEW _S0 1D5V_NEW _S0 3D3V_NEW _LAN_S5

C518
1

1
C543 C503

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP C520 C512

SCD1U16V2ZY-2GP
DY SC1U10V3ZY-6GP C510 SCD1U16V2ZY-2GP
2

2
SC1U10V3ZY-6GP
B B

DY DY DY DY DY

JV50-TR8

A
Wistron Corporation A

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

NEW CARD
Size Document Number Rev

JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 34 of 63

5 4 3 2 1
5 4 3 2 1

FAN1_VCC
5V_S0
*Layout* 15 mil

1
C669 C670
SCD1U16V2ZY-2GP DY C679 DY SC2200P50V2KX-2GP

1
SC4D7U6D3V5KX-3GP D20 R9

2
BAS16PT-GP
10KR2J-3-GP
FAN1_VCC

2
D D
AFAN1

2
83.00016.F11
5
2ND = 83.00016.B11 FAN1_FG1 3
2

1
4

1
C18 *Layout* 15 mil
SC1KP50V2KX-1GP
ACES-CON3-GP-U1

2
20.F0714.003
2ND = 20.D0246.103
5V_S0
5V_S0 U2
*Layout* 30 mil
1 2 5V_G792_S0 6 1
R12 VCC FAN1
20 DVCC FG1 4
10R2J-2-GP C12 14 G792_32K
CLK
1

1
SC4D7U6D3V3MX-2GP C9 C10 16
SDA SMBD_Therm 36,56
DY SCD1U16V2ZY-2GP 7 18
DXP1 SCL SMBC_Therm 36,56
1

C24 9 19 3.System Sensor, Put Plamrest.


2

2
DXP2 NC#19
1

SC1U10V3ZY-6GP 11
R11 SCD1U16V2ZY-2GP DXP3 G792_DXP2

C
2

21KR2F-GP 5 G792_DXP3

C
13 ALERT# DGND
15 17 B Q23
ALERT# DGND

1
T8_HW _SHUT# 13 C17 C8 C551 B Q11 C702 MMBT3904-4-GP
2

THERM#

SC470P50V3JN-2GP
C V_DEGREE 3 8 MMBT3904-4-GP C

E
THERM_SET SGND1 G792_DXN2 SC470P50V3JN-2GP
42 RUNPW ROK 2 10 84.T3904.C11

E
RESET# SGND2
1

T8=90 12 G792_DXN3 SC2200P50V2KX-2GP 84.T3904.C11 2ND = 84.03904.L06


R10 SGND3

GAP-CLOSE

GAP-CLOSE
49K9R2F-L-GP SC2200P50V2KX-2GP

2
G792SFUF-GP G1 G2 2ND = 84.03904.L06
74.00792.A79 2.H/W Shutdown
2

1
3D3V_S5
DXP1:108 Degree H_THERMDA 6
DXP2:H/W Setting

1
Place near chip as close C20
U16B DXP3:88 Degree SC2200P50V2KX-2GP
14

as possible
R7

2
4 10R2J-2-GP H_THERMDC 6
12,34,36,42,44,49,53,54 PM_SLP_S3# 32KHZ G792_32K
6 1 2
11,15 RTC_CLK 5 1.For CPU Sensor
TSLVC08APW -1-GP
7

32K suspend clock output


73.07408.L16
2ND = 73.07408.L15
BL3#
3RD = 73.07408.02B 5V_AUX_S5 DCBATOUT 5V_AUX_S5
B
HW Thermal Throttling B

1
1
R308
1

C656 U43 DY 150R2J-L1-GP-U


SCD1U16V2ZY-2GP DY DY R330 5V_AUX_S5
5 1 HTH 1MR2F-GP HW thermal shut down tempature
2

2
VCC HTH
DY GND 2 2 setting 95 degree . Put Near SB.
4 3 LTH
RESET#/RESET LTH

1
C645
1

SCD01U16V2KX-3GP DY R309
T8_HW _SHUT# LOW 3_OFF G680LT1UF-GP R338 U38 DY 0R2J-2-GP
R321

2
DY 6K04R2F-GP
1 DY 2 SB_THSET 1 5 G709_VCC

2
18KR2F-GP SET VCC
2 GND DY
2

T8_HW _SHUT# 3 4 SB_TH_HYST


3D3V_AUX_S5 HTH OUT# HYST
-1
2

1
G709T1UF-GP
R322 DY R337 R314
2

0R0402-PAD 174KR2F-GP DY 0R2J-2-GP


3

D18 OUT#: Hi active / mount R1110


1

DY BAW 56-7-F-GP Low active / mount R1108


1

2
R311 D17 RSMRST# 6,36
10KR2J-3-GP BAT54-4-GP 3D3V_AUX_S5
DY U39
3
2

1 A VCC 5
36,52 S5_ENABLE 2 B
1

A C646 3 4 S5PW R_ENABLE 46 JV50-TR8


A

SCD1U16V2ZY-2GP GND Y
DY
D34
2

NC7S08M5X-NL-GP
2 3V5V_ENABLE 46
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
3 Taipei Hsien 221, Taiwan, R.O.C.
6,36 RSMRST#
1 2
R298 1KR2J-1-GP 1 Title
KBC_THERMTRIP# 36

BAT54C-7-F-GP
G792
Size Document Number Rev
1ST 83.R2003.E81 2ND = 83.BAT54.081 A3 JV50-TR8 -1
3RD = 83.00054.X81 Date: Monday, October 26, 2009 Sheet 35 of 63
5 4 3 2 1
5 4 3 2 1

3D3V_AUX_S5 3D3V_S0
FOR KBC DEBUG

1
3D3V_AUX_S5 3D3V_AUX_S5 C207 C194
5V_AUX_S5

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP
EC36 VBAT VBAT 1 R394 2

KBC_XO_R 2

2
8
7
6
5
SCD1U16V2ZY-2GP 0R0603-PAD 3 2
1

C753 C751 C754 C750 C725 C139 C749 C730 TPAD14-GP


TP113

1
3D3V_S0 3D3V_S0

SC10U6D3V3MX-GP

SCD1U16V2ZY-2GP

SC1U16V3ZY-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
DY RN39 C733 X2 TPAD14-GP
TP114

SC10U6D3V3MX-GP
SRN4K7J-10-GP DY DY
2

DY 4 1

2
C259 C271 DY
1
2
3
4

1
SC10U6D3V3MX-GP

SCD1U16V2ZY-2GP
BAT_SCL SMBC_Therm

1
BAT_SDA SMBD_Therm R87 X-32D768KHZ-38GPU 2 R66 1 10KR2J-3-GP
D DY 82.30001.691 U6B 2 OF 2 DY D

30KR2F-GP
2ND = 82.30001.A81

2
LPC_LAD[0..3]
11,37 LPC_LAD[0..3] 51 BAT_IN#

2
3D3V_AUX_S5 1 2 KBC_XI 77 53 KCOL0 1 TP39 AFTE14P-GP
R85 10MR2J-L-GP 32KX1/32KCLKIN KBSOUT0/JENK# KCOL1 TP27 AFTE14P-GP
R95 KBSOUT1/TCK 52 1

102

115
KCOL2 TP40 AFTE14P-GP

80

19
46
76
88
KBSOUT2/TMS 51 1

1
1 2 1 OF 2 U6A 50 KCOL3 1 TP28 AFTE14P-GP
6,9,11,26,33,55 PLT_RST1# KBSOUT3/TDI
R382 KBC_XO 79 49 KCOL4 1 TP41 AFTE14P-GP

GPIO41

VDD

AVCC

VCC
VCC
VCC
VCC
VCC
32KX2 KBSOUT4/JEN0#

1
100R2J-2-GP 100KR2F-L1-GP 30 48 KCOL5 1 TP29 AFTE14P-GP
29 AMP_SHUTDOW N# GPIO55/CLKOUT KBSOUT5/TDO
C232 47 KCOL6 1 TP42 AFTE14P-GP
-1_20091022 SC100P50V2JN-3GP TPAD14-GP TP63 KBC_CIR 63
KBSOUT6/RDY#
43 KCOL7 1 TP30 AFTE14P-GP

2
BAT_IN# GPIO14/TB1 KBSOUT7 KCOL8 TP43 AFTE14P-GP
124 GPIO10/LPCPD# VREF 104 12,52 PM_PW RBTN# 117 GPIO20/TA2 KBC KBSOUT8 42 1
PLT_RST1#_1 7 39 Volume_down# Volume_down# 31 41 KCOL9 1 TP31 AFTE14P-GP
LRESET# 1105 GPIO56/TA1 KBSOUT9 KCOL10 TP44 AFTE14P-GP
11,15 PCLK_KBC 2 LCLK A/D GPI90/AD0 97 AD_IA 50 28 KBC_BEEP 32 GPIO15/A_PWM KBSOUT10 40 1
3 98 TP_LOCK_BTN# 40 12 EC_TMR 118 39 KCOL11 1 TP32 AFTE14P-GP
11,37 LPC_LFRAME# LFRAME# GPI91/AD1 GPIO21/B_PWM KBSOUT11
2

126 99 W IRELESS_BTN# 40 19 BRIGHTNESS 62 38 KCOL12 1 TP45 AFTE14P-GP


11,37 LPC_LAD0 LAD0 GPI92/AD2 GPIO13/C_PWM KBSOUT12/GPIO64
R109 127 100 BT_BTN# 40 37 KCOL13 1 TP33 AFTE14P-GP
11,37 LPC_LAD1 LAD1 GPI93/AD3 KBSOUT13/GPIO63
0R2J-2-GPDY 128 108 36 KCOL14 1 TP46 AFTE14P-GP
11,37 LPC_LAD2 LAD2 GPIO05 1105 KBSOUT14/GPIO62
1 96 TP189 TPAD14-GP 35 KCOL15 1 TP25 AFTE14P-GP
C285
11,37 LPC_LAD3
125
LAD3 LPC GPIO04 FP_DETECT# 38
BECKUP# 13
KBSOUT15/GPIO61/XOR_OUT
34 KCOL16 1 TP47 AFTE14P-GP
11 INT_SERIRQ
1

SERIRQ 1105 40 BECKUP# GPIO12/PSDAT3 GPIO60/KBSOUT16


1 DY2PCLK_KBC_RC 11 PM_CLKRUN# 8 GPIO11/CLKRUN# 39 POW ER CONSUMPTION_LED# 12 GPIO25/PSCLK3 GPIO57/KBSOUT17 33 KCOL17 1 TP34 AFTE14P-GP
12 KBRCIN# 122 KBRST# 41 L-line_LED 11 GPIO27/PSDAT2
SC4D7P50V2CN-1GP 12 KA20GATE 121 101 39 POW ER CONSUMPTION# 10
ECSCI#_KBC GA20 GPI94 PCB_VER0 KBC_THERMTRIP# 35 TPDATA GPIO26/PSCLK2 KROW 0 TP48 AFTE14P-GP
29 ECSCI#/GPIO54 GPI95 105 38 TPDATA 71 GPIO35/PSDAT1 KBSIN0 54 1
9 106 PCB_VER1 TPCLK 72 55 KROW 1 1 TP35 AFTE14P-GP
9,56 BLON_IN
ECSW I#_KBC 123 GPIO65/SMI# D/A GPI96
107
38 TPCLK GPIO37/PSCLK1 PS/2 KBSIN1
56 KROW 2 1 TP49 AFTE14P-GP
GPIO67/PWUREQ# GPI97 CRT_DEC# 20 KBSIN2
57 KROW 3 1 TP36 AFTE14P-GP
KBSIN3 KROW 4 TP50 AFTE14P-GP
KBSIN4 58 1
37 SPIDI 86 59 KROW 5 1 TP37 AFTE14P-GP
C F_SDI KBSIN5 KROW 6 TP51 AFTE14P-GP C
THERMAL-----> 35,56 SMBD_Therm 68 GPIO74/SDA2 GPIO01/TB2 64 PM_SLP_S3# 12,34,35,42,44,49,53,54 37 SPIDO 87 F_SDO KBSIN6 60 1
67 95 90 61 KROW 7 1 TP52 AFTE14P-GP
35,56 SMBC_Therm
69
GPIO73/SCL2 SMB GPIO03
93
KBC_PW RBTN# 40 37 SPICS#
92
F_CS0# FIU KBSIN7
50,51 BAT_SDA GPIO22/SDA1 GPIO06 AC_IN# 50 37 SPICLK F_SCK
BATTERY-----> 50,51 BAT_SCL 70 GPIO17/SCL1 GPIO07 94 LID_CLOSE# 40
119 SB_ID 85 ECRST#
GPIO23 Volume_up# TP109 TPAD14-GP VCC_POR#
GPIO24 6 Volume_up# 39
GPIO30 109 W IRELESS2_EN 33
3D3V_S0 R112 81 120 MODEL_ID0
10KR2J-3-GP
39 NUM_LED GPIO66/G_PWM SP GPIO31
65 W PCE773LA0DG-GP
GPIO32/D_PWM FRONT_PW RLED 41
1 2 E51_RxD 66
DY GPIO33/H_PWM
16
STDBY_LED 41
CAP_LED 39
R111 GPIO40/F_PWM R478 2
24 BLUETOOTH_EN 84 GPIO77 GPIO42/TCK 17 AD_OFF 51 3D3V_AUX_S5 1 ECRST#
10KR2J-3-GP DBC_EN 83 20 10KR2J-3-GP C731
19 DBC_EN GPIO76/SHBM SPI GPIO43/TMS RSMRST#_KBC 42

1
SC1U10V3KX-3GP
1 2 E51_TxD 82 21 R483 2 1 KA20GATE
DY 33 W IRELESS_EN
91
GPIO75 GPIO GPIO44/TDI
22
PM_SLP_S5# 12,34,48
CHARGE_LED 41 10KR2J-3-GP
41 W LAN_TEST_LED GPIO81 GPIO45/E_PWM Q7
23 3D3V_S0 R497 2 1 KBRCIN#

2
E
GPIO46/TRST# MODEL_ID1 10KR2J-3-GP
GPIO47 24
25 SPI_W P_R# TP86 TPAD14-GP 6,35 RSMRST# R1315 2 1 RSMRST#_R B
RN88 GPIO50/TDO
111 26 TP_LOCK_LED 41 10KR2J-3-GP
E51_TxD 33 E51_TxD GPO83/SOUT_CR/BADDR1 GPIO51 MMBT3906-4-GP
1 4 113 27 BLON_OUT 19 Prevent BIOS data loss solution

C
DBC_EN 33 E51_RxD CCD_ON 112 GPIO87/SIN_CR GPIO52/RDY# UMA_DISCRETE#
2 3 GPO84/BADDR0 GPIO53 28
TPAD14-GP TP110 73 LOW _PW R 84.T3906.A11
DC_BATFULL114 GPIO70
74 ENERGY_DET
LOW _PW R 26
ENERGY_DET 26
-1_20091026 2ND = 84.03906.F11
SRN10KJ-5-GP 41 DC_BATFULL LCD_CB_SEL GPIO16 GPIO71
19 LCD_CB_SEL 14 GPIO34 GPIO72 75 BT_LED 41
35,52 S5_ENABLE 15 GPIO36 GPO82/TRIS# 110 USB_PW R_EN# 25 74.00690.I7B
GPIO34 and GPIO46 swap
SER/IR U86
3D3V_AUX_S5
VCORF 44 1 DY 1 DY 2
B VCORF GND R71 0R2J-2-GP B
VCC 3
1

RSMRST# 2 RESET#
AGND

C146 D2
GND
GND
GND
GND
GND
GND

SCD1U16V2ZY-2GP
2

G690L293T73UF-GP 6 1 ECSCI#_KBC
KB1 W PCE773LA0DG-GP 12 ECSCI#_1
103

5
18
45
78
89
116

27 71.00773.00G SPI_W P_R# 2 R76 1 SPI_W P# 37


0R0402-PAD
KCOL0 1 5 2
PU-UMA
KCOL1 2 BLON_IN 1 2
KCOL2 3 R384 0R2J-2-GP GMCH_BL_ON 9
KCOL3 4 4 3 ECSW I#_KBC
KCOL4
KCOL5
5
6
Internal KeyBoard Connector 12 ECSW I#

KCOL6 7
for TR CH731UAPT-GP
KCOL7 83.R0304.B8H
KCOL8
8
9
PlanarID
2ND = 83.R2002.B8E
KCOL9
KCOL10
10
11
(1,0) 3D3V_S0
KCOL11
KCOL12
12 SA: 0,0 3D3V_S5
RN89
LOW _PW R
13 8 1
KCOL13 14 For TR8 -1: 0,1 3D3V_AUX_S5 7 2KBC_THERMTRIP# 1 DY 2
1

KCOL14 15 3D3V_S5 6 3 ENERGY_DET R88 0R2J-2-GP


KCOL15
KCOL16
16
17
For TR -1: 1,0
DY
R115
10KR2J-3-GP
R114
10KR2J-3-GP
S5_ENABLE 5 4

KCOL17 18
-2: 1,1 3D3V_S0
KROW 0 19 SRN10KJ-6-GP
2

A KROW 1 20 JV50-TR8 A
KROW 2 21 UMA_DISCRETE# MODEL_ID0 PCB_VER1
1

KROW 3 22 PCB_VER0
KROW 4 R258
23
Wistron Corporation
2

KROW 5 24 10KR2J-3-GP
KROW 6 25 R380 R393 R116 R113 DY 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
KROW 7 26 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP Taipei Hsien 221, Taiwan, R.O.C.
2

28
DIS Title
1

CRT_DEC#
PTW O-CON26-4-GP KBC WPC775
Size Document Number Rev
20.K0382.026 A3 -1
2ND = 20.K0320.026 JV50-TR8
Date: W ednesday, November 11, 2009 Sheet 36 of 63
5 4 3 2 1
5 4 3 2 1

3D3V_AUX_S5

-1_20091026
Put it near Keyboard connector
EC34 3D3V_AUX_S5

1
D SCD1U16V2ZY-2GP D

1
3D3V_AUX_S5
DY

2
R1318 R1319

2
10KR2J-3-GP 10KR2J-3-GP
R1316 R106

2
10KR2J-3-GP 0R0603-PAD
SPI_HOLD#
U9

1
36 SPICS# 1 8 BIOS_VCC
ER4 BIOS_DO CS# VCC SPI_HOLD#
36 SPIDI 1 2 2 SO/SIO1 HOLD# 7
36 SPI_W P# 33R2J-2-GP SPI_W P# 3 6 BIOS_CLK 1 ER3 2 0R0402-PAD SPICLK 36
WP#/ACC SCLK BIOS_DIO
4 GND SI/SIO0 5 1 ER2 2 0R0402-PAD SPIDO 36

1
EC77 EC78

1
SC4D7P50V2CN-1GP
DY DY MX25L1605DM2I-12G-GP EC76 EC75

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
DY R1317 DY DY

2
10KR2J-3-GP
72.25165.A01

2
2
2ND = 72.25Q16.001

C C

16M Bits
SPI FLASH ROM

GOLDEN FINGER FOR DEBUG BOARD

LPC_LAD[0..3]
11,36 LPC_LAD[0..3]
DB1
3D3V_S0 1
11,36 LPC_LAD0 2
11,36 LPC_LAD1 3
11,36 LPC_LAD2 4
11,36 LPC_LAD3 5
11,36 LPC_LFRAME# 6 DY
11,32,33,34 PLT_RST1#_B 7
8
11,15 PCLK_FW H 9
B B
10
11
12

MLX-CON10-7-GP

20.D0183.110

SB

A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BIOS
Size Document Number Rev
A3 JV50-TR8 -1
Date: W ednesday, November 11, 2009 Sheet 37 of 63
5 4 3 2 1
5 4 3 2 1

TOUCH PAD
AFTE14P-GP TP62 1 5V_S0
TP_DATA
TP_CLK
5V_S0 AFTE14P-GP TP69 1 TP_LEFT
5V_S0 AFTE14P-GP TP70 1 TP_RIGHT
D D

2
1
2

1
EC73 EC74 EC22 EC23

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP
RN83 EC26

1
SCD1U10V2KX-4GP
DY DY DY DY DY

2
SRN10KJ-5-GP

4 TPCN1
3
14

RN85 12
11
36 TPDATA TPDATA 1 4 TP_DATA 10
36 TPCLK TPCLK 2 3 TP_CLK 9
8
SRN33J-5-GP-U 7
TP_RIGHT 6
5
4
3
2

TP_LEFT 1

13

C PTW O-CON12-3-GP-U C
20.K0370.012
2ND = 20.K0315.012

B B

Finger printer

3D3V_S0
1

R427
0R0603-PAD FPCN1
13
2

-1 1

3D3V_FP_S0 2
12 USBPP6 1 R149 2 0R0402-PAD USBPP6_1 3
12 USBPN6 1 R150 2 0R0402-PAD USBPN6_1 4
36 FP_DETECT# 5
6
12 FP_ID 7
TP_LEFT 8
A TP_RIGHT 9 A
JV50-TR8
10
11
12 AFTE14P-GP TP132 1 3D3V_FP_S0
AFTE14P-GP TP131 1 USBPP6_1 Wistron Corporation
14 AFTE14P-GP TP128 1 USBPN6_1 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
AFTE14P-GP TP126 1 FP_DETECT# Taipei Hsien 221, Taiwan, R.O.C.
PTW O-CON12-3-GP-U AFTE14P-GP TP127 1 FP_ID
Title
20.K0370.012
2ND = 20.K0315.012 Touch PAD/Finger printer
Size Document Number Rev
A3 -1
JV50-TR8
Date: Monday, October 26, 2009 Sheet 38 of 63
5 4 3 2 1
5 4 3 2 1

-1
EC72
1 2
PSCN1
7 SC1U10V3ZY-6GP
1 3D3V_S0
2 POW ER CONSUMPTION# 36
3 POW ER CONSUMPTION_LED#_R
4
5 Volume_Up#_2 2 3 Volume_Up# 36
D 6 Volume_Down#_2 1 4 Volume_Down# 36 D

1
RN115

1
PTW O-CON6-12-GP SRN33J-5-GP-U
20.K0382.006 EC107
2ND = 20.K0320.006 EC106
-1 MLVG0402220NV05BP-GP-U
69.80024.011

2
69.80024.011

2
MLVG0402220NV05BP-GP-U 3D3V_S0

DY
Q20
3 POW ER CONSUMPTION_LED#_R
1 R1

210KR2J-3-GP
210KR2J-3-GP

10KR2J-3-GP
36 POW ER CONSUMPTION_LED#

1
1
1
2
R2
DTC143ZUB-GP

2
5V_S0

R564
R565
R566
NUM_LED1
R263
Q16 Volume_Up# R567 1 2470R2J-2-GP Volume_Up#_1
3 NUM_LED#_R 1 2 NUM_LED# K A Volume_Down# R568 1 2470R2J-2-GP Volume_Down#_1
1 R1 POW ER CONSUMPTION# R569 1 2470R2J-2-GP POW ER CONSUMPTION#_1
36 NUM_LED
2 LED-B-68-GP
R2 100R2J-2-GP
83.19217.070
C DTC143ZUB-GP 2ND = 83.00190.P70 C

84.00143.G1K 5V_S0
2ND = 84.00143.D1K
CAP_LED1
R265
Q17
3 CAP_LED#_R 1 2 CAP_LED# K A
1 R1
36 CAP_LED 100R2J-2-GP
2 LED-B-68-GP
R2 83.19217.070
DTC143ZUB-GP 2ND = 83.00190.P70
5V_S0
84.00143.G1K
2ND = 84.00143.D1K MEDIA_LED1
R264

13 MEDIA_LED# 1 2 K A
100R2J-2-GP
LED-B-68-GP POW ER CONSUMPTION# 1 AFTE14P-GP TP55
83.19217.070
2ND = 83.00190.P70

DY 5V_S0 1 AFTE14P-GP TP125


Power consumption# 1 2
EC71 SC220P50V2JN-3GP 3D3V_S0 1 AFTE14P-GP TP56
DY
NUM_LED#_R 1 2
EC61 SC220P50V2JN-3GP
DY
CAP_LED#_R 1 2 POW ER CONSUMPTION_LED#_R 1 AFTE14P-GP TP54
B EC63 SC220P50V2JN-3GP B

DY
MEDIA_LED# 1 2
EC62 SC220P50V2JN-3GP

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAUNCH BOARD
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 39 of 63
5 4 3 2 1
5 4 3 2 1

Power Button Cover Up Switch


PW R_SW 1
1 3 KBC_PW RBTN#_1 3D3V_AUX_S5
D D
5

1
2 4 DY EC3
SC1KP50V2KX-1GP
LID1 R621

2
SW -TACT-119-GP LID_CLOSE#_1
OUT 2 1 2 LID_CLOSE# 36

62.40009.671 3 GND 100R2J-2-GP

1
2ND = 62.40012.101 1 EC70
3D3V_AUX_S5 VDD

SCD22U6D3V2KX-1GP
RN80

2
KBC_PW RBTN# ME268-002-GP
1 4
2 3 LID_CLOSE# 74.00268.07B
Beckup Button

2
SRN10KJ-5-GP EC69
SCD1U16V2ZY-2GP

1
BK_SW 1
1 3 Beckup#_1

5
1

2 4 DY EC4
SC1KP50V2KX-1GP
2

SW -TACT-119-GP
C C
3D3V_S0
62.40009.671 RN4

2ND = 62.40012.101 1 8 W IRELESS_BTN#


2 7 BT_BTN#
3 6 BECKUP#
4 5

SRN10KJ-6-GP

WIRELESS Button

W LAN_SW 1
1 3 W IRELESS_BTN#_1 RN3
Beckup#_1 1 8 Beckup# BECKUP# 36
5 BT_BTN#_1 2 7 BT_BTN# BT_BTN# 36
1

W IRELESS_BTN#_1 3 6 W IRELESS_BTN# W IRELESS_BTN# 36


2 4 DY EC6 KBC_PW RBTN#_1 4 5 KBC_PW RBTN# KBC_PW RBTN# 36
SC1KP50V2KX-1GP
2

SRN470J-3-GP
SW -TACT-119-GP

62.40009.671
B B
2ND = 62.40012.101

3D3V_S0

T/P lock Button

1
R233

BT/3G Button 10KR2J-3-GP

TP_SW 1 R227

2
1 3 TP_LOCK_BTN#_1 1 2 TP_LOCK_BTN# 36
BT_SW 1 5 470R2J-2-GP

1
1 3 BT_BTN#_1
2 4 EC51
5 SC1KP50V2KX-1GP

2
1

DY
2 4 DY EC5 SW -TACT-119-GP
SC1KP50V2KX-1GP 62.40009.671
2

SW -TACT-119-GP
2ND = 62.40012.101
62.40009.671
2ND = 62.40012.101

A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SWITCH
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 40 of 63

5 4 3 2 1
5 4 3 2 1

Q29 SB
3 PW RLED#_DB
1 R1
36 FRONT_PW RLED
2
D R2 PW R_LED1 5V_S5 D
84.00143.G1K DTC143ZUB-GP
2ND = 84.00143.D1K FRONT_PW RLED#_R 3 1

RN74 PW R_LED4
Q30 STDBY_LED#_R 4 2 3D3V_S5 PW RLED#_DB 1 8 FRONT_PW RLED#_1 K A 5V_S5
3 STDBY_LED#_BD PW RLED#_DB 2 7 FRONT_PW RLED#_2
1 R1 SRN300J-1-GP PW RLED#_DB 3 6 FRONT_PW RLED#_3 LED-B-77-GP-U2
36 STDBY_LED LED-BY-GP
2 4 5 4 5 83.01221.I70
R2 3 6 2ND = 83.00320.070
84.00143.G1K DTC143ZUB-GP 2 7 83.00195.J70
2ND = 84.00143.D1K 1 8 SRN200J-GP
PW R_LED3
Q31 RN110 SA K A 5V_S5
3 DC_BATFULL#
1 R1 LED-B-77-GP-U2
36 DC_BATFULL 5V_AUX_S5
2 83.01221.I70
R2 2ND = 83.00320.070
DTC143ZUB-GP CHARGER_LED1
84.00143.G1K
2ND = 84.00143.D1K DC_BATFULL#_R 3 1 PW R_LED2
K A 5V_S5
Q32
3 CHARGE_LED# CHARGE_LED#_R 4 2 3D3V_AUX_S5 LED-B-77-GP-U2
1 R1 83.01221.I70
36 CHARGE_LED
2 2ND = 83.00320.070
R2 LED-BY-GP
DTC143ZUB-GP
84.00143.G1K 83.00195.J70
C C
2ND = 84.00143.D1K

PW R_LED5
Q14 R560 180R2J-1-GP
3 L-line_LED# 1 2 L-line_LED#_1 K A 5V_S5
1 R1 1 2
36 L-line_LED R561 180R2J-1-GP
2 LED-B-68-GP
R2 83.19217.070
DTC143ZUB-GP 2ND = 83.00190.P70
84.00143.G1K
2ND = 84.00143.D1K
PW R_LED6
L-line_LED#
L-line_LED#_2 K A 5V_S5
DY DY
LED-B-68-GP R530 PW R_LED7
83.19217.070
2ND = 83.00190.P70 L-line_LED# 1 2 K A 5V_S5
510R2J-1-GP
LED-B-98-GP

3D3V_S0 R531 PW R_LED8


L-line_LED# 1 2 K A 5V_S5
R219
Q10 TP_LED1
3 TP_LOCK_LED# 1 2 TP_LOCK_LED#_1 K A 180R2J-1-GP LED-B-68-GP
1 R1 83.19217.070
B 36 TP_LOCK_LED B
2 75R2J-1-GP
LED-Y-57-GP 2ND = 83.00190.P70
R2 83.01921.P70
84.00143.G1K DTC143ZUB-GP 2ND = 83.00191.H70
2ND = 84.00143.D1K -1 SB
-1
R13
1 DY 2
0R2J-2-GP 3D3V_S0
Q1
DY R2 D1 R4
2 W LAN_LED#_1 2 W LAN_LED#_3 W LAN_LED1
1 1 2 W LAN_LED#_2 K A
33 W LAN_LED#_MC R1
R5 W LAN_LED#
3 DY 3 1 2
0R0402-PAD LED-Y-57-GP
22R2J-2-GP
DTA143ZUB-GP 1 83.01921.P70
2ND = 83.00191.H70
D

1ST 84.00143.C1K BAW 56-5-GP Q4 SB


2ND = 84.00143.F1K .
Q2
R174 .
. .
R2
2 W LAN2_LED#_1 1 2 .
1 0R2J-2-GP 84.2N702.D31
33 W LAN2_LED#_MC R1
3 SB 2ND = 84.2N702.E31
G

DTA143ZUB-GP 36 W LAN_TEST_LED
1ST 84.00143.C1K 2N7002E-1-GP
2ND = 84.00143.F1K
A A

5V_S0
Q3
R6
BT_LED1 Wistron Corporation
3 BT_LED# 1 2 BLT_LED#_1 K A 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1 R1 Taipei Hsien 221, Taiwan, R.O.C.
36 BT_LED
2 LED-B-68-GP
R2 100R2J-2-GP Title
83.19217.070
DTC143ZUB-GP 2ND = 83.00190.P70
LED
84.00143.G1K Size Document Number Rev
2ND = 84.00143.D1K Blue-tooth LED A3 JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 41 of 63

5 4 3 2 1
5 4 3 2 1

2D5V_S0 3D3V_S0

4
3
RN99
SRN100KJ-6-GP
D D

1
2
R1310
C825
D27
2 1 2D5V_S0_PG 2 46 3V/5V_POK 1 2 RSMRST#_KBC_SB 12
SC1U10V3ZY-6GP 3 VCORE_EN 45,47 0R2J-2-GP

12,34,35,36,44,49,53,54 PM_SLP_S3# 1

1
R1320
BAW 56-5-GP 83.00056.Q11

100KR2J-1-GP
2ND = 83.00056.G11 DY
3RD = 83.00056.K11
R457

2
46 3V/5V_POK 1 DY 2 R1311
0R2J-2-GP 36 RSMRST#_KBC 1 2
R456
48 1D8V_S3_PW RGD 1 DY 2 1KR2F-3-GP
0R2J-2-GP

-1_20091026
C C

P/H @ 1D8V_S3 PAGE


R120
45 VRM_PW RGD 1 DY 2 1D1V_PW RGD 47
0R2J-2-GP

1D8V_S3
Q9
G

. .
D

.
.
.
3D3V_S5
73.07408.L16 S NB_PW RGD 9,12
2ND = 73.07408.L15
3RD = 73.07408.02B U16C

14
2N7002E-1-GP

12,34,35,36,44,49,53,54 PM_SLP_S3# 9 84.2N702.D31


8 SB_PW RGD 12 2ND = 84.2N702.E31
10
B B

D3 TSLVC08APW -1-GP

7
47 1D1V_PW RGD 2

3 RUNPW ROK_D RUNPW ROK_D 3

35 RUNPW ROK 1 PH in page 3


BAW 56-5-GP
83.00056.Q11
2ND = 83.00056.G11
3RD = 83.00056.K11

A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

POWER ON LOGIC
Size Document Number Rev
A3
JV50-TR8 -1
Date: W ednesday, November 11, 2009 Sheet 42 of 63
5 4 3 2 1
5 4 3 2 1

Adapter DCDC 5V/3D3V(RT8205A) DCDC 1D2V(TPS51124)


Input Signal Output Signal
AD_IN# Input Signal Output Signal Input Signal Output Signal
AD_OFF (I) (O)
EN0 1D2V_PWRGD
VCORE_EN
S5_ENABLE EN_PSV PGOOD
ENTRIP1
D Input Power Output Power D

AD_JK AD+ ENTRIP2 3V/5V OK


VCC(I) VCC(O) PGOOD Input Power Output Power
5V_S5
V5FILT
Input Power Output Power 1D2V_S0
+15V_ALW V5DRV VTT
DCBATOUT VCLK
CPU_CORE VIN DCBATOUT
3D3V_AUX_S5 V(I)
ISL6265HRTZ VREG3
VREG5 5V_AUX_S5
Input Signal Output Signal
CPU_SVD VOUT 3D3V_S5
SVD
VRM_PWRGD 5V_S5
PGOOD VOUT
CPU_SVC
SVC
DCDC 1D1V(TPS51124)
VCORE_EN
ENABLE
C
DCDC 1D8V(RT8209B) Input Signal Output Signal
C
CPU_PWRGD_SVID_REG
PWROK Input Signal Output Signal 1D2V_PWRGD 1D1V_PWRGD
EN_PSV PGOOD
PM_SLP_S5# 1D8V_S3_PWRGD
Input Power Output Power EN_PSV PGOOD
Input Power Output Power
+5V_RUN VCC_VORE0
VCC VCC_CORE(O) Input Power Output Power +5V_SUS
5V_S5 V5FILT
1D8V_S3
DCBATOUT VCC_CORE1 V5IN VTT 1D2V_S0
VIN VCC_CORE(O) V5DRV VTT
DCBATOUT
V(I) DCBATOUT
VDDNB V(I)
VCC_CORE(O)

0D9V LDO RT9026 CHARGER MAX8731


B
1D2V LDO G9161 B
Input Signal Output Signal Input Signal Output Signal
PM_SLP_S5#
Input Signal Output Signal LDO_SHDN# LDO_POK MAX8731A ACIN ACIN
MAX8731A ACOK
PBAT_SMBDAT ACOK
5V_S5 Input Power Output Power SDA
Input Power Output Power VIN 0D9V_S3
LDO_OUT PBAT_SMBCLK
SCL
3D3V_S5 1D2V_S5 1D8V_S3 VLDOIN LDO_OUT
IN OUT
Input Power Output Power

1D5V LDO G9571 AD+


DCIN +VCHGR
V(O)
2D5V LDO R9161 Input Signal Output Signal
3D3V_AUX_S5
VDDSMB
Input Signal Output Signal

A Input Power Output Power JV50-TR8 A

Input Power Output Power 3D3V_S0 1D5V_S0 Wistron Corporation


IN OUT
3D3V_S0 2D5V_S0 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
IN OUT Taipei Hsien 221, Taiwan, R.O.C.

Title
Power Block Diagram
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 05, 2009 Sheet 43 of 63
5 4 3 2 1
5 4 3 2 1

Aux Power 3D3V_AUX_S5

5V_AUX_S5 I min = 150 mA


U11
3D3V_AUX_S5
Run Power 5V_S0 5V_S5
D U28 D
G9
3D3V_AUX_S5_G 1 C546 S D
1 VINDY VOUT 5 2
SCD1U25V3KX-GP
1
S D
8
2 GND 2 7
3 4 GAP-CLOSE-PW R 1 DY2 3 S D 6
SHDN# NC#4 G D
84.S0610.B31 4 5
DCBATOUT 2ND = 84.00610.C31
1

1
BC2 G909-330T1U-GP BC1 RUN_POW ER_ON AO4468-GP
SC1U16V3ZY-GP

DY 74.00909.03F DY 84.04468.037

SC1U16V3ZY-GP
2nd source:74.09198.G7F 1 2 Z_12V S D
2

2
R522 10KR2J-3-GP Q28 3D3V_S0 U25 3D3V_S5

K
1

1
NDS0610-NL-GP R525 C921 1 R526

SCD22U25V3KX-GP

330KR2J-L1-GP
D31 1 S D 8

10KR2J-3-GP
2 PDZ9D1B-GP 2 S D 7
3 S D 6
2 R523 1 Z_12V_G3 4 G D 5

A
330KR2J-L1-GP
83.9R103.C3F AO4468-GP
3D3V_S0 2ND = 83.9R103.F3F 84.04468.037

1
R529

1
100KR2J-1-GP Z_12V_D4 1D8V_S0 1D8V_S3
DY R524
100R5J-3-GP U49

2
U67
1 S D 8

2
4 3 2 S D 7

Z_12V_D3
3D3V_runpwr 3 S D 6
5 2 4 G D 5
C PM_SLP_S3# 12,34,35,36,42,49,53,54 C

D
6 1 AO4468-GP
Q33 DY R431 84.04468.037
2N7002KDW -GP 1 2 1D8V_S0_ON
G Z_12V_D3 84.2N702.A3F

1
2ND = 84.DM601.03F 1MR2F-GP C795
2N7002EW -1-GP SC22P50V2JN-4GP

2
S
SB For 2KV ESD protect
U44
3D3V_M92 3D3V_S5

S D
AO4468, SO-8
M9X AO3400A-GP
Id=11.6A, Qg=9~12nC
For Madison 1D8V_VGA

G
1D8V_S3
Rdson=17.4~22m ohm 1D8V_M92 R342 84.03400.B37
Madison-Park 1 2 3D3V_M92_ON
U85

1
8 D S 1 2MR2F-GP C675
7 D S 2 Madison-Park M9X SC22P50V2JN-4GP
Madison-Park 6 D S 3 M9X

2
1

1
5 D G 4 C1054 TC40
1

C1053 ST150U6D3VBM-1-GP
B B

SCD1U16V2KX-3GP
SC10U6D3V3MX-GP AO4468-GP

2
84.04468.037 77.C1571.09L
2

for TR 2ND = 80.15715.12L -1_20091023


Madison-Park
1D8V_S0 1D8V_M92
R1284
R585 RUN_POW ER_ON Madison-Park
1 2 3D3V_M92 2 1 3D3V_S0
0R3J-0-U-GP Q41 0R5J-5-GP
M9X Madison-Park
S D RUNON_R
1 R586 2
0R3J-0-U-GP NDS0610-NL-GP
M9X 84.S0610.B31
G

2ND = 84.00610.C31
1 R587 2 R1305
0R3J-0-U-GP 1 2 DIS_EN_1D8_RUN_R
M9X Madison-Park
1

330KR2J-L1-GP
Madison-Park R1306 R1307
100KR2J-1-GP Madison-Park 330KR2J-L1-GP
2

DIS_EN_1D8_RUN

A JV50-TR8
D

Q42

49,54 1D1V_M92_POK 1D1V_M92_POK 1 R1308 2 DGPU_PW ROK_R G


2N7002E-1-GP
84.2N702.D31 Wistron Corporation
2ND = 84.2N702.E31 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
0R2J-2-GP Taipei Hsien 221, Taiwan, R.O.C.
S

Madison-Park Madison-Park
1

Title
C1055
CO-LAYOUT DY RUN AND AUX POWER
2

SCD1U10V2KX-4GP Size Document Number Rev


A3 JV50-TR8 -1
Date: W ednesday, November 11, 2009 Sheet 44 of 63
5 4 3 2 1
5 4 3 2 1

DCBATOUT DCBATOUT_6265_2
DCBATOUT DCBATOUT_6265_3 G4 DCBATOUT_6265_1
G15 1 2
1 2
GAP-CLOSE-PW R
GAP-CLOSE-PW R G3 C383 C387 C382 C384

SCD1U25V3KX-GP
G16 1 2

5
6
7
8

1
SC10U25V6KX-1GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
1 2 TC8 DY VCC_CORE_S0_0
ST15U25VDM-1-GP GAP-CLOSE-PW R U15

D
D
D
D
Design Current: 12.6A

2
GAP-CLOSE-PW R G5 1 2

2
77.21561.00L 1 2 C374 SC33P50V2JN-3GP C377 SC180P50V2JN-1GP FDMS8692-GP Peak current: 18A
1 2 OCP_min:24A
GAP-CLOSE-PW R 84.08692.037

G
S
S
S
D G6 1 R131 26265_FB_NB_R 1 2 D
1 2 5V_S0 44K2R2F-1-GP C376 SC1KP50V2KX-1GP 68.R3610.20C

4
3
2
1
R415 2ND = 68.R3610.20A
GAP-CLOSE-PW R 1 2 1 2 VCC_CORE_S0_0
DCBATOUT DCBATOUT_6265_1 C380 SCD1U10V2KX-4GP UGATE0 L49
G11 2R3J-GP PHASE0 1 2

1
1 2 1 R132 2 IND-D36UH-9-GP

1
C768 22KR2F-GP BOOT0 1 2 Parts
GAP-CLOSE-PW R SC1U10V3KX-3GP C346 R389 TC4 TC3 TC25
16K2R2F-GPclose to

5
6
7
8

5
6
7
8

1
SE330U2VDM-L-GP

SE330U2VDM-L-GP
G12 GNDA_VCORE SCD22U10V3KX-2GP SE330U2VDM-L-GP

D
D
D
D

D
D
D
D
1 2 U12 U13 PWM IC
GNDA_VCORE R1301 0R0402-PAD
2 CPU_VDDNB_RUN_FB_H 6 FDMS7672-GP

2
1

FDMS7672-GP
GAP-CLOSE-PW R 1 R385 2
TC7 DCBATOUT_6265_3 VDDNB 4K02R2F-GP
G13 84.07672.037 79.33719.L01
ST15U25VDM-1-GP

1 2 1 R125 2 PHASE_NB RN45 1 2 2ND = 77.C3371.051


2

G
S
S
S

G
S
S
S
1 R414 2 11K3R2F-2-GP 1 4 CPU_VDDNB_RUN_FB_H C735 SCD1U16V2KX-3GP

6265_OCSET_NB
GAP-CLOSE-PW R 5V_S0 3D3V_S0 2R3J-GP LGATE_NB 2 3 CPU_VDDNB_RUN_FB_L R390 R402 79.33719.L01

4
3
2
1

4
3
2
1
1
G14 1 DY 2 1 DY 2 2ND = 77.C3371.051
C767 PHASE_NB SRN10J-7-GP 10R2F-L-GP NTC-10K-9-GP

6265_COMP_NB
1 2

ISP0
6265_VSEN_NB
6265_FSET_NB
SCD1U25V3KX-GP LGATE0 79.33719.L01

6265_FB_NB
2
1

1
GAP-CLOSE-PW R UGATE_NB ISP0_R 2ND = 77.C3371.051

6265_VCC
6265_VIN
R124 R123 ISN0 2 1
DY 0R0603-PAD DY R122 GNDA_VCORE G8
77.21561.00L 10KR2F-2-GP 0R2J-2-GP CPU_VDDNB_RUN_FB_L_R 1 R129 2 CPU_VDDNB_RUN_FB_L 6 GAP-CLOSE-PW R-3-GP
R862 close
0R0402-PAD 84.07672.037 to L75
2

6265_OFS/VFIXEN
3D3V_S0 DCBATOUT_6265_3
1

GNDA_VCORE

49
48
47
46
45
44
43
42
41
40
39
38
37
1

C R121DY C393 C406 C822 C

GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB

1
SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD1U25V3KX-GP
R403 0R2J-2-GP
10KR2F-2-GP DY
2

5
6
7
8

2
U50

D
D
D
D
2

GNDA_VCORE 1 36 BOOT_NB SI4800BDY-T1-GP


OFS/VFIXEN BOOT_NB BOOT0
42 VRM_PW RGD 2 PGOOD BOOT0 35
CPU_PW RGD_SVID_REG 3 34 UGATE0
6 CPU_PW RGD_SVID_REG PWROK UGATE0
R119 1 0R0402-PAD
2 6265_SVD 4 33 PHASE0
6 CPU_SVD SVD PHASE0
R117 1 0R0402-PAD
2 6265_SVC 5 32 5V_S0 84.04800.D37 VDDNB: Design Current: 2.1A
6 CPU_SVC

G
S
S
S
R118 1 0R0402-PAD 6265_ENABLE SVC PGND0 LGATE0
42,47 VCORE_EN 2 6 31 Peak current: 3A OCP_min:5A

4
3
2
1
6265_RBIAS ENABLE LGATE0
1 2 7 30
1 2 R400 93K1R2F-L-GP 6265_OCSET 8
RBIAS U10 PVCC
29 LGATE1 VDDNB
OCSET LGATE1 L53

1
R399 23K7R2F-GP 6265_VDIFF0 9 28 UGATE_NB
6265_FB0 VDIFF0 PGND1 PHASE1 C320 BOOT_NB 1 PHASE_NB 1
10 FB0 PHASE1 27 2 2
6265_COMP0 11 26 UGATE1 SC2D2U6D3V3KX-GP C364 IND-3D3UH-116-GP

2
GNDA_VCORE 6265_VW 0 COMP0 UGATE1 BOOT1 SCD22U10V3KX-2GP
12 VW0 BOOT1 25 68.3R31A.10V
2ND = 68.3R310.20A TC28

5
6
7
8

SE220U2VDM-8GP
COMP1
VDIFF1
VSEN0

VSEN1
RTN0
RTN1

G10 U53

D
D
D
D
ISN0

ISN1
ISP0

ISP1
VW1
FB1

1 2 SI4800BDY-T1-GP

2
GAP-CLOSE-PW R-3-GP ISL6265AHRTZ-T-GP 79.22719.20L
13
14
15
16
17
18
19
20
21
22
23
24

DCBATOUT_6265_2
74.06265.B73 2ND = 77.22271.20L
GNDA_VCORE 84.04800.D37

G
S
S
S
ISP0 ISN1
6265_FB1
6265_COMP1
6265_VW1
6265_VDIFF1

4
3
2
1
ISN0 ISP1 ESR=15mohm
1D8V_S3 C181 C180 C179 C178 LGATE_NB

5
6
7
8

1
B VCC_CORE_S0_0 B
VCC_CORE_S0_1

SC10U25V6KX-1GP

SCD1U25V3KX-GP
U5 DY

D
D
D
D

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
1

2
R96 FDMS8692-GP
1

R387 R103
DY 0R2J-2-GP
84.08692.037

G
S
S
S
Close to 10R2J-2-GP 10R2J-2-GP VCC_CORE_S0_1
2

CPU socket 68.R3610.20C Design Current: 12.6A

4
3
2
1
2ND = 68.R3610.20A
2

VCC_CORE_S0_1 Peak current: 18A


6 CPU_VDD0_RUN_FB_H
UGATE1 L47 OCP_min:24A
6 CPU_VDD0_RUN_FB_L
PHASE1 1 2
IND-D36UH-9-GP
6 CPU_VDD1_RUN_FB_L

2
BOOT1 1 2 Parts
6 CPU_VDD1_RUN_FB_H
C288 R107 TC5 TC6 TC23
16K2R2F-GPclose to
1

5
6
7
8

5
6
7
8

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP
Parallel SCD22U10V3KX-2GP 79.33719.L01

1
D
D
D
D

D
D
D
D
R388 R97 PWM IC 2ND = 77.C3371.051
10R2J-2-GP DY 10R2F-L-GP U8 U7

1
Close to FDMS7672-GP 1 2

2
FDMS7672-GP
R93 4K02R2F-GP
CPU socket
2

84.07672.037 1 2
G
S
S
S

G
S
S
S
C240 SCD1U16V2KX-3GP
79.33719.L01
4
3
2
1

4
3
2
1
R858 close 2ND = 77.C3371.051
R100 R379
LGATE1 1 DY 2
1 DY 2
to 79.33719.L01
L77
6265_FB0_C C741 SC180P50V2JN-1GP 6265_FB1_C C261 SC180P50V2JN-1GP 10R2F-L-GP NTC-10K-9-GP 2ND = 77.C3371.051
JV50-TR8

ISP1
1 2 DY 1 2DY ISP1_R
A R398 C744 C746 R98 C237 C236 A
1 2 1 2 1 21 2 1 2 1 2 1 2 1 2 ISN1 2 1
249R2F-GP C740 SC1KP50V2KX-1GP 249R2F-GP SC1KP50V2KX-1GP 84.07672.037 G7 Wistron Corporation
SC4700P50V2KX-1GP SC180P50V2JN-1GP SC4700P50V2KX-1GP SC180P50V2JN-1GP C241 GAP-CLOSE-PW R-3-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R102
R90
1KR2F-3-GP R391 C738 R392 1KR2F-3-GP C218 Title
1 R397 2 1 2 1 2 1 2 1 2 1 2 1 2 1 R94 2
54K9R2F-L-GP 6K81R2F-1-GP CPU Vcore(ISL6265HR)
2 R395 1 SC180P50V2JN-1GP 2 R92 1 54K9R2F-L-GP SC1KP50V2KX-1GP 6K81R2F-1-GP Size Document Number Rev
3D3V_S0 DY
910KR2J-GP
3D3V_S0 DY
316KR2F-GP
A3
6265_FB0_R 1 2 6265_FB1_R 1 2 JV50-TR8 -1
2 R396 1 C742 SC1KP50V2KX-1GP 2 R91 1 C217 SC180P50V2JN-1GP Date: Monday, October 26, 2009 Sheet 45 of 63
0R2J-2-GPDY 0R2J-2-GPDY
5 4 3 2 1
5 4 3 2 1

DCBATOUT DCBATOUT_51125 DCBATOUT DCBATOUT_51125 3D3V_PW R 3D3V_S5 R590


G112 G113
35 S5PW R_ENABLE 1 2 3V5V_ENABLE 35 2009/03/20 Wayne
1 2 1 2 G114
1 2 2KR2F-3-GP
GAP-CLOSE-PW R GAP-CLOSE-PW R 5V_AUX_S5 5V_AUX_S5
G115 G116 GAP-CLOSE-PW R 5V_PW R 5V_S5
1 2 1 2 G117 G118

1
1 2 1 2
GAP-CLOSE-PW R GAP-CLOSE-PW R R591 R592
G119 G120 GAP-CLOSE-PW R 10KR2J-3-GP 10KR2J-3-GP GAP-CLOSE-PW R
D 1 2 1 2 G121 G122 D
1 2 Q35 Q36 1 2

2
GAP-CLOSE-PW R GAP-CLOSE-PW R
G124 G123 GAP-CLOSE-PW R 1 6 VCC_ENTIP1 1 6 VCC_ENTIP2 GAP-CLOSE-PW R
1 2 1 2 G125 G126
1 2 3V5V_ENABLE 2 5 3V5V_ENABLE 2 5 1 2

1
GAP-CLOSE-PW R GAP-CLOSE-PW R C940
GAP-CLOSE-PW R 51125_ENTIP1 3 4 51125_ENTIP2 3 4 GAP-CLOSE-PW R
DY
1

TC34 TC37 G127 G128


DY

2
1

1
SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
1 2 C942 C943 1 2
2N7002KDW -GP 2N7002KDW -GP

1
SC18P50V2JN-1-GP

SC18P50V2JN-1-GP
77.21561.00L 77.21561.00L R593 C941 R594
ST15U25VDM-1-GP

ST15U25VDM-1-GP
2

GAP-CLOSE-PW R DY 84.2N702.A3F DY 84.2N702.A3F GAP-CLOSE-PW R


G129 130KR2F-GP 130KR2F-GP G130
2ND = 84.DM601.03F 2ND = 84.DM601.03F

2
1 2 1 2

2
GAP-CLOSE-PW R SB For 2KV ESD protect GAP-CLOSE-PW R
G131 DCBATOUT_51125 G132
1 2
SB 1 2

2009/03/27 Wayne GAP-CLOSE-PW R GAP-CLOSE-PW R

1
G133
R595 1 2
2009/03/11 Wayne DY 100KR2J-1-GP
GAP-CLOSE-PW R
DCBATOUT_51125 DCBATOUT_51125

2
DCBATOUT_51125
SB C947 C952 2009/03/11 Wayne

SC10U25V6KX-1GP

SCD01U50V2KX-1GP
DY C950

1
C C944 51125_EN C948 C949 C
1

1
SCD01U50V2KX-1GP

SCD01U50V2KX-1GP
C945 C946

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
2

2
Design Current = 6A D 84.04800.D37 D
SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
2

8
7
6
5

5
6
7
8
Max Current = 7A Id=7A SB Id=7A
D
D
D
D

U75 U76

D
D
D
D
OCP min = 10A Qg=8.7~13nC Qg=8.7~13nC SI4800BDY-T1-GP
U77

16
SI4800BDY-T1-GP
Rdson=23~30mohm Rdson=23~30mohm
TAI-TEC 7*7*3 84.04800.D37 Design Current = 6A

VIN
DCR=17.6mohm, Irating=6A SCD1U25V3KX-GP TAI-TEC 7*7*3 Max Current = 7A
S
S
S
G

G
S
S
S
Isat=13.5A C951 C953
G S DCR=17.6mohm, Irating=6A OCP min = 10A
1
2
3
4

4
3
2
1
51125_VBST2 51125_VBST1
S G 2 1 9 VBST2 VBST1 22 1 2
Isat=13.5A
68.3R31A.10V 3D3V_PW R SCD1U25V3KX-GP 51125_DRVH2 10 21 51125_DRVH1 5V_PW R
2ND = 68.3R310.20A
SB L55 DRVH2 DRVH1 L56
1 2 51125_LL2 11 20 51125_LL1
SB 1 2
IND-3D3UH-116-GP LL2 LL1 IND-3D3UH-116-GP
51125_DRVL2 51125_DRVL1 U79 68.3R31A.10V
D 12 DRVL2 DRVL1 19
1

SI4812BDY-T1-E3-GP
C954 TC35 U78 2ND = 68.3R310.20A
D
8
7
6
5

5
6
7
8

GAP-CLOSE-PWR-3-GP
DY

SCD1U10V2KX-4GP
ST220U6D3VDM-20GP
SCD1U10V2KX-4GP

GAP-CLOSE-PWR-3-GP

D
D
D
D

C955
51125_VO2 7 24 51125_VO1

D
D
D
D
2

VO2 VO1

1
G134 TC36
SI4812BDY-T1-E3-GP

51125_FB2 5 2 51125_FB1 DY ST220U6D3VDM-20GP


VFB2 VFB1
SB 84.04812.A37

2
1

G135 84.04812.A37 77.22271.27L

2
1 2 51125_EN 13 23 2ND = 77.C2271.00L
S
S
S
G

G
S
S
S
R596 820KR2F-GP EN0 PGOOD
G S
1
2
3
4

4
3
2
1
51125_ENTIP2 6 51125_ENTIP1
S G 1
2

B 51125_VREF ENTRIP2 ENTRIP1 B

77.22271.27L 3 VREF GND 15


2ND = 77.C2271.00L
1
SCD22U6D3V2KX-1GP

C956 51125_TONSEL 4 25
TONSEL GND
Id=7.7A
SB

1
Qg=8.5~13nC
2
1

14 18 51125_VCLK 1 R597
SKIPSEL VCLK
1

1
SB Id=7.7A 51125_SKIPSEL Rdson=16.5~21mohm 0R2J-2-GP DY
R598 DYR599 R600
VREG3

VREG5

6K98R2-GP 0R2J-2-GP Qg=8.5~13nC 74.51125.073 TP238 30KR2F-GP

1 2
Rdson=16.5~21mohm TPAD14-GP 51125_FB1_R
1 2

1
51125_FB2_R
2

2
C957 TPS51125RGER-GP R601 C958 DY
8

17

DYSC18P50V2JN-1-GP 0R2J-2-GP SC18P50V2JN-1-GP

2
3D3V_AUX_S5 5V_AUX_S5
3D3V_AUX_S5_5_51125

DY
2

5V_AUX_S5_51125

1
1 R236 2 1 R237 2 3V/5V_POK 42
1

0R0603-PAD 0R0603-PAD
R602 R604 R603
10KR2F-2-GP 51125_VREF 2 1 2009/03/20 Wayne 20KR2F-L-GP
0R2J-2-GP Close to VFB Pin (pin2)

2
2

3D3V_AUX_S5 2 1
0R2J-2-GP DY R605
1

C959 C960 S5PW R_ENABLE 35


DY R606
SC4D7U6D3V3KX-GP

SC10U10V5ZY-1GP

51125_VREF 1 2
2

A 0R2J-2-GP A
JV50-TR8

Close to VFB Pin (pin5) R607


3D3V_AUX_S5 2 1 Wistron Corporation
0R2J-2-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2 DY 1 Title
0R2J-2-GP R608
DCDC 5V/3D3V (RT8205A)
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 46 of 63
5 4 3 2 1
5 4 3 2 1

DCBATOUT DCBATOUT_51124
G63 1D1V_PW R 1D1V_S0
1 2 DCBATOUT_51124_1 G55
1 2
1

TC15 GAP-CLOSE-PW R
SE100U25VM-L1-GP GAP-CLOSE-PW R
G64
1 2 SB G56
2

C635
D 1 2

5
6
7
8

SCD1U25V3KX-GP
GAP-CLOSE-PW R C633 C634

SC4D7U25V5KX-GP
G65 U37 GAP-CLOSE-PW R

D
D
D
D
D D

SC4D7U25V5KX-GP
1 2 SI4800BDY-T1-GP G57

2
1 2
GAP-CLOSE-PW R 84.04800.D37
GAP-CLOSE-PW R
79.10712.L02 G58

G
S
S
S
2ND = 79.10712.6JL G S 1 2

4
3
2
1
GAP-CLOSE-PW R
DCBATOUT DCBATOUT_51124_1 Iomax=8A G59
G49 1 2
1 2 Vtrip(mV)=Rtrip(Kohm)*10(uA) Vo(cal)=1.1060V 1D1V_PW R
L32 GAP-CLOSE-PW R
GAP-CLOSE-PW R Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin)) 1 2 C647 G53
G47 IND-1UH-94-GP 1 2

SC18P50V2JN-1-GP

SE390U2D5VM-2GP
1 2 68.1R01B.10K
1

1
TC21 2ND = 68.1R01A.20B R319 C623 TC16 GAP-CLOSE-PW R
D DY

5
6
7
8

1
SE100U25VM-L1-GP

GAP-CLOSE-PW R 1 R333 2 16K9R2F-GP G51


DY

D
D
D
D
G48 0R0402-PAD 3D3V_S0 U40 1 2

SC1U10V3KX-3GP
2

2
1 2 SI4172DY-T1-GE3-GP SB

2
-1 3D3V_S0 51124_VFB1 GAP-CLOSE-PW R

1
GAP-CLOSE-PW R R334 84.04172.037 G52

1
5V_S5 1 2

G
S
S
S
R313 10KR2J-3-GP R318
GAP-CLOSE-PW R
G S 79.3971V.6AL

4
3
2
1
-1 10KR2J-3-GP 39KR2F-GP 2ND = 77.93971.02L G54

2
79.10712.L02 SB 1 2

2
1

1
2ND = 79.10712.6JL C650

2
SC4D7U6D3V3MX-2GP

R327 GAP-CLOSE-PW R
C 2R3J-GP 1D2V_PW R C
2

1D1V_PW R 1D1V_PW RGD Close to VFB Pin (pin5)


51124_VFB2 1D1V_PW RGD 42 SB
2

51124_VFB1 1D2V_PW RGD 1 TP182TPAD14-GP


1

C654
SC1U10V2KX-1GP

24
U41

2
5

1
6

7
R299 DY
2

2 1

VFB1
VFB2

VO1
VO2

PGOOD1
PGOOD2
42,45 VCORE_EN
10KR2J-3-GP
1
SC180P50V2JN-1GP

C636 1 BC3 21 51124_DRVH1


DRVH1 51124_LL1
SC1U10V2KX-1GP LL1 20
2 DY 51124_V5FILT 15 19 51124_DRVL1
2

V5FILT DRVL1
16 V5IN
51124_EN1 23
51124_EN2 EN1 DCBATOUT_51124
8 EN2 1D2V_PW R 1D2V_S0
3 GND
25 10 51124_DRVH2 C666 G66
GND DRVH2

SCD1U25V3KX-GP
13 11 51124_LL2 1 2
PGND2 LL2

TONSEL

1
1 R335 2 18 12 51124_DRVL2 C664 C665
VBST1
VBST2
42,45 VCORE_EN PGND1 DRVL2

5
6
7
8
TRIP1
TRIP2

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
0R0402-PAD GAP-CLOSE-PW R

D
D
D
D
G67

2
-1 1 BC4 U45 1 2
SCD47U6D3V2KX-GP TPS51124RGER-GPU1 SI4800BDY-T1-GP
17
14

22
9

4
2 DY 74.51124.073 GAP-CLOSE-PW R
51124_TRIP1 84.04800.D37 G68
1D2V Iomax=5A

G
S
S
S
51124_TRIP2
51124_TONSEL

1 2
1

B B
SB OCP>10A

4
3
2
1
1

R317 GAP-CLOSE-PW R
11KR2F-L-GP R332 1D2V_PW R G69
L37
9K1R2F-1-GP 1 2
1 2
2

IND-1D5UH-53-GP GAP-CLOSE-PW R
SB

SC18P50V2JN-1-GP
2

1
68.1R51A.10F G70

1
C657
2ND = 68.1R510.10K C682 TC18 1 2

1
SE390U2D5VM-2GP
C641 R329 DY
DY
2

5
6
7
8
51124_LL1 51124_VBST1 17K8R2F-GP GAP-CLOSE-PW R

SC1U10V3KX-3GP
2 1

2
DY R326 U42 G73

D
D
D
D

2
SCD1U16V2KX-3GP DY R323 0R2J-2-GP SI4812BDY-T1-E3-GP 51124_VFB2 1 2

1
C661 10KR2J-3-GP GAP-CLOSE-PW R
1

51124_LL2 2 1 51124_VBST2 84.04812.A37 R328 G71


30KR2F-GP 1 2

G
S
S
S
SCD1U16V2KX-3GP

4
3
2
1
79.3971V.6AL GAP-CLOSE-PW R
SB

2
51124_V5FILT 2ND = 77.93971.02L G72
1 2

GAP-CLOSE-PW R
2009/03/27 WAYNE
C682 change to 1u10v for ESL
GND OPEN V5FILT

A 240k/CH1 300k/CH1 360k/CH1 JV50-TR8 A


TONSEL 300k/CH2 360k/CH2 420k/CH2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Vout=0.758V*(R1+R2)/R2 --> PWM mode
Vout=0.764V*(R1+R2)/R2 --> Skip Mode Title

TPS51124_1D1V_1D2V
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 47 of 63
5 4 3 2 1
5 4 3 2 1

DCBATOUT DCBATOUT_51117 DCBATOUT

G92 G91 DCBATOUT_51117


TC31 1 2 1 2

SE100U25VM-L1-GP

1
GAP-CLOSE-PW R GAP-CLOSE-PW R
G94 G93 C868

SCD1U25V3KX-GP
1 2 1 2 C863 C867

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
D GAP-CLOSE-PW R GAP-CLOSE-PW R
SB D

2
G95 G96

5
6
7
8
1 2 1 2
79.10712.L02 U61

D
D
D
D
2ND = 79.10712.6JL GAP-CLOSE-PW R GAP-CLOSE-PW R SI4800BDY-T1-GP

5V_S5 84.04800.D37 Cyntec 10*10*4


DCR=4.2mohm, Irating=16A

G
S
S
S
Isat=33A Vo(cal)=1.8214V

4
3
2
1
2009/04/29 Wayne
1 2ND = 68.1R510.10J 1D8V_PW R
1D8V Iomax=10A
1

C862 R469 L54


SC1U10V2KX-1GP 10R2F-L-GP 1 2
IND-1D5UH-52-GP
OCP>15A
R618
2

1
C861 68.1R51A.10E
2

5
6
7
8

1
51117A_V5FILT 1 2 51117A_VBST_1 2 1 R465 C849 C903 TC32

D
D
D
D

SC18P50V2JN-1-GP
3D3R3J-L-GP U60 30KR2F-GP DY DY SE390U2D5VM-2GP
SC1U10V2KX-1GP
1

5V_S5 SCD1U25V3KX-GP

SC1U10V3KX-3GP
SI4172DY-T1-GE3-GP 79.3971V.6AL

2
C850 2ND = 77.93971.02L

2
84.04172.037 51117A_VFB
2
1

1
G
S
S
S
D29
U57
SB R464
DY

4
3
2
1
CH551H-30PT-GP 4 13 5117A_DRVH 21K5R2F-GP
83.R5003.C8F VDD UGATE 51117A_DRVL
10 9 SB
2

VDDP LGATE

2
51117A_VFB 5 12 51117A_LL
51117A_VBST FB PHASE
14 BOOT
C -1 3 C
0R0402-PAD VOUT
PGOOD 6
1D8V_PW R 3D3V_S5 Vout=0.75*(R1+R2)/R2
12,34,36 PM_SLP_S5# 1 R467 251117A_EN 1 EN/DEM GND 7
1 R466 2 51117A_TON 2 TON PGND 8

1
51117A_TRIP 11 15 1D8V_PW R 1D8V_S3 1D8V_PW R
249KR2F-GP CS NC#15 R468
1

RT8209BGQW -GP 200KR2F-L-GP G99 G103


R481 74.08209.073 -1 1 2 1 2
15K8R2F-GP

2
GAP-CLOSE-PW R GAP-CLOSE-PW R
1D8V_S3_PW RGD 42
G100 G104
2

1 2 1 2

GAP-CLOSE-PW R GAP-CLOSE-PW R
G109 G107
1 2 1 2

GAP-CLOSE-PW R GAP-CLOSE-PW R
G101 G105
1 2 1 2

GAP-CLOSE-PW R GAP-CLOSE-PW R
G102 G108
1 2 1 2

GAP-CLOSE-PW R GAP-CLOSE-PW R

B
DDR_0.9V B

Iomax=1.5A
5V_S5 1D8V_S3 OCP>3A
-1
1

C548 DDR_VREF_PW R 0D9V_S3


1

C547 SC10U6D3V5KX-1GP C545 G32


SCD1U10V2KX-4GP 1 2
2

SC1U10V3KX-3GP
2

GAP-CLOSE-PW R
G33
-1 U27 1 2

10 1 GAP-CLOSE-PW R
VIN VDDQSNS
12,34,36 PM_SLP_S5# 1 R249 2 9026_S5 9 S5 VLDOIN 2 G34
0R0402-PAD 8 3 1 2
GND VTT
1 R247 2 9026_S3 7 S3 PGND 4
DDR_VREF_S3 0R0402-PAD 6 5 GAP-CLOSE-PW R
VTTREF VTTSNS
GND
2

C542 C535 C544


SCD1U10V2KX-4GP RT9026PFP-GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP
1

11

-1
A JV50-TR8 A
74.09026.079

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DCDC_1D8V_RT8209B/LDO 0D9V
Size Document Number Rev
A3 JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 48 of 63
5 4 3 2 1
5 4 3 2 1

D G957 G9161 RT9161A D

1D5V_S0 1D2V_S5
Iomax=1A Iomax=400mA 2D5V
1D5V_S0_LDO 1D5V_S0 3D3V_S5 1D2V_S5
Iomax=0.2A
G111
1 2
3D3V_S0 2D5V_LDO

1
C918 DY GAP-CLOSE-PW R-3-GP
G110 C410 U47

1
SC1U10V3KX-3GP
SC10U6D3V5KX-1GP
2 1 2 C413 C412 C411 G74

1
2
3
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
U18 3 1 2
U66 GAP-CLOSE-PW R-3-GP DY DY
VOUT
2
2D5V_S0

IN
GND
OUT
2

2
VIN GAP-CLOSE-PW R-3-GP
GND 1

1
3 3D3V_S0 C761
VOUT C782
GND 2

SC1U10V3ZY-6GP

SC22U6D3V5MX-2GP
1 RT9161-A-25PG-GP

2
VIN
1 C913 G9161-120U65U-GP 74.09161.F3C
DY G957T65UF-GP DY SC1U10V3KX-3GP 74.09161.E3C
74.95765.03C
2

C C

For MINI Card.NEW Card power SW Place near to SB710


Place near to CPU

1D8V_S3

DIS
DY
1

C820 C819
SC10U10V5ZY-1GP SC10U10V5ZY-1GP
2

Madison / M96

R1285
1 2
53 VGA_CORE_POK 0R2J-2-GP Now set to 1V for Madison
B B
Madison-Park
D37
5V_S5 VO R421 P/N
2
1D1V 11K5 64.11525.6DL
3
1

1 C803
1V 8K2 64.82015.6DL
83.00016.F11 SC1U10V3ZY-6GP
2

2ND = 83.00016.B11 BAS16PT-GP DIS


Madison-Park Iomax=2A
U48 DIS 1D1V_M92_PW R
M9X 1D1V_M92
R447 G9661-25ADJF11U-GP G85
1 2 9025_EN 1 2
12,34,35,36,42,44,53,54 PM_SLP_S3#
0R2J-2-GP 5
NC#5
1

C866 DY 4 6 DIS GAP-CLOSE-PW R


VPP VO
1

1
3 7 C775 DY G86
SCD1U25V3ZY-1GP VIN ADJ R421 C776 C771
2 8 1 2
2

VEN GND SC100P50V2JN-3GP

SC10U10V5ZY-1GP
8K2R2F-1-GP
1 9 DIS
2

2
POK GND

SC10U10V5ZY-1GP
DIS GAP-CLOSE-PW R
3D3V_S0
2

9025_FB
DIS 74.09661.07D
1

A R446 JV50-TR8 A
2K2R2J-2-GP R420
DIS 30KR2F-GP

Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


1D1V_M92_POK
Vo=0.8*(1+(R1/R2)) Taipei Hsien 221, Taiwan, R.O.C.
44,54 1D1V_M92_POK
Title

LDO 2D5V/1D5V/1D2V_S5/1V_VGA
Size Document Number Rev
A3
-1_20091019 JV50-TR8 -1
Date: W ednesday, November 11, 2009 Sheet 49 of 63
5 4 3 2 1
5 4 3 2 1

84.04407.F37 SB 2009/03/23 WAYNE


AD+ SB
U30 AD+_TO_SYS DCBATOUT
8 D S 1 BT+
D S R262
7 2 U34
6 D S 3 1 2 1 S D 8
5 D G 4 2 S D 7
D01R3721F-GP-U AD+ 3 S D 6
AO4407A-GP R260 R259 4 G D 5 C23

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP
2

SCD1U25V3KX-GP
AD+_G_1

1ISL88731_CSSN
1 2 1 2

G42

G43
D AO4407A-GP D
10KR2J-3-GP 100KR2J-1-GP

2
1
84.04407.F37

1
SB For 2KV ESD protect R293

3
470KR2J-2-GP

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP
2N7002KDW -GP

1
84.2N702.A3F

2
Q15 2ND = 84.DM601.03F R287 R286
10R2J-2-GP 10R2J-2-GP

G62

G60

G61

G50
2

2
2 R261 1

2
10KR2F-2-GP
C574 C573
ISL88731_ACOK 2 1 1 2
D14
A K SCD047U25V3KX-GP C577
SCD1U25V3KX-GP

1
SCD1U25V3KX-GP
CH521S-30PT-GP-U C572 CHG_AGND

ISL88731_CSSP
2

2
1

83.R2003.C8F SC1U25V5KX-1GP CHRG_IN

1
C576

SCD1U25V3KX-GP
SC1U10V3KX-3GP

C620

C626
R277 2ND = 83.R2003.J8F U32

C619
215KR3F-1-GP 3RD = 83.R2003.F8F CHG_AGND

NC#1

5
6
7
8

1
22 28 R285
2

DCIN CSSP

D
D
D
D
4D7R3F-L-GP U36
ISL88731_ACIN 2 2 FDS8884-GP

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP
2

2
ACIN ISL88731_CSSN_R CHG_AGND
27 84.08884.037

2
CSSN
1

5V_S5 11 26 ISL88731_VCC 3 D15 DY -1


VDDSMB VCC
1

R279 C571
1

G
S
S
S
C 49K9R2F-L-GP C561 1 C
SCD01U50V2KX-1GP

SCD1U10V2KX-4GP 25 ISL88731_BST 1 R284 2 ISL88731_BST1 C595


2

4
3
2
1
BOOT ISL88731_LDO 0R0603-PAD BAT54PT-GP
21 1 2
2

ISL88731_ACOK VDDP
13 ACOK
-1 SC1U10V3KX-3GP 2009/03/23 WAYNE
CHG_AGND 24 ISL88731_DHI BT+
CHG_AGND UGATE
36,51 BAT_SCL 10 SCL 1 2 L31 R278
C575
23 ISL88731_LX SCD1U50V3KX-GP ISL88731_LX 1 2 1 2
PHASE
IND-10UH-209-GP D01R3721F-GP-U
9

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP
36,51 BAT_SDA SDA ISL88731_DLO
20 68.1001C.10Y

GAP-CLOSE-PWR-2U-GP

GAP-CLOSE-PWR-2U-GP
LGATE

C13

C15
C568

C563
5
6
7
8

1
G46

G45
D
D
D
D
14 19 U33
NC#14 PGND FDS8884-GP
R276 10R2F-L-GP

2
18 ISL88731_CSIP_R 1 2 84.08884.037
CHG_AGND CSOP
R272

1
17 C567

ISL88731_CSIP
CSON

G
S
S
S
1 2 ISL88731_IINP 8 SCD22U50V3ZY-1GP
36 AD_IA ICM

4
3
2
1
ISL88731_CSIN
1KR2F-3-GP
R274
1ISL88731_CCV1
SCD01U16V2KX-3GP

1 2 ISL88731_CCV 6
10KR2F-2-GP VCOMP
5 NC#5 NC#16 16
1

R267 ISL88731_CCS 4 ICOMP


3
SCD01U50V2KX-1GP

R275
SCD01U50V2ZY-1GP

VREF
10KR2J-3-GP

C560

C564

DY 7
SC1U10V3KX-3GP

SCD1U25V2ZY-1GP

B NC#7 PBATT_SENSE_R B
12 15 1 2
GND

GND VFB BATT_SENSE 51


1

1
C565

C569

C562
2

C566

DY DY 100R2J-2-GP
SCD015U25V2KX-GP
2

29

DY ISL88731AHRZ-T-GP
74.88731.B73
1 2
G44
GAP-CLOSE-PW R-2U-GP

CHG_AGND 3D3V_AUX_S5

1
R270
10KR2F-2-GP

2
AC_IN#
36 AC_IN# ISL88731_LDO
D

Q18
.

1
84.2N702.B3K . R268
2ND = 84.2N702.C3K .
. . 10KR2F-2-GP

A 2N7002EW -GP JV50-TR8 A


2
G
S

R269 1 2 ISL88731_ACOK
0R0402-PAD
Wistron Corporation
1

R266 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


15KR2J-1-GP Taipei Hsien 221, Taiwan, R.O.C.

Title
2

ISL88731A Charger
Size Document Number Rev
A3 -1
JV50-TR8
Date: Thursday, November 12, 2009 Sheet 50 of 63
5 4 3 2 1
A B C D E

Adaptor in to generate DCBATOUT


-1_20091023
4 4
AD_JK
-1_20091019
AD+
DCIN1 83.P6SBM.AAG 83.P6SBM.AAG
4 AD_JK 2ND = 83.P6SMB.AAG 2ND = 83.P6SMB.AAG

2
1 EC59 U29

SCD1U50V3KX-GP
2 DY 1 S D 8
3 2 S D 7

K
3 S D 6

1
5 C556 D9 D40 AD+_2 4 G D 5
6 SCD1U50V3ZY-GP
P6SBMJ24APT-GP P6SBMJ24APT-GP AO4407A-GP

2
NP1

A
R256 C557
84.04407.F37

1
DC-JACK177-GP 200KR2F-L-GP SC1U50V5ZY-1-GP
90W Q13
22.10037.I21

2
R2
2
65W 22.10037.I01 AD_OFF#_JK 1 R1
3

1
DTA124EUB-GP R255
Q12
3 100KR2J-1-GP
1 R1 1ST 84.00124.K1K
2

2
R2 2ND = 84.00124.T1K
36 AD_OFF DTC124EUB-GP 3RD = 84.00124.N1K
3 3

1
1ST 84.00124.H1K
R257
TP8 AFTE14P-GP 1 AD_JK 1KR2F-3-GP 2ND = 84.00124.S1K
TP7 AFTE14P-GP 1 AD_JK 2 3RD = 84.00124.M1K

BATA_SDA_1 1 AFTE14P-GP TP9


BATA_SCL_1 1 AFTE14P-GP TP10
BAT_IN#_1 1 AFTE14P-GP TP11
BT+ 1 AFTE14P-GP TP13
BATTERY CONNECTOR BT+ 1 AFTE14P-GP TP12

3D3V_AUX_S5
1

2
D10 D11 D12 ALP-CON7-12-GP
DY DY DY
BAV99PT-GP-U BAV99PT-GP-U BAV99PT-GP-U
9
83.00099.K11 83.00099.K11 83.00099.K11 8
GND
GND
2
3

GND
RN76 1 GND
1 8
2 BATA_SDA_1 2
36,50 BAT_SDA 2 7 5 BAT_IN
3 6 BATA_SCL_1 4
36,50 BAT_SCL CLK
4 5 3 DAT
BAT_IN#_1
SRN33J-7-GP 6 BT+2
36 BAT_IN# BT+ 7 BT+1

1
DY EC13
1

DY EC16 EC19 EC14 DY


K

SC10P50V2JN-4GP

SC10P50V2JN-4GP
EC17 DY EC18 DY BAT1

2
D13 SCD1U50V3ZY-GP SCD1U50V3ZY-GP 20.81156.007
SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U
2

83.5R603.E3F MM3Z5V6T1G-GP
2ND = 20.81166.007
2ND = 83.5R603.P3F
A

3RD = 83.5R603.M3F 3RD = 20.81238.007

R8
50 BATT_SENSE 1 2
0R0402-PAD

1 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AD/BATT CONN
Size Document Number Rev

JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 51 of 63

A B C D E
5 4 3 2 1

3D3V_S5 1D5V_M92 SB

U16D EC716 EC717 EC718 EC719 EC720 EC721 EC722 EC724 EC725 EC726 EC727 EC728 EC729 EC730 EC731 EC732 EC733 EC734 EC735 EC736

14

1
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
12
11

2
13

TSLVC08APW -1-GP

7
73.07408.L16
D
DCBATOUT
2ND = 73.07408.L15 D
3RD = 73.07408.02B BT+ 5V_S5
3D3V_S0
1D1V_S0 1D8V_M92
1

1
EC7 EC8 EC9 EC10 EC12 EC20 EC46 EC25 EC37 EC21

1
EC15

1
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
DY DY DY DY DY DY DY DY DY DY EC52 EC53 EC54 EC99 EC100 EC55 EC101 EC102 EC103 EC723
2

1
SCD1U25V2ZY-1GP
DY DY

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SC1KP50V2KX-1GP
DY DY DY DY DY DY DY DY DY

2
VCC_CORE_S0_0

1D8V_S3
SPRING_GND24 SPRING_GND23

1
SPRING-U4-GP SPRING-U4-GP EC33 EC35 EC38
EC701 EC702 EC703 EC704 EC705 EC706 EC707 EC708 EC709 EC710 EC711 EC712 EC713 EC714 EC715

1
SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP
DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY DY

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
1

2
DY DY

C C

GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND12 GND9 GND10 GND11
HOLE355X355R111-S1-GPHOLE355X355R111-S1-GPHOLE355X355R111-S1-GP HOLE355X355R111-S1-GP SPRING-48-GP HOLE355X355R111-S1-GPHOLE355X355R111-S1-GPHOLE355X355R111-S1-GPHOLE355X355R111-S1-GP SPRING-48-GP SPRING-48-GP

34.43G01.002 34.43G01.002 34.43G01.002


1

1
DY DY DY

SPRING_GND14 SPRING_GND15 ASPRING_GND16 SPRING_GND17 ASPRING_GND18 ASPRING_GND19 ASPRING_GND20 ASPRING_GND21 ASPRING_GND22 SPRING_GND21 SPRING_GND22
SPRING-7-GP SPRING-7-GP SPRING-62-GP SPRING-62-GP SPRING-58-GP SPRING-58-GP SPRING-12-GP-U SPRING-62-GP SPRING-58-GP SPRING-7-GP SPRING-7-GP

34.49U26.001 34.49U26.001 34.39S07.003 34.39S07.003 34.4B312.002 34.4B312.002 34.41Y19.001


1

1
B B
DY DY
DY DY DY DY DY DY DY DY DY

H10
STF237R146H65-GP
DY
1

TOP TOP TOP TOP BOT


CPU NB VGA MDC MINI1 Check test point
3D3V_S0 TP233 TPAD14-GP

AH5 AH6 AH7 3D3V_AUX_S5 TP232 TPAD14-GP


STF237R125H42-GP

STF237R125H42-GP

STF237R125H42-GP

H8 H9 3D3V_S5 TP231 TPAD14-GP


AH1 AH2 H7
STF236R126H101-GP

STF236R126H101-GP

AH3 AH4 HOLE HOLE


STF256R142H123-GP

HOLE HOLE 5V_S5 TP230 TPAD14-GP JV50-TR8


A A
1

DY 12,36 PM_PW RBTN# TP229 TPAD14-GP


Wistron Corporation
1

TP228 TPAD14-GP
1

6,11 CPU_PW RGD 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1

Taipei Hsien 221, Taiwan, R.O.C.


35,36 S5_ENABLE TP227 TPAD14-GP
Title
34.4Z003.001
DIS DIS DIS
34.42Y01.011 34.4P901.001 6,11 CPU_LDT_RST# TP226 TPAD14-GP
EMI/Spring/Boss
2ND = 34.4Z003.201 34.4H103.001 34.4GD01.001 2ND = 34.42Y01.021 Size Document Number Rev
34.4Z003.001 34.4H103.001 34.4GD01.001 34.4GD01.001 Dimm Door
Test Point JV50-TR8 -1
2ND = 34.4Z003.201 Date: Monday, October 26, 2009 Sheet 52 of 63

5 4 3 2 1
5 4 3 2 1

DCBATOUT DCBATOUT_8209E_VGA Iomax=23A, OCP>40A


G136 VGA_CORE_PW R VCC_GFX_CORE
1 2 G137
1 2
GAP-CLOSE-PW R
G138 GAP-CLOSE-PW R
1 2 G139
1 2
GAP-CLOSE-PW R
G140
5V_S5
RT8209E for VGA GAP-CLOSE-PW R
1 2 G141
D
DCBATOUT_8209E_VGA 1 2 D
GAP-CLOSE-PW R

1
G142 GAP-CLOSE-PW R
1 2 DIS R1286 G143
10R2F-L-GP DIS DIS DIS 1 2

5
6
7
8
GAP-CLOSE-PW R U80

1
D
D
D
D
DIS C1037 C1038 C1039 C1040 C1056 GAP-CLOSE-PW R
R1287

2
SCD1U16V2KX-3GP DIS G144
-1_20091021

SIR474DP-T1-GE3-GP
2

SC1U10V2KX-1GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
1 28209A_R_BOOT_VGA 2 1 1 2

2
3D3R3J-L-GP DIS

1
C1041 DIS GAP-CLOSE-PW R

G
S
S
S
5V_S5 DIS G145

SC1U10V2KX-1GP
1 2

4
3
2
1
A

DIS GAP-CLOSE-PW R
D36 U81 G146
8209A_VDD_VGA 4 13 8209A_HGATE_VGA VGA_CORE_PW R 1 2
DY B0530W S-7-F-GP
10
VDD UGATE
9 8209A_LGATE_VGA DIS
VDDP LGATE L62
GAP-CLOSE-PW R
K

RT8209_FB_VGA 5 12 8209A_PHASE_VGA 1 2 G147


8209A_BOOT FB PHASE
14 BOOT 1 2
VOUT 3 VGA_CORE_PW R IND-D45UH-14-GP

5
6
7
8

5
6
7
8
6 8209A_PGOOD_VGA DIS DIS GAP-CLOSE-PW R
PGOOD

1
D
D
D
D

D
D
D
D
8209A_EN/DEM_VGA 1 EN/DEM 7 U82 U83 G148
8209A_TON_VGA GND TC38 TC39
2 TON 8 DIS DIS 1 2

SIR460DP-T1-GE3-GP

SIR460DP-T1-GE3-GP
PGND

SE330U2VDM-L-GP

SE330U2VDM-L-GP
11 15

2
8209A_CS_VGACS NC#15 GAP-CLOSE-PW R

1
RT8209EGQW -GP 3D3V_S0 G149
1

S
S
S

S
S
S
R1288

G
R1289 DIS 1 2

1
C R1290 8K2R2F-1-GP C

4
3
2
1

4
3
2
1
1 2 DIS R1291 GAP-CLOSE-PW R
220KR2F-GP

12,34,35,36,42,44,49,54 PM_SLP_S3# 10KR2J-3-GP


2 G150
DIS 1 2
2

10KR2J-3-GP

2
M9X 79.33719.L01 GAP-CLOSE-PW R
2 R1292 1 G151
0R0402-PAD-1-GP VGA_CORE_POK 49 79.33719.L01 1 2

1
GAP-CLOSE-PW R
D38
C1042 G152
2 SC100P50V2JN-3GP 1 2
-1_20091021

2
DIS
3 GAP-CLOSE-PW R
G153
1 1 2

83.00016.F11 GAP-CLOSE-PW R
BAS16PT-GP
G154
2ND = 83.00016.B11
Madison-Park 1 2

GAP-CLOSE-PW R
Vout=0.75*(1+Rh/Rl) G155
R1293 1 2
1

3D3V_M92 1 2 DY GAP-CLOSE-PW R
1

R1294 G156
C1044 10KR2F-2-GP 1 2
10KR2J-3-GP SC47P50V2JN-3GP DIS -1_20091019
2

B GAP-CLOSE-PW R B
Madison-Park
2
1

RT8209_FB_VGA G157
C1043 1 2

1
16KR3F-GP 3D3V_S0
1

1
DIS R1296 GAP-CLOSE-PW R
R1295 DY 110KR2F-L-GP R1297 G158
2

DIS 49K9R2F-L-GP DIS 73K2R2F-GP 1 2


2

NV_VID1_Q GAP-CLOSE-PW R
2

2
NV_VID0_Q G159

1
DY 1 2
D

Q39 DIS R1309

D
. Q40 100KR2J-1-GP GAP-CLOSE-PW R
84.2N702.B3K 2N7002EW -GP . DIS G160
. 2ND = 84.2N702.C3K 84.2N702.B3K 1 2

2
.
. . 2ND = 84.2N702.C3K .
M92 XT 2N7002EW -GP .
. . NV_VID0_R GAP-CLOSE-PW R
R1298 DIS G161
G
S

1 2

C
R1299

G
S
R1295 37.4K R1297 30K NV_VID1 1 2 PW RCNTL_1 56
DY Q45 B NV_VID0 1 2 GAP-CLOSE-PW R
MMBT2222A-3-GP PW RCNTL_0 56
10KR2J-3-GP
VGA_CORE 1.20V

E
10KR2J-3-GP
1

DY DIS

1
C1046 DIS
30k(64.30025.6DL) SCD1U10V2KX-4GP C1045
2

SCD1U10V2KX-4GP

2
73.2k(64.73225.6DL)
A A
Madison Pro Park XT M96 Pro M92-XT 37.4k (64.37425.6DL)

PWRCNTL_0 Madison Pro Park XT M96 Pro Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
0 1.00V 1.12V 1.15V 1.20V R1297 73.2K 36.5K 30K Title

1 0.90V 0.90V 0.90V 0.95V


VGA_CORE 1.00V 1.12V 1.15V
RT8209E_VGA CORE
Size Document Number Rev
A3
JV50-TR8 -1
Date: Thursday, November 12, 2009 Sheet 53 of 63
5 4 3 2 1
5 4 3 2 1

D
1D5V_S0 D

5V_S5
1D8V_S3 Iomax=4A
OCP>6A
DIS DIS

1
C877 DIS C879 C883
SC1U10V3KX-3GP SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP
1D5V_M92 for VRAM B

2
3D3V_S0

DY
2 R624 1 9371_1_POK U62
0R2J-2-GP
G9731F11U-GP

12,34,35,36,42,44,49,53 PM_SLP_S3# 1 R622 2 5912_EN Vo(cal.)=1.5096V 1D5V_M92


0R2J-2-GP 5 VIN
M9X 6 VPP VO#4 4
7 POK VO#3 3
5912_EN 8 2 5912_FB DIS DIS DIS DIS
VEN ADJ

1
9 GND GND 1
R625 C882 C870 C878
26K7R3F-GP

SC47P50V2JN-3GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
2

2
3

2
D39
C DIS C
Madison-Park BAS16PT-GP DIS

1
83.00016.F11 R623
2ND = 83.00016.B11 30K1R3F-GP
1

2
Vo=0.8*(1+(R1/R2))

R1300
44,49 1D1V_M92_POK 1 2
0R2J-2-GP

Madison-Park
1D8V_S3
1D5V_S0
1

C869
DY Iomax=4A
SCD1U25V3ZY-1GP

Madison-M96 Madison-M96
2

1
5V_S5
C1047 C1048 OCP>6A
SC10U6D3V5KX-1GP SC10U6D3V5KX-1GP

2
1
C1049 Madison-M96
SC1U10V3KX-3GP 1D5V_M96 for VRAM A

2
B
Vo(cal.)=1.5096V B
G9731F11U-GP
3D3V_S0 Madison-M96 1D5V_M96
5 VIN Madison-M96 Madison-M96
DY 6 VPP VO#4 4
2 R1301 1 9731_2_POK 7 POK VO#3 3
0R2J-2-GP 5912_EN 8 2 9731_FB
VEN ADJ

1
9 GND GND 1
R1302 C1050 C1051 C1052
26K7R3F-GP

SC47P50V2JN-3GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
2

2
U84
Madison-M96

2
Madison-M96 Madison-M96

1
R1303
30K1R3F-GP

2
Vo=0.8*(1+(R1/R2))

A JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

G9731_1D5V_VRAM POWER
Size Document Number Rev
A3 JV50-TR8 -1
Date: W ednesday, November 11, 2009 Sheet 54 of 63
5 4 3 2 1
5 4 3 2 1

AVGA1A 1 OF 8

PEG_RXP[15..0]
PEG_TXP[15..0] 8 PEG_RXP[15..0]
8 PEG_TXP[15..0] PEG_RXN[15..0]
PEG_TXN[15..0] 8 PEG_RXN[15..0]
8 PEG_TXN[15..0]
PEG_TXP0 AA38 Y33 PEG_RXP0_1 C222 1 2 PEG_RXP0
PEG_TXN0 PCIE_RX0P PCIE_TX0P PEG_RXN0_1 SCD1U16V2KX-3GP PEG_RXN0
Y37 PCIE_RX0N PCIE_TX0N Y32 1 2
C231 SCD1U16V2KX-3GP
DIS
PEG_TXP1 Y35 W33 PEG_RXP1_1 C226 1 2
DIS PEG_RXP1
PEG_TXN1 PCIE_RX1P PCIE_TX1P PEG_RXN1_1 SCD1U16V2KX-3GP PEG_RXN1
D W36 PCIE_RX1N PCIE_TX1N W32 1 2 D
C233 SCD1U16V2KX-3GP
DIS
PEG_TXP2 W38 U33 PEG_RXP2_1 C257 1 2
DIS PEG_RXP2
PEG_TXN2 PCIE_RX2P PCIE_TX2P PEG_RXN2_1 SCD1U16V2KX-3GP PEG_RXN2
V37 PCIE_RX2N PCIE_TX2N U32 1 2
C238 SCD1U16V2KX-3GP
DIS
PEG_TXP3 V35 U30 PEG_RXP3_1 C268 1 2
DIS PEG_RXP3
PEG_TXN3 PCIE_RX3P PCIE_TX3P PEG_RXN3_1 SCD1U16V2KX-3GP PEG_RXN3
U36 PCIE_RX3N PCIE_TX3N U29 1 2
C248 SCD1U16V2KX-3GP
DIS
PEG_TXP4 U38 T33 PEG_RXP4_1 C278 1 2
DIS PEG_RXP4
PEG_TXN4 PCIE_RX4P PCIE_TX4P PEG_RXN4_1 SCD1U16V2KX-3GP PEG_RXN4
T37 PCIE_RX4N PCIE_TX4N T32 1 2
C273 SCD1U16V2KX-3GP
DIS
PEG_TXP5 T35 T30 PEG_RXP5_1 C287 1 2
DIS PEG_RXP5
PEG_TXN5 PCIE_RX5P PCIE_TX5P PEG_RXN5_1 SCD1U16V2KX-3GP PEG_RXN5
R36 PCIE_RX5N PCIE_TX5N T29 1 2

PCI EXPRESS INTERFACE


C279 SCD1U16V2KX-3GP
DIS
PEG_TXP6 R38 P33 PEG_RXP6_1 C289 1 2
DIS PEG_RXP6
PEG_TXN6 PCIE_RX6P PCIE_TX6P PEG_RXN6_1 SCD1U16V2KX-3GP PEG_RXN6
P37 PCIE_RX6N PCIE_TX6N P32 1 2
C294 SCD1U16V2KX-3GP
DIS
PEG_TXP7 P35 P30 PEG_RXP7_1 C307 1 2
DIS PEG_RXP7
PEG_TXN7 PCIE_RX7P PCIE_TX7P PEG_RXN7_1 SCD1U16V2KX-3GP PEG_RXN7
N36 PCIE_RX7N PCIE_TX7N P29 1 2
C299 SCD1U16V2KX-3GP
DIS
PEG_TXP8 N38 N33 PEG_RXP8_1 C301 1 2 DIS PEG_RXP8
PEG_TXN8 PCIE_RX8P PCIE_TX8P PEG_RXN8_1 SCD1U16V2KX-3GP PEG_RXN8
M37 PCIE_RX8N PCIE_TX8N N32 1 2
C C309 SCD1U16V2KX-3GP C
DIS
PEG_TXP9 M35 N30 PEG_RXP9_1 C319 1 2 DIS PEG_RXP9
PEG_TXN9 PCIE_RX9P PCIE_TX9P PEG_RXN9_1 SCD1U16V2KX-3GP PEG_RXN9
L36 PCIE_RX9N PCIE_TX9N N29 1 2
C328 SCD1U16V2KX-3GP
DIS
PEG_TXP10 L38 L33 PEG_RXP10_1 C303 1 2 DIS PEG_RXP10
PEG_TXN10 PCIE_RX10P PCIE_TX10P PEG_RXN10_1 SCD1U16V2KX-3GP PEG_RXN10
K37 PCIE_RX10N PCIE_TX10N L32 1 2
C292 SCD1U16V2KX-3GP
DIS
PEG_TXP11 K35 L30 PEG_RXP11_1 C333 1 2 DIS PEG_RXP11
PEG_TXN11 PCIE_RX11P PCIE_TX11P PEG_RXN11_1 SCD1U16V2KX-3GP PEG_RXN11
J36 PCIE_RX11N PCIE_TX11N L29 1 2
C344 SCD1U16V2KX-3GP
DIS
PEG_TXP12 J38 K33 PEG_RXP12_1 C314 1 2
DIS PEG_RXP12
PEG_TXN12 PCIE_RX12P PCIE_TX12P PEG_RXN12_1 SCD1U16V2KX-3GP PEG_RXN12
H37 PCIE_RX12N PCIE_TX12N K32 1 2
C322 SCD1U16V2KX-3GP
DIS
PEG_TXP13 H35 J33 PEG_RXP13_1 C343 1 2 DIS PEG_RXP13
PEG_TXN13 PCIE_RX13P PCIE_TX13P PEG_RXN13_1 SCD1U16V2KX-3GP PEG_RXN13
G36 PCIE_RX13N PCIE_TX13N J32 1 2
C332 SCD1U16V2KX-3GP
DIS
PEG_TXP14 G38 K30 PEG_RXP14_1 C353 1 2
DIS PEG_RXP14
PEG_TXN14 PCIE_RX14P PCIE_TX14P PEG_RXN14_1 SCD1U16V2KX-3GP PEG_RXN14
F37 PCIE_RX14N PCIE_TX14N K29 1 2
C360 SCD1U16V2KX-3GP
DIS
PEG_TXP15 F35 H33 PEG_RXP15_1 C352 1 2 DIS PEG_RXP15
PEG_TXN15 PCIE_RX15P PCIE_TX15P PEG_RXN15_1 SCD1U16V2KX-3GP PEG_RXN15
E37 PCIE_RX15N PCIE_TX15N H32 1 2
C359 SCD1U16V2KX-3GP
B DIS B
DIS
CLOCK
3 CLK_PCIE_PEG AB35 PCIE_REFCLKP
3 CLK_PCIE_PEG# AA36 PCIE_REFCLKN 1D1V_M92

CALIBRATION
DIS
R89 1K27R2F-L-GP
CO-LAYOUT AJ21 Y30 VGA_PCIE_CALRP 1 2
R1231 NC#AJ21 PCIE_CALRP
AK21 NC#AK21
1 2VGA_PW RGOOD AH16 PWRGOOD PCIE_CALRN Y29 VGA_PCIE_CALRN 1 2
10KR2J-3-GP
Madison-Park R99 2KR2F-3-GP
6,9,11,26,33,36 PLT_RST1# PLT_RST1# 1 2 PLT_RST1#_M92_1 AA30
R423 0R2J-2-GP PERST#
DIS
DIS
1

C780 MADISON-PRO-GP DIS


DY SC47P50V2JN-3GP

71.MDSON.M01
2

A DIS / UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Madison PCIE
Size Document Number Rev
A3
JV71-TR -1
Date: Monday, October 26, 2009 Sheet 55 of 63
5 4 3 2 1
5 4 3 2 1

DPLL_PVDD
L7
DIS Layout notice:
1D8V_M92 1 2
BLM15BD121SS1D-GP It should be pleace near HDMI connector
DY DIS
C121 C123 C138 DIS

1
SCD1U16V2KX-3GP
68.00084.F81 DIS AVGA1B 2 OF 8

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
2ND = 68.00217.701 AVGA1G 7 OF 8 0R2J-2-GP 2 1 R504 BRIGHTNESS_AMD 9,19

2
AU24 TX2P_DPAP3 C696 1DIS 2 DY R499
TXCAP_DPA3P TMDS_A_TXC+ 21
AV23 TX2P_DPAN3 SCD1U16V2KX-3GP C6971 DIS2 LVDS CONTROL AK27 BLON_IN_R 0R2J-2-GP 2 1
TXCAM_DPA3N TMDS_A_TXC- 21 VARY_BL BLON_IN 9,36
SCD1U16V2KX-3GP AJ27 LCDVDD_ON 19
TX2P_DPAP2 C694 DIGON
AT25 1DIS 2 TMDS_A_TX0+ 21
MUTI GFX TX0P_DPA2P TX2P_DPAN2 SCD1U16V2KX-3GP C6951
DPLL_VDDC 1D8V_M92 1D8V_M92 1D8V_M92 1D8V_M92 TX0M_DPA2N
AR24 DIS2 TMDS_A_TX0- 21
DPA SCD1U16V2KX-3GP
L6

1
2
D DIS AU26 TX2P_DPAP1 C692 1DIS 2 D
TX1P_DPA1P TMDS_A_TX1+ 21
1 2 AV25 TX2P_DPAN1 SCD1U16V2KX-3GP C6931 DIS2 AK35 RN38
1D1V_M92 TMDS_A_TX1- 21 LVDS_TXBCLK+ 19

2
BLM15BD121SS1D-GP TX1M_DPA1N SCD1U16V2KX-3GP TXCLK_UP_DPF3P SRN10KJ-5-GP
AL36 LVDS_TXBCLK- 19
R365 R367 R370 R371 TX2P_DPAP0 C690 1DIS 2 TXCLK_UN_DPF3N
AR8
DVPCNTL_MVP_0 TX2P_DPA0P
AT27 TMDS_A_TX2+ 21 DIS

SAMSUNG 10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
C122 C120 C130 AU8 AR26 TX2P_DPAN0 SCD1U16V2KX-3GP C6911 DIS2 TMDS_A_TX2- 21 AJ38 LVDS_TXBOUT0+ 19
1

1
DVPCNTL_MVP_1 TX2M_DPA0N SCD1U16V2KX-3GP TXOUT_U0P_DPF2P
DY DIS DIS AP8 AK37 LVDS_TXBOUT0- 19

4
3
DVPCNTL_0 TXOUT_U0N_DPF2N

HYNIX
SC10U6D3V3MX-GP

SC1U10V3KX-3GP

SCD1U16V2KX-3GP

1R552

1R554

1R555

1R556

1R553

1R557

1R558

1R559
68.00084.F81 DY DY AW8 AR30

1
DVPCNTL_1 TXCBP_DPB3P
2ND = 68.00217.701 AR3 AT29 AH35 LVDS_TXBOUT1+ 19
2

2
DVPCNTL_2 TXCBM_DPB3N TXOUT_U1P_DPF1P
AR1 AJ36 LVDS_TXBOUT1- 19
MEM_ID0 DVPCLK TXOUT_U1N_DPF1N
AU1 AV31

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP

499R2F-2-GP
MEM_ID1 DVPDATA_0 TX3P_DPB2P
AU3 AU30 AG38 LVDS_TXBOUT2+ 19
MEM_ID2 DVPDATA_1 DPB TX3M_DPB2N TXOUT_U2P_DPF0P
AW3 AH37 LVDS_TXBOUT2- 19
MEM_ID3 DVPDATA_2 TXOUT_U2N_DPF0N
AP6 AR32

2
DVPDATA_3 TX4P_DPB1P
AW5 AT31 AF35
DVPDATA_4 TX4M_DPB1N TXOUT_U3P
AU5 AG36
DVPDATA_5 TXOUT_U3N
AR6 AT33

HYNIX-SAMSUNG
2

2
DVPDATA_6 TX5P_DPB0P
AW6 AU32
DVPDATA_7 TX5M_DPB0N LVTMDP
DVPDATA [3:2:1:0] for VRAM type R363 R368 R369 R374 AU6
DVPDATA_8

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
selection H/W strap HYNIX AT7
DVPDATA_9 TXCCP_DPC3P
AU14
AV7 AV13 AP34 LVDS_TXACLK+ 19
Should provide VRAM Table for VBios DVPDATA_10 TXCCM_DPC3N TXCLK_LP_DPE3P
AN7 AR34 LVDS_TXACLK- 19

1
DVPDATA_11 TXCLK_LN_DPE3N
request AV9
DVPDATA_12 TX0P_DPC2P
AT15
5V_S0
AT9 AR14 AW37 LVDS_TXAOUT0+ 19
DVPDATA_13 TX0M_DPC2N TMDS_A_TX TXOUT_L0P_DPE2P
AR10 Q22 AU35 LVDS_TXAOUT0- 19
DVPDATA_14 DPC TXOUT_L0N_DPE2N
DVPDATA [3:0] AW10
DVPDATA_15 TX1P_DPC1P
AU16
0100 1GB GDDR3 Hynix-H5TQ1G63BFR-12C (800MHz) AU10 AV15 G AR37

. .
DVPDATA_16 TX1M_DPC1N TXOUT_L1P_DPE1P LVDS_TXAOUT1+ 19

SAMSUNG
AP10 AU39 LVDS_TXAOUT1- 19

HYNIX-SAMSUNG

1
1000 1GB GDDR3 Samsung-K4W1G1646E-HC12 (800MHz) DVPDATA_17 TXOUT_L1N_DPE1N
AV11 AT17 D

.
.
.
DVPDATA_18 TX2P_DPC0P R324
1100 1GB GDDR3 ATI (800MHz) AT11
DVPDATA_19 TX2M_DPC0N
AR16
TXOUT_L2P_DPE0P
AP35 LVDS_TXAOUT2+ 19
AR12 100KR2F-L1-GP S AR35 LVDS_TXAOUT2- 19
DVPDATA_20 TXOUT_L2N_DPE0N
AW12 AU20
DVPDATA_21 TXCDP_DPD3P
AU12 AT19 AN36

2
DVPDATA_22 TXCDM_DPD3N 2N7002EW-GP TXOUT_L3P
AP12 AP37
DVPDATA_23 TXOUT_L3N
TX3P_DPD2P
AT21 84.2N702.B3K
TX3M_DPD2N
AR20 2ND = 84.2N702.C3K
DPD AU22
TX4P_DPD1P MADISON-PRO-GP
It's strap for GDDR3-136ball TX4M_DPD1N
AV21 DIS
Need to Clarify I2C
TX5P_DPD0P
AT23 CRT_RED
71.MDSON.M01
AR22
TX5M_DPD0N CRT_GREEN
C
19 LCD_EDID_CLK AK26 C
3D3V_M92 SCL
19 LCD_EDID_DAT AJ26
SDA CRT_BLUE
AD39 CRT_RED 20

8
7
6
5
GENERAL PURPOSE I/O R
AD37
R# RN86
AH20 59 GPIO_VGA_00 GPIO_0 SRN150F-1-GP
AH18 59 GPIO_VGA_01 AE36 CRT_GREEN 20 DIS
2

GPIO_1 G
AN16 59 GPIO_VGA_02 AD35 1 2
R75 GPIO_VGA_03 GPIO_2 G#
AH23 1
GPIO_3_SMBDATA DIS 0R2J-2-GP
DIS 10KR2J-3-GP TP83 AJ23 1 GPIO_VGA_04 AF37 R80
CRT_BLUE 20

1
2
3
4
TP80 GPIO_4_SMBCLK B
59 GPIO_VGA_05 AH17 AE38
R168 GPIO_VGA_06 GPIO_5_AC_BATT DAC1 B#
1 AJ17
1

TP84 GPIO_VGA_07_BLON GPIO_6 AVSSQ


9,36 BLON_IN 1 2 AK17 AC36 CRT_HSYNC 20,59
0R2J-2-GP GPIO_7_BLON HSYNC
59 GPIO_VGA_08 AJ13 AC38 CRT_VSYNC 20,59
Thermal_int GPIO_8_ROMSO VSYNC
DIS 59 GPIO_VGA_09 AH15
GPIO_9_ROMSI
AJ16 R82 DIS 499R2F-2-GP
GPIO_10_ROMSCK
59 GPIO_VGA_11 AK16 AB34 VGA_RSET 1 2
GPIO_11 RSET DAC2_VDD2DI 1D8V_M92 DAC1_AVDD 1D8V_M92
59 GPIO_VGA_12 AL16 L14
GPIO_12
59 GPIO_VGA_13 AM16
GPIO_13 AVDD
AD34 65mA DAC1_AVDD
1 GPIO_VGA_14_HPD2 AM14 AE34 AVSSQ R52 2 1 1 2
3D3V_M92 TP64 GPIO_14_HPD2 AVSSQ C158 0R0402-PAD
53 PWRCNTL_0 AM13

1
GPIO_VGA_16_SSIN GPIO_15_PWRCNTL_0 SCD1U16V2KX-3GP C119 C182 C183 C184 C187 BLM15BD121SS1D-GP
1 AK14
GPIO_16_SSIN VDD1DI
AC33 100mA DAC1_VDD1DI

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
TP96 Thermal_int AG30 AC34 AVSSQ DIS DIS
GPIO_17_THERMAL_INT VSS1DI
R1304 1 GPIO_VGA_18_HPD3 AN14 DIS DY DIS DIS DIS

2
GPIO_18_HPD3
1 THERMTRIP_VGA TP66 AM17 68.00084.F81
GPIO_19_CTF
1 2 JTAG_TMS TP79 53 PWRCNTL_1 AL13 AC30 2ND = 68.00217.701
GPIO_20_PWRCNTL_1 R2
10KR2J-3-GP R355 1 DIS 2VGA_BB_EN AJ14 GPIO_21_BB_EN R2#
AC31
DY 10KR2J-3-GP AK13
59 GPIO_VGA_22 GPIO_22_ROMCS#
1 GPIO_23_CLKREQ# AN13 AD30 AVSSQ
TP184 JTAG_TRSTB GPIO_23_CLKREQ# G2
AM23 AD31
JTAG_TRST# G2#
1JTAG_TDI AN23
JTAG_TCK JTAG_TCK TP65 JTAG_TDI DAC2_A2VDD 3D3V_M92 DAC1_VDD1DI 1D8V_M92
AK23 AF30 L17
1

3 JTAG_TCK JTAG_TMS JTAG_TCK B2


AL24 AF31
JTAG_TMS B2#
R53 1JTAG_TDO AM24 2 R70 1 1 2
JTAG_TDO
10KR2J-3-GP TP71 1GENERICA AJ19 C173 0R0402-PAD

1
GENERICA
TP85 1GENERICB AK19 AC32 SCD1U16V2KX-3GP C156 C220 C221 C204 BLM15BD121SS1D-GP
DY GENERICB C

SC10U6D3V3MX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP
Back Bias (body bias) which minimizes TP76 1GENERICC AJ20 AD32 DIS
2

GENERICC Y
power consumption in battery modes. TP81 1GENERICD AK20 AF32 DIS DY DIS DIS DIS

2
TP74 GENERICE GENERICD COMP
1 AJ24
GENERICE_HPD4 68.00084.F81
PD = Disable TP78 1GENERICF AH26 DAC2 2ND = 68.00217.701
GENERICF
PU = Enable TP75 1GENERICG AH24 AD29
B TP82 GENERICG H2SYNC B
AC29
1D8V_M92 V2SYNC
HPD1 AK24 100mA
HPD1
AG31 DAC2_VDD2DI
1

VDD2DI
AG32
R73 VSS2DI DAC2_A2VDDQ 1D8V_M92
L19
499R2F-2-GP VREFG VOLTAGE DIVIDER IS 130mA
DIS AG33 1 2 3D3V_M92
(VREFG = VDDR4,5(1.8V) / 3 = 0.6V) A2VDD
2mA
DAC2_A2VDD
C202
2

1
AD33 DAC2_A2VDDQ SCD1U16V2KX-3GP BLM15BD121SS1D-GP
VGA_VREFG A2VDDQ C201
AH13
VREFG DIS
AF33 DIS DY SC1U6D3V2KX-GP

2
1

A2VSSQ
68.00084.F81
R69 C152 DPLL_PVDD R418 2ND = 68.00217.701

1
249R2F-GP SCD1U16V2KX-3GP 75mA AA29 VGA_R2SET 1 2 DIS
2

R2SET 715R2F-GP C559


DIS DIS DPLL_VDDC
AM32
DPLL_PVDD
AN32 DIS SCD1U16V2KX-3GP
2

2
DPLL_PVSS
125mA DDC/AUX AM26 U31
DDC1CLK CRT_DDCCLK 20
AN31
DPLL_VDDC DDC1DATA
AN26 CRT_DDCDATA 20 DIS
R2711 2 0R2J-2-GP SMBC_G781 8 1
35,36 SMBC_Therm SMBCLK VCC
AM27 R2731 2 0R2J-2-GP SMBD_G781 7 2 GPU_DPLUS
AUX1P 35,36 SMBD_Therm SMBDATA DXP
XTALIN AV33 PLL/CLOCK AL27 ALERT#_G781 6 3 GPU_DMINUS
XTALOUT XTALIN AUX1N ALERT# DXN
AU34
XTALOUT DIS 5
GND THERM#
4
AM19 HDMI_A_CLK 21
R1232 DDC2CLK
M9X DDC2DATA
AL19 HDMI_A_DAT 21
2 1 VGA_XO_IN AW34 G781P8F-GP G781_THERM#
R1233 0R2J-2-GP XO_IN
AUX2P
AN20 DIS
2 1 VGA_XO_IN2 AW35 AM20
0R2J-2-GP XO_IN2 AUX2N
M9X
AL30

4
3
DDCCLK_AUX3P
AM30
DDCDATA_AUX3N
For Thermal sensor for TR RN75
AL29 SRN2K2J-1-GP
GPU_DPLUS DDCCLK_AUX4P
AF29
DPLUS DDCDATA_AUX4N
AM29 DIS
GPU_DMINUS AG29 THERMAL
DMINUS 3D3V_M92
AN21

1
2
DDCCLK_AUX5P
L10 AM21
TP77 FAN_PWM DDCDATA_AUX5N
1 AK32
TSVDD TS_FDO
1D8V_M92 1 220mA AJ30
BLM15BD121SS1D-GP DDC6CLK
A
AL31
TS_A DDC6DATA
AJ31 DIS A
C

DIS C125 DIS C153 AK30 3D3V_M92


1

DDCCLK_AUX7P
SC1U10V3KX-3GP

SCD1U16V2KX-3GP

DIS R360 AJ32 AK29 Q21 B HDMI_A_HPD 21


1MR2J-1-GP TSVDD DDCDATA_AUX7N MMBT3904-4-GP
68.00084.F81 AJ33
TSVSS
2ND = 68.00217.701 DIS
2

X6
84.T3904.C11 DIS / UMA
MADISON-PRO-GP DIS HPD1 2ND = 84.03904.L06
2

3 2
1

71.MDSON.M01 R325 Wistron Corporation


DIS 10KR2J-3-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
4 1 Taipei Hsien 221, Taiwan, R.O.C.
1

DIS DIS
2
1

C678 DIS Title


SC8P250V2CC-GP C689 Madison IO
2

XTAL-27MHZ-58-GP SC8P250V2CC-GP
2

82.30034.461 Size Document Number Rev


2ND = 82.30034.701 A2
-1
JV71-TR
Date: Wednesday, November 11, 2009 Sheet 56 of 63
5 4 3 2 1
5 4 3 2 1

-1_20091026 400mA
1D8V_M92
D D

DIS DIS DIS


C245 C246

1
AVGA1E 5 OF 8 C224

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
1D5V_M92
MEM I/O

2
PCIE
AC7 AA31
VDDR1 PCIE_VDDR
AD11 AA32
VDDR1 PCIE_VDDR
DIS DIS AF7 AA33
1

1
C1081 C323 C195 VDDR1 PCIE_VDDR
AG10 AA34
VDDR1 PCIE_VDDR
SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
DIS AJ7
VDDR1 PCIE_VDDR
V28
AK8 W29
2

2
VDDR1 PCIE_VDDR
AL9 W30
VDDR1 PCIE_VDDR 1D1V_M92
G11 Y31
VDDR1 PCIE_VDDR
G14
G17
VDDR1 1100mA
VDDR1
G20 G30
VDDR1 PCIE_VDDC
G23 G31
VDDR1 PCIE_VDDC
G26
VDDR1 PCIE_VDDC
H29 DIS DIS DIS DIS DIS DIS DIS DIS DIS
DIS DIS DIS DIS DIS DIS DIS G29 H30 C313 C306 C321 C337 C298 C283 C329 C276 C350

1
VDDR1 PCIE_VDDC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
C317 C219 C199 C318 C336 C188 C171 H10 J29
VDDR1 PCIE_VDDC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC10U6D3V3MX-GP
J7 J30
VDDR1 PCIE_VDDC
J9 L28

2
VDDR1 PCIE_VDDC
K11 M28
VDDR1 PCIE_VDDC
K13 N28
VDDR1 PCIE_VDDC
K8 R28
VDDR1 PCIE_VDDC
L12 T28
VDDR1 PCIE_VDDC
L16 U28
VDDR1 PCIE_VDDC
L21
VDDR1
L23
VDDR1
DIS 1 DIS DIS DIS DIS L26 AA15

1
C330 C169 C291 C302 C164 VDDR1 CORE VDDC
L7 AA17
VDDR1 VDDC VCC_GFX_CORE
M11 AA20
VDDR1 VDDC
SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
N11 AA22
2

2
VDDR1 VDDC
P7
VDDR1 VDDC
AA24 DIS DIS DIS DIS DIS DY DIS DIS DIS DIS DIS DIS DIS
R11 AA27
VDDR1 VDDC
U11 AB16
VDDR1 VDDC
U7 AB18
VDDR1 VDDC C216 C269 C290 C297 C267 C266 C162 C210 C265 C270 C223 C228 C234
C Y11 AB21 C

1
VDDR1 VDDC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
Y7 AB23
VDDR1 VDDC
AB26
VDDC
AB28

2
1D8V_M92 VDDC
L22 AC17
VDDC
DIS DIS DIS DIS DIS VDDC
AC20
1 2 VDD_CT LEVEL AC22
TRANSLATION VDDC
AC24
VDDC

POWER
BLM15BD121SS1D-GP AF26 AC27
1

C327 C197 C198 C167 C168 VDD_CT VDDC


DIS 17mA AF27
VDD_CT VDDC
AD18
SC10U6D3V3MX-GP

AG26 AD21
VDD_CT VDDC
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP
68.00084.F81 AG27 AD23
2

VDD_CT VDDC
2ND = 68.00217.701 VDDC
AD26
AF17
I/O VDDC
AF20
VDDC VCC_GFX_CORE
AF23 AF22
VDDR3 VDDC
AF24 AG16
3D3V_M92 60mA AG23
VDDR3 VDDC
AG18
VDDR3 VDDC
AG24 AG21
VDDR3 VDDC
AH22
VDDC
AH27 DIS DIS DIS DY DIS DY DIS DIS

1
VDDC C296 C200 C165 C190 C208 C235 C172 C185
DIS DIS DIS AF13 AH28
1

VDDR4 VDDC

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP
C668 C166 C191 AF15 M26
VDDR4 VDDC
AG13 N24

2
VDDR4 VDDC
SC1U6D3V2KX-GP

SC10U6D3V3MX-GP SC1U6D3V2KX-GP AG15 N27


2

VDDR4 VDDC/BIF_VDDC
R18
VDDC
R21
VDDC
AD12 R23
VDDR4 VDDC
AF11 R26
1D8V_M92 VDDR4 VDDC
AF12 T17
VDDR4 VDDC
AG11 T20
VDDR4 VDDC
T22
VDDC
T24
1D5V_M92 VDDC
DIS DIS DIS DIS 68.00084.F81 T27
M9x VRAM CLOCK
1

C326 C260 C272 C149 L20 VDDC/BIF_VDDC


2ND = 68.00217.701 VDDC
U16
1 2 +VDDRHA M20 U18
NC_VDDRHA VDDC
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

BLM15BD121SS1D-GP +VSSRHA M21 U21 VCC_GFX_CORE


2

NC_VSSRHA VDDC
M9X U23
1

C242 1D5V_M92 L21 VDDC VCC_GFX_CORE


U26
+VDDRHB VDDC
M9X 1 2 V12 V17
1

NC_VDDRHB VDDC
SC1U6D3V2KX-GP

BLM15BD121SS1D-GP +VSSRHB U12 V20


2

B R1234 NC_VSSRHB VDDC B


M9X VDDC
V22
M9X 0R2J-2-GP C310
40mA V24
1

VDDC
M9X V27 DIS DIS DIS DIS
2

VDDC
SC1U6D3V2KX-GP

R1235 Y16 DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
2

1
PLL VDDC C355 C284 C300 C225
68.00084.F81 M9X Y18

1
VDDC
0R2J-2-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
2ND = 68.00217.701 PCIE_PVDD AB37 Y21 C1070 C1069 C1068 C1067 C1066 C1065 C1064 C1063 C1062 C1061
PCIE_PVDD VDDC

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
Y23
2

2
VDDC
MPV18 H7 Y26

2
MPV18 VDDC
H8 Y28
MPV18 VDDC
1D8V_M92 PCIE_PVDD
L46
DIS 40mA SPV18 AM10
SPV18
1 2 AA13
BLM15BD121SS1D-GP VDDCI
SPV10 AN9 AB13
SPV10 VDDCI
AC12
VDDCI
DIS DIS DIS AN10 AC15
1

SPVSS VDDCI
68.00084.F81 C729 C726 C727
VDDCI
AD13
2ND = 68.00217.701 VDDCI
AD16
SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

M15
2

VDDCI VCC_GFX_CORE
M16
VOLTAGE VDDCI
M18
SENESE VDDCI
M23
VDDCI
N13
TPAD14-GP TP244 FB_VDDC VDDCI
1 AF28 N15
FB_VDDC VDDCI
VDDCI
N17 DIS DIS DIS
N20 C230 C282 C274

1
VDDCI

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
TPAD14-GP TP245 1 FB_VDDCI AG28 N22 C357
FB_VDDCI VDDCI

SC10U6D3V3MX-GP
ISOLATED R12 DIS
CORE I/O VDDCI
R13

2
TPAD14-GP TP246 FB_GND VDDCI
1 AH29 R16
1D1V_M92 FB_GND VDDCI
L58 T12
VDDCI
T15
1

VDDCI
1 2 V15
R1236 VDDCI
Y13
BLM15BD121SS1D-GP 0R2J-2-GP VDDCI
Madison-Park M9X
MADISON-PRO-GP DIS
2

68.00084.F81 71.MDSON.M01
2ND = 68.00217.701
SPV10
A VCC_GFX_CORE A
L11
DIS DIS DIS Madison-Park Madison-Park
1 2 1D8V_M92 L59 SPV18 1D8V_M92 L60 MPV18
50mA 150mA
BLM15BD121SS1D-GP 1 2 1 2
M9X BLM15BD121SS1D-GP BLM15BD121SS1D-GP
DIS / UMA
1

C133 C134 C137


1

1
68.00084.F81 68.00084.F81 C980 C981 C982 68.00084.F81 C983 C984 C985 C986 C987
SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

2ND = 68.00217.701 2ND = 68.00217.701 2ND = 68.00217.701


Wistron Corporation
2

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP
2

2
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Madison-Park

Madison-Park

Madison-Park

Madison-Park

Madison-Park

Madison-Park

Madison-Park

Madison-Park
Title
Madison POWER
Size Document Number Rev
A2
JV71-TR -1
Date: Wednesday, November 11, 2009 Sheet 57 of 63
5 4 3 2 1
5 4 3 2 1

AVGA1F 6 OF 8

AB39 A3
PCIE_VSS GND
E39 A37
PCIE_VSS GND
F34 AA16
PCIE_VSS GND
F39 AA18
PCIE_VSS GND
G33 AA2
PCIE_VSS GND
G34 AA21
1D8V_M92 PCIE_VSS GND
Madison-Park L61 H31
PCIE_VSS GND
AA23
D Madison-Park Madison-Park H34
PCIE_VSS GND
AA26 D
DPA_VDD18 1 2 H39 AA28
BLM15BD121SS1D-GP PCIE_VSS GND
J31 AA6

1
C988 C989 C990 PCIE_VSS GND
Madison-Park J34
PCIE_VSS GND
AB12

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
68.00084.F81 K31
PCIE_VSS GND
AB15
2ND = 68.00217.701 K34 AB17

2
AVGA1H 8 OF 8 PCIE_VSS GND
K39 AB20
PCIE_VSS GND
L31 AB22
1D8V_M92 DP C/D POWER DP A/B POWER PCIE_VSS GND
R1238 L34 AB24
PCIE_VSS GND
M34 AB27
DPC_VDD18 AP20 PCIE_VSS GND
1 2 AN24 M39 AC11
0R2J-2-GP DPC_VDD18 DPA_VDD18 PCIE_VSS GND
AP21 AP24 N31 AC13
DPC_VDD18 DPA_VDD18 PCIE_VSS GND
Madison-Park N34
PCIE_VSS GND
AC16
1D1V_M92 1D1V_M92 P31 AC18
L8 PCIE_VSS GND
DIS DIS DIS P34
PCIE_VSS GND
AC2
1 R349 2 DPC_VDD10 AP13 AP31 DPA_VDD10 1 2 P39 AC21
0R0603-PAD DPC_VDD10 DPA_VDD10 HCB1608KF-1-GP PCIE_VSS GND
AT13 AP32 R34 AC23

1
DPC_VDD10 DPA_VDD10 C131 C128 C124 PCIE_VSS GND
DIS T31
PCIE_VSS GND
AC26

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
T34 AC28
PCIE_VSS GND
AN17 AN27 68.00214.091 T39 AC6

2
DPC_VSSR DPA_VSSR PCIE_VSS GND
AP16 AP27 2ND = 68.00206.341 U31 AD15
DPC_VSSR DPA_VSSR PCIE_VSS GND
AP17 AP28 U34 AD17
DPC_VSSR DPA_VSSR PCIE_VSS GND
AW14 AW24 V34 AD20
DPC_VSSR DPA_VSSR PCIE_VSS GND
AW16 AW26 V39 AD22
DPC_VSSR DPA_VSSR PCIE_VSS GND
W31 AD24
1D8V_M92 1D8V_M92 PCIE_VSS GND
R1237 R1239 W34 AD27
PCIE_VSS GND
Y34 AD9
DPD_VDD18 AP22 DPB_VDD18 PCIE_VSS GND
1 2 AP25 2 1 Y39 AE2
0R2J-2-GP DPD_VDD18 DPB_VDD18 0R2J-2-GP PCIE_VSS GND
AP23 AP26 AE6
DPD_VDD18 DPB_VDD18 GND
Madison-Park Madison-Park GND
AF10
1D1V_M92 1D1V_M92 AF16
GND
AF18
DPD_VDD10 AP14 DPB_VDD10 GND
1 R348 2 AN33 1 R65 2 AF21
0R0603-PAD AP15
DPD_VDD10
DPD_VDD10
DPB_VDD10
DPB_VDD10
AP33 0R0603-PAD
F15
GND
GND GND
GND
GND
AG17
AG2
F17 AG20
GND GND
F19 AG22
GND GND
AN19 AN29 F21 AG6
DPD_VSSR DPB_VSSR GND GND
AP18 AP29 F23 AG9
DPD_VSSR DPB_VSSR GND GND
AP19 AP30 F25 AH21
DPD_VSSR DPB_VSSR GND GND
AW20 AW30 F27 AJ10
DPD_VSSR DPB_VSSR GND GND
C AW22 AW32 F29 AJ11 C
DPD_VSSR DPB_VSSR GND GND
F31 AJ2
1D8V_M92 1D8V_M92 GND GND
L41 L9 F33 AJ28
GND GND
DIS DIS DIS DIS DIS DIS DIS F7
GND GND
AJ6
1 2 DIS
2 R359 1DPCD_CALR AW18 AW28 DPAB_CALR 1 R358 2 1 2 F9 AK11
BLM15BD121SS1D-GP DPCD_CALR DPAB_CALR BLM15BD121SS1D-GP GND GND
G2 AK31
1

1
C709 C708 C155 150R2F-1-GP 150R2F-1-GP C136 C132 C127 GND GND
DIS DIS 68.00084.F81 G6
GND GND
AK7
SC10U6D3V3MX-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
2ND = 68.00217.701 1D8V_M92
68.00084.F81 DPE_VDD18 AH34
DP E/F POWER DP PLL POWER
AU28 DPA_PVDD 20mA H9
J2
GND GND
AL11
AL14
2

2
DPE_VDD18 DPA_PVDD GND GND
2ND = 68.00217.701 AJ34 AV27 1 R51 2 J27 AL17
SC1U6D3V2KX-GP 400mA DPE_VDD18 DPA_PVSS 0R0603-PAD J6
GND GND
AL2
1D1V_M92 GND GND
L13 J8 AL20
GND GND
DIS DIS DIS 20mA K14
GND GND/PX_EN
AL21
1 2 DPE_VDD10 AL33 AV29 DPB_PVDD K7 AL23
HCB1608KF-1-GP DPE_VDD10 DPB_PVDD GND GND
AM33 AR28 L11 AL26
1

C135 C141 C140 DPE_VDD10 DPB_PVSS GND GND


DIS L17
GND GND
AL32
SC10U6D3V3MX-GP

1D8V_M92 L2 AL6
GND GND
SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

68.00214.091 20mA L22 AL8


2

DPC_PVDD GND GND


2ND = 68.00206.341 AN34 AU18 1 R351 2 L24 AM11
DPE_VSSR DPC_PVDD 0R0603-PAD GND GND
AP39 AV17 L6 AM31
DPE_VSSR DPC_PVSS GND GND
AR39 M17 AM9
DPE_VSSR DPD_PVDD GND GND
AU37 M22 AN11
DPE_VSSR GND GND
AV19
20mA M24
N16
GND GND
AN2
AN30
DPD_PVDD GND GND
AR18 N18 AN6
DPD_PVSS GND GND
N2 AN8
DPE_VDD18 DPE_PVDD GND GND
AF34 N21 AP11
DPF_VDD18 DPD_PVDD GND GND
400mA AG34
DPF_VDD18
AM37
20mA 1D8V_M92
N23
N26
GND GND
AP7
AP9
DPE_PVDD GND GND
AN38 N6 AR5
DPE_PVSS GND GND
1 R350 2 R15 B11
DPE_VDD10 0R0603-PAD GND GND
AK33 R17 B13

1
DPF_VDD10 GND GND
AK34 R2 B15
DPF_VDD10 DPF_PVDD R1270 GND GND
AL38 R20 B17
DPF_PVDD GND GND
DPF_PVSS
AM35 0R2J-2-GP Madison-Park R22
GND GND
B19
DPF_PVSS

R24 B21
GND GND
AF39 R27 B23
2
DPF_VSSR GND GND
AH39 R6 B25
DPF_VSSR GND GND
AK39 T11 B27
DPF_VSSR DPE_PVDD 1D8V_M92 GND GND
AL34 L42 T13 B29
1

DPF_VSSR GND GND


AM34
DPF_VSSR DIS DIS T16
GND GND
B31
B 1 2 T18 B33 B
R1240 0R2J-2-GP BLM15BD121SS1D-GP GND GND
T21 B7

1
C714 C715 GND GND
DIS Madison-Park DIS T23
GND GND
B9
2 1 DPEF_CALR AM39 DIS C713 T26 C1
2

DPEF_CALR GND GND

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP
68.00084.F81 U15 C39

2
R68 GND GND
2ND = 68.00217.701 U17 E35
150R2F-1-GP MADISON-PRO-GP GND GND
DIS U2
GND GND
E5
U20 F11
GND GND
U22 F13
71.MDSON.M01 U24
GND GND
GND
U27
GND
U6
GND
V11
GND
V16
GND
V18
GND
V21
GND
V23
GND
V26
GND
W2
GND
W6
GND
Y15
GND
Y17
GND
Y20
GND VSS_MECH1 TP240
Y22 A39 1
GND VSS_MECH VSS_MECH2 TP241
Y24 AW1 1
GND VSS_MECH VSS_MECH3 TP242
Y27 AW39 1
GND VSS_MECH
U13
GND
V13
GND
MADISON-PRO-GP DIS 2009/05/16 SB Add

71.MDSON.M01

A A

DIS / UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DP POWER_GND
Size Document Number Rev
A2
JV71-TR -1
Date: Monday, October 05, 2009 Sheet 58 of 63
5 4 3 2 1
5 4 3 2 1

AVGA1C 3 OF 8
AVGA1D 4 OF 8 3D3V_M92 DDR2 DDR2
DDR2 DDR2 62,63 MDA[63..0] GDDR3/GDDR5 GDDR5/GDDR3
60,61 MDB[63..0] GDDR3/GDDR5 GDDR5/GDDR3 DDR3 DDR3 MAA[0..12] 62,63
MAB[0..12] 60,61 DIS
DDR3 DDR3 R63 1 2 10KR2J-3-GP MDA0 C37 G24 MAA0
56 GPIO_VGA_00 DQA0_0/DQA_0 MAA0_0/MAA_0
MDB0 C5 P8 MAB0 MDA1 C35 J23 MAA1
MDB1 DQB0_0/DQB_0 MAB0_0/MAB_0 MAB1 MDA2 DQA0_1/DQA_1 MAA0_1/MAA_1 MAA2
C3
DQB0_1/DQB_1 MAB0_1/MAB_1
T9 DIS A35
DQA0_2/DQA_2 MAA0_2/MAA_2
H24

MEMORY INTERFACE A
MDB2 E3 P9 MAB2 R62 1 2 10KR2J-3-GP MDA3 E34 J24 MAA3
DQB0_2/DQB_2 MAB0_2/MAB_2 56 GPIO_VGA_01 DQA0_3/DQA_3 MAA0_3/MAA_3

MEMORY INTERFACE B
MDB3 E1 N7 MAB3 MDA4 G32 H26 MAA4
MDB4 DQB0_3/DQB_3 MAB0_3/MAB_3 MAB4 MDA5 DQA0_4/DQA_4 MAA0_4/MAA_4 MAA5
F1
DQB0_4/DQB_4 MAB0_4/MAB_4
N8 DIS D33
DQA0_5/DQA_5 MAA0_5/MAA_5
J26
MDB5 F3 N9 MAB5 R58 1 2 10KR2J-3-GP MDA6 F32 H21 MAA6
DQB0_5/DQB_5 MAB0_5/MAB_5 56 GPIO_VGA_02 DQA0_6/DQA_6 MAA0_6/MAA_6
MDB6 F5 U9 MAB6 MDA7 E32 G21 MAA7
MDB7 DQB0_6/DQB_6 MAB0_6/MAB_6 MAB7 MDA8 DQA0_7/DQA_7 MAA0_7/MAA_7 MAA8
G4
DQB0_7/DQB_7 MAB0_7/MAB_7
U8 DIS D31
DQA0_8/DQA_8 MAA1_0/MAA_8
H19
MDB8 H5 Y9 MAB8 R61 1 2 10KR2J-3-GP MDA9 F30 H20 MAA9
DQB0_8/DQB_8 MAB1_0/MAB_8 56 GPIO_VGA_05 DQA0_9/DQA_9 MAA1_1/MAA_9
MDB9 H6 W9 MAB9 MDA10 C30 L13 MAA10
MDB10 DQB0_9/DQB_9 MAB1_1/MAB_9 MAB10 MDA11 DQA0_10/DQA_10 MAA1_2/MAA_10 MAA11
J4
DQB0_10/DQB_10 MAB1_2/MAB_10
AC8 DY A30
DQA0_11/DQA_11 MAA1_3/MAA_11
G16
MDB11 K6 AC9 MAB11 R54 1 2 10KR2J-3-GP MDA12 F28 J16 MAA12
DQB0_11/DQB_11 MAB1_3/MAB_11 56 GPIO_VGA_08 DQA0_12/DQA_12 MAA1_4/MAA_12
For SSTL-1.8/SSTL-2/DDR1/GDDR1: 0.5 * VDDR1. MDB12 K5 AA7 MAB12 MDA13 C28 H16 BA2
MDB13 DQB0_12/DQB_12 MAB1_4/MAB_12 BB2 MDA14 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 BA0 BA2 62,63
For DDR3/GDDR3/GDDR4/GDDR5: 0.7 * VDDR1. L4
DQB0_13/DQB_13 MAB1_5/BA2
AA8 BB2 60,61 DY A28
DQA0_14/DQA_14 MAA1_6/MAA_14_BA0
J17 BA0 62,63
D MDB14 M6 Y8 BB0 R56 1 2 10KR2J-3-GP MDA15 E28 H17 BA1 D
DQB0_14/DQB_14 MAB1_6/BA0 BB0 60,61 56 GPIO_VGA_09 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 BA1 62,63
MDB15 M1 AA9 BB1 MDA16 D27
DQB0_15/DQB_15 MAB1_7/BA1 BB1 60,61 DQA0_16/DQA_16
MDB16 M3 DIS MDA17 F26 A32 DQMA#0
MDB17 DQB0_16/DQB_16 DQMB#0 R57 MDA18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 DQMA#1
DIVIDER RESISTORS GDDR5 GDDR3 DDR3 M5 H3 56 GPIO_VGA_11 1 2 10KR2J-3-GP C26 C32
MDB18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 DQMB#1 MDA19 DQA0_18/DQA_18 WCKA0#_0/DQMA_1 DQMA#2
N4 H1 A26 D23
MDB19 DQB0_18/DQB_18 WCKB0#_0/DQMB_1 DQMB#2 MDA20 DQA0_19/DQA_19 WCKA0_1/DQMA_2 DQMA#3
P6 T3 F24 E22
MDB20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 DQMB#3 MDA21 DQA0_20/DQA_20 WCKA0#_1/DQMA_3 DQMA#4
MVREF 1.5V 1.8/1.5V 1.5V P5
DQB0_20/DQB_20 WCKB0#_1/DQMB_3
T5 DY C24
DQA0_21/DQA_21 WCKA1_0/DQMA_4
C14
MDB21 R4 AE4 DQMB#4 R55 1 2 10KR2J-3-GP MDA22 A24 A14 DQMA#5
MDB22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 DQMB#5 56 GPIO_VGA_22 MDA23 DQA0_22/DQA_22 WCKA1#_0/DQMA_5 DQMA#6
T6 AF5 E24 E10
MDB23 DQB0_22/DQB_22 WCKB1#_0/DQMB_5 DQMB#6 MDA24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 DQMA#7
MVREF TO PWR 40.2R 40.2R 40.2R T1
DQB0_23/DQB_23 WCKB1_1/DQMB_6
AK6 C22
DQA0_24/DQA_24 WCKA1#_1/DQMA_7
D9
MDB24 U4 AK5 DQMB#7 MDA25 A22
MDB25 DQB0_24/DQB_24 WCKB1#_1/DQMB_7 MDA26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 RDQSA0
V6 F22 C34 DQMA#[0..7] 62,63
MDB26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 RDQSB0 MDA27 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 RDQSA1
MVREF TO GND 100R 100R 100R V1
DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0
F6 DQMB#[0..7] 60,61 D21
DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1
D29
MDB27 V3 K3 RDQSB1 DIS MDA28 A20 D25 RDQSA2
MDB28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 RDQSB2 R377 MDA29 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 RDQSA3
Y6 P3 20,56 CRT_HSYNC 1 2 10KR2J-3-GP F20 E20
MDB29 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 RDQSB3 MDA30 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 RDQSA4
Y1 V5 D19 E16
MDB30 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 RDQSB4 R378 MDA31 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 RDQSA5
Y3 AB5 20,56 CRT_VSYNC 1 2 10KR2J-3-GP E18 E12
MDB31 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 RDQSB5 MDA32 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 RDQSA6
Y5
DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5
AH1 DIS C18
DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6
J10
MDB32 AA4 AJ9 RDQSB6 MDA33 A18 D7 RDQSA7
MDB33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 RDQSB7 MDA34 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7
AB6 AM5 F18 RDQSA[0..7] 62,63
MDB34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7 R60 MDA35 DQA1_2/DQA_34 WDQSA0
AB1 RDQSB[0..7] 60,61 56 GPIO_VGA_12 1 2 10KR2J-3-GP D17 A34
MDB35 DQB1_2/DQB_34 WDQSB0 MDA36 DQA1_3/DQA_35 DDBIA0_0/QSA_0#/WDQSA_0 WDQSA1
AB3
DQB1_3/DQB_35 DDBIB0_0/QSB_0#/WDQSB_0
G7 DY A16
DQA1_4/DQA_36 DDBIA0_1/QSA_1#/WDQSA_1
E30
MDB36 AD6 K1 WDQSB1 MDA37 F16 E26 WDQSA2
MDB37 DQB1_4/DQB_36 DDBIB0_1/QSB_1#/WDQSB_1 WDQSB2 R59 MDA38 DQA1_5/DQA_37 DDBIA0_2/QSA_2#/WDQSA_2 WDQSA3
AD1 P1 56 GPIO_VGA_13 1 2 10KR2J-3-GP D15 C20
MDB38 DQB1_5/DQB_37 DDBIB0_2/QSB_2#/WDQSB_2 WDQSB3 MDA39 DQA1_6/DQA_38 DDBIA0_3/QSA_3#/WDQSA_3 WDQSA4
AD3
DQB1_6/DQB_38 DDBIB0_3/QSB_3#/WDQSB_3
W4 DY E14
DQA1_7/DQA_39 DDBIA1_0/QSA_4#/WDQSA_4
C16
MDB39 AD5 AC4 WDQSB4 MDA40 F14 C12 WDQSA5
MDB40 DQB1_7/DQB_39 DDBIB1_0/QSB_4#/WDQSB_4 WDQSB5 MDA41 DQA1_8/DQA_40 DDBIA1_1/QSA_5#/WDQSA_5 WDQSA6
AF1 AH3 D13 J11
MDB41 DQB1_8/DQB_40 DDBIB1_1/QSB_5#/WDQSB_5 WDQSB6 MDA42 DQA1_9/DQA_41 DDBIA1_2/QSA_6#/WDQSA_6 WDQSA7
AF3 AJ8 F12 F8
MDB42 DQB1_9/DQB_41 DDBIB1_2/QSB_6#/WDQSB_6 WDQSB7 1D5V_M92 MDA43 DQA1_10/DQA_42 DDBIA1_3/QSA_7#/WDQSA_7
AF6 AM3 A12 WDQSA[0..7] 62,63
MDB43 DQB1_10/DQB_42 DDBIB1_3/QSB_7#/WDQSB_7 MDA44 DQA1_11/DQA_43 ODTA0
AG4 WDQSB[0..7] 60,61 D11 J21 ODTA0 62
MDB44 DQB1_11/DQB_43 ODTB0 MDA45 DQA1_12/DQA_44 ADBIA0/ODTA0 ODTA1
AH5 T7 ODTB0 60 F10 G19 ODTA1 63
MDB45 DQB1_12/DQB_44 ADBIB0/ODTB0 ODTB1 MDA46 DQA1_13/DQA_45 ADBIA1/ODTA1
AH6 W7 ODTB1 61 A10

1
MDB46 DQB1_13/DQB_45 ADBIB1/ODTB1 MDA47 DQA1_14/DQA_46 CLKA0
AJ4 C10 H27 CLKA0 62
MDB47 DQB1_14/DQB_46 CLKB0 R1241 MDA48 DQA1_15/DQA_47 CLKA0 CLKA0#
AK3 L9 CLKB0 60 G13 G27 CLKA0# 62
1D5V_M92 MDB48 DQB1_15/DQB_47 CLKB0 CLKB0# 40D2R2F-GP MDA49 DQA1_16/DQA_48 CLKA0#
AF8
DQB1_16/DQB_48 CLKB0#
L8 CLKB0# 60 DIS H13
DQA1_17/DQA_49
MDB49 AF9 MDA50 J13 J14 CLKA1
DQB1_17/DQB_49 DQA1_18/DQA_50 CLKA1 CLKA1 63
MDB50 AG8 AD8 CLKB1 MDA51 H11 H14 CLKA1#

2
DQB1_18/DQB_50 CLKB1 CLKB1 61 DQA1_19/DQA_51 CLKA1# CLKA1# 63
MDB51 AG7 AD7 CLKB1# MDA52 G10
CLKB1# 61
1

MDB52 DQB1_19/DQB_51 CLKB1# MDA53 DQA1_20/DQA_52 RASA0#


AK9 G8 K23 RASA0# 62
R435 MDB53 DQB1_20/DQB_52 RASB0# MDA54 DQA1_21/DQA_53 RASA0# RASA1#
AL7 T10 RASB0# 60 K9 K19 RASA1# 63
40D2R2F-GP MDB54 DQB1_21/DQB_53 RASB0# RASB1# C991 C992 MDA55 DQA1_22/DQA_54 RASA1#
DIS AM8 Y10 RASB1# 61 K10

1
MDB55 DQB1_22/DQB_54 RASB1# 1D5V_M92 R1242 MDA56 DQA1_23/DQA_55 CASA0#
C AM7 G9 K20 CASA0# 62
C
DQB1_23/DQB_55 DQA1_24/DQA_56 CASA0#

SCD01U16V2KX-3GP

SCD1U16V2KX-3GP
MDB56 AK1 W10 CASB0# 100R2F-L1-GP-U MDA57 A8 K17 CASA1#
2

DQB1_24/DQB_56 CASB0# CASB0# 60 DQA1_25/DQA_57 CASA1# CASA1# 63


MDB57 AL4 AA10 CASB1# DIS DIS DIS MDA58 C8

2
DQB1_25/DQB_57 CASB1# CASB1# 61 DQA1_26/DQA_58
MDB58 AM6 For M92-XT R1241, R1243 MDA59 E8 K24 CSA0#_0
CSA0#_0 62

1
MDB59 DQB1_26/DQB_58 CSB0#_0 MDA60 DQA1_27/DQA_59 CSA0#_0
AM1 P10 A6 K27

2
1D5V_M92 DQB1_27/DQB_59 CSB0#_0 CSB0#_0 60 R435, R436 change to 100R DQA1_28/DQA_60 CSA0#_1
MDB60 AN4 L10 R1243 MDA61 C6
1

DQB1_28/DQB_60 CSB0#_1 DQA1_29/DQA_61


SCD1U16V2KX-3GP

R432 C789 C792 MDB61 AP3 DIS 40D2R2F-GP MDA62 E6 M13 CSA1#_0
DQB1_29/DQB_61 DQA1_30/DQA_62 CSA1#_0 CSA1#_0 63
SCD01U50V2KX-1GP

MDB62 AP1 AD10 CSB1#_0 MDA63 A5 K16


100R2F-L1-GP-U

DQB1_30/DQB_62 CSB1#_0 CSB1#_0 61 DQA1_31/DQA_63 CSA1#_1


DIS DIS MDB63 AP5 AC10
2

2
1

DQB1_31/DQB_63 CSB1#_1 MVREFDA CKEA0


DIS L18
MVREFDA CKEA0
K21 CKEA0 62
R436 U10 CKEB0 MVREFSA L20 J20 CKEA1
2

40D2R2F-GP CKEB0 CKEB0 60 MVREFSA CKEA1 CKEA1 63


DIS MVREFDB Y12 AA11 CKEB1
MVREFDB CKEB1 CKEB1 61 1D5V_M92
MVREFSB AA12 C993 C994 1Madison 2 MBM_CALRN0 L27 K26 WEA0#
WEA0# 62

1
MVREFSB WEB0# R1246 R1244 243R2F-2-GP MBM_CALRN1 N12 MEM_CALRN0 WEA0# WEA1#
N10 WEB0# 60 1 Park 2 L15 WEA1# 63
2

WEB0# MEM_CALRN1 WEA1#

SCD01U16V2KX-3GP

SCD1U16V2KX-3GP
AB11 WEB1# DIS 100R2F-L1-GP-U R1245 243R2F-2-GP
1Madison 2 MBM_CALRN2AG12
WEB1# WEB1# 61 MEM_CALRN2
DIS R1247 243R2F-2-GP

2
DIS 1 Park-M9X
2 MBM_CALRP1 M12 H23 MAA13_R 1 R1251 2
MEM_CALRP1 MAA0_8 MAA13 62,63
C793 TESTEN AD28 T8 MAB13_R 1 R1248 2 R1249 243R2F-2-GP
1Madison 2 MBM_CALRP0 M27 J19

2
MAB13 60,61
1

R433 C790 TESTEN MAB0_8 R1250 243R2F-2-GP MBM_CALRP2AH12 MEM_CALRP0 MAA1_8 0R2J-2-GP
W8 1Madison 2

GDDR5
MAB1_8 MEM_CALRP2
SCD01U50V2KX-1GP

SCD1U16V2KX-3GP

CLKTESTA AK10 0R2J-2-GP R1252 243R2F-2-GP


100R2F-L1-GP-U

Madison
GDDR5

CLKTESTB CLKTESTA
DIS M9X AL10 AH11 Madison
2

CLKTESTB DRAM_RST#
DIS DIS
1

DIS R357 R356 M9X


2

CO-LAYOUT
4K7R2F-GP

4K7R2F-GP

R417
1KR2F-3-GP
MADISON-PRO-GP DIS MADISON-PRO-GP DIS
2

1D5V_M92 VGA_DRAM_RST#
2

71.MDSON.M01 Designator For M96-M2 For Mannhatton M92-XT 71.MDSON.M01


1

M9X
R628 R_MEM_1 R628 4.7K DY 4.7K
R1283
4K7R2F-GP
R1230
3D3V_M92 1 2 DIS
2

1 2 VRAM_RST 60,61,62,63 R_MEM_2 R1230 0R 680R 0R


10KR2F-2-GP
1

680R2F-GP
1

DY R1269 DIS R_MEM_3 R1269 4.7K 10K DY


DIS 10KR2F-2-GP C961
SC68P50V2JN-1GP
2

B B
C_MEM C961 1nF 68pF 2200pF
2

RECOMMENDED SETTINGS RECOMMENDED SETTINGS


STRAPS PIN DESCRIPTION 0= DO NOT INSTALL RESISTOR STRAPS PIN DESCRIPTION 0= DO NOT INSTALL RESISTOR
AMD RESERVED CONFIGURATION STRAPS
1 = INSTALL 10K RESISTOR 1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT X = DESIGN DEPENDANT ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
NA = NOT APPLICABLE NA = NOT APPLICABLE THEY MUST NOT CONFLICT DURING RESET
PCIE FULL TX OUTPUT SWING
Tansmitter Power Savings Enable
TX_PWRS_ENB GPIO0 0= 50% Tx output swing PWRCNTL_[1,0] GPIO[15,20] Power control signals to control the core H2SYNC, GENERICC
1= Full Tx output swing voltage regulator PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED,
(Internal PD) 1
THEY MUST NOT CONFLICT DURING RESET
Transmitter De-emphasis Enable BB_EN GPIO21 Back Bias (body bias) which minimizes
TX_DEEMPH_EN GPIO1 0= Tx de-emphasis disabled power consumption in battery modes. GPIO_28_TDO , GPIO21_BB_EN
1
1= Tx de-emphasis enabled 0V = Disable
(Internal PD) 0
3D3V = Enable
PCIE GNE2 ENABLED
0 = Advertises the PCI-E device
BIF_GEN2_EN_A GPIO2 as 2.5GT/s AUD[1:0] If BIOS_ROM_EN (GPIO22) = 0 If BIOS_ROM_EN (GPIO22) = 1
1 = Advertises the PCI-E device 1 AUD[1] VGA_HSYNC 00:No audio function
AUD[0] 01:Audio for DisplayPort and HDMI Size of the primary
as 5GT/s VGA_VSYNC GPIO[13,12,11] Manufacturer Part Number GPIO[13,12,11]
( if adapter is detected) 1
memory apertures
(Internal PD) 10:Audio for DisplayPort only
AC_BATT GPIO5 AC (Performance mode) = 3.3 V 11:Audio for both DisplayPort and HDMI 128MB x000 M25P05A 0100
Battery saving mode = 0.0 V 256MB x001 ST M25P10A 0101
V 64MB x010 Microelectronics M25P20 0101
CCBYPASS GENERICC 0 32MB x M25P40 0101
BIF_CLK_PM_EN
ROMSO GPIO8 Serial ROM Output from ROM 0 512MB x M25P80 0101
1GB x
HDMI must only be enabled on systems that are 2GB x Chingis Pm25LV512A 0100
A VGA ENABLED A
legally entitled. It is the responsibility of the system 4GB x (formerly PMC) Pm25LV010A 0101
ROMSI GPIO9 Serial ROM Input to ROM 0
designer to ensure that the system is entitled to
support this feature.
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
if BIOS_ROM_EN=1,then Config[3:0] DIS / UMA
ROMIDCFG[3:0] defines the ROM type X X X
GPIO[13,12,11] if BIOS_ROM_EN=0,then Config[3:0]
(Internal PD) defines the primary memory apeture size STRAPS PIN DESCRIPTION Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GPIO DVPDATA(23:20) Initialization Behavior: This signal is input during Taipei Hsien 221, Taiwan, R.O.C.
reset (no reference clock is required). After reset,
(Internal PD) Title
the default state is output low (0 V). Madison Memory / Straps
The signals above can be left unconnected if not
used. Size Document Number Rev
A2
JV71-TR -1
Date: Wednesday, November 11, 2009 Sheet 59 of 63
5 4 3 2 1
5 4 3 2 1

GDDR3
1D5V_M92 AFBRAM3 1D5V_M92 AFBRAM4 MAB[0..12]
59,61 MAB[0..12]
K8 E3 MDB21 K8 E3 MDB11
VDD DQL0 MDB20 VDD DQL0 MDB14
K2 VDD DQL1 F7 K2 VDD DQL1 F7
N1 F2 MDB22 N1 F2 MDB8 MDB[63..0]
VDD DQL2 VDD DQL2 59,61 MDB[63..0]
D R9 F8 MDB16 R9 F8 MDB10 D
VDD DQL3 MDB19 VDD DQL3 MDB15
B2 VDD DQL4 H3 B2 VDD DQL4 H3
D9 H8 MDB17 D9 H8 MDB13
VDD DQL5 MDB23 VDD DQL5 MDB9
G7 VDD DQL6 G2 G7 VDD DQL6 G2 59,61 DQMB#[0..7]
R1 H7 MDB18 R1 H7 MDB12
VDD DQL7 VDD DQL7
N9 VDD N9 VDD
D7 MDB27 D7 MDB4
DQU0 DQU0 59,61 RDQSB[0..7]
A8 C3 MDB28 A8 C3 MDB3
VDDQ DQU1 MDB30 VDDQ DQU1 MDB7
A1 VDDQ DQU2 C8 A1 VDDQ DQU2 C8
C1 C2 MDB24 C1 C2 MDB0
VDDQ DQU3 VDDQ DQU3 59,61 W DQSB[0..7]
C9 A7 MDB25 C9 A7 MDB5
VDDQ DQU4 MDB31 VDDQ DQU4 MDB1
D2 VDDQ DQU5 A2 D2 VDDQ DQU5 A2
E9 B8 MDB26 E9 B8 MDB6
VDDQ DQU6 MDB29 VDDQ DQU6 MDB2
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 C7 RDQSB3 H2 C7 RDQSB0
VDDQ DQSU W DQSB3 RDQSB3 59 VDDQ DQSU W DQSB0 RDQSB0 59 CLKB0#
DIS DQSU# B7 W DQSB3 59 DIS DQSU# B7 W DQSB0 59
VREFD_U0 H1 VREFD_U0 H1
R1199 VREFDQ R1200 VREFDQ
VREFC_U0 M8 F3 RDQSB2 VREFC_U0 M8 F3 RDQSB1 CLKB0
ZQ1 VREFCA DQSL W DQSB2 RDQSB2 59 ZQ3 VREFCA DQSL W DQSB1 RDQSB1 59
1 2 L8 ZQ DQSL# G3 W DQSB2 59 1 2 L8 ZQ DQSL# G3 W DQSB1 59

1
243R2F-2-GP K1 ODTB0 243R2F-2-GP K1 ODTB0 R409 R408
MAB0 ODT ODTB0 59 MAB0 ODT ODTB0 59
N3 A0 N3 A0 DIS

56R2F-1-GP

56R2F-1-GP
MAB1 P7 MAB1 P7 DIS
MAB2 A1 CSB0#_0 MAB2 A1 CSB0#_0
P3 L2 P3 L2

2
MAB3 A2 CS# CSB0#_0 59 MAB3 A2 CS# CSB0#_0 59
N2 A3 RESET# T2 N2 A3 RESET# T2
MAB4 P8 MAB4 P8
MAB5 A4 MAB5 A4
P2 A5 P2 A5
MAB6 R8 T7 MAB6 R8 T7
A6 NC#T7 VRAM_RST 59,61,62,63 A6 NC#T7 VRAM_RST 59,61,62,63
C MAB7 R2 L9 MAB7 R2 L9 C
MAB8 A7 NC#L9 MAB8 A7 NC#L9
T8 A8 NC#L1 L1 T8 A8 NC#L1 L1
MAB9 R3 J9 MAB9 R3 J9
MAB10 A9 NC#J9 MAB10 A9 NC#J9 1
L7 A10/AP NC#J1 J1 L7 A10/AP NC#J1 J1
MAB11 R7 MAB11 R7 C763
MAB12 A11 MAB12 A11 2
N7 A12/BC# N7 A12/BC# DIS SCD47U6D3V2KX-GP
MAB13 T3 J8 MAB13 T3 J8
59,61 MAB13 A13 VSS 59,61 MAB13 A13 VSS
M7 NC#M7 VSS M1 M7 NC#M7 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
BB0 M2 P9 BB0 M2 P9
59,61 BB0 BA0 VSS 59,61 BB0 BA0 VSS
BB1 N8 G8 BB1 N8 G8
59,61 BB1 BA1 VSS 59,61 BB1 BA1 VSS 1D5V_M92 1D5V_M92
BB2 M3 B3 BB2 M3 B3
59,61 BB2 BA2 VSS 59,61 BB2 BA2 VSS
VSS T1 VSS T1
VSS A9 VSS A9
CLKB0 J7 T9 CLKB0 J7 T9
59 CLKB0 CK VSS 59 CLKB0 CK VSS

1
CLKB0# K7 E1 CLKB0# K7 E1
59 CLKB0# CK# VSS 59 CLKB0# CK# VSS R405 R425
VSS P1 VSS P1
CKEB0 K9 CKEB0 K9 DIS 4K99R2F-L-GP DIS 4K99R2F-L-GP
59 CKEB0 CKE 59 CKEB0 CKE
VSSQ G1 VSSQ G1
F9 F9

2
DQMB#3 VSSQ DQMB#0 VSSQ VREFC_U0 VREFD_U0
59 DQMB#3 D3 DMU VSSQ E8 59 DQMB#0 D3 DMU VSSQ E8
DQMB#2 E7 E2 DQMB#1 E7 E2
59 DQMB#2 DML VSSQ 59 DQMB#1 DML VSSQ

1
VSSQ D8 VSSQ D8
D1 D1 R404 C762 R424 C788
W EB0# VSSQ W EB0# VSSQ 4K99R2F-L-GP SCD1U16V2ZY-2GP 4K99R2F-L-GP SCD1U16V2ZY-2GP
L3 B9 L3 B9

2
59 W EB0# CASB0# WE# VSSQ 59 W EB0# CASB0# WE# VSSQ
59 CASB0# K3 CAS# VSSQ B1 59 CASB0# K3 CAS# VSSQ B1 DIS DIS DIS DIS
RASB0# J3 G9 RASB0# J3 G9

2
59 RASB0# RAS# VSSQ 59 RASB0# RAS# VSSQ
B B
K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP

DIS DIS
SAMSUNG 1ST=72.41164.H0U
72.41164.H0U HYUNIX 2ND=72.51G63.C0U 72.41164.H0U
2ND = 72.51G63.C0U 2ND = 72.51G63.C0U

1D5V_M92

DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
C192 C170 C663 C660 C144 C212 C163 C214 C724 C671 C672 C676 C683 C688 C698 C662 C710 C728
1

1
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
A JV50-TR8 A
2

2
DIS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
M92 DDR3 B0
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 60 of 63
5 4 3 2 1
5 4 3 2 1

GDDR3
1D5V_M92 AFBRAM2 1D5V_M92 AFBRAM1

K8 E3 MDB42 K8 E3 MDB52 MAB[0..12]


VDD DQL0 VDD DQL0 59,60 MAB[0..12]
K2 F7 MDB41 K2 F7 MDB50
VDD DQL1 MDB46 VDD DQL1 MDB48
N1 VDD DQL2 F2 N1 VDD DQL2 F2
R9 F8 MDB43 R9 F8 MDB49
VDD DQL3 MDB44 VDD DQL3 MDB53 MDB[63..0]
D B2 VDD DQL4 H3 B2 VDD DQL4 H3 59,60 MDB[63..0] D
D9 H8 MDB40 D9 H8 MDB54
VDD DQL5 MDB47 VDD DQL5 MDB51
G7 VDD DQL6 G2 G7 VDD DQL6 G2
R1 H7 MDB45 R1 H7 MDB55
VDD DQL7 VDD DQL7
N9 VDD N9 VDD 59,60 DQMB#[0..7]
D7 MDB37 D7 MDB61
DQU0 MDB35 DQU0 MDB59
A8 VDDQ DQU1 C3 A8 VDDQ DQU1 C3
A1 C8 MDB38 A1 C8 MDB63
VDDQ DQU2 VDDQ DQU2 59,60 RDQSB[0..7]
C1 C2 MDB39 C1 C2 MDB56
VDDQ DQU3 MDB34 VDDQ DQU3 MDB60
C9 VDDQ DQU4 A7 C9 VDDQ DQU4 A7
D2 A2 MDB32 D2 A2 MDB58
VDDQ DQU5 VDDQ DQU5 59,60 W DQSB[0..7]
E9 B8 MDB36 E9 B8 MDB62
VDDQ DQU6 MDB33 VDDQ DQU6 MDB57
F1 VDDQ DQU7 A3 F1 VDDQ DQU7 A3
H9 VDDQ H9 VDDQ
H2 C7 RDQSB4 H2 C7 RDQSB7
VDDQ DQSU W DQSB4 RDQSB4 59 VDDQ DQSU W DQSB7 RDQSB7 59
DIS DQSU# B7 W DQSB4 59 DIS DQSU# B7 W DQSB7 59
VREFD_U2 H1 VREFD_U2 H1
R1201 VREFDQ R1202 VREFDQ
VREFC_U2 M8 F3 RDQSB5 VREFC_U2 M8 F3 RDQSB6
ZQ2 VREFCA DQSL W DQSB5 RDQSB5 59 ZQ4 VREFCA DQSL W DQSB6 RDQSB6 59
1 2 L8 ZQ DQSL# G3 W DQSB5 59 1 2 L8 ZQ DQSL# G3 W DQSB6 59 CLKB1#
243R2F-2-GP K1 ODTB1 243R2F-2-GP K1 ODTB1
MAB0 ODT ODTB1 59 MAB0 ODT ODTB1 59 CLKB1
N3 A0 N3 A0
MAB1 P7 MAB1 P7
A1 A1

1
MAB2 P3 L2 CSB1#_0 MAB2 P3 L2 CSB1#_0
MAB3 A2 CS# CSB1#_0 59 MAB3 A2 CS# CSB1#_0 59 R362 R361
N2 A3 RESET# T2 N2 A3 RESET# T2
MAB4 P8 MAB4 P8
A4 A4

56R2F-1-GP

56R2F-1-GP
MAB5 P2 MAB5 P2
MAB6 A5 MAB6 A5
R8 T7 VRAM_RST 59,60,62,63 R8 T7 VRAM_RST 59,60,62,63

2
MAB7 A6 NC#T7 MAB7 A6 NC#T7
R2 A7 NC#L9 L9 R2 A7 NC#L9 L9 DIS DIS
C MAB8 T8 L1 MAB8 T8 L1 C
MAB9 A8 NC#L1 MAB9 A8 NC#L1
R3 A9 NC#J9 J9 R3 A9 NC#J9 J9
MAB10 L7 J1 MAB10 L7 J1
MAB11 A10/AP NC#J1 MAB11 A10/AP NC#J1
R7 A11 R7 A11
MAB12 N7 MAB12 N7
MAB13 A12/BC# MAB13 A12/BC#
59,60 MAB13 T3 A13 VSS J8 59,60 MAB13 T3 A13 VSS J8
M7 M1 M7 M1 1
NC#M7 VSS NC#M7 VSS C699
VSS M9 VSS M9
J2 J2 DIS 2 SCD47U6D3V2KX-GP
BB0 VSS BB0 VSS
59,60 BB0 M2 BA0 VSS P9 59,60 BB0 M2 BA0 VSS P9
BB1 N8 G8 BB1 N8 G8
59,60 BB1 BA1 VSS 59,60 BB1 BA1 VSS
BB2 M3 B3 BB2 M3 B3
59,60 BB2 BA2 VSS 59,60 BB2 BA2 VSS
VSS T1 VSS T1
VSS A9 VSS A9
CLKB1 J7 T9 CLKB1 J7 T9
59 CLKB1 CLKB1# CK VSS 59 CLKB1 CLKB1# CK VSS
59 CLKB1# K7 CK# VSS E1 59 CLKB1# K7 CK# VSS E1
VSS P1 VSS P1
CKEB1 K9 CKEB1 K9
59 CKEB1 CKE 59 CKEB1 CKE
VSSQ G1 VSSQ G1
VSSQ F9 VSSQ F9
DQMB#4 D3 E8 DQMB#7 D3 E8 1D5V_M92 1D5V_M92
59 DQMB#4 DQMB#5 DMU VSSQ 59 DQMB#7 DQMB#6 DMU VSSQ
59 DQMB#5 E7 DML VSSQ E2 59 DQMB#6 E7 DML VSSQ E2
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1

1
W EB1# L3 B9 W EB1# L3 B9
59 W EB1# CASB1# WE# VSSQ 59 W EB1# CASB1# WE# VSSQ R373 R346
59 CASB1# K3 CAS# VSSQ B1 59 CASB1# K3 CAS# VSSQ B1
RASB1# J3 G9 RASB1# J3 G9 DIS 4K99R2F-L-GP DIS 4K99R2F-L-GP
59 RASB1# RAS# VSSQ 59 RASB1# RAS# VSSQ

2
B K4W 1G1646E-HC12-GP K4W 1G1646E-HC12-GP VREFC_U2 VREFD_U2 B

1
DIS DIS R372 C716 R345 C684
4K99R2F-L-GP SCD1U16V2ZY-2GP 4K99R2F-L-GP SCD1U16V2ZY-2GP

2
72.41164.H0U 72.41164.H0U DIS DIS DIS DIS

2
2ND = 72.51G63.C0U SAMSUNG 1ST=72.41164.H0U 2ND = 72.51G63.C0U
HYUNIX 2ND=72.51G63.C0U

1D5V_M92

DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
C812 C796 C783 C390 C399 C813 C804 C748 C758 C756 C755 C747 C757 C764 C765 C743 C821 C818
1

1
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
2

2
A DIS JV50-TR8 A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
M92 DDR3 B1
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 61 of 63
5 4 3 2 1
5 4 3 2 1

1D5V_M96

K8
K2
N1
AFBRAM5

VDD
VDD
DQL0
DQL1
E3
F7
F2
MDA21
MDA20
MDA22
GDDR3 1D5V_M96
K8
K2
N1
AFBRAM6

VDD
VDD
DQL0
DQL1
E3
F7
F2
MDA11
MDA14
MDA8
VDD DQL2 MDA16 VDD DQL2 MDA12
R9 VDD DQL3 F8 R9 VDD DQL3 F8
B2 H3 MDA19 B2 H3 MDA9
VDD DQL4 MDA17 VDD DQL4 MDA13
D9 VDD DQL5 H8 D9 VDD DQL5 H8
G7 G2 MDA23 G7 G2 MDA10
VDD DQL6 MDA18 VDD DQL6 MDA15
D R1 VDD DQL7 H7 R1 VDD DQL7 H7 D
1D5V_M96 N9 1D5V_M96 N9
VDD MDA27 VDD MDA4
DQU0 D7 DQU0 D7
A8 C3 MDA28 A8 C3 MDA0
VDDQ DQU1 MDA30 VDDQ DQU1 MDA7
A1 VDDQ DQU2 C8 A1 VDDQ DQU2 C8
C1 C2 MDA24 C1 C2 MDA3
VDDQ DQU3 MDA25 VDDQ DQU3 MDA5
C9 VDDQ DQU4 A7 C9 VDDQ DQU4 A7
D2 A2 MDA31 D2 A2 MDA1
VDDQ DQU5 MDA26 VDDQ DQU5 MDA6
E9 VDDQ DQU6 B8 E9 VDDQ DQU6 B8
F1 A3 MDA29 F1 A3 MDA2
VDDQ DQU7 VDDQ DQU7
H9 VDDQ H9 VDDQ
H2 C7 RDQSA3 H2 C7 RDQSA0
VDDQ DQSU W DQSA3 RDQSA3 59 VDDQ DQSU W DQSA0 RDQSA0 59
DQSU# B7 W DQSA3 59 DQSU# B7 W DQSA0 59
VREFD_U3 H1 VREFD_U3 H1
R1253 VREFDQ R1254 VREFDQ
VREFC_U3 M8 F3 RDQSA2 VREFC_U3 M8 F3 RDQSA1
MAA_ZQ0 VREFCA DQSL W DQSA2 RDQSA2 59 MAA_ZQ1 VREFCA DQSL W DQSA1 RDQSA1 59
2 1 L8 ZQ DQSL# G3 W DQSA2 59 2 1 L8 ZQ DQSL# G3 W DQSA1 59
243R2F-2-GP 243R2F-2-GP
Madison-M96 K1 ODTA0 Madison-M96 K1 ODTA0
MAA0 ODT ODTA0 59 MAA0 ODT ODTA0 59
N3 A0 N3 A0
MAA1 P7 MAA1 P7
MAA2 A1 CSA0#_0 MAA2 A1 CSA0#_0
P3 A2 CS# L2 CSA0#_0 59 P3 A2 CS# L2 CSA0#_0 59
MAA3 N2 T2 MAA3 N2 T2
MAA4 A3 RESET# MAA4 A3 RESET#
P8 A4 P8 A4
MAA5 P2 MAA5 P2
MAA6 A5 MAA6 A5
R8 A6 NC#T7 T7 VRAM_RST 59,60,61,63 R8 A6 NC#T7 T7 VRAM_RST 59,60,61,63
MAA7 R2 L9 MAA7 R2 L9
MAA8 A7 NC#L9 MAA8 A7 NC#L9
T8 A8 NC#L1 L1 T8 A8 NC#L1 L1
MAA9 R3 J9 MAA9 R3 J9
MAA10 A9 NC#J9 MAA10 A9 NC#J9
L7 A10/AP NC#J1 J1 L7 A10/AP NC#J1 J1
C MAA11 R7 MAA11 R7 C
MAA12 A11 MAA12 A11
N7 A12/BC# N7 A12/BC#
MAA13 T3 J8 MAA13 T3 J8
59,63 MAA13 A13 VSS 59,63 MAA13 A13 VSS
M7 NC#M7 VSS M1 M7 NC#M7 VSS M1
VSS M9 VSS M9
VSS J2 VSS J2
BA0 M2 P9 BA0 M2 P9
59,63 BA0 BA0 VSS 59,63 BA0 BA0 VSS
BA1 N8 G8 BA1 N8 G8
59,63 BA1 BA1 VSS 59,63 BA1 BA1 VSS
BA2 M3 B3 BA2 M3 B3
59,63 BA2 BA2 VSS 59,63 BA2 BA2 VSS
VSS T1 VSS T1
VSS A9 VSS A9
CLKA0 J7 T9 CLKA0 J7 T9
59 CLKA0 CLKA0# CK VSS 59 CLKA0 CLKA0# CK VSS
59 CLKA0# K7 CK# VSS E1 59 CLKA0# K7 CK# VSS E1
VSS P1 VSS P1
CKEA0 K9 CKEA0 K9
59 CKEA0 CKE 59 CKEA0 CKE
VSSQ G1 VSSQ G1
VSSQ F9 VSSQ F9
DQMA#3 D3 E8 DQMA#0 D3 E8
59 DQMA#3 DQMA#2 DMU VSSQ 59 DQMA#0 DQMA#1 DMU VSSQ
59 DQMA#2 E7 DML VSSQ E2 59 DQMA#1 E7 DML VSSQ E2
VSSQ D8 VSSQ D8
VSSQ D1 VSSQ D1
W EA0# L3 B9 W EA0# L3 B9
59 W EA0# CASA0# WE# VSSQ 59 W EA0# CASA0# WE# VSSQ
59 CASA0# K3 CAS# VSSQ B1 59 CASA0# K3 CAS# VSSQ B1
RASA0# J3 G9 RASA0# J3 G9
59 RASA0# RAS# VSSQ 59 RASA0# RAS# VSSQ

K4W 1G1646E-HC12-GP 72.41164.H0U K4W 1G1646E-HC12-GP


2ND = 72.51G63.C0U Madison-M96
B Madison-M96 CLKA0# B

CLKA0
59,63 DQMA#[0..7] 72.41164.H0U 1D5V_M96 1D5V_M96

1
2ND = 72.51G63.C0U R1256 R1258
59,63 RDQSA[0..7]
1

Madison-M96

Madison-M96
56R2F-1-GP

56R2F-1-GP
59,63 W DQSA[0..7] Madison-M96 Madison-M96

2
R1255 R1257
4K99R2F-L-GP 4K99R2F-L-GP
2

2
MAA[0..12] VREFC_U3 VREFD_U3
59,63 MAA[0..12]
1

1
1

1
SCD1U16V2KX-3GP

4K99R2F-L-GP

4K99R2F-L-GP

C996 R1260
SCD1U16V2KX-3GP

MDA[63..0] C995 R1259 Madison-M96

Madison-M96
59,63 MDA[63..0] 1
Madison-M96
2

Madison-M96 Madison-M96 C997


2

2 SCD47U6D3V2KX-GP

1D5V_M96
Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96
C998 C999 C1000 C1001 C1002 C1003 C1004 C1005 C1006 C1007 C1008 C1009 C1010 C1011 C1012 C1013 C1014 C1015
1

1
A JV50-TR8 A
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
2

2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
M92 DDR3 A0
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 62 of 63
5 4 3 2 1
5 4 3 2 1

AFBRAM8
AFBRAM7 1D5V_M96
1D5V_M96 K8 E3 MDA52
VDD DQL0
K8
K2
N1
R9
B2
VDD
VDD
VDD
VDD
DQL0
DQL1
DQL2
DQL3
E3
F7
F2
F8
H3
MDA42
MDA41
MDA46
MDA43
MDA44
GDDR3 K2
N1
R9
B2
D9
VDD
VDD
VDD
VDD
DQL1
DQL2
DQL3
DQL4
F7
F2
F8
H3
H8
MDA50
MDA48
MDA49
MDA53
MDA54
VDD DQL4 MDA40 VDD DQL5 MDA51
D9 VDD DQL5 H8 G7 VDD DQL6 G2
G7 G2 MDA47 R1 H7 MDA55
VDD DQL6 MDA45 1D5V_M96 VDD DQL7
R1 VDD DQL7 H7 N9 VDD
1D5V_M96 N9 D7 MDA61
VDD MDA36 DQU0 MDA62
D
DQU0 D7 A8 VDDQ DQU1 C3 D
A8 C3 MDA35 A1 C8 MDA58
VDDQ DQU1 MDA39 VDDQ DQU2 MDA56
A1 VDDQ DQU2 C8 C1 VDDQ DQU3 C2
C1 C2 MDA33 C9 A7 MDA60
VDDQ DQU3 MDA37 VDDQ DQU4 MDA59
C9 VDDQ DQU4 A7 D2 VDDQ DQU5 A2
D2 A2 MDA32 E9 B8 MDA57
VDDQ DQU5 MDA38 VDDQ DQU6 MDA63
E9 VDDQ DQU6 B8 F1 VDDQ DQU7 A3
F1 A3 MDA34 H9
VDDQ DQU7 VDDQ RDQSA7
H9 VDDQ H2 VDDQ DQSU C7 RDQSA7 59
H2 C7 RDQSA4 B7 W DQSA7
VDDQ DQSU W DQSA4 RDQSA4 59 VREFD_U4 DQSU# W DQSA7 59
DQSU# B7 W DQSA4 59 H1 VREFDQ
VREFD_U4 H1 VREFC_U4 M8 F3 RDQSA6
VREFC_U4 VREFDQ RDQSA5 VREFCA DQSL RDQSA6 59
M8 VREFCA DQSL F3 RDQSA5 59 2 R1261 1 MAA_ZQ3 L8 ZQ DQSL# G3 W DQSA6
W DQSA6 59
2 R1262 1 MAA_ZQ2 L8 ZQ DQSL# G3 W DQSA5
W DQSA5 59
243R2F-2-GP
Madison-M96 Madison-M96 K1 ODTA1
243R2F-2-GP ODTA1 MAA0 ODT ODTA1 59
ODT K1 ODTA1 59 N3 A0
MAA0 N3 MAA1 P7
MAA1 A0 MAA2 A1 CSA1#_0
P7 A1 P3 A2 CS# L2 CSA1#_0 59
MAA2 P3 L2 CSA1#_0 MAA3 N2 T2
MAA3 A2 CS# CSA1#_0 59 MAA4 A3 RESET#
N2 A3 RESET# T2 P8 A4
MAA4 P8 MAA5 P2
MAA5 A4 MAA6 A5
P2 A5 R8 A6 NC#T7 T7 VRAM_RST 59,60,61,62
MAA6 R8 T7 MAA7 R2 L9
A6 NC#T7 VRAM_RST 59,60,61,62 A7 NC#L9
MAA7 R2 L9 MAA8 T8 L1
MAA8 A7 NC#L9 MAA9 A8 NC#L1
T8 A8 NC#L1 L1 R3 A9 NC#J9 J9
MAA9 R3 J9 MAA10 L7 J1
MAA10 A9 NC#J9 MAA11 A10/AP NC#J1
L7 A10/AP NC#J1 J1 R7 A11
MAA11 R7 MAA12 N7
MAA12 A11 MAA13 A12/BC#
N7 A12/BC# 59,62 MAA13 T3 A13 VSS J8
C MAA13 T3 J8 M7 M1 C
59,62 MAA13 A13 VSS NC#M7 VSS
M7 NC#M7 VSS M1 VSS M9
VSS M9 VSS J2
J2 BA0 M2 P9
VSS 59,62 BA0 BA0 VSS
BA0 M2 P9 BA1 N8 G8
59,62 BA0 BA0 VSS 59,62 BA1 BA1 VSS
BA1 N8 G8 BA2 M3 B3
59,62 BA1 BA1 VSS 59,62 BA2 BA2 VSS
BA2 M3 B3 T1
59,62 BA2 BA2 VSS VSS
VSS T1 VSS A9
A9 CLKA1 J7 T9
CLKA1 VSS 59 CLKA1 CLKA1# CK VSS
59 CLKA1 J7 CK VSS T9 59 CLKA1# K7 CK# VSS E1
CLKA1# K7 E1 P1
59 CLKA1# CK# VSS CKEA1 VSS
VSS P1 59 CKEA1 K9 CKE
CKEA1 K9 G1
59 CKEA1 CKE VSSQ
VSSQ G1 VSSQ F9
F9 DQMA#7 D3 E8
DQMA#4 VSSQ 59 DQMA#7 DQMA#6 DMU VSSQ
59 DQMA#4 D3 DMU VSSQ E8 59 DQMA#6 E7 DML VSSQ E2
DQMA#5 E7 E2 D8
59 DQMA#5 DML VSSQ VSSQ
VSSQ D8 VSSQ D1
D1 W EA1# L3 B9
W EA1# VSSQ 59 W EA1# CASA1# WE# VSSQ
59 W EA1# L3 WE# VSSQ B9 59 CASA1# K3 CAS# VSSQ B1
CASA1# K3 B1 RASA1# J3 G9
59 CASA1# RASA1# CAS# VSSQ 59 RASA1# RAS# VSSQ
59 RASA1# J3 RAS# VSSQ G9

K4W 1G1646E-HC12-GP
K4W 1G1646E-HC12-GP 72.41164.H0U
Madison-M96
Madison-M96 2ND = 72.51G63.C0U
CLKA1#
B B
72.41164.H0U CLKA1
59,62 DQMA#[0..7] 1D5V_M96 1D5V_M96
2ND = 72.51G63.C0U

1
Madison-M96 R1263 R1266
59,62 RDQSA[0..7]
1

1
Madison-M96

56R2F-1-GP

56R2F-1-GP
59,62 W DQSA[0..7] Madison-M96 Madison-M96

2
R1264 R1265
4K99R2F-L-GP 4K99R2F-L-GP
2

2
MAA[0..12] VREFC_U4 VREFD_U4
59,62 MAA[0..12]
1

1
1

1
SCD1U16V2KX-3GP

4K99R2F-L-GP

4K99R2F-L-GP
C1017 R1268
SCD1U16V2KX-3GP

MDA[63..0] C1016 R1267 Madison-M96


Madison-M96

59,62 MDA[63..0] 1
Madison-M96
Madison-M96

C1018

Madison-M96
2

2 SCD47U6D3V2KX-GP

1D5V_M96

C1019 C1020 C1021 C1022 C1023 C1024 C1025 C1026 C1027 C1028 C1029 C1030 C1031 C1032 C1033 C1034 C1035 C1036
Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96

Madison-M96
1

1
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
A JV50-TR8 A
2

2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
M92 DDR3 A1
Size Document Number Rev
A3
JV50-TR8 -1
Date: Monday, October 26, 2009 Sheet 63 of 63
5 4 3 2 1

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