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 www.fairchildsemi.com

Application Note AN-3008

RC Snubber Networks for Thyristor Power Control and
Transient Suppression

Introduction A
A
RC networks are used to control voltage transients that could
IA
falsely turn-on a thyristor. These networks are called snub- IBP PE
V
bers. PNP
I1 CJP IJ ICP NB
CJN
The simple snubber consists of a series resistor and capacitor CJ C
ICN I2 dV
placed around the thyristor. These components along with IJ G PB
dt
the load inductance form a series CRL circuit. Snubber NPN G t
theory follows from the solution of the circuits differential IBN dV
CJ NE
IK dt
equation. IA =
1 (N + p)
K

Many RC combinations are capable of providing acceptable TWO TRANSISTOR MODEL C CJ K

EFF =
performance. However, improperly used snubbers can cause OF 1 (N + p) INTEGRATED
unreliable circuit operation and damage to the semiconduc- SCR STRUCTURE

tor device.

Both turn-on and turn-off protection may be necessary for

Figure 1. ( dV
dt )s Model
reliability. Sometimes the thyristor must function with a
range of load values. The type of thyristors used, circuit
configuration, and load characteristics are influential.
Conditions Influencing ( dV )
dt s
Transients occurring at line crossing or when there is no
Snubber design involves compromises. They include cost, initial voltage across the thyristor are worst case. The
voltage rate, peak voltage, and turn-on stress. Practical collector junction capacitance is greatest then because the
solutions depend on device and circuit physics. depletion layer widens at higher voltage.

Small transients are incapable of charging the self-capaci-

dV tance of the gate layer to its forward biased threshold voltage
Static
dt (Figure 2). Capacitance voltage divider action between the
collector and gate-cathode junctions and built-in resistors
dV that shunt current away from the cathode emitter are respon-
What is Static ?
dt sible for this effect.
dV
Static ------- is a measure of the ability of a thyristor to retain a 180
dt
blocking state under the influence of a voltage transient. 160
MAC 228-10 TRIAC
TJ = 110C
140

( dV ) Device Physics
(V/s)

dt s 120
dV
dt

dV 100
Static ------- turn-on is a consequence of the Miller effect and
STATIC

dt
80
regeneration (Figure 1). A change in voltage across the
junction capacitance induces current through it. This current 60

is proportional to the rate of voltage change ------- . It triggers

dV 40
dt
the device on when it becomes large enough to raise the sum 20
20 100 200 300 400 500 600 700 800
of the NPN and PNP transistor alphas to unity. PEAK MAIN TERMINAL VOLTAGE (VOLTS)

dV
Figure 2. Exponential dt
s
( )
versus Peak Voltage

REV. 4.01 6/24/02

AN-3008 APPLICATION NOTE

dV
Static ------- does not depend strongly on voltage for operation
dt Improving ( dV )
dt s
below the maximum voltage and temperature rating.
Avalanche multiplication will increase leakage current and dV
Static ------- can be improved by adding an external resistor
dt
dV
reduce ------- capability if a transient is within roughly 50 volts from the gate to MT1 (Figure 4). The resistor provides a path
dt
of the actual device breakover voltage. dV
for leakage and ------- induced currents that originate in the
dt
drive circuit or the thyristor itself.
dV
A higher rated voltage device guarantees increased ------- at
dt 140
lower voltage. This is a consequence of the exponential
rating method where a 400 V device rated at 50 V/s has a 120
dV MAC 228-10
higher ------- to 200 V than a 200 V device with an identical 100
dt 800V 110C

(V/s)
rating. However, the same diffusion recipe usually applies
80
for all voltages. So actual capabilities of the product are not

dV
dt
much different.

STATIC
60
RINTERNAL = 600
Heat increases current gain and leakage, lowering ------- ,
dV 40
dt s
the gate trigger voltage and noise immunity (Figure 3). 20

0
180 10 100 1000 10000
GATE-MT1, RESISTANCE (OHMS)
160

MAC 228-10
140
VPK = 800 V dV
Figure 4. Exponential dt ( )
versus
(V/s)

120 s
Gate to MT1 Resistance
dV
dt

100
STATIC

80
Non-sensitive devices (Figure 5) have internal shorting
resistors dispersed throughout the chips cathode area. This
60 design feature improves noise immunity and high tempera-
40
ture blocking stability at the expense of increased trigger and
holding current. External resistors are optional for non-sensi-
20
20 100 200 300 400 500 600 700 800
tive SCRs and TRIACs. They should be comparable in size
TJ, JUNCTION TEMPERATURE (C) to the internal shorting resistance of the device (20 to 100
ohms) to provide maximum improvement. The internal resis-
dV
Figure 3. Exponential dt ( )
s
versus Temperature tance of the thyristor should be measured with an ohmmeter
that does not forward bias a diode junction.

( dV ) Failure Mode
dt s
2200

2000
Occasional unwanted turn-on by a transient may be accept-
MAC 16-8
able in a heater circuit but isnt in a fire prevention sprinkler 1800 VPK = 600 V
(V/s)

system or for the control of a large motor. Turn-on is destruc- 1600

tive when the follow-on current amplitude or rate is exces-
dV
dt

1400
sive. If the thyristor shorts the power line or charged
STATIC

capacitor, it will be damaged. 1200

1000
dV
Static ------- turn-on is non-destructive when series impedance
dt 800
limits the surge. The thyristor turns off after a half-cycle of
600
dV 50 60 70 80 90 100 110 120 130
conduction. High ------- aids current spreading in the thyristor,
dt TJ, JUNCTION TEMPERATURE (C)
dI
improving its ability to withstand ----- . Breakdown turn-on
dt
does not have this benefit and should be prevented. dV
Figure 5. Exponential dt
s
( )
versus Junction Temperature

2 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

Sensitive gate TRIACS run 100 to 1000 ohms. With an
dV
external resistor, their ------- capability remains inferior to
dt
non-sensitive devices because lateral resistance within the
gate layer reduces its benefit.
Sensitive gate SCRs (IGT < 200 A) have no built-in resistor.
They should be used with an external resistor. The recom-
mended value of the resistor is 1000 ohms. Higher values
reduce maximum operating temperature ------- (Figure 6).
dV
dt s
The capability of these parts varies by more than 100 to 1
depending on gate-cathode termination.
gate drive circuit needs to be able to charge the capacitor
without excessive delay, but it does not need to supply con-
dV
tinuous current as it would for a resistor that increases -------
dt
the same amount. However, the capacitor does not enhance
static thermal stability.
The maximum ------- improvement occurs with a short.
dV
dt s
Actual improvement stops before this because of spreading
resistance in the thyristor. An external capacitor of about 0.1
F allows the maximum enhancement at a higher value of
RGK.

10 MEG
One should keep the thyristor cool for the highest ------- .
dV
MCR22-2
GATE-CATHODE RESISTANCE (OHMS)

TA = 65C dt s
Also devices should be tested in the application circuit at the
A
10 highest possible temperature using thyristors with the lowest
1 MEG V G measured trigger current.
K
dV
TRIAC Commutating
dt
100K dV
What is Commutating ?
dt
dV
The commutating ------- rating applies when a TRIAC has been
dt
conducting and attempts to turn-off with an inductive load.
10K
0.001 0.01 0.1 1 10 100 The current and voltage are out of phase (Figure 8). The
dV TRIAC attempts to turn-off as the current drops below the
STATIC (V/s)
dt holding value. Now the line voltage is high and in the oppo-
site polarity to the direction of conduction. Successful turn-
dV
Figure 6. Exponential dt
s
( )
versus off requires the voltage across the TRIAC to rise to the
Gate-Cathode Resistance instantaneous line voltage at a rate slow enough to prevent
retriggering of the device.
130
R L
VOLTAGE CURRENT

120 i 2
VLINE VMT2-1
MAC 228-10 G
110 800V 110C 1
(V/s)

VMT2-1

dl
100 dt c
dV

PHASE
dt

ANGLE
STATIC

90

TIME
80 TIME
dV
70 i VLINE dt c

60
0.001 0.01 0.1 1
dV
Figure 8. TRIAC Inductive Load Turn-Off dt
c
( )
GATE TO MT1, CAPACITANCE (F)

dV
Figure 7. Exponential dt
s
( )
versus ( dV ) Device Physics
dt c
Gate to MT1 Capacitance
A TRIAC functions like two SCRs connected in inverse-
parallel. So, a transient of either polarity turns it on.
A gate-cathode capacitor (Figure 7) provides a shunt path for
transient currents in the same manner as the resistor. It also There is charge within the crystals volume because of prior
filters noise currents from the drive circuit and enhances the conduction (Figure 9). The charge at the boundaries of the
built-in gate-cathode capacitance voltage divider effect. The

REV. 4.01 6/24/02 3

AN-3008 APPLICATION NOTE

collector junction depletion layer responsible for ------- is volume charge storage and turn-off becomes limited by ------- .
dV dV
dt s dt s
At moderate current amplitudes, the volume charge begins
also present. TRIACS have lower ------- than ------- because
dV dV
dt c dt s to influence turn-off, requiring a larger snubber. When the
of this additional charge.
current is large or has rapid zero crossing, ------- has little
dV
dt c
G MT1 dI
influence. Commutating ----- and delay time to voltage
dt
TOP reapplication determine whether turn-off will be successful
or not. (Figures 11,12)
N N N N
P

VOLTAGE/CURRENT
Previously
Conducting Side
N dI
dt c
dV
+ dt
c
N N N TIME
0

STORED CHARGE
REVERSE RECOVERY MT2 FROM POSITIVE VMT2-1
CURRENT PATH CHARGE DUE
CONDUCTION TO dV/dt
LATERAL VOLTAGE
DROP VOLUME
STORAGE IRRM
CHARGE
Figure 9. TRIAC Structure and
Current Flow at Commutation
Figure 10. TRIAC Current and Voltage at Commutation
The volume charge storage within the TRIAC depends on
the peak current before turn-off and its rate of zero crossing
dI
-----
dt c. In the classic circuit, the load impedance and line E
V
MAIN TERMINAL VOLTAGE (V)

frequency determine ----- . The rate of crossing for sinusoi-

dI
dt c
dal currents is given by the slope of the secant line between
the 50% and 0% levels as:

dI 6fI TM
----- = --------------
- A/ms
dt c 1000 E

where f = line frequency and ITM = maximum on-state

current in the TRIAC.
VT

Turn-off depends on both the Miller effect displacement 0 td TIME

dV
current generated by ------- across the collector capacitance and Figure 11. Snubber Delay Time
dt
the currents resulting from internal charge storage within the
volume of the device (Figure 10). If the reverse recovery
current resulting from both these components is high, the 0.5
lateral IR drop within the TRIAC base layer will forward
NORMALIZED DELAY TIME

0.2
dV
bias the emitter and turn the TRIAC on. Commutating ------- 0.2 0.1
dt
capability is lower when turning off from the positive direc-
(td = W0 td)

0.05
0.1
tion of current conduction because of device geometry. The
gate is on the top of the die and obstructs current flow. 0.05 0.02
RL = 0
Recombination takes place throughout the conduction period 0.03 M=1 0.01
IRRM = 0
and along the back side of the current wave as it declines to zero. 0.02
VT
Turn-off capability depends on its shape. If the current ampli- E 0.005
0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.3 0.5 1
tude is small and its zero crossing ----- is low, there is little
dI
dt c DAMPING FACTOR

Figure 12. Delay Time To Normalized Voltage

4 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

Conditions Influencing ( dV )
dt c
Improving ( dV )
dt c
The same steps that improve ------- aid ------- except when
dV dV dV
Commutating ------- depends on charge storage and recovery
dt dt s dt c
dV stored charge dominates turn-off. Steps that reduce the
dynamics in addition to the variables influencing static ------- .
dt stored charge or soften the commutation are necessary then.
High temperatures increase minority carrier life-time and the
size of recovery currents, making turn-off more difficult. Larger TRIACS have better turn-off capability than smaller
Loads that slow the rate of current zero-crossing aid turn-off. ones with a given load. The current density is lower in the
Those with harmonic content hinder turn-off. larger device allowing recombination to claim a greater pro-
portion of the internal charge. Also junction temperatures are
RS C lower.

i TRIACS with high gate trigger current have greater turn-off

LS
dl
dt DC MOTOR
i c
+
R L
60 Hz
t L
> 8.3 s
R
Figure 13. Phase Controlling a Motor in a Bridge
Circuit Examples
Figure 13 shows a TRIAC controlling an inductive load in a
bridge. The inductive load has a time constant longer than
the line period. This causes the load current to remain con-
stant and the TRIAC current to switch rapidly as the line
voltage reverses. This application is notorious for causing
TRIAC turn-off difficulty because of high ----- .
dI
dt c
High currents lead to high junction temperatures and rates of
current crossings. Motors can have 5 to 6 times the normal
current amplitude at start-up. This increases both junction
temperature and the rate of current crossing leading to turn-
off problems.
The line frequency causes high rates of current crossing in
400 Hz applications. Resonant transformer circuits are dou-
bly periodic and have current harmonics at both the primary
and secondary resonance. Non-sinusoidal currents can lead
to turn-off difficulty even if the current amplitude is low
before zero-crossing.
ability because of lower spreading resistance in the gate
layer, reduced Miller effect, or shorter lifetime.
The rate of current crossing can be adjusted by adding a
commutation softening inductor in series with the load.
Small high permeability square loop inductors saturate
causing no significant disturbance to the load current. The
inductor resets as the current crosses zero introducing a large
inductor into the snubber circuit at that time. This slows the
current crossing and delays the reapplication of blocking
voltage aiding turn-off.
The commutation inductor is a circuit element that intro-
duces time delay, as opposed to inductance, into the circuit.
dV
It will have little influence on observed ------- at the device.
dt
The following example illustrates the improvement resulting
from the addition of an inductor constructed by winding 33
turns of number 18 wire on a tape wound core (52000 -1A).
This core is very small having an outside diameter of 3/4
inch and a thickness of 1/8 inch. The delay time can be cal-
culated from:
8
( N A B 10 )
t s = --------------------------------- where:
E
ts = time delay to saturation in seconds.
B = saturating flux density in Gauss
A = effective core cross sectional area in cm2
N = number of turns.
For the described inductor:

( dV ) Failure Mode
dt c
ts = (33 turns)(0.076 cm2)(28000 Gauss)(1 x 10-8)/(175 v) = 4.0 s.

The saturation current of the inductor does not need to be

dV
-------
dt c failure causes a loss of phase control. Temporary turn- much larger than the TRIAC trigger current. Turn-off failure
on or total turn-off failure is possible. This can be destructive will result before recovery currents become greater than this
if the TRIAC conducts asymmetrically causing a dc current value. This criterion allows sizing the inductor with the
component and magnetic saturation. The winding resistance following equation:
limits the current. Failure results because of excessive surge
current and junction temperature.

REV. 4.01 6/24/02 5

AN-3008 APPLICATION NOTE

HS ML High load inductance requires large snubber resistors and

I S = ------------------ where: small snubber capacitors. Low inductances imply small
0.4 N
resistors and large capacitors.
HS = MMF to saturate = 0.5 Oersted
ML = mean magnetic path length = 4.99 cm. Damping and Transient Voltages
Figure 14 shows a series inductor and filter capacitor
(.5) (4.99) connected across the ac main line. The peak to peak voltage
I S = ------------------------ = 60 mA.
0.4 33 of a transient disturbance increases by nearly four times.
Also the duration of the disturbance spreads because of
Snubber Physics ringing, increasing the chance of malfunction or damage to
the voltage sensitive circuit. Closing a switch causes this
Undamped Natural Resonance behavior. The problem can be reduced by adding a damping
resistor in series with the capacitor.
I
0 = ------------ Radians/second
LC 100H 0.05
dV 340 V
Resonance determines ------- and boosts the peak capacitor
dt 0 0.1 VOLTAGE
V SENSITIVE
voltage when the snubber resistor is small. C and L are 10s F CIRCUIT
dV
related to one another by 02. ------- scales linearly with 0
dt
+700
when the damping factor is held constant. A ten to one

V (VOLTS)
dV
reduction in ------- requires a 100 to 1 increase in either
dt 0
component.

Damping Factor -700

0 10 20
R C TIME (s)
= ---- ----
2 L
Figure 14. Undamped LC Filter
The damping factor is proportional to the ratio of the circuit Magnifies and Lengthens a Transient
loss and its surge impedance. It determines the trade off
dV dl
between ------- and peak voltage. Damping factors between dt
dt
0.01 and 1.0 are recommended. Non-Inductive Resistor
The snubber resistor limits the capacitor discharge current
The Snubber Resistor dI dI
dV
and reduces ----- stress. High ----- destroys the thyristor even
dt dt
Damping and
dt though the pulse duration is very short. The rate of current
dV rise is directly proportional to circuit voltage and inversely
When < 0.5, the snubber resistor is small, and ------- depends
dt proportional to series inductance. The snubber is often the
dV major offender because of its low inductance and close
mostly on resonance. There is little improvement in ------- for
dt proximity to the thyristor.
damping factors less than 0.3, but peak voltage and snubber
discharge current increase. The voltage wave has a 1-COS() With no transient suppressor, breakdown of the thyristor sets
dV the maximum voltage on the capacitor. It is possible to
shape with overshoot and ringing. Maximum ------- occurs at a
dt
exceed the highest rated voltage in the device series because
time later than t = 0. There is a time delay before the
high voltage devices are often used to supply low voltage
voltage rise, and the peak voltage almost doubles.
specifications.
When > 0.5, the voltage wave is nearly exponential in
The minimum value of the snubber resistor depends on the
dV
shape. The maximum instantaneous ------- occurs at t = 0. type of thyristor, triggering quadrants, gate current ampli-
dt
There is little time delay and moderate voltage overshoot. tude, voltage, repetitive or non-repetitive operation and
required life expectancy. There is no simple way to predict
dV
the rate of current rise because it depends on turn-on speed
When > 1.0, the snubber resistor is large and ------- depends of the thyristor, circuit layout, type and size of snubber
dt
mostly on its value. There is some overshoot even though the capacitor, and inductance in the snubber resistor. The
circuit is overdamped. equations in Appendix D describes the circuit. However,

6 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

the values required for the model are not easily obtained Snubber operation relies on the charging of the snubber
except by testing. Therefore, reliability should be verified in capacitor. Turn-off snubbers need a minimum conduction
the actual application circuit. angle long enough to discharge the capacitor. It should be at
least several time constants (RS CS).
Table 1 shows suggested minimum resistor values estimated
(Appendix A) by testing a 20 piece sample from the four Stored Energy
different TRIAC die sizes.
Inductive Switching Transients
Table 1. Minimum Non-inductive Snubber Resistor for 1 2
E = --- L I O Watt-seconds or Joules
Four Quadrant Triggering. 2
dl IO = current in Amperes flowing in the inductor at t = 0.
Peak VC dt
TRIAC Type Volts RS Ohms A/S Resonant charging cannot boost the supply voltage at turn-
off by more than 2. If there is an initial current flowing in the
Non-Sensitive 200 3.3 170 load inductance at turn-off, much higher voltages are possi-
Gate 300 6.8 250 ble. Energy storage is negligible when a TRIAC turns off
(IGT > 10mA) 400 11 308 because of its low holding or recovery current.
8 to 40 A(RMS) 600 39 400
800 51 400
The presence of an additional switch such as a relay, thermo-
stat or breaker allows the interruption of load current and the
dl
Reducing generation of high spike voltages at switch opening. The
dt
energy in the inductance transfers into the circuit capacitance
dI
TRIAC ----- can be improved by avoiding quadrant 4 and determines the peak voltage (Figure 15).
dt
triggering. Most optocoupler circuits operate the TRIAC in
quadrants 1 and 3. Integrated circuit drivers use quadrants 2 L

and 3. Zero crossing trigger devices are helpful because they I

prohibit triggering when the voltage is high. R
OPTIONAL
VPK
Driving the gate with a high amplitude fast rise pulse C FAST
dI
increases ----- capability. The gate ratings section defines the SLOW
dt
maximum allowed current.

dI dV I L
= VPK = I
Inductance in series with the snubber capacitor reduces ----- . dt C C
dt
It should not be more than five percent of the load inductance (a.) Protected Circuit (b.) Unprotected Circuit
dV
to prevent degradation of the snubbers ------- suppression
dt Figure 15. Interrupting Inductive Load Current
capability. Wirewound snubber resistors sometimes serve
this purpose. Alternatively, a separate inductor can be added Capacitor Discharge
in series with the snubber capacitor. It can be small because 1 2
The energy stored in the snubber capacitor E C = --2- CV
it does not need to carry the load current. For example, 18
transfers to the snubber resistor and thyristor every time it
turns of AWG No. 20 wire on a T50-3 (1/2 inch) powdered
turns on. The power loss is proportional to frequency
iron core creates a non-saturating 6.0 H inductor.
(PAV = 120 EC @ 60 HZ).
A 10 ohm, 0.33 F snubber charged to 650 volts resulted in a
Current Diversion
dI
1000 A/s ----- . Replacement of the non-inductive snubber The current flowing in the load inductor cannot change
dt
resistor with a 20 watt wirewound unit lowered the rate of instantly. This current diverts through the snubber resistor
rise to a non-destructive 170 A/s at 800 V. The inductor dV
causing a spike of theoretically infinite ------- with magnitude
gave an 80 A/s rise at 800 V with the non-inductive resistor. dt
equal to (IRRMR) or (IHR).
The Snubber Capacitor
A damping factor of 0.3 minimizes the size of the snubber Load Phase Angle
dV
Highly inductive loads cause increased voltage and ------- at
capacitor for a given value of ------- . This reduces the cost and dV
dt dt c
physical dimensions of the capacitor. However, it raises turn-off. However, they help to protect the thyristor from
voltage causing a counter balancing cost increase.
transients and ------- . The load serves as the snubber
dV
dt s

REV. 4.01 6/24/02 7

AN-3008 APPLICATION NOTE

inductor and limits the rate of inrush current if the device 2.8
dV
does turn on. Resistance in the load lowers ------- and VPK 2.6
dt E
(Figure 16). 2.4 0-63%
dV

dV
dt
2.2 dV dt
1.4 2.2
dt MAX

NORMALIZED PEAK VOLTAGE AND

E 2.0
dV 2.1
dt 1.8
1.2 2
VPK 10-63%
1.6
1.9
1.4
1 1.8

NORMALIZED PEAK VOLTAGE

M = 0.75 10-63% VPK
M=1 1.2
1.7 dV
dV
dt

1.0 dt
0.8 1.6
NORMALIZED
dt / (E W0)

0.8

VPK/E
1.5
M = 0.5
0.6
0.6 1.4
dV

0.4 dV
M = 0.25 1.3
dt o
0.2
0.4 1.2
0
M=0 1.1 0 0.2 0.4 0.6 0.8 1.0 2.2 1.4 1.6 1.8 2.0

0.2 1 DAMPING FACTOR ( )

(RL = 0, M = 1, IRRM = 0)
M = RS / (RL + RS) 0.9 dV dV/dt V
NORMALIZED = NORMALIZED VPK = PK
0 dt E 0 E
0 0.2 0.4 0.6 0.8 1
DAMPING FACTOR
dV
Figure 18. Trade-Off Between VPK and dt
RS
M = RESISTIVE DIVISION RATIO =
RL + R S
IRRM = 0 dV
A variety of wave parameters (Figure 18) describe ------- .
dt
dV Some are easy to solve for and assist understanding. These
Figure 16. 0 to 63% dt
dV dV
include the initial ------- , the maximum instantaneous ------- , and
dt dt
Characteristics Voltage Waves dV
the average ------- to the peak reapplied voltage. The 0 to 63%
dt
Damping factor and reverse recovery current determine the
shape of the voltage wave. It is not exponential when the dV
------- and 10 to 63% ------- definitions on device data sheets
dV
dt s dt c
snubber damping factor is less than 0.5 (Figure 17) or when
are easy to measure but difficult to compute.
significant recovery currents are present.

=0 = 0.1 Non-Ideal Behaviors

500
VMT2-1 (VOLTS)

400 Core Losses

300 The magnetic core materials in typical 60 Hz loads introduce
0.1
200 0.3 = 0.3 =1 losses at the snubber natural frequency. They appear as a
1
100 resistance in series with the load inductance and winding dc
0
0 dV
0 0.7 1.4 2.1 2.8 3.5 4.2 4.9 5.6 6.3 7 resistance (Figure 19). This causes actual ------- to be less than
dt
TIME (s)
the theoretical value.
dV
0-63% = 100 V/s, E = 250 V,
dt s
RL = 0, IRRM = 0

Figure 17. Voltage Waves for Different Damping Factors

8 REV. 4.01 6/24/02

APPLICATION NOTE
L R
C
L DEPENDS ON CURRENT AMPLITUDE, CORE
SATURATION
R INCLUDES CORE LOSS, WINDING R. INCREASES
WITH FREQUENCY
C WINDING CAPACITANCE. DEPENDS ON
INSULATION, WIRE SIZE, GEOMETRY
Figure 19. Inductor Model
Complex Loads
Many real-world inductances are non-linear. Their core
materials are not gapped causing inductance to vary with
current amplitude. Small signal measurements poorly
characterize them. For modeling purposes, it is best to
measure them in the actual application.
Complex load circuits should be checked for transient volt-
ages and currents at turn-on and turn-off. With a capacitive
load, turn-on at peak input voltage causes the maximum
surge current. Motor starting current runs 4 to 6 times the
steady state value. Generator action can boost voltages above
the line value. Incandescent lamps have cold start currents 10
to 20 times the steady state value. Transformers generate
voltage spikes when they are energized. Power factor correc-
tion
circuits and switching devices create complex loads. In most
cases, the simple CRL model allows an approximate snubber
design. However, there is no substitute for testing and mea-
suring the worst case load conditions.
Surge Currents in Inductive Circuits
Inductive loads with long L/R time constants cause asym-
metric multi-cycle surges at start up (Figure 20). Triggering
at zero voltage crossing is the worst case condition. The
surge can be eliminated by triggering at the zero current
crossing angle.
20 MHY
240 i
0.1
VAC
90
i (AMPERES)
0
ZERO VOLTAGE TRIGGERING, IRMS = 30 A
40 80 120 160
TIME (MILLISECONDS)
Figure 20. Start-Up Surge For Inductive Circuit
REV. 4.01 6/24/02
AN-3008
Core remanence and saturation cause surge currents. They
depend on trigger angle, line impedance, core characteris-
tics, and direction of the residual magnetization. For exam-
ple, a 2.8 kVA 120 V 1:1 transformer with a 1.0 ampere load
produced 160 ampere currents at start-up. Soft starting the
circuit at a small conduction angle reduces this current.
Transformer cores are usually not gapped and saturate
easily. A small asymmetry in the conduction angle causes
magnetic saturation and multi-cycle current surges.
Steps to achieve reliable operation include:
1. Supply sufficient trigger current amplitude. TRIACS
have different trigger currents depending on their quad-
rant of operation. Marginal gate current or optocoupler
LED current causes halfwave operation.
2. Supply sufficient gate current duration to achieve
latching. Inductive loads slow down the main terminal
current rise. The gate current must remain above the
specified IGT until the main terminal current exceeds the
latching value. Both a resistive bleeder around the load
and the snubber discharge current help latching.
Use a snubber to prevent TRIAC ------- failure.
dV
3.
dt c
4. Minimize designed-in trigger asymmetry. Triggering
must be correct every half-cycle including the first.
Use a storage scope to investigate circuit behavior
during the first few cycles of turn-on. Alternatively,
get the gate circuit up and running before energizing
the load.
5. Derive the trigger synchronization from the line instead
of the TRIAC main terminal voltage. This avoids regen-
erative interaction between the core hysteresis and the
triggering angle preventing trigger runaway, halfwave
operation, and core saturation.
6. Avoid high surge currents at start-up. Use a current
probe to determine surge amplitude. Use a soft start
circuit to reduce inrush current.
Distributed Winding Capacitance
There are small capacitances between the turns and layers of
a coil. Lumped together, they model as a single shunt capaci-
tance. The load inductor behaves like a capacitor at frequen-
cies above its self-resonance. It becomes ineffective in
dV
controlling ------- and VPK when a fast transient such as that
dt
resulting from the closing of a switch occurs. This problem
can be solved by adding a small snubber across the line.
Self-Capacitance
dV
A thyristor has self-capacitance which limits ------- when the
200 dt
load inductance is large. Large load inductances, high power
factors, and low voltages may allow snubberless
operation.
9
AN-3008 APPLICATION NOTE

Snubber Examples 1A, 60Hz

Without Inductance L = 318 MHY

10V/s
Rin 1 6 180 2.4k 170V
Power TRIAC Example VCC
2 MOC R1 R2 T2322D
Figure 2l shows a transient voltage applied to a TRIAC 3020 0.1F C1 1V/s
3021 4
controlling a resistive load. Theoretically there will be an
instantaneous step of voltage across the TRIAC. The only CNTL
elements slowing this rate are the inductance of the wiring
and the self-capacitance of the thyristor. There is an expo- 0.63 (170) DESIGN
dV
=
(0.63) (170)
= 0.45V/s
nential capacitor charging component added along with a dt (2400) (0.1F)

decaying component because of the IR drop in the snubber TIME

240s
resistor. The non-inductive snubber circuit is useful when the
dV
load resistance is much larger than the snubber resistor. dt
(V/s)

Power TRIAC Optocoupler

0.99 0.35
RL

E e RS
Figure 22. Single Snubber For Sensitive Gate TRIAC and
Phase Controllable Optocoupler ( = 0.67)
CS

The optocoupler conducts current only long enough to trig-

= (RL + RS) CS ger the power device. When it turns on, the voltage between
e
E MT2 and the gate drops below the forward threshold voltage
of the opto-TRIAC causing turn-off. The optocoupler sees
RS
Vstep = E dV
RS + RL -------
TIME dt s when the power TRIAC turns off later in the conduc-
t=0
tion cycle at zero current crossing. Therefore, it is not neces-
sary to design for the lower optocoupler ------- rating. In this
RS dV
e(t = o+) = E e t/ + (1 e t/)
RS + RL dt c
RESISTOR CAPACITOR example, a single snubber designed for the optocoupler
COMPONENT COMPONENT
protects both devices.

Figure 21. Non-inductive Snubber Circuit

1MHY
Opto-TRIAC Examples 100
Single Snubber, Time Constant Design VCC
430
MCR265-4 120V
MOC3031

1N4001
Figure 22 illustrates the use of the RC time constant design 1 4 400 Hz
method. The optocoupler sees only the voltage across the 2 5
snubber capacitor. The resistor R1 supplies the trigger 3 6 51 MCR265-4 0.022
current of the power TRIAC. A worst case design procedure F
100
1N4001
assumes that the voltage across the power TRIAC changes
instantly. The capacitor voltage rises to 63% of the maxi- (50 V/s SNUBBER, = 1.0)
mum in one time constant. Then:
Figure 23. Anti-Parallel SCR Driver
R 1 C S = = ---------------- where ------- is the rated static -------
0.63 E dV dV
dt s dt Octocouplers with SCRs
-------
dV
dt s dV
Anti-parallel SCR circuits result in the same ------- across the
dt
for the optocoupler. optocoupler and SCR (Figure 23). Phase controllable opto-
dV
couplers require the SCRs to be snubbed to their lower -------
dt
rating. Anti-parallel SCR circuits are free from the charge
storage behaviors that reduce the turn-off capability of
TRIACs. Each SCR conducts for a half-cycle and has the
next half cycle of the ac line in which to recover. The turn-off
dV
------- of the conducting SCR becomes a static forward block-
dt
ing ------- for the other device. Use the SCR data sheet -------
dV dV
dt dt s
rating in the snubber design.

10 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

A SCR used inside a rectifier bridge to control an ac load The current through the snubber resistor is:
will not have a half cycle in which to recover. The available
t
V
time decreases with increasing line voltage. This makes the --

circuit less attractive. Inductive transients can be suppressed i = ------ 1 e ,
R
by a snubber at the input to the bridge or across the SCR.
However, the time limitation still applies.
and the voltage across the TRAIC is:

Opto ( dV )
dt c
e = i RS

Zero-crossing optocouplers can be used to switch inductive The voltage wave across the TRIAC has an exponential rise
loads at currents less than 100 mA (Figure 24). However a with maximum rate at t = 0. Taking its derivative gives its
power TRIAC along with the optocoupler should be used for value as:
higher load currents. VR
dV
------- = ----------S-
dt 0 L
80

70 Highly overdamped snubber circuits are not practical

LOAD CURRENT (mA RMS)

designs. The example illustrates several properties:

60
CS = 0.01
50 1. The initial voltage appears completely across the circuit
inductance. Thus, it determines the rate of change of
40
dV
30 CS = 0.001
current through the snubber resistor and the initial ------- .
dt
20
This result does not change when there is resistance in
NO SNUBBER the load and holds true for all damping factors.
10

0 2. The snubber works because the inductor controls the

20 30 40 50 60 70 80 90 100 rate of current change through the resistor and the rate
TA, AMBIENT TEMPERATURE (C) of capacitor charging. Snubber design cannot ignore the
(RS = 100, VRMS = 220V, POWER FACTOR = 0.5)
inductance. This approach suggests that the snubber
capacitance is not important but that is only true for
Figure 24. MOC3062 Inductive Load Current versus TA this hypothetical condition. The snubber resistor shunts
the thyristor causing unacceptable leakage when the
A phase controllable optocoupler is recommended with a capacitor is not present. If the power loss is tolerable,
power device. When the load current is small, a MAC97 dV
TRIAC is suitable. ------- can be controlled without the capacitor. An example
dt
is the soft-start circuit used to limit inrush current in
Unusual circuit conditions sometimes lead to unwanted switching power supplies (Figure 25).
operation of an optocoupler in ------- mode. Very large
dV
dt c
Snubber with no C
currents in the power device cause increased voltages
between MT2 and the gate that hold the optocoupler on. RS
E
Use of a larger TRIAC or other measures that limit inrush RECTIFIER
current solve this problem. AC LINE SNUBBER BRIDGE C1
L G

dV ERS
Very short conduction times leave residual charge in the =
dt L
optocoupler. A minimum conduction angle allows recovery
RS
before voltage reapplication. E
RECTIFIER
AC LINE SNUBBER BRIDGE C1
The Snubber with Inductance L G

Consider an overdamped snubber using a large capacitor

whose voltage changes insignificantly during the time under Figure 25. Surge Current Limiting
consideration. The circuit reduces to an equivalent L/R series For a Switching Power Supply
charging circuit.

REV. 4.01 6/24/02 11

AN-3008 APPLICATION NOTE

TRIAC Design Procedure ( dV

dt )c ( dV
dt )c
Safe Area Curve
Figure 26 shows a MAC16 TRIAC turn-off safe operating
1. Refer to Figure 18 and select a particular damping factor
area curve. Turn-off occurs without problem under the curve.
dV
()giving a suitable trade-off between VPK and ------- .
The region is bounded by static ------- at low values of -----
dV dI
dt
dt dt c
dV
Determine the normalized ------- corresponding to the and delay time at high currents. Reduction of the peak cur-
dt
chosen damping factor. rent permits operation at higher line frequency. This TRIAC
operated at f = 400 Hz, TJ = 125 C, and ITM = 6.0 amperes
The volage E depends on the load phase angle: using a 30 ohm and 0.068 F snubber. Low damping factors
extend operation to higher ----- , but capacitor sizes
dI
1 X L
------ dt c
E = 2 V RMS Sin () where = tan - where
R L increase. The addition of a small, saturable commutation
inductor extends the allowed current rate by introducing
= measured phase angle between line V and load I recovery delay time.
RL = measured dc resistance of the load.

Then
-ITM = 15A
V RMS 2 2 2 2
Z = --------------- R L + X L X L = Z RL and 100
I RMS
dl = 6 f ITM x 10-3 A/ms
dt c
XL
L = ---------------------
-
2 f Line
dV (V/s)

10
dt c

If only the load current is known, assume a pure

inductance. This gives a conservative design. Then: WITH COMMUTATION L
1
V RMS
L = --------------------------------------- where E = 2 V RMS
2 f LINE I RMS
0.1
For Example: 10 14 18 22 26 30 34 38 42 46 50
dV AMPERES/MILLISECOND
dt c
120
E = 2 120 = 170 V; L = ------------------------------------ = 39.8 mH
( 8 A ) ( 377 rps ) MAC 16-8, COMMUTATIONAL L = 33 TURNS #18,
52000-1A TAPE WOUND CORE 3/4 INCH OD

Read from the graph at = 0.6, VPK = (1.25) 170 = 213V.

dV
( )
dV
Figure 26. dt
c
dl
versus dt ( )
T = 125 C
c J
Use 400V TRIAC. Read ------- = 1.0
dt ( = 0.6 )
dV
2. Apply the resonance criterion: Static Design
dt
0 = spec ------- ------- E
dV dV There is usually some inductance in the ac main and power
dt dt ( P ) wiring. The inductance may be more than 100 H if there is
6 a transformer in the circuit or nearly zero when a shunt
5 10 V/S 3
0 = ----------------------------- = 29.4 10 rps power factor correction capacitor is present. Usually the line
( 1 ) ( 170 V )
inductance is roughly several H. The minimum inductance
1 must be known or defined by adding a series inductor to
C = -------------- = 0.029 F
0 L
2 insure reliable operation (Figure 27).

3. Apply the damping criterion: One hundred H is a suggested value for starting the design.
Plug the assumed inductance into the equation for C. Larger
3 values of inductance result in higher snubber resistance and
L 39.8 10
R S = 2 ---- = 2 ( 0.6 ) ------------------------------ = 1400 ohms dI
C 6 reduced ----- . For example:
0.029 10 dt

12 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

8A LOAD
10 0.33 F
R L
100 H < 50 V/s MAC 218-6
20A 68
120V
60Hz
LS1 0.033 F

340
12 dV = 100 V/s dV = 5 V/s
V
HEATER dt s dt c

dV
R L Vstep VPK
dt
MHY V V V/s
Figure 27. Snubbing for a Resistive Load 0.75 15 0.1 170 191 86
0.03 0 39.8 170 325 4.0
0.04 10.6 28.1 120 225 3.3
0.06 13.5 17.3 74 136 2.6
Given E = 240 2 = 340V

Pick = 0.3 Figure 28. Snubbing For a Variable Load

Then from Figure 18, VPK = 1.42 (340) = 483 V. Examples of Snubber Designs
Table 2 describes snubber RC values for ------- . Figures 31
dV
Thus, it will be necessary to use a 600 V device. Using the dt s
previously stated formulas for 0, C and R we find:
and 32 show possible R and C values for a 5.0 V/s -------
dV
dt c
6 assuming a pure inductive load.
50 10 V/S
0 = ----------------------------------- = 201450 rps
( 0.73 ) ( 340 V )
dV
Table 2. Static Designs
1 dt
C = --------------------------------------------------------- = 0.2464F
2 6 (E = 340 V, Vpeak = 500 V, = 0.3)
( 201450 ) ( 100 10 )
5.0V/s 50V/s 100V/s
6
100 10 L C R C R C R
R = 2 ( 0.3 ) --------------------------------- = 12ohms
0.2464 10
6 H F Ohm F Ohm F Ohm
47 0.15 10
Variable Loads 100 0.33 10 0.1 20

The snubber should be designed for the smallest load 220 0.15 22 0.03 47
dV 3
inductance because ------- will then be highest because of its
dt
500 0.06 51 0.01 110
dependance on 0. This requires a higher voltage device for
operation with the largest inductance because of the corre- 8 5
sponding low damping factor. 100 3.0 11 0.03 100
0 3
dV
Figure 28 describes ------- for an 8.0 ampere load at various
dt
power factors. The minimum inductance is a component
dV
added to prevent static ------- firing with a resistive load.
dt

REV. 4.01 6/24/02 13

AN-3008 APPLICATION NOTE

Transient and Noise Suppression
Transients arise internally from normal circuit operation or
externally from the environment. The latter is particularly
frustrating because the transient characteristics are unde-
fined. A statistical description applies. Greater or smaller
stresses are possible. Long duration high voltage transients
are much less probable than those of lower amplitude and
higher frequency. Environments with infrequent lightning
and load switching see transient voltages below 3.0 kV.
10K
0.6A RMS 2.5A
1000
RS(OHMS)
The natural frequencies and impedances of indoor ac wiring
result in damped oscillatory surges with typical frequencies
ranging from 30 kHz to 1.5 MHz. Surge amplitude depends
on both the wiring and the source of surge energy. Distur-
bances tend to die out at locations far away from the source.
Spark-over (6.0 kV in indoor ac wiring) sets the maximum
voltage when transient suppressors are not present. Tran-
sients closer to service entrance or in heavy wiring have
higher amplitudes, longer durations, and more damping
because of the lower inductance at those locations.
The simple CRL snubber is a low pass filter attenuating
frequencies above its natural resonance. A steady state sinu-
soidal input voltage results in a sine wave output at the same
frequency. With no snubber resistor, the rate of roll off
5A
approaches 12 dB per octave. The corner frequency is at
10A the snubbers natural resonance. If the damping factor is
low, the response peaks at this frequency. The snubber

20A resistor degrades filter characteristics introducing an up-turn

at = 1/(RC). The roll-off approaches 6.0 dB/octave at
40A
frequencies above this. Inductance in the snubber resistor
100 80A further reduces the roll-off rate.

Figure 32 describes the frequency response of the circuit

in Figure 27. Figure 31 gives the theoretical response to a
3.0 kV 100 kHz ring-wave. The snubber reduces peak volt-
age across the thyristor. However, the fast rise input causes a
10 dV
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 high ------- step when series inductance is added to the snubber
dt
DAMPING FACTOR
resistor. Limiting the input voltage with a transient suppres-
PURE INDUCTIVE LOAD, V = 120 VRMS,
sor reduces the step.
IRRM = 0
400
Figure 29. Snubber Resistor For ( dV
dt )c = 5.0 V/s
WITHOUT 5 HY
WITH 5 5 HY AND
(VOLTS)

450V MOV
AT AC INPUT
1 0
2-1
VMT

WITH 5 HY
80A RMS
-400
0 1 2 3 4 5 6
40A TIME (s)
0.1
20A Figure 31. Theoretical Response of Figure 33
Circuit to 3.0 kV IEEE 587 Ring Wave (RSC = 27.5 )
CS(F)

10A

+10
5A

0.01 2.5A 0
VOLTAGE GAIN (dB)

-10
100H
0.6A WITH 5HY
-20 5H
0.001 Vin Vout
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 10
-30
DAMPING FACTOR 12 0.33F WITHOUT 5HY

-40
PURE INDUCTIVE LOAD, V = 120 VRMS, 10K 100K 1M
IRRM = 0
FREQUENCY (Hz)
dV
Figure 30. Snubber Capacitor For dt
c
= 5.0 V/s ( ) Figure 32. Snubber Frequency Response (VV )
out
in

14 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

dV In Figure 32, there is a separate suppressor across each

The noise induced into a circuit is proportional to ------- when
dt thyristor. The load impedance limits the surge energy deliv-
dI ered from the line. This allows the use of a smaller device
coupling is by stray capacitance, and ----- when the coupling
dt but omits load protection. This arrangement protects each
is by mutual inductance. Best suppression requires the use of thyristor when its load is a possible transient source.
a voltage limiting device along with a rate limiting CRL
snubber. The thyristor is best protected by preventing turn-on
dV
from ------- or breakover. The circuit should be designed for
dt
what can happen instead of what normally occurs.

In Figure 30, a MOV connected across the line protects

many parallel circuit branches and their loads. The MOV
dI
defines the maximum input voltage and ----- through the load.
dt
dV
With the snubber it sets the maximum ------- and peak voltage
dt
across the thyristor. The MOV must be large because there is Figure 34. Limiting Thyristor Voltage
little surge limiting impedance to prevent its burn-out.
It is desirable to place the suppression device directly
across the source of transient energy to prevent the induction
of energy into other circuits. However, there is no protection
for energy injected between the load and its controlling
thyristor. Placing the suppressor directly across each
VMAX thyristor positively limits maximum voltage and snubber
dI
discharge ----- .
dt

Figure 33. Limiting Line Voltage

REV. 4.01 6/24/02 15

AN-3008 APPLICATION NOTE

Examples of Snubber Applications REV

In Figure 35, TRIACs switch a 3 phase motor on and off and 91 0.1 3.75
46 V/s LS 330V
reverse its rotation. Each TRIAC pair functions as a SPDT MAX
switch. The turn-on of one TRIAC applies the differential FWD 500H 5.6
voltage between line phases across the blocking device with- 91 0.1
MOTOR
out the benefit of the motor impedance to constrain the rate 1/70 HP
RS CS 0.26A
dV 115
of voltage rise. The inductors are added to prevent static -------
dt T2323D
firing and a line-to-line short.

Figure 36 shows a split phase capacitor-run motor with

reversing accomplished by switching the capacitor in series
with one or the other winding. The forward and reverse
TRIACs function as a SPDT switch. Reversing the motor
applies the voltage on the capacitor abruptly across the
blocking thyristor. Again, the inductor L is added to prevent
dV
-------
dt s firing of the blocking TRIAC. If turn-on occurs,
the forward and reverse TRIACs short the capacitors (CS)
resulting in damage to them. It is wise to add the resister RS
to limit the discharge current.
Figure 36. Split Phase Reversing Motor
Figure 37 shows a tap changer. This circuit allows the
operation of switching power supplies from a 120 or 240
vac line. When the TRIAC is on, the circuit functions as a
conventional voltage doubler with diodes D1 and D2 con-
ducting on alternate half-cycles. In this mode of operation,
dI
inrush current and ----- are hazards to TRIAC reliability.
dt
Series impedance is necessary to prevent damage to the
TRIAC.

SNUBBER

1 2 1
22
100H 2W
G
300 WIREWOUND

4 MOC 6 91
3081 0.15
FWD F

SNUBBER

2 1
SNUBBER
G ALL MOVs ARE 275
300 VRMS
ALL TRIACS ARE
4 MOC 6 91 MAC218-10
3081
REV 1/3 HP
208V
SNUBBER 3 PHASE 91
SNUBBER

2 2 1 G
6 1
100H G
300 MOC
3081 2
4 MOC 6 91
3081 4
FWD
43
SNUBBER

2 1

G
300
4 MOC 6 91
3081
3 REV

Figure 35. 3 Phase Reversing Motor

16 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

The TRIAC is off when the circuit is not doubling. In this Appendix A
state, the TRIAC sees the difference between the line voltage
and the voltage at the intersection of Cl and C2. Transients
dI
on the line cause ------- firing of the TRIAC. High inrush
dV Testing Snubber Discharge
dt s dt
dI
current, ----- and overvoltage damage to the filter capacitor are The equations in Appendix D do not consider the thyristors
dt
possibilities. Prevention requres the addition of a RC snub- turn-on time or on-state resistance, thus, they predict high
ber across the TRIAC and an inductor in series with the line. dI
values of ----- .
dt
SUBBER INDUCTOR
Figure 38 shows the circuit used to test snubber discharge
D1 dI
D2 ----- . A MBS4991 supplies the trigger pulse while the
+ dt
C1
120 VAC quadrants of operation are switch selectable. The snubber
OR D3
D4
240 VAC was mounted as close to the TRIAC under test as possible to
RL reduce inductance, and the current transformer remained in
240V the circuit to allow results to be compared with the measured
0 G +
120V
C2
dI
----- value.
dt
RS CS

What should the peak capacitor voltage be? A conservative

Figure 37. Tap Changer For Dual approach is to test at maximum rated VDRM, or the clamp
Voltage Switching Power Supply voltage of the MOV.

Thyristor Types What is the largest capacitor that can be used without limit-
ing resistance? Figure 39 is a photo showing the the current
Sensitive gate thyristors are easy to turn-on because of their pulse resulting from a 0.001 F capacitor charged to 800 V.
low trigger current requirements. However, they have less
dI
dV The 1200 A/s ----- destroyed the TRIAC.
------- capability than similar non-sensitive devices. A non- dt
dt
dV Is it possible for MOV self-capacitance to damage the
sensitive thyristor should be used for high ------- .
dt TRIAC? A large 40 Joule, 2200 A peak current rated MOV
was tested. The MOV measured 440 pF and had an 878 volt
dV breakover voltage. Its peak discharge current (12 A) was half
TRIAC commutating ------- ratings are 5 to 20 times less than
dt
that of a 470 pF capacitor. This condition was safe.
dV
static ------- ratings.
dt

dV
Phase controllable optocouplers have lower ------- ratings than
dt
zero crossing optocouplers and power TRIACS. These
should be used when a dc voltage component is present, or to
prevent turn-on delay.

dV
Zero crossing optocouplers have more ------- capability than
dt
power thyristors; and they should be used in place of phase
controllable devices in static switching applications.

REV. 4.01 6/24/02 17

AN-3008 APPLICATION NOTE

2000
OPTIONAL PEARSON
500W 411 CURRENT

OPTIONAL MOV
TRANSFORMER

RS 50
5000
2.5kV 200W MT2
120 VAC 60Hz
X100
VTC V PROBE
5-50 G
56
SWEEP FOR MT1
CS
DESIRED VCi
TRIAC
UNDER TEST 91

3000
VMT2-1

2 1 12 V MBS4991
1
VG Q1,3 Q2,4
F
3 4
QUADRANT
SWITCH
QUADRANT
MAP

dI
Figure 38. Snubber Discharge dt Test

Appendix B

HORIZONTAL SCALE 50 ms/DIV.
VERTICAL SCALE 10 A/DIV.
CS = 0.001 F, VCi = 800 V, RS = 0, L = 250 mH, RTRIAC = 10 OHMS
Figure 39. Discharge Current From 0.001 F Capacitor
Measuring ( dV
dt )s
dV
Figure 40 shows a test circuit for measuring the static -------
dt
of power thyristors. A 1000 volt FET switch insures that the
voltage across the device under test (D.U.T.) rises rapidly
from zero. A differential preamp allows the use of a N-chan-
nel device while keeping the storage scope chassis at ground
for safety purposes. The rate of voltage rise is adjusted by a
variable RC time constant. The charging resistance is low to
avoid waveform distortion because of the thyristors self-
capacitance but is large enough to prevent damage to the
dI
D.U.T. from turn-on ----- . Mounting the miniature range
dt
switches, capacitors, and G-K network close to the device
under test reduces stray inductance and allows testing at
more than 10 kV/s.

18 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

27
VDRM/VRRM SELECT 2W 1000
10 WATT
WIREWOUND
X100 PROBE 2

DIFFERENTIAL DUT 20k 2W 0.33 1000V

PREAMP 0.047
X100 PROBE G 1000V
1

RGK 470pF

dV
MOUNT DUT ON dt 0.001
TEMPERATURE CONTROLLED VERNIER 100
C PLATE 2W
0.005
1 MEG 2W EACH
1.2 MEG
82 0.01
2W 2W
POWER
TEST
0.047

1N914 0.1

MTP1N100
20V 0.47 0-1000V
10mA
56
2W 1000 1N967A
f = 10 Hz 1/4W 18V
PW = 100 s
50 PULSE
GENERATOR

ALL COMPONENTS ARE NON-INDUCTIVE UNLESS SHOWN

dV
Figure 40. Circuit For Static dt Measurement of Power Thyristors

Appendix C Commercial chokes simplify the construction of the neces-

Measuring ( dV
dt )c
dV
A test fixture to measure commutating ------- is shown in
dt
Figure 41. It is a capacitor discharge circuit with the load
series resonant. The single pulse test aids temperature control
and allows the use of lower power components. The limited
energy in the load capacitor reduces burn and shock hazards.
The conventional load and snubber circuit provides recovery
and damping behaviors like those in the application.
sary inductors. Their inductance should be adjusted by
increasing the air gap in the core. Removal of the magnetic
pole piece reduces inductance by 4 to 6 but extends the cur-
rent without saturation.
The load capacitor consists of a parallel bank of 1500 Vdc
non-polar units, with individual bleeders mounted at each
capacitor for safety purposes.
An optional adjustable voltage clamp prevents TRIAC break-
down.

To measure ------- , synchronize the storage scope on the

The voltage across the load capacitor triggers the D.U.T. It
terminates the gate current when the load capacitor voltage
crosses zero and the TRIAC current is at its peak.
Each VDRM, ITM combination requires different components.
Calculate their values using the equations given in Figure 41.
dV
dt c
current waveform and verify the proper current amplitude
and period. Increase the initial voltage on the capacitor to
compensate for losses within the coil if necessary. Adjust the
snubber until the device fails to turn off after the first half-
cycle. Inspect the rate of voltage rise at the fastest passing
condition.

REV. 4.01 6/24/02 19

AN-3008 APPLICATION NOTE

HG = W AT LOW LD10-1000-1000

NON-INDUCTIVE +CLAMP -CLAMP LL RL

RESISTOR DECADE
0-10k, 1 STEP TRIAD C30X

2.2M, 2W

2.2M, 2W
51k 50H, 3500
2W 910k

MR760 2W Q3 Q1

CL (NON-POLAR)
2.2M

2.2M

MR760
51k 2W

2.2M
910k
CAPACITOR DECADE 110 F, 0.011 F, 100pF0.01F

RS 2W
2N3904 2N3906 + 1.5kV
62F

0-1 kV 20 mA
6.2 MEG 2W
1kV
+ 70mA
0.01

0.01

MR760
2.2M
120 120 6.2 MEG 2W
1/2W 1/2W 150k
2N3906 2N3904

Q3 Q1
2N3906 2N3904 -5 +5
0.1 0.1 PEARSON
301 X 360 1/2W 360 1/2W
2N3904 2N3906
1k 1k
2 CASE 2N3904
CONTROLLED
HEATSINK
1 +
51 2W 2N3906
CS +5 51 2W -5 G 56
2 WATT
Q3 Q1
TRIAC 0.22 0.22
dV UNDER 270k 1N5343
dt 2.2k TEST 7.5V
1/2 270k
SYNC

IPK IP T VCi T2 I dl
CL = = LL = = W0 = = 6f IPK x 10-6
W0 VCi 2 VCi W0 IPK 42 CL LL dt c
A/s

dV
Figure 41. dt
c
( )
Test Circuit for Power TRIACs

Appendix D
dV
Derivations
dt
Definitions
1.0 R T = R L + R S = Total Resis tan ce

RS
1.1 M = ------- = Snubber Divider Ratio
RT

1
1.2 0 = --------------- = Undamped Natural Frequency
LC S

= Damped Natural Frequency

RT
1.3 = ------- = Wave Decrement Factor
2L
2
2 1 2 LI Initial Energy In Inductor
1.4 = --------------------2- = ----------------------------------------------------------------------
1 2CV Final Energy In Capaitor

I L
1.5 = --- ---- = Initial Current Factor
E C

RT C
1.6 = ------- ---- = ------- = Damping Factor
2 L 0

1.7 V O = E R S I = Initial voltage drop at t = 0 across the load

L

20 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

I ER
1.8 = ------ ----------L-
CS L
dV
------- = initial instantaneous -------at t = 0, ignoring any instantaneous voltage step at
dV
dt 0 dt
t = 0 because of IRRM

dV R
1.9 ------- = V OL ------T- + . For All Damping Conditions
dt 0 L
ER
When I = 0, ------- = ----------S
dV
2.0 dt 0 L

dV
-------
dV
= Maximum Instantaneous -------
dt max dt

dV
t max = Time of maximum instantaneous -------
dt
t peak = Time of maximum instantaneous peak voltage across thyristor

dV
Average ------- = V PK t PK = Slope of the secant line from t = 0 through V PK
dt

V PK = Maximum instantaneous voltage across the thyristor.

Constants (depending on the damping factor):

2.1 No Damping ( = 0 )
= 0
RT = = = 0

2.2 Underdamped ( 0 < < 1 )

2 2 2
= 0 = 0 1

2.3 Critial Damped ( = 1 )

L 2
= 0, = 0, R = 2 ---- , C = -----------
C R T

2.4 Overdamped ( > 1 )

2 2 2
= 0 = 0 1

Laplace transforms for the current and voltage in Figure 42 are:

E L + SI E SV O
L
3.0 i ( S ) = ------------------------------------- ; e = --- -------------------------------------
2 R T 1 S 2 RT 1
S + S ------- + -------- S + ------- S + --------
L LC L LC

RL L

t=0
+ I RS
e

CS

INITIAL CONDITIONS
I = IRRM
VCS = 0

Figure 42. Equivalent Circuit for Load and Snubber

REV. 4.01 6/24/02 21

AN-3008 APPLICATION NOTE

The inverse laplace transform for each of the conditions gives:

Underdamped (Typical Snubber Design)

t t
4.0 e = E V O Cos ( t ) ---- sin ( t ) e + ---- sin ( t ) e
L
2 2
de ( ) t t
4.1 ------ = V O 2Cos ( t ) + ----------------------- sin ( t ) e + Cos ( t ) ---- sin ( t ) e
dt L

1 1 2V O +
L
4.2 t PK = ---- tan -----------------------------------------------
-

2

2

V O ------------------- -------

L

When M = 0, R S = 0, I = 0 ; t PK =

2 2 2
4.3 V PK = E + ------ t PK 0 V O + 2V O +
0 L L

When I = 0, R L = 0, M = 1:

V PK
4.4 ---------- = ( 1 + e t PK )
E
dV V PK
Average ------- = ----------
dt t PK
2 2
1 ( 2 V O ( 3 ) )
L
4.5 t max = ---- ATN --------------------------------------------------------------------------
-
3
V O ( 3 ) + ( )
2 2 2
L

dV 2 t max
-------
2 2
4.6 = V O 0 + 2 V O + e
dt max L L

No Damping

I
5.0 e = E ( 1 Cos ( 0 t ) ) + ----------- sin ( 0 t )
C 0

de I
5.1 ------ = E 0 sin ( 0 t ) + ---- cos ( 0 t )
dt C

5.2 dV
------- = ---- = 0 when I = 0
I
dt 0 C

tan ---------------
1 I
5.3 CE 0
t PK = ------------------------------------------
0
2
2 I
5.4 V PK = E + E + ----------------
2 2
0 C

dV V PK
5.5 ------- = ----------
dt AVG t PK

1 0 EC I
t max = ------ tan --------------- = ------ --- when I = 0
I
5.6 0 I 0 2

dV
-------
I 2 2 2 2
= ---- E 0 C + I = 0 E when I = 0
5.7 dt max C

22 REV. 4.01 6/24/02

APPLICATION NOTE AN-3008

Critical Damping
t t
6.0 e = E V O ( 1 t )e + te
L

de t
6.1 ------ = [ V O ( 2 t ) + ( 1 t ) ]e
dt L

2 + --------------
2V OL
6.2 t PK = ------------------------

+ ----------
VO
L

6.3 V PK = E [ V O ( 1 t PK ) t PK ]e t PK
L

dV V PK
6.4 Average ------- = ----------
dt t PK

When I = 0, R S = 0, M = 0

dV
e(t) rises asymptotically to E. t PK and average ------- do not exist.
dt

3V O + 2
L
6.5 t max = -----------------------------
2
-
V O +
L

When I = 0, t max = 0
RS
For ------- 3 4
RT
dV
then ------- = dV
-------
dt max dt 0

6.6 dV
-------
dt max
t max
= [ V O ( 2 t max ) + ( 1 t max ) ]e
L

Appendix E
dI
Snubber Discharge Derivations
dt
Overdamped
V CS t
1.0 i = ---------- sinh ( t )
L S
CS
1.1 i PK = V C ------ e t PK
S LS

1 1
1.2 t PK = ---- tan h ----

Critical Damped
VC t
2.0 i = ---------S te
LS
VC
2.1 i PK = 0.736 ---------S
RS

REV. 4.01 6/24/02 23

AN-3008 APPLICATION NOTE

1
2.2 t PK = ---

Underdamped
V C t
3.0 i = ----------S e sin (t )
L S
CS
3.1 i PK = V C ------e t PK
S LS

1 1
3.2 t PK = ---- tan ----

RS LS

t=0
VCS CS i

INITIAL CONDITIONS:
i = 0, VCS = INITIAL VOLTAGE

Figure 43. Equivalent Circuit for Snubber Discharge

No Damping
VC
4.0 i = ----------S sin ( t )
L S
CS
4.1 i PK = V C ------
S LS

4.2 t PK = -------
2

Bibliography
Bird, B. M. and K. G. King. An Introduction To Power Elec- Kervin, Doug. "The MOC3011 and MOC3021," EB-101,
tronics. John Wiley & Sons, 1983, pp. 250281. Motorola Inc., 1982.

Blicher, Adolph. Thyristor Physics. Springer-Verlag, 1976. McMurray, William. Optimum Snubbers For Power Semi-
condutors," IEEE Transactions On Industry Applications,
Gempe, Horst. Applications of Zero Voltage Crossing Opti- Vol.1A-8, September/October 1972.
cally Isolated TRIAC Drivers, AN982, Motorola Inc., 1987
Rice, L. R. Why R-C Networks And Which One For Your
Guide for Surge Withstand Capability (SWC) Tests, ANSI Converter, Westinghouse Tech Tips 5-2.
337.90A-1974, IEEE Std 4721974.
Saturable Reactor For Increasing Turn-On Switching Capa-
IEEE Guide for Surge Voltages in Low-Voltage AC Power bility, SCR Manual Sixth Edition, General Electric, 1979.
Circuits, ANS1/lEEE C62.41 -1980, IEEE Std 5871980
Zell, H. P. Design Chart For Capacitor-Discharge Pulse
dI Circuits," EDN Magazine, June 10, 1968.
Ikeda, Shigeru and Tsuneo Araki. The ----- Capability of
dt
Thyristors, Proceedings of the IEEE, Vol.53, No.8, August
1967.

24 REV. 4.01 6/24/02

AN-3008 APPLICATION NOTE

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