Tarjmadredell Insp5520

A B C D E
MODEL NAME : QCL00_QCL20

PCB NO : LA-8241P
BOM P/N : 4619GP31L21 Inspiron DIS
1 4619GQ31L21 Inspiron UMA 1
4619GP31L01 Vostro DIS

4619GQ31L01 Vostro UMA
Dell / Compal Confidential

Schematic Document
Inspron A5 & Vostro 3560 (Intel Chief River)
2 2
Ivy Bridge(rPGA) + Panther Point(mainstream)

Discrete AMD Thames-XT
2012-02-01 X76@ : VRAM Group
3 46@ : for 46 level CH@ : Chelsea M2 3
@ : Nopop Component Rev: 1.0 SE@ : Seymour M2

CONN@ : Connector Component TH@ : Thames-XT
KB930@ : ENE KB930 Implemented MB Type BOM P/N Config DIS@ : Only for Discrete
KB9012@ : ENE KB9012 Implemented
EXP@ : Express Card Implemented
FFS@ : Only for Free Fall Sensor
VOS@ : Only for Vostro
4 INS@ : Only for Inspiron 4
UMA@ : Only for UMA

GCLK@ : Green CLK implemented Security Classification Compal Secret Data Compal Electronics, Inc.
AMP@ : External Amplifier implemented Issued Date 2012/01/17 Deciphered Date 2013/01/16 Title
Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KBBL@ : Keyboard Back Light implemented DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Date:
Document Number
LA-8241P
Wednesday, February 01, 2012 Sheet 1 of 56
Rev
1.0
A B C D E
A B C D E
Compal Confidential CPU XDP

Fan Control
Project Code : QCL00 / QCL20 P.25 Conn. P.6
File Name : LA-8241P 64M*16
VRAM * 4 Intel
DDR3 P.40
64bit
Ivy Bridge Memory Bus (DDR3)
1
Dual Channel DDRIII-DIMM X2 1
AMD PEG 3.0 x16

Processor BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
64M*16 Thames-XT / 1.5V DDR3 1333 MHz page 11,12
VRAM * 4
35W QC rPGA 988
Chelsea Pro
DDR3 P.41 64bit
24-26 W P.34~39 35W DC rPGA 988 8GB Max
P.5~10
FDI x8 DMI x4
100MHz 100MHz
2.7GT/s 5GB/s
SATA3.0 Port 0
SATA HDD Conn. FFS P.29
P.29
CRT Port 1
CRT Conn. Mini Card-2 (mSATA)
P.22 ( Full )
Port 5 P.32
2 LVDS Daughter board 2
LVDS Conn. Port 2

P.22
Intel SATA ODD Conn.
P.29
HDMI Panther Point
HDMI Conn. PCH HM77 USB 3.0 Port 1,2
P.23
USB 3.0 Conn. 1 P.33
Port 0,1 USB 3.0 Conn. 2 -( USB Charger )
USB2.0 USB2.0 Port 3,4
Port 2,3 USB 3.0 Conn. 3
Port 11 PCI-E x1
BGA 989 Balls USB 3.0 Conn. 4 P.32
Daughter board
Port 12
Port 3 Port 2 Port 1 Digital Camera P.22
Mini Card-1 Express Card Ethernet Port 4 Mini Card-1 (WLAN)

WLAN / BT4.0 RTL8105E (10/100) ( Half ) P.32
Half RTL8111F (10/100/1000) Daughter board

P.32 P.28 P.32
Port 10 Card Reader
RTS5139 P.32 3 in 1 Socket
3
34mm Slot RJ45 Daughter board 3
Port 8
Finger Print P.32
Daughter board Daughter board Daughter board HD Audio
P13~20
SPI Digital Mic.

RTC CKT. SPI ROM
P.13 4MB P.13 LPC Bus Audio Codec Headphone Jack
33MHz CX20672 P.30
Power On/Off CKT. SPI Mic. Jack
P.25 SPI ROM
2MB P.13
ENE KBC SPI
DC/DC Interface CKT. KB9012 / Amplifier
P.27
TPA3113D2 P.31 Int. Speaker R/L
KB930 page 24
PS/2 only for Vostro 3560

4 4
Int.KBD Touch Pad Dashboard SPI ROM

page 25 page 25
Button page
x3 32 128K page 26
reserved for KB930
Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2012/01/17 Deciphered Date 2013/01/16 Title
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-8241P
Date: Wednesday, February 01, 2012 Sheet 2 of 56
A B C D E
A B C D E
Compal Confidential
Project Code : QCL00 / QCL20
File Name : LA-8241P
1 1
8 pin-Hot Bar LS-8241P (Ins) LED/B

Led1 Led2
4 pin-Hot Bar
LS-8251P (Vos)
Led1 Led2 Led3
LS-8245P (Ins)
LS-8255P (Vos) SW1 SW1 SW2 SW3
LED/B
FFC FFC
4 pin 8 pin Lid (Vostro)
JFC
JPWR JLVDS
8 pin FFC
40 pin
4 pin 4 pin
2
LA-8241P M/B LS-8242P (Ins) IO/B 2
Lid (Inspiron) 80 pin

JBTB1
LS-8252P (Vos)
Touch Pad
L R
JFP
6 pin
JTP JCR2
Camera
4 pin
4 pin (Vostro)
TP Led (Vos)
TP Led (Ins)
LCD Panel
FFC 40 pin Wire
4 pin
4 pin-Hot Bar
3 JLED JCR1 3
Card Reader/B
4 pin 26
10 pin JEXP
LS-8243P (Ins)
26 pin
1 LS-8253P (Vos)
(Vostro) (Inspiron)
FFC
10 pin
LS-8244P (Ins)
LS-8254P (Vos) LED/B
Express Card
10 pin-Hot Bar
4 pin-Hot Bar
Led1 Led2 Led3 Led4
Finger Print/B
LS-8256P (Vos)
Top Side
4 4
Bottom Side

Block Diagram
Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
A B C D E
A
Board ID Table for AD channel

Vcc 3.3V +/- 5% BOARD ID Table USB PORT# DESTINATION
Ra 100K +/- 5%
Board ID Rb V AD_BID min V AD_BID typ V AD_BID max EC AD3 Board ID PCB Revision 0 USB conn.1
0 0 0 V 0 V 0.155 V 0x00-0x0C 0 0.1
1 8.2K +/- 5% 0.168 V 0.250 V 0.362 V 0x0D-0x1C 1 0.1 1 USB conn.2 - Power Share
2 18K +/- 5% 0.375 V 0.503 V 0.621 V 0x1D-0x30 2 0.2
3 33K +/- 5% 0.634 V 0.819 V 0.945 V 0x31-0x49 3 0.2 2 USB conn.3
4 56K +/- 5% 0.958 V 1.185 V 1.359 V 0x4A-0x69 4 0.3 0.2
5 100K +/- 5% 1.372 V 1.650 V 1.838 V 0x6A-0x8E 5 0.3 0.3 3 USB conn.4
6 200K +/- 5% 1.851 V 2.200 V 2.420 V 0x8F-0xBB 6 1.0 1.0
7 NC 2.433 V 3.300 V 3.300 V 0xBC-0xFF 7 1.0 4 MINI CARD-1 (WLAN)
QCL00 QCL20 QCL01 PCH
SMBUS Control Table
5 NC
Express Thermal VGA Thermal
SOURCE MINI1 MINI2 BATT SODIMM FFS VGA XDP Charger
Card Sensor Sensor 6 NC
EC_SMB_CK1
EC_SMB_DA1
KB9012
V V 7 NC
EC_SMB_CK2
EC_SMB_DA2
KB9012
V V 8 Finger Print
PCH_SML0CLK PCH Link
PCH_SML0DATA 9 NC
PCH_SML1CLK PCH
PCH_SML1DATA 10 Card Reader
MEM_SMBCLK
MEM_SMBDATA
PCH
V V V V V V 11 Express Card
12 Camera
CLKOUT DESTINATION 13 NC
1 1
PCI0 PCH_LOOPBACK
PCI1 EC LPC
PCI2 None
SATA DESTINATION PCI EXPRESS DESTINATION
PCI3 None
SATA0 HDD Lane 1 10/100/1G LAN
PCI4 None
SATA1 SSD Lane 2 MINI CARD-1 (WLAN)
SATA2 ODD Lane 3 Express Card

DIFFERENTIAL DESTINATION FLEX CLOCKS DESTINATION
SATA3 None Lane 4 None
CLKOUT_PCIE0 10/100/1G LAN CLKOUTFLEX0 None
CLKOUT_PCIE1 MINI CARD-1 WLAN CLKOUTFLEX1 None
CLKOUT_PCIE2 Express Card CLKOUTFLEX2 None
Symbol Note : Lane 7 None
CLK CLKOUT_PCIE3 None CLKOUTFLEX3 None
Lane 8 None
CLKOUT_PCIE4 None : means Digital Ground
CLKOUT_PCIE5 None
: means Analog Ground
CLKOUT_PCIE6 None
CLKOUT_PCIE7 None Issued Date 2012/01/17 Deciphered Date 2013/01/16 Title
Notes List
Size Document Number Rev
CLKOUT_PEG_B None AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
LA-8241P 1.0
A
5 4 3 2 1
+VCCP
PEG_ICOMPI and RCOMPO signals should be shorted and routed
1
with - max length = 500 mils - typical impedance = 43 mohms JCPU1I
RC2 PEG_ICOMPO signals should be routed with - max length = 500 mils
24.9_0402_1% - typical impedance = 14.5 mohms
T35 F22
2
JCPU1A VSS161 VSS234
T34 F19
D PEG_COMP VSS162 VSS235 D
J22 T33 E30
PEG_ICOMPI VSS163 VSS236
J21 T32 E27
PEG_ICOMPO VSS164 VSS237
<15> DMI_CRX_PTX_N0 B27 H22 T31 E24
DMI_RX#[0] PEG_RCOMPO VSS165 VSS238
<15> DMI_CRX_PTX_N1 B25 T30 E21
DMI_RX#[1] VSS166 VSS239
<15> DMI_CRX_PTX_N2 A25 T29 E18
DMI_RX#[2] VSS167 VSS240
<15> DMI_CRX_PTX_N3 B24 K33 T28 E15
DMI_RX#[3] PEG_RX#[0] VSS168 VSS241
M35 T27 E13
PEG_RX#[1] VSS169 VSS242
<15> DMI_CRX_PTX_P0 B28 L34 T26 E10
DMI_RX[0] PEG_RX#[2] VSS170 VSS243
<15> DMI_CRX_PTX_P1 B26 J35 P9 E9
DMI
<15> DMI_CRX_PTX_P2 A24 J32 P8 E8
<15> DMI_CRX_PTX_P3 B23 H34 P6 E7
PEG_RX#[6] H31 P5 VSS174 VSS247 E6
<15> DMI_CTX_PRX_N0 G21 DMI_TX#[0] PEG_RX#[7] G33 P3 VSS175 VSS248 E5
E22 G30 PEG_GTX_C_HRX_N7 PEG_GTX_C_HRX_N7 <34> P2 E4
<15> DMI_CTX_PRX_N1 DMI_TX#[1] PEG_RX#[8] PEG_GTX_C_HRX_N6 VSS176 VSS249
<15> DMI_CTX_PRX_N2 F21 DMI_TX#[2] PEG_RX#[9] F35 PEG_GTX_C_HRX_N6 <34> N35 VSS177 VSS250 E3
D21 E34 PEG_GTX_C_HRX_N5 PEG_GTX_C_HRX_N5 <34> N34 E2
<15> DMI_CTX_PRX_N3 DMI_TX#[3] PEG_RX#[10] PEG_GTX_C_HRX_N4 VSS178 VSS251
PEG_RX#[11] E32 PEG_GTX_C_HRX_N4 <34> N33 VSS179 VSS252 E1
G22 D33 PEG_GTX_C_HRX_N3 PEG_GTX_C_HRX_N3 <34> N32 D35
<15> DMI_CTX_PRX_P0 DMI_TX[0] PEG_RX#[12] VSS180 VSS253
D22 D31 PEG_GTX_C_HRX_N2 PEG_GTX_C_HRX_N2 <34> N31 D32
<15> DMI_CTX_PRX_P1 DMI_TX[1] PEG_RX#[13] VSS181 VSS254
PCI EXPRESS* - GRAPHICS

F20 B33 PEG_GTX_C_HRX_N1 PEG_GTX_C_HRX_N1 <34> N30 D29
<15> DMI_CTX_PRX_P2 DMI_TX[2] PEG_RX#[14] PEG_GTX_C_HRX_N0 VSS182 VSS255
<15> DMI_CTX_PRX_P3 C21 DMI_TX[3] PEG_RX#[15] C32 PEG_GTX_C_HRX_N0 <34> N29 VSS183 VSS256 D26
N28 VSS184 VSS257 D20
PEG_RX[0] J33 N27 VSS185 VSS258 D17
PEG_RX[1] L35 N26 VSS186 VSS259 C34
PEG_RX[2] K34 M34 VSS187 VSS260 C31
FDI_CTX_PRX_N0 A21 H35 L33 C28
<15> FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI0_TX#[0] PEG_RX[3] VSS188 VSS261
<15> FDI_CTX_PRX_N1 H19 FDI0_TX#[1] PEG_RX[4] H32 L30 VSS189 VSS262 C27
FDI_CTX_PRX_N2 E19 G34 L27 C25
<15> FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI0_TX#[2] PEG_RX[5] VSS190 VSS263
F18 G31 L9 C23
<15>
<15>
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
B21
C20
FDI0_TX#[3]
FDI1_TX#[0] Intel(R) FDI PEG_RX[6]
PEG_RX[7] F33
F30 PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_P7 <34>
L8
L6
VSS191
VSS192
VSS264
VSS265 C10
C1
<15> FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI1_TX#[1] PEG_RX[8] PEG_GTX_C_HRX_P6 VSS193 VSS266
<15> FDI_CTX_PRX_N6 D18 FDI1_TX#[2] PEG_RX[9] E35 PEG_GTX_C_HRX_P6 <34> L5 VSS194 VSS267 B22
C FDI_CTX_PRX_N7 PEG_GTX_C_HRX_P5 C
E17 E33 L4 B19
<15> FDI_CTX_PRX_N7 FDI1_TX#[3] PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
F32
D34
PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_P3
PEG_GTX_C_HRX_P5
PEG_GTX_C_HRX_P4
PEG_GTX_C_HRX_P3
<34>
<34>
<34>
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
FDI_CTX_PRX_P0 A22 E31 PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_P2 <34> L1 B13
<15> FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI0_TX[0] PEG_RX[13] PEG_GTX_C_HRX_P1 VSS198 VSS271
<15> FDI_CTX_PRX_P1 G19 FDI0_TX[1] PEG_RX[14] C33 PEG_GTX_C_HRX_P1 <34> K35 VSS199 VSS272 B11
FDI_CTX_PRX_P2 E20 B32 PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_P0 <34> K32 B9
<15> FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI0_TX[2] PEG_RX[15] VSS200 VSS273
<15> FDI_CTX_PRX_P3 G18 FDI0_TX[3] K29 VSS201 VSS274 B8
FDI_CTX_PRX_P4 B20 M29 K26 B7
<15> FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI1_TX[0] PEG_TX#[0] VSS202 VSS275
<15> FDI_CTX_PRX_P5 C19 M32 J34 B5
FDI_CTX_PRX_P6 FDI1_TX[1] PEG_TX#[1] VSS203 VSS276
<15> FDI_CTX_PRX_P6 D19 M31 J31 B3
FDI_CTX_PRX_P7 FDI1_TX[2] PEG_TX#[2] VSS204 VSS277
<15> FDI_CTX_PRX_P7 F17 L32 H33 B2
FDI1_TX[3] PEG_TX#[3] VSS205 VSS278
L29 H30 A35
FDI_FSYNC0 PEG_TX#[4] VSS206 VSS279
<15> FDI_FSYNC0 J18 K31 H27 A32
FDI_FSYNC1 FDI0_FSYNC PEG_TX#[5] VSS207 VSS280
<15> FDI_FSYNC1 J17 K28 H24 A29
FDI1_FSYNC PEG_TX#[6] VSS208 VSS281
J30 H21 A26
FDI_INT PEG_TX#[7] PEG_HTX_GRX_N7 CC9 DIS@ 220nF_0402_16V7K VSS209 VSS282
<15> FDI_INT H20 J28 1 2 PEG_HTX_C_GRX_N7 <34> H18 A23
FDI_INT PEG_TX#[8] PEG_HTX_GRX_N6 CC10 DIS@ 220nF_0402_16V7K VSS210 VSS283
H29 1 2 PEG_HTX_C_GRX_N6 <34> H15 A20
FDI_LSYNC0 PEG_TX#[9] PEG_HTX_GRX_N5 CC11 DIS@ 220nF_0402_16V7K VSS211 VSS284
<15> FDI_LSYNC0 J19 G27 1 2 PEG_HTX_C_GRX_N5 <34> H13 A3
FDI_LSYNC1 FDI0_LSYNC PEG_TX#[10] PEG_HTX_GRX_N4 CC12 DIS@ 220nF_0402_16V7K VSS212 VSS285
<15> FDI_LSYNC1 H17 E29 1 2 PEG_HTX_C_GRX_N4 <34> H10
FDI1_LSYNC PEG_TX#[11] PEG_HTX_GRX_N3 CC13 DIS@ 220nF_0402_16V7K VSS213
F27 1 2 PEG_HTX_C_GRX_N3 <34> H9
PEG_TX#[12] PEG_HTX_GRX_N2 CC14 DIS@ 220nF_0402_16V7K VSS214
D28 1 2 PEG_HTX_C_GRX_N2 <34> H8
+VCCP PEG_TX#[13] PEG_HTX_GRX_N1 CC15 DIS@ 220nF_0402_16V7K VSS215
F26 1 2 PEG_HTX_C_GRX_N1 <34> H7
PEG_TX#[14] PEG_HTX_GRX_N0 CC16 DIS@ 220nF_0402_16V7K VSS216
E25 1 2 PEG_HTX_C_GRX_N0 <34> H6
+EDP_COM PEG_TX#[15] VSS217
1 2 A18 H5
RC36 24.9_0402_1% eDP_COMPIO VSS218
A17 M28 H4
eDP_ICOMPO PEG_TX[0] VSS219
2 1 B16 M33 H3
RC158 10K_0402_5% eDP_HPD PEG_TX[1] VSS220
M30 H2
PEG_TX[2] VSS221
@ L31 H1
PEG_TX[3] VSS222
C15 L28 G35
eDP_AUX PEG_TX[4] VSS223
D15 K30 G32
eDP_AUX# PEG_TX[5] VSS224
eDP
K27 G29
PEG_TX[6] VSS225
J29 G26
B PEG_TX[7] PEG_HTX_GRX_P7 CC25 DIS@ 220nF_0402_16V7K VSS226 B
C17 J27 1 2 PEG_HTX_C_GRX_P7 <34> G23
eDP_TX[0] PEG_TX[8] PEG_HTX_GRX_P6 CC26 DIS@ 220nF_0402_16V7K VSS227
F16 H28 1 2 PEG_HTX_C_GRX_P6 <34> G20
C16 G28 1 2 PEG_HTX_C_GRX_P5 <34> G17
G15 E28 1 2 PEG_HTX_C_GRX_P4 <34> G11
F28 1 2 PEG_HTX_C_GRX_P3 <34> F34
PEG_TX[12] PEG_HTX_GRX_P2 CC30 DIS@ 220nF_0402_16V7K VSS231
C18 D27 1 2 PEG_HTX_C_GRX_P2 <34> F31
eDP_TX#[0] PEG_TX[13] PEG_HTX_GRX_P1 CC31 DIS@ 220nF_0402_16V7K VSS232
E16 E26 1 2 PEG_HTX_C_GRX_P1 <34> F29
eDP_TX#[1] PEG_TX[14] PEG_HTX_GRX_P0 CC32 DIS@ 220nF_0402_16V7K VSS233
D16 D25 1 2 PEG_HTX_C_GRX_P0 <34>
eDP_TX#[2] PEG_TX[15]
F15
eDP_TX#[3]
Sandy Bridge_rPGA_Rev1p0
CONN@
CONN@
A A

PROCESSOR(1/6) DMI,FDI,PEG
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
+VCCP +VCCP
<15,24> PCH_PWROK +3V_PCH

JXDP1
1 2 +3VS
GND0 GND1
0.1U_0402_16V7K
XDP_PREQ#_R 3 4 <15> SYS_PWROK RC128
XDP_PRDY#_R OBSFN_A0 OBSFN_C0 +1.5V_CPU_VDDQ
5 OBSFN_A1 OBSFN_C1 6
1
7 8 @ 1
GND2 GND3
0_0402_5%
CC33
XDP_BPM#0 9 10 RC127 @ RC6
OBSDATA_A0 OBSDATA_C0
1
XDP_BPM#1 11 12 0_0402_1% 10K_0402_5%
OBSDATA_A1 OBSDATA_C1 @ RC8
13 GND4 GND5 14
XDP_BPM#2 15 16 2
200_0402_1%
2
1
XDP_BPM#3 17 18 UC1
19 20 1 5
2
GND6 GND7 B VCC
<8> CFG10
0_0402_5% 2 @ 1 RC13 CFG10_R 21
OBSFN_B0 OBSFN_D0
22 <15> PM_DRAM_PWRGD 1 @ 2D_PWG 2 A
D D
<8> CFG11
0_0402_5% 2 @ 1 RC15 CFG11_R 23
OBSFN_B1 OBSFN_D1
24 RC11 0_0402_1% 3
GND Y
4 VDDPWRGOOD
25 26
XDP_BPM#4 GND8 GND9
27 28 RC4 74AHC1G09GW TSSOP 5P RC8
XDP_BPM#5 OBSDATA_B0 OBSDATA_D0
29
OBSDATA_B1 OBSDATA_D1
30 +3V_PCH 1 2 CRB 1.1K
2
31 32 200_0402_1% CHECK LIST 0.7 --> 4.75K
XDP_BPM#6 GND10 GND11 RC19
33 34 INTEL recommand 1.1K
XDP_BPM#7 OBSDATA_B2 OBSDATA_D2 @
35 36 39_0402_1%
OBSDATA_B3 OBSDATA_D3 PDG 0.71 rev -->200
37 38
H_CPUPWRGD GND12 GND13
1K_0402_5% 1 @ 2 RC22 H_CPUPWRGD_XDP 39 40 CLK_CPU_ITP
CLK_CPU_ITP <14>
1
PWRGOOD/HOOK0 ITPCLK/HOOK4
<15,24> PBTN_OUT# 0_0402_5% 1 @ 2 RC23 CFD_PWRBTN#_XDP 41 42 CLK_CPU_ITP# CLK_CPU_ITP# <14>
HOOK1 ITPCLK#/HOOK5
43 44
VCC_OBS_AB VCC_OBS_CD
<8> CFG0
1K_0402_5% 1 @ 2 RC24 XDP_HOOK2 45 HOOK2 RESET#/HOOK6 46 XDP_RST#_R 1 @ 2 PLT_RST#
1
D
<15,50> VGATE 0_0402_1% 1 @ 2 RC26 SYS_PWROK_XDP 47 HOOK3 DBR#/HOOK7 48 XDP_DBRESET# RC25 1K_0402_5%
49 50 <10,27> RUN_ON_CPU1.5VS3# RUN_ON_CPU1.5VS3# 2 QC1
GND14 GND15 XDP_TDO RC28 1 @
<11,12,14,28,29,32> PCH_SMBDATA 51 SDA TD0 52 2 0_0402_5% PCH_JTAG_TDO <13> G SSM3K7002F_SC59-3
53 54 XDP_TRST#_R S
<11,12,14,28,29,32> PCH_SMBCLK
3
SCL TRST#
<13> PCH_JTAG_TCK 1 2 RC30 XDP_TCK1 55 TCK1 TDI 56 XDP_TDI RC31 1 @ 2 0_0402_5% PCH_JTAG_TDI <13> @
0_0402_5% @ XDP_TCK_R 57 58 XDP_TMS_R RC29 1 @ 2 0_0402_5%
TCK0 TMS PCH_JTAG_TMS <13>
59 GND16 GND17 60
The resistor SAMTE_BSH-030-01-L-D-A

for HOOK2 should be CONN@ +3VALW
+VCCP
placed such that the +3VALW +VCCP
0.1U_0402_16V7K
stub is very small
on CFG0 net 1
0.1U_0402_16V7K
0.1U_0402_16V7K
1
CC34
1 1
1
@ RC32
2
CC35
CC36
RC27 75_0402_5%
1K_0402_5%
2 2
2
UC2
2
C C
1 NC VCC 5
SYS_PWROK_XDP <16,24,28,32> PLT_RST# 2 RC33
A BUFO_CPU_RST#
3 4 1 2 BUF_CPU_RST#
GND Y 43_0402_1%
Place near JXDP1
SN74LVC1G07DCKR_SC70-5~D
0.1U_0402_16V7K
1
1 @
RC34
CC63
0_0402_5%
JCPU1B
2
2
A28 CLK_CPU_DMI_R RC37 1 @ 2 0_0402_1%
BCLK CLK_CPU_DMI <14>
MISC
CLOCKS
C26 A27 CLK_CPU_DMI#_R RC38 1 @ 2 0_0402_1%
<17> H_SNB_IVB# PROC_SELECT# BCLK# CLK_CPU_DMI# <14>
AN34
SKTOCC# CLK_CPU_DPLL_R RC39 1
DPLL_REF_CLK
A16 2 1K_0402_1%
+VCCP A15 CLK_CPU_DPLL#_R RC40 1 2 1K_0402_1% PU/PD for JTAG signals
DPLL_REF_CLK# +VCCP
+VCCP
PAD~D T1 @ H_CATERR# AL33
Remove DPLL Ref clock (for eDP only)
CATERR#
2
THERMAL
RC43 XDP_TMS_R 51_0402_5% 1 2 RC45
62_0402_5% AN33 R8 H_DRAMRST#
<17,24> H_PECI PECI SM_DRAMRST# H_DRAMRST# <7>
XDP_TDI_R 51_0402_5% 1 2 RC46
DDR3
MISC
1
RC41 XDP_PREQ# 51_0402_5% 1 @ 2 RC47

<24,44> H_PROCHOT# 1 2 H_PROCHOT#_R AL32
PROCHOT# SM_RCOMP[0]
AK1 SM_RCOMP0 140_0402_1%1 2 RC55
56_0402_1% A5 SM_RCOMP1 25.5_0402_1%1 2 RC58 XDP_TDO 51_0402_5% 1 2 RC48
B SM_RCOMP[1] SM_RCOMP2 200_0402_1%1 B
SM_RCOMP[2]
A4 2 RC60
H_THERMTRIP# AN32 DDR3 Compensation Signals
<17> H_THERMTRIP# THERMTRIP# XDP_TCK_R 51_0402_5% 1 2 RC52
XDP_TRST#_R 51_0402_5% 1 2 RC54
AP29 XDP_PRDY# RC1211 @ 2 0_0402_5% XDP_PRDY#_R

PRDY# XDP_PREQ# RC1221 @ XDP_PREQ#_R
AP27 2 0_0402_5%
PREQ#
AR26 XDP_TCK RC1231 @ 2 0_0402_1% XDP_TCK_R
TCK
PWR MANAGEMENT
@ AR27 XDP_TMS RC1241 @ 2 0_0402_1% XDP_TMS_R

JTAG & BPM
RC49 2 H_PM_SYNC_R TMS XDP_TRST# RC1251 @ XDP_TRST#_R

<15> H_PM_SYNC 1 AM34 AP30 2 0_0402_1%
0_0402_1% PM_SYNC TRST#
AR28 XDP_TDI_R RC50 1 @ 2 0_0402_1% XDP_TDI
TDI XDP_TDO_R
@ AP26 RC51 1 @ 2 0_0402_1% XDP_TDO
RC53 2 H_CPUPWRGD_R TDO +3VS
<17> H_CPUPWRGD 1 AP33
0_0402_1% UNCOREPWRGOOD
XDP_DBRESET# 1K_0402_5% 1 2 RC42
RC57 AL35 XDP_DBRESET#_R 1 @ XDP_DBRESET#
2 0_0402_1% XDP_DBRESET# <15>
VDDPWRGOOD 1 DBR#
2 VDDPWRGOOD_R V8 RC56
130_0402_1%~D SM_DRAMPWROK
AT28 XDP_BPM#0_R RC59 1 @ 2 0_0402_5% XDP_BPM#0 H_CPUPWRGD_R 10K_0402_5%1 2 RC44
BPM#[0] XDP_BPM#1_R RC61 @ 0_0402_5% XDP_BPM#1
AR29 1 2
AR30 1 2
BUF_CPU_RST# BPM#[2] XDP_BPM#3_R RC63 @ 0_0402_5% XDP_BPM#3
AR33 AT30 1 2
RESET# BPM#[3] XDP_BPM#4_R RC64 @ 0_0402_5% XDP_BPM#4
AP32 1 2
AR31 1 2
AT31 1 2
AR32 1 2
BPM#[7]
CC64 XDP_BPM#4 RC68 1 @ 2 0_0402_5%
A XDP_BPM#5 CFG12 <8> A
RC69 1 @ 2 0_0402_5%
H_CPUPWRGD_R XDP_BPM#6 CFG13 <8>
1 2 RC70 1 @ 2 0_0402_5%
XDP_BPM#7 CFG14 <8>
@ Sandy Bridge_rPGA_Rev1p0 RC71 1 @ 2 0_0402_5%
CFG15 <8>
CONN@
10P_0402_50V8J

PROCESSOR(2/6) PM,XDP,CLK
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
JCPU1C
JCPU1D
AB6 M_CLK_DDR0
<11> DDR_A_D[0..63] SA_CLK[0] M_CLK_DDR0 <11>
AA6 M_CLK_DDR#0
SA_CLK#[0] M_CLK_DDR#0 <11>
D DDR_A_D0 C5 V9 DDR_CKE0_DIMMA AE2 M_CLK_DDR2 D
SA_DQ[0] SA_CKE[0] DDR_CKE0_DIMMA <11> <12> DDR_B_D[0..63] SB_CLK[0] M_CLK_DDR2 <12>
DDR_A_D1 D5 AD2 M_CLK_DDR#2
SA_DQ[1] SB_CLK#[0] M_CLK_DDR#2 <12>
DDR_A_D2 D3 DDR_B_D0 C9 R9 DDR_CKE2_DIMMB
SA_DQ[2] SB_DQ[0] SB_CKE[0] DDR_CKE2_DIMMB <12>
DDR_A_D3 D2 DDR_B_D1 A7
DDR_A_D4 SA_DQ[3] M_CLK_DDR1 DDR_B_D2 SB_DQ[1]
D6 AA5 M_CLK_DDR1 <11> D10
DDR_A_D5 SA_DQ[4] SA_CLK[1] M_CLK_DDR#1 DDR_B_D3 SB_DQ[2]
C6 AB5 M_CLK_DDR#1 <11> C8
DDR_A_D6 SA_DQ[5] SA_CLK#[1] DDR_CKE1_DIMMA DDR_B_D4 SB_DQ[3] M_CLK_DDR3
C2 V10 DDR_CKE1_DIMMA <11> A9 AE1 M_CLK_DDR3 <12>
DDR_A_D7 SA_DQ[6] SA_CKE[1] DDR_B_D5 SB_DQ[4] SB_CLK[1] M_CLK_DDR#3
C3 A8 AD1 M_CLK_DDR#3 <12>
DDR_A_D8 SA_DQ[7] DDR_B_D6 SB_DQ[5] SB_CLK#[1] DDR_CKE3_DIMMB
F10 D9 R10 DDR_CKE3_DIMMB <12>
DDR_A_D9 SA_DQ[8] DDR_B_D7 SB_DQ[6] SB_CKE[1]
F8 D8
DDR_A_D10 SA_DQ[9] DDR_B_D8 SB_DQ[7]
G10 AB4 G4
DDR_A_D11 SA_DQ[10] RSVD_TP[1] DDR_B_D9 SB_DQ[8]
G9 AA4 F4
F9 SA_DQ[12] RSVD_TP[3] W9 F1 SB_DQ[10] RSVD_TP[11] AB2
DDR_A_D13 F7 DDR_B_D11 G1 AA2
DDR_A_D14 SA_DQ[13] DDR_B_D12 SB_DQ[11] RSVD_TP[12]
G8 SA_DQ[14] G5 SB_DQ[12] RSVD_TP[13] T9
DDR_A_D15 G7 DDR_B_D13 F5
K4 SA_DQ[16] RSVD_TP[4] AB3 F2 SB_DQ[14]
DDR_A_D17 K5 AA3 DDR_B_D15 G2
K1 SA_DQ[18] RSVD_TP[6] W10 J7 SB_DQ[16] RSVD_TP[14] AA1
DDR_A_D19 J1 DDR_B_D17 J8 AB1
J5 SA_DQ[20] K10 SB_DQ[18] RSVD_TP[16] T10
DDR_A_D21 J4 DDR_B_D19 K9
DDR_A_D22 SA_DQ[21] DDR_CS0_DIMMA# DDR_B_D20 SB_DQ[19]
J2 SA_DQ[22] SA_CS#[0] AK3 DDR_CS0_DIMMA# <11> J9 SB_DQ[20]
DDR_A_D23 K2 AL3 DDR_CS1_DIMMA# DDR_B_D21 J10
SA_DQ[23] SA_CS#[1] DDR_CS1_DIMMA# <11> SB_DQ[21]
DDR_A_D24 M8 AG1 DDR_B_D22 K8 AD3 DDR_CS2_DIMMB#
SA_DQ[24] RSVD_TP[7] SB_DQ[22] SB_CS#[0] DDR_CS2_DIMMB# <12>
DDR_A_D25 N10 AH1 DDR_B_D23 K7 AE3 DDR_CS3_DIMMB#
SA_DQ[25] RSVD_TP[8] SB_DQ[23] SB_CS#[1] DDR_CS3_DIMMB# <12>
DDR_A_D26 N8 DDR_B_D24 M5 AD6
N7 SA_DQ[27] N4 SB_DQ[25] RSVD_TP[18] AE6
DDR_A_D28 M10 DDR_B_D26 N2
DDR_A_D29 SA_DQ[28] M_ODT0 DDR_B_D27 SB_DQ[26]
M9 SA_DQ[29] SA_ODT[0] AH3 M_ODT0 <11> N1 SB_DQ[27]
DDR_A_D30 N9 AG3 M_ODT1 DDR_B_D28 M4
SA_DQ[30] SA_ODT[1] M_ODT1 <11> SB_DQ[28]
DDR SYSTEM MEMORY A
DDR_A_D31 M7 AG2 DDR_B_D29 N5 AE4 M_ODT2

SA_DQ[31] RSVD_TP[9] SB_DQ[29] SB_ODT[0] M_ODT2 <12>
DDR_A_D32 AG6 AH2 DDR_B_D30 M2 AD4 M_ODT3
DDR SYSTEM MEMORY B

SA_DQ[32] RSVD_TP[10] SB_DQ[30] SB_ODT[1] M_ODT3 <12>
DDR_A_D33 AG5 DDR_B_D31 M1 AD5
C
AK6 SA_DQ[34] AM5 SB_DQ[32] RSVD_TP[20] AE5 C
DDR_A_D35 AK5 DDR_B_D33 AM6
AH5 SA_DQ[36] DDR_A_DQS#[0..7] <11> AR3 SB_DQ[34]
DDR_A_D37 AH6 C4 DDR_A_DQS#0 DDR_B_D35 AP3
DDR_A_D38 SA_DQ[37] SA_DQS#[0] DDR_A_DQS#1 DDR_B_D36 SB_DQ[35]
AJ5 SA_DQ[38] SA_DQS#[1] G6 AN3 SB_DQ[36] DDR_B_DQS#[0..7] <12>
DDR_A_D39 AJ6 J3 DDR_A_DQS#2 DDR_B_D37 AN2 D7 DDR_B_DQS#0
DDR_A_D40 SA_DQ[39] SA_DQS#[2] DDR_A_DQS#3 DDR_B_D38 SB_DQ[37] SB_DQS#[0] DDR_B_DQS#1
AJ8 SA_DQ[40] SA_DQS#[3] M6 AN1 SB_DQ[38] SB_DQS#[1] F3
DDR_A_D41 AK8 AL6 DDR_A_DQS#4 DDR_B_D39 AP2 K6 DDR_B_DQS#2
AJ9 AM8 AP5 N3
AK9 AR12 AN9 AN5
AH8 AM15 AT5 AP9
DDR_A_D45 SA_DQ[44] SA_DQS#[7] DDR_B_D43 SB_DQ[42] SB_DQS#[5] DDR_B_DQS#6
AH9 AT6 AK12
DDR_A_D46 SA_DQ[45] DDR_B_D44 SB_DQ[43] SB_DQS#[6] DDR_B_DQS#7
AL9 AP6 AP15
DDR_A_D47 SA_DQ[46] DDR_B_D45 SB_DQ[44] SB_DQS#[7]
AL8 AN8
AP11 DDR_A_DQS[0..7] <11> AR6
DDR_A_D49 SA_DQ[48] DDR_A_DQS0 DDR_B_D47 SB_DQ[46]
AN11 D4 AR5
DDR_A_D50 SA_DQ[49] SA_DQS[0] DDR_A_DQS1 DDR_B_D48 SB_DQ[47]
AL12 F6 AR9 DDR_B_DQS[0..7] <12>
DDR_A_D51 SA_DQ[50] SA_DQS[1] DDR_A_DQS2 DDR_B_D49 SB_DQ[48] DDR_B_DQS0
AM12 K3 AJ11 C7
DDR_A_D52 SA_DQ[51] SA_DQS[2] DDR_A_DQS3 DDR_B_D50 SB_DQ[49] SB_DQS[0] DDR_B_DQS1
AM11 N6 AT8 G3
AL11 AL5 AT9 J6
AP12 AM9 AH11 M3
AN12 AR11 AR8 AN6
AJ14 AM14 AJ12 AP8
DDR_A_D57 SA_DQ[56] SA_DQS[7] DDR_B_D55 SB_DQ[54] SB_DQS[5] DDR_B_DQS6
AH14 AH12 AK11
DDR_A_D58 SA_DQ[57] DDR_B_D56 SB_DQ[55] SB_DQS[6] DDR_B_DQS7
AL15 AT11 AP14
DDR_A_D59 SA_DQ[58] DDR_B_D57 SB_DQ[56] SB_DQS[7]
AK15 AN14
AL14 DDR_A_MA[0..15] <11> AR14
DDR_A_D61 SA_DQ[60] DDR_A_MA0 DDR_B_D59 SB_DQ[58]
AK14 AD10 AT14
DDR_A_D62 SA_DQ[61] SA_MA[0] DDR_A_MA1 DDR_B_D60 SB_DQ[59]
AJ15 W1 AT12 DDR_B_MA[0..15] <12>
DDR_A_D63 SA_DQ[62] SA_MA[1] DDR_A_MA2 DDR_B_D61 SB_DQ[60] DDR_B_MA0
AH15 W2 AN15 AA8
SA_DQ[63] SA_MA[2] DDR_A_MA3 DDR_B_D62 SB_DQ[61] SB_MA[0] DDR_B_MA1
W7 AR15 T7
SA_MA[3] DDR_A_MA4 DDR_B_D63 SB_DQ[62] SB_MA[1] DDR_B_MA2
V3 AT15 R7
SA_MA[4] DDR_A_MA5 SB_DQ[63] SB_MA[2] DDR_B_MA3
V2 T6
SA_MA[5] DDR_A_MA6 SB_MA[3] DDR_B_MA4
W3 T2
<11> DDR_A_BS0 AE10 W6 T4
SA_BS[0] SA_MA[7] DDR_A_MA8 SB_MA[5] DDR_B_MA6
B
<11> DDR_A_BS1 AF10 V1 T3 B
SA_BS[1] SA_MA[8] DDR_A_MA9 SB_MA[6] DDR_B_MA7
<11> DDR_A_BS2 V6 W5 <12> DDR_B_BS0 AA9 R2
SA_BS[2] SA_MA[9] DDR_A_MA10 SB_BS[0] SB_MA[7] DDR_B_MA8
AD8 <12> DDR_B_BS1 AA7 T5
SA_MA[10] DDR_A_MA11 SB_BS[1] SB_MA[8] DDR_B_MA9
V4 <12> DDR_B_BS2 R6 R3
SA_MA[11] DDR_A_MA12 SB_BS[2] SB_MA[9] DDR_B_MA10
W4 AB7
<11> DDR_A_CAS# AE8 AF8 R1
SA_CAS# SA_MA[13] DDR_A_MA14 SB_MA[11] DDR_B_MA12
<11> DDR_A_RAS# AD9 V5 T1
SA_RAS# SA_MA[14] DDR_A_MA15 SB_MA[12] DDR_B_MA13
<11> DDR_A_WE# AF9 V7 <12> DDR_B_CAS# AA10 AB10
SA_WE# SA_MA[15] SB_CAS# SB_MA[13] DDR_B_MA14
<12> DDR_B_RAS# AB8 R5
SB_RAS# SB_MA[14] DDR_B_MA15
<12> DDR_B_WE# AB9 R4
SB_WE# SB_MA[15]
CONN@
CONN@
+1.5V
1
1 @ 2 RC75
RC74 0_0402_5% 1K_0402_5%
QC2
BSS138_SOT23
2
S
<6> H_DRAMRST# H_DRAMRST# 3 1 DDR3_DRAMRST#_R 1 2 DDR3_DRAMRST# <11,12>

RC76 1K_0402_5%
G
2
1
RC77 1 @ 2 DRAMRST_CNTRL_PCH <14>

4.99K_0402_1% RC72 0_0402_1%
A A
DRAMRST_CNTRL
DRAMRST_CNTRL <11>
2
1
CC37
.047U_0402_16V7K
2 Security Classification Compal Secret Data Compal Electronics, Inc.
PROCESSOR(3/6) DDRIII
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
CFG Straps for Processor

D D
CFG2
1
JCPU1E RC78
1K_0402_1%
L7 @ T2 PAD~D
2
RSVD28 @ T3 PAD~D
AG7
CFG0 RSVD29 @ T4 PAD~D
<6> CFG0 AK28 AE7
PAD~D T85 @ CFG1 CFG[0] RSVD30 @ T5 PAD~D
AK29 AK2
CFG2 CFG[1] RSVD31 @ T6 PAD~D
AL26 W8
PAD~D T86 @ CFG3 CFG[2] RSVD32
AL27 CFG[3]
CFG4 AK26
CFG5 CFG[4] @ T7 PAD~D
AL29 CFG[5] RSVD33 AT26 PEG Static Lane Reversal - CFG2 is for the 16x
CFG6 AL30 AM33 @ T8 PAD~D
CFG7 CFG[6] RSVD34 @ T9 PAD~D
AM31 CFG[7] RSVD35 AJ27
PAD~D T87 @ CFG8 AM32 1:(Default) Normal Operation; Lane #
PAD~D T88 @ CFG9 CFG[8]
AM30 CFG[9] CFG2 definition matches socket pin map definition
<6> CFG10 CFG10 AM28
+VCC_GFXCORE_AXG CFG11 CFG[10]
<6> CFG11 AM26 CFG[11]
+VCC_CORE <6> CFG12 CFG12
CFG13
AN28
AN31
CFG[12]
T8 @ T10 PAD~D
*0:Lane Reversed
<6> CFG13 CFG[13] RSVD37
<6> CFG14 CFG14 AN26 J16 @ T11 PAD~D
CFG[14] RSVD38
2
@ <6> CFG15 CFG15 AM27 H16 @ T12 PAD~D CFG4

RC79 PAD~D T89 @ CFG16 CFG[15] RSVD39 @ T13 PAD~D
AK31 CFG[16] RSVD40 G16
1
50_0402_1% PAD~D T90 @ CFG17 AN29 CFG[17]
2
@ @ RC81
RC80 1K_0402_1%
1
50_0402_1%
AR35 @ T14 PAD~D
2
VCC_AXG_VAL_SENSE RSVD41 @ T15 PAD~D
AJ31 AT34
1
VSS_AXG_VAL_SENSE VAXG_VAL_SENSE RSVD42 @ T16 PAD~D

AH31 VSSAXG_VAL_SENSE RSVD43 AT33
VCC_VAL_SENSE AJ33 AP35 @ T17 PAD~D
VSS_VAL_SENSE VCC_VAL_SENSE RSVD44 @ T18 PAD~D
C
AH33 VSS_VAL_SENSE RSVD45 AR34 C
PAD~D T19 @ AJ26 Display Port Presence Strap

+SA_DIMM_VREFDQ RSVD5
RESERVED
+SB_DIMM_VREFDQ @ T20 PAD~D
+SA_DIMM_VREFDQ B4
RSVD46 B34
A33 @ T21 PAD~D CFG4
* 1 : Disabled; No Physical Display Port
+SB_DIMM_VREFDQ D1
RSVD6 RSVD47
A34 @ T22 PAD~D attached to Embedded Display Port
RSVD7 RSVD48 @ T23 PAD~D
B35
RSVD49 @ T24 PAD~D
RSVD50
C35 0 : Enabled; An external Display Port device is
1
@ @ PAD~D T25 @ F25

connected to the Embedded Display Port
RC84 RC85 PAD~D T26 @ RSVD8
F24
1K_0402_1% 1K_0402_1% PAD~D T27 @ RSVD9
F23
PAD~D T28 @ RSVD10 @ T29 PAD~D
D24 AJ32
2
PAD~D T30 @ RSVD11 RSVD51 @ T31 PAD~D CFG6

G25 AK32
PAD~D T32 @ RSVD12 RSVD52
G24
PAD~D T33 @ RSVD13 CFG5
E23
PAD~D T34 @ RSVD14
D23
RSVD15
1
PAD~D T35 @ C30 AH27 @ T36 PAD~D
PAD~D T37 @ RSVD16 VCC_DIE_SENSE RC87 @ RC86
A31
PAD~D T38 @ RSVD17 1K_0402_1% 1K_0402_1%
B30
PAD~D T39 @ RSVD18
B29
PAD~D T40 @ RSVD19
D30 AN35 CLK_RES_ITP <14>
2
B31 AM35 CLK_RES_ITP# <14>
A30
PAD~D T43 @ RSVD22
C29
RSVD23
PAD~D T44 @ J20

RC159 RSVD24
PAD~D T45 @ B18 AT2 @ T46 PAD~D
H_VCCP_SEL RSVD25 RSVD56 @ T47 PAD~D
+3VS 2 1 A19 AT1
VCCIO_SEL RSVD57 @ T48 PAD~D
RSVD58
AR1 PCIE Port Bifurcation Straps
10K_0402_5% PAD~D T49 @
B J15 B
RSVD27
11: (Default) x16 - Device 1 functions 1 and 2 disabled
@ T50 PAD~D CFG[6:5]
KEY
B1 *10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CONN@
CFG7
1
@ RC89
1K_0402_1%
2
VSS_AXG_VAL_SENSE
VSS_VAL_SENSE PEG DEFER TRAINING

2
@ @
RC90 RC91 CFG7
*1: (Default) PEG Train immediately
50_0402_1% 50_0402_1%
following xxRESETB de assertion
0: PEG Wait for BIOS for training

1
A A
INTEL 12/28 recommand

to add RC120, RC121, RC122, RC123
Please place as close as JCPU1
PROCESSOR(4/6) RSVD,CFG
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
JCPU1F POWER
QC=94A
+VCC_CORE +VCCP
DC=53A
AG35
8.5A
VCC1
D AG34 AH13 D
VCC2 VCCIO1
AG33 AH10
VCC3 VCCIO2
AG32 AG10
VCC4 VCCIO3
AG31 AC10
VCC5 VCCIO4
AG30 Y10
VCC6 VCCIO5
AG29 U10
VCC7 VCCIO6
AG28 P10
VCC8 VCCIO7
AG27 L10
VCC9 VCCIO8
AG26 J14
VCC10 VCCIO9
AF35 J13
VCC11 VCCIO10
AF34 J12
VCC12 VCCIO11
AF33 J11
VCC13 VCCIO12
AF32 VCC14 VCCIO13 H14
AF29 VCC17 VCCIO16 G14
PEG AND DDR

AF26 VCC20 VCCIO19 F14
AD35 VCC21 VCCIO20 F13
AD32 VCC24 VCCIO23 E14
AD30 VCC26
AD28 VCC28 VCCIO26 D14
AC35 VCC31 VCCIO29 D11
AC34 VCC32 VCCIO30 C14
C
AC30 VCC36 VCCIO34 B14 C
AC29 VCC37 VCCIO35 B12
AC28 VCC38 VCCIO36 A14
AA35 VCC41 VCCIO39 A11
AA34 VCC42
AA33 VCC43 VCCIO40 J23
AA32
VCC44
AA31
VCC45
AA30
VCC46
AA29
VCC47
AA28
VCC48
AA27
VCC49 +VCCP
AA26
VCC50
CORE SUPPLY
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
1
Y30
VCC56 RC95 RC93
Y29
VCC57 Place the PU
Y28
VCC58 RC95 close to CPU 75_0402_5%
resistors close to CPU
Y27 130_0402_1%~D
VCC59
Y26
2
VCC60
V35
SVID
VCC61 H_CPU_SVIDALRT# RC94 1
V34 AJ29 2 43_0402_1% VR_SVID_ALRT# <50>
VCC62 VIDALERT# RC92 1 @
V33 AJ30 H_CPU_SVIDCLK 2 0_0402_1% VR_SVID_CLK <50>
VCC63 VIDSCLK H_CPU_SVIDDAT RC96 1 @
V32 AJ28 2 0_0402_1% VR_SVID_DAT <50>
VCC64 VIDSOUT
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
B U35 B
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80 +VCC_CORE
R35
VCC81
R34
VCC82
R33
VCC83
1
R32
VCC84 RC97
R31
VCC85
R30 100_0402_1%
VCC86
R29
VCC87
SENSE LINES
R28
2
VCC88
R27 AJ35 VCCSENSE_R RC98 1 @ 2 0_0402_1% VCCSENSE <50>
VCC89 VCC_SENSE
R26 AJ34 VSSSENSE_R RC99 1 @ 2 0_0402_1% VSSSENSE <50>
VCC90 VSS_SENSE
P35
VCC91
P34
VCC92
1
P33
VCC93 +VCCP RC100
P32 B10
VCC94 VCCIO_SENSE
P31 A10 100_0402_1%
VCC95 VSSIO_SENSE
P30
VCC96 RC108
P29
2
VCC97
P28 2 1
VCC98
1
P27 10_0402_1%
VCC99
P26
VCC100 RC111
VCCIO_SENSE <47>
10_0402_1%
2
A A
CONN@

PROCESSOR(5/6) PWR,BYPASS
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
+1.5V_CPU_VDDQ Source
+1.5V QC3 +1.5V_CPU_VDDQ
+3VALW B+_BIAS AO4728L_SO8~D
8 1
7 2
20K_0402_5%
6 3 1
10U_0805_10V6K
5
CC38
RC103
RC101
RC102 100K_0402_5%
4
100K_0402_5% 2
2
RUN_ON_CPU1.5VS3 JCPU1H
0.1U_0603_50V_X7R
AT35 AJ22
VSS1 VSS81
330K_0402_1%
QC5B 1 AT32 AJ19
RUN_ON_CPU1.5VS3# VSS2 VSS82
D 5 AT29 AJ16 D
VSS3 VSS83
CC39
RC105
AT27 AJ13
2N7002DW-7-F_SOT363-6 VSS4 VSS84
AT25 AJ10
4
2 VSS5 VSS85
AT22 AJ7
2
VSS6 VSS86
6
AT19 AJ4
QC5A VSS7 VSS87
AT16 AJ3
@ RC104 2N7002DW-7-F_SOT363-6 VSS8 VSS88
AT13 AJ2
VSS9 VSS89
<24,27,28,46,47,48> SUSP# 1 2 2 AT10 AJ1
0_0402_5% VSS10 VSS90
AT7 AH35
RC107 +VCC_GFXCORE_AXG VSS11 VSS91
AT4 AH34
1
VSS12 VSS92
<24> CPU1.5V_S3_GATE 1 2 RUN_ON_CPU1.5VS3# <6,27> AT3 AH32
0_0402_5% VSS13 VSS93
AR25 AH30
VSS14 VSS94
1 RC113 AR22 AH29
@ VSS15 VSS95
AR19 AH28
CC40 VSS16 VSS96
1 2 AR16 AH26
0.1U_0402_10V7K~D 10_0402_1% VSS17 VSS97
AR13 AH25
2 VSS18 VSS98
AR10 AH22
VCC_AXG_SENSE VSS19 VSS99
VCC_AXG_SENSE <50> AR7 AH19
VSS20 VSS100
AR4 AH16
VSS21 VSS101
AR2 AH7
RC157 VSS22 VSS102
1 2 100_0402_1% AP34 AH4
+VCC_GFXCORE_AXG JCPU1G
POWER VSS_AXG_SENSE
@ AP31
AP28
AP25
VSS23
VSS24
VSS25
VSS103
VSS104
VSS105
AG9
AG8
AG4
VSS_AXG_SENSE <50> VSS26 VSS106
AP22 AF6
VSS27 VSS107
33A AT24 AP19 AF5
SENSE
LINES
RC114 VSS28 VSS108
AK35 +1.5V_CPU_VDDQ AP16 AF3
VAXG1 VAXG_SENSE VSS29 VSS109
AT23 AK34 1 2 AP13 AF2
VAXG2 VSSAXG_SENSE +1.5V VSS30 VSS110
AT21 AP10 AE35
VAXG3 10_0402_1% VSS31 VSS111
AT20 AP7 AE34
VAXG4 VSS32 VSS112
AT18 1 2 AP4 AE33
VAXG5 RC129 1K_0402_5% VSS33 VSS113
AT17 AP1 AE32
VAXG6 VSS34 VSS114
1
AR24 AN30 AE31
VAXG7 @ VSS35 VSS115
AR23 1 2 AN27 AE30
VAXG8 1K_0402_5% VSS36 VSS116
AR21 +V_SM_VREF should @ RC106 0_0402_5% AN25 AE29
AR20
VAXG9
have 10 mil trace width RC112 AN22
VSS37
VSS VSS117
AE28
VREF
VAXG10 VSS38 VSS118
AR18 AN19 AE27
2
VAXG11 VSS39 VSS119
AR17 AN16 AE26
VAXG12 +V_SM_VREF_CNT +V_SM_VREF VSS40 VSS120
AP24 AL1 3 1 AN13 AE9
VAXG13 SM_VREF VSS41 VSS121
AP23 AN10 AD7
VAXG14 VSS42 VSS122
1
AP21 @ AN7 AC9
VAXG15 VSS43 VSS123
1
C AP20 AN4 AC8 C
VAXG16 RC126 QC4 @ 1K_0402_5% VSS44 VSS124
AP18 AM29 AC6
VAXG17 2 NTR4503NT1G_SOT23-3~D RC116 VSS45 VSS125
AP17 AM25 AC5
VAXG18 1K_0402_5% VSS46 VSS126
AN24 AM22 AC3
2
VAXG19 RUN_ON_CPU1.5VS3 VSS47 VSS127
AN23 AM19 AC2
2
VAXG20 VSS48 VSS128
AN21
AN20
VAXG21 5A AM16
AM13
VSS49 VSS129
AB35
AB34
DDR3 -1.5V RAILS
VAXG22 +1.5V_CPU_VDDQ @ VSS50 VSS130
AN18 AM10 AB33
VAXG23 JP10 VSS51 VSS131
AN17 AM7 AB32
GRAPHICS
VAXG24 VSS52 VSS132

AM24 AF7 1 2 +1.5V AM4 AB31
VAXG25 VDDQ1 VSS53 VSS133
AM23 AF4 AM3 AB30
VAXG26 VDDQ2 PAD-OPEN 4x4m VSS54 VSS134
AM21 AF1 AM2 AB29
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
AM20
VAXG28 VDDQ4
AC7 1 1 1 1 1 1 1 J8 OPEN AM1
VSS56 VSS136
AB28
AM18 AC4 AL34 AB27
CC41
CC42
CC43
CC44
CC45
CC46
AM17 AC1 + CC47 AL31 AB26
VAXG30 VDDQ6 330U_D2_2VM_R6M~D VSS58 VSS138
AL24 Y7 AL28 Y9
VAXG31 VDDQ7 2 2 2 2 2 2 VSS59 VSS139
AL23 Y4 AL25 Y8
VAXG32 VDDQ8 2 VSS60 VSS140
AL21 Y1 AL22 Y6
AL20 U7 AL19 Y5
AL18 U4 AL16 Y3
AL17 U1 AL13 Y2
AK24 P7 AL10 W35
AK23 P4 AL7 W34
AK21 P1 AL4 W33
AK20 AL2 W32
VAXG40 VSS68 VSS148
AK18 AK33 W31
VAXG41 VSS69 VSS149
AK17 AK30 W30
VAXG42 VSS70 VSS150
AJ24 AK27 W29
VAXG43 VSS71 VSS151
AJ23 AK25 W28
VAXG44 VSS72 VSS152
AJ21 AK22 W27
VAXG45 VSS73 VSS153
AJ20 +VCCSA AK19 W26
VAXG46 VSS74 VSS154
AJ18 AK16 U9
VAXG47 VSS75 VSS155
AJ17 1 AK13 U8
VAXG48 VSS76 VSS156
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0805_4VAM~D
10U_0603_6.3V6M
AH24 1 1 1 1 @ AK10 U6
SA RAIL
VAXG49 + CC48 VSS77 VSS157

AH23
VAXG50 6A AK7
VSS78 VSS158
U5
CC49
CC50
CC51
CC52
AH21 M27 330U_D2_2VM_R6M~D AK4 U3
VAXG51 VCCSA1 VSS79 VSS159
AH20 M26 AJ25 U2
VAXG52 VCCSA2 2 2 2 2 2 VSS80 VSS160
AH18 L26
VAXG53 VCCSA3
AH17 J26
VAXG54 VCCSA4
J25
VCCSA5
J24
B VCCSA6 Sandy Bridge_rPGA_Rev1p0 B
H26
VCCSA7 CONN@
H25
+1.8VS VCCSA8
1.8V RAIL
1.2A
RC109 1 @ 2 0_0805_1% +1.8VS_VCCPLL B6 H23 +1.5V_CPU_VDDQ +1.5V
VCCSA_SENSE <49>
MISC
VCCPLL1 VCCSA_SENSE
A6
VCCPLL2
10U_0805_4VAM~D
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0805_4VAM~D
10U_0805_4VAM~D
1 1 1 1 @ 1 @ A2
VCCPLL3 CC53 2 1 0.1U_0402_10V7K~D
CC54
CC55
CC56
CC61
CC62
330U_D2_2.5VM_R6M~D
1 C22 VCCSA_VID0 <49>

FC_C22
C24 VCCSA_VID1 <49>
2 2 2 2 2 VCCSA_VID1
CC57
+ CC58 2 1 0.1U_0402_10V7K~D
1
@ RC110
2 Sandy Bridge_rPGA_Rev1p0 CC59 2 1 0.1U_0402_10V7K~D
0_0402_5%
CONN@
2
CC60 2 1 0.1U_0402_10V7K~D
add CC181 , CC182, 4 caps are all pop.

follow checklist 1.0 5/24
A A

PROCESSOR(6/6) PWR,VSS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number Rev
1.0
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
JDIMM1
+V_DDR_REFA 1 2
<7> DDR_A_DQS#[0..7] +1.5V +V_DDR_REFA VREF_DQ VSS1
3 4 DDR_A_D4
VSS2 DQ4
2.2U_0603_6.3V6K
0.1U_0402_16V7K
DDR_A_D0 5 6 DDR_A_D5
<7> DDR_A_DQS[0..7] DQ0 DQ5
1
DDR_A_D1 7 8
RD1 DQ1 VSS3 DDR_A_DQS#0
<7> DDR_A_D[0..63] 1 1 9 VSS4 DQS#0 10
1K_0402_1% 11 12 DDR_A_DQS0
DM0 DQS0
CD1
CD2
<7> DDR_A_MA[0..15] 13 VSS5 VSS6 14
+V_DDR_REFA DDR_A_D2 15 16 DDR_A_D6
2
2 2 DDR_A_D3 DQ2 DQ6 DDR_A_D7
17 DQ3 DQ7 18
19 20
DDR_A_D8 VSS7 VSS8 DDR_A_D12
21 22
DQ8 DQ12
1
D DQ9 DQ13 D
25 26
RD3 DDR_A_DQS#1 VSS9 VSS10
27 28
1K_0402_1% DDR_A_DQS1 DQS#1 DM1 DDR3_DRAMRST#
29 30 DDR3_DRAMRST# <7,12>
DQS1 RESET#
31 32
2
33 34
DDR_A_D11 DQ10 DQ14 DDR_A_D15
35 36
DQ11 DQ15
37 38
39 40
41 42
DQ17 DQ21
43 44
DDR_A_DQS#2 VSS15 VSS16
45 46
DDR_A_DQS2 DQS#2 DM2
47 DQS2 VSS17 48
Layout Note: All VREF traces should 49 50 DDR_A_D22
DDR_A_D18 VSS18 DQ22 DDR_A_D23
Place near JDIMM1 have 10 mil trace width 51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS19 DDR_A_D28
55 VSS20 DQ28 56
DDR_A_D25 DQ24 DQ29
59 DQ25 VSS21 60
61 62 DDR_A_DQS#3
VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
+1.5V 65 66
67 DQ26 DQ30 68
DQ27 DQ31
71 VSS25 VSS26 72
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1
CD3
CD4
CD5
CD6
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
<7> DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA <7>
75 VDD1 VDD2 76
2 2 2 2 DDR_A_MA15
77 NC1 A15 78
<7> DDR_A_BS2 DDR_A_BS2 79 80 DDR_A_MA14
BA2 A14
81 VDD3 VDD4 82
C DDR_A_MA12 DDR_A_MA11 C
83 A12/BC# A11 84
DDR_A_MA9 85 86 DDR_A_MA7
A9 A7
87 VDD5 VDD6 88
DDR_A_MA8 89 90 DDR_A_MA6
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD7 VDD8 94
+1.5V DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
97 98
A1 A0
99 100
M_CLK_DDR0 VDD9 VDD10 M_CLK_DDR1
<7> M_CLK_DDR0 101 102 M_CLK_DDR1 <7>
CK0 CK1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
M_CLK_DDR#0 103 104 M_CLK_DDR#1

<7> M_CLK_DDR#0 CK0# CK1# M_CLK_DDR#1 <7> +1.5V
105 106
VDD11 VDD12
330U_SX_2VY~D
@ 1 DDR_A_MA10 107 108 DDR_A_BS1

A10/AP BA1 DDR_A_BS1 <7>
1 1 1 1 1 1 1 <7> DDR_A_BS0 DDR_A_BS0 109 110 DDR_A_RAS# DDR_A_RAS# <7>
BA0 RAS#
CD7
CD8
CD9
CD10
CD11
CD12
CD13
CD14
+ 111 112
VDD13 VDD14
1
DDR_A_WE# 113 114 DDR_CS0_DIMMA#
<7> DDR_A_WE# WE# S0# DDR_CS0_DIMMA# <7>
DDR_A_CAS# 115 116 M_ODT0 RD4
2 2 2 2 2 2 2 2 <7> DDR_A_CAS# CAS# ODT0 M_ODT0 <7>
117 118 1K_0402_1%
DDR_A_MA13 VDD15 VDD16 M_ODT1
119 120 M_ODT1 <7>
DDR_CS1_DIMMA# A13 ODT1
<7> DDR_CS1_DIMMA# 121 122
2
S1# NC2
123 124
VDD17 VDD18 +VREF_CA
125 126
NCTEST VREF_CA
127 128
VSS27 VSS28
2.2U_0603_6.3V6K
0.1U_0402_16V7K
DDR_A_D32 129 130 DDR_A_D36
DQ32 DQ36
1
DDR_A_D33 131 132 DDR_A_D37
DQ33 DQ37 RD5
133 134 1 1
DDR_A_DQS#4 VSS29 VSS30 1K_0402_1%
135 136
DQS#4 DM4
CD15
CD16
Layout Note: DDR_A_DQS4 137 138
DQS4 VSS31 DDR_A_D38
139 140
Place near JDIMM1.203,204
2
DDR_A_D34 VSS32 DQ38 DDR_A_D39 2 2
141 142
DDR_A_D35 DQ34 DQ39
143 144
145 146
B DDR_A_D40 VSS34 DQ44 DDR_A_D45 B
147 148
DDR_A_D41 DQ40 DQ45
149 150
DQ41 VSS35 DDR_A_DQS#5
151 152
153 154
DM5 DQS5
155 156
+0.75VS DDR_A_D42 VSS37 VSS38 DDR_A_D46
157 158
159 160
DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
167 168 @ RD8 1 2 0_0402_5%

1 1 1 1 DDR_A_DQS#6
DDR_A_DQS6
169
171
VSS41
DQS#6
DQS6
VSS42
DM6
VSS43
170
172 M3
CD17
CD18
CD19
CD20
173 174 DDR_A_D54 QD1

VSS44 DQ54
D
DDR_A_D50 175 176 DDR_A_D55 3 1 BSS138_NL_SOT23-3
2 2 2 2 DQ50 DQ55 +SA_DIMM_VREFDQ +V_DDR_REFA
DDR_A_D51 177 178
179 180
DDR_A_D56 VSS46 DQ60 DDR_A_D61
181 182
G
2
DDR_A_D57 DQ56 DQ61
183 184
DQ57 VSS47 DDR_A_DQS#7 DRAMRST_CNTRL
185 186 <7> DRAMRST_CNTRL
187 188
DM7 DQS7
189 190
191 192
193 194
DQ59 DQ63 @ RD9
195 196 1 2 0_0402_5%
VSS51 VSS52
1 2 197 198
RD6 10K_0402_5% 199 SA0 EVENT# PCH_SMBDATA
+3VS 200 PCH_SMBDATA <6,12,14,28,29,32>
VDDSPD SDA
0.1U_0402_16V7K
2.2U_0603_6.3V6K
1 2 201 202 PCH_SMBCLK QD2

SA1 SCL PCH_SMBCLK <6,12,14,28,29,32>
D
1 1 RD7 10K_0402_5% 203 204 +0.75VS +SB_DIMM_VREFDQ 3 1 BSS138_NL_SOT23-3 +V_DDR_REFB
VTT1 VTT2
CD21
CD22
+0.75VS
205 206
G1 G2
G
2
A 2 2 BELLW_80001-5021 A
CONN@ DRAMRST_CNTRL
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

DDRIII DIMMA
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
JDIMM2
+1.5V +V_DDR_REFB 1 2
+V_DDR_REFB VREF_DQ VSS
3 4 DDR_B_D4
VSS DQ4
2.2U_0603_6.3V6K
0.1U_0402_16V7K
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5
7 DQ1 VSS 8
1
1 1 9 10 DDR_B_DQS#0
VSS DQS0# DDR_B_DQS0
11 DM0 DQS0 12
CD27
CD26
RD15 13 14
1K_0402_1% DDR_B_D2 VSS VSS DDR_B_D6
15 DQ2 DQ6 16
+V_DDR_REFB 2 2 DDR_B_D3 17 18 DDR_B_D7
2
DQ3 DQ7
19 20
DDR_B_D8 VSS VSS DDR_B_D12
<7> DDR_B_DQS#[0..7] 21 22
DDR_B_D9 DQ8 DQ12 DDR_B_D13
23 24
D DQ9 DQ13 D
<7> DDR_B_DQS[0..7] 25 26
VSS VSS
1
DDR_B_DQS#1 27 28
DDR_B_DQS1 DQS1# DM1 DDR3_DRAMRST#
<7> DDR_B_D[0..63] 29 30 DDR3_DRAMRST# <7,11>
DQS1 RESET#
RD16 Note: 31
VSS VSS
32
1K_0402_1% DDR_B_D10 33 34 DDR_B_D14
<7> DDR_B_MA[0..15] Check voltage tolerance of DDR_B_D11 35
DQ10 DQ14
36 DDR_B_D15
2
DQ11 DQ15
VREF_DQ at the DIMM socket 37
VSS VSS
38
DDR_B_D16 39 40 DDR_B_D20
41 42
DQ17 DQ21
43 44
DDR_B_DQS#2 VSS VSS
45 46
DDR_B_DQS2 DQS2# DM2
47 DQS2 VSS 48
49 50 DDR_B_D22
DDR_B_D18 VSS DQ22 DDR_B_D23
51 DQ18 DQ23 52
DDR_B_D19 53 54
DQ19 VSS DDR_B_D28
All VREF traces should 55 56
have 10 mil trace width 57 DQ24 DQ29 58
DDR_B_D25 59 60
DQ25 VSS DDR_B_DQS#3
61 VSS DQS3# 62
63 64 DDR_B_DQS3
DM3 DQS3
65 VSS VSS 66
Layout Note: DDR_B_D26 67 68 DDR_B_D30
69 70
Place near JDIMMB 71
DQ27 DQ31
72
VSS VSS
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
<7> DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB <7>
75 VDD VDD 76
77 78 DDR_B_MA15
DDR_B_BS2 NC A15 DDR_B_MA14
<7> DDR_B_BS2 79 BA2 A14 80
81 VDD VDD 82
+1.5V DDR_B_MA12 83 84 DDR_B_MA11
C DDR_B_MA9 A12/BC# A11 DDR_B_MA7 C
85 A9 A7 86
87 VDD VDD 88
DDR_B_MA8 89 90 DDR_B_MA6
A8 A6
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
A5 A4
1 1 1 1 93 VDD VDD 94
CD28
CD29
CD30
CD31
DDR_B_MA1 A3 A2 DDR_B_MA0
97 A1 A0 98
99 100
2 2 2 2 M_CLK_DDR2 VDD VDD M_CLK_DDR3
<7> M_CLK_DDR2 101 102 M_CLK_DDR3 <7>
M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3
<7> M_CLK_DDR#2 103 104 M_CLK_DDR#3 <7>
CK0# CK1# +1.5V
105 106
DDR_B_MA10 VDD VDD DDR_B_BS1
107 108 DDR_B_BS1 <7>
DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
<7> DDR_B_BS0 109 110 DDR_B_RAS# <7>
BA0 RAS#
111 112
VDD VDD
1
DDR_B_WE# 113 114 DDR_CS2_DIMMB#
<7> DDR_B_WE# WE# S0# DDR_CS2_DIMMB# <7>
DDR_B_CAS# 115 116 M_ODT2 RD17
+1.5V <7> DDR_B_CAS# CAS# ODT0 M_ODT2 <7>
117 118 1K_0402_1%
DDR_B_MA13 VDD VDD M_ODT3
119 120 M_ODT3 <7>
DDR_CS3_DIMMB# A13 ODT1
<7> DDR_CS3_DIMMB# 121 122
2
S1# NC
123 124
VDD VDD
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
@ 125 126 +VREF_CB

TEST VREF_CA
127 128
VSS VSS
330U_SX_2VY~D
2.2U_0603_6.3V6K
0.1U_0402_16V7K
@ 1 DDR_B_D32 129 130 DDR_B_D36
DQ32 DQ36
1
1 1 1 1 1 1 1 DDR_B_D33 131 132 DDR_B_D37
DQ33 DQ37
CD32
CD33
CD34
CD35
CD36
CD37
CD38
CD39
+ 133 134 RD18

VSS VSS 1 1
DDR_B_DQS#4 135 136 1K_0402_1%
DQS4# DM4
CD40
CD41
DDR_B_DQS4 137 138
2 2 2 2 2 2 2 2 DQS4 VSS DDR_B_D38
139 140
2
DDR_B_D34 VSS DQ38 DDR_B_D39 2 2
141 142
DDR_B_D35 DQ34 DQ39
143 144
DQ35 VSS DDR_B_D44
145 146
147 148
B DDR_B_D41 DQ40 DQ45 B
149 150
151 152
153 154
DM5 DQS5
155 156
DDR_B_D42 VSS VSS DDR_B_D46
157 158
159 160
DQ43 DQ47
Layout Note: 161
VSS VSS
162
DDR_B_D48 163 164 DDR_B_D52
Place near JDIMMB.203,204 DDR_B_D49 165
DQ48 DQ52
166 DDR_B_D53
DQ49 DQ53
167 168
DDR_B_DQS#6 VSS VSS
169 170
DDR_B_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_B_D54
173 174
175 176
DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS DDR_B_D60
179 180
+0.75VS DDR_B_D56 VSS DQ60 DDR_B_D61
181 182
DDR_B_D57 DQ56 DQ61
183 184
185 186
187 188
DM7 DQS7
189 190
VSS VSS
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR_B_D58 191 192 DDR_B_D62

1 1 1 1 193 194
DQ59 DQ63
195 196
+3VS VSS VSS
CD42
CD43
CD44
CD45
197 198
SA0 EVENT# PCH_SMBDATA
+3VS 199 200 PCH_SMBDATA <6,11,14,28,29,32>
2 2 2 2 VDDSPD SDA PCH_SMBCLK
2 1 201 202 PCH_SMBCLK <6,11,14,28,29,32>
SA1 SCL
+0.75VS 203 204 +0.75VS
VTT VTT
1
0.1U_0402_16V7K
2.2U_0603_6.3V6K
RD19
10K_0402_5%
10K_0402_5% 205 206

GND1 GND2
RD20
1 1 207 208
BOSS1 BOSS2
CD46
CD47
A A
2
BELLW_80001-1021
2 2 CONN@

DDRIII DIMMB
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
PCH_RTCX1 +3VS
1 2 PCH_RTCX2
RH1 10M_0402_5% SERIRQ RH10 2 1 10K_0402_5%
YH1 @ +RTCVCC
1 2 2 1 HDA_SDOUT HDD_DET# RH12 2 1 10K_0402_5%
close to YH1 CH1 10P_0402_50V8J 330K_0402_5%
PCH_INTVRMEN RH13 2 1 PCH_SATALED#RH14 2 1 10K_0402_5%
32.768KHZ_12.5PF_9H03200019 1 2 PCH_RTCX1 @
<31> PCH_RTCX1_R
RH30 0_0402_5% 2 1 HDA_BIT_CLK PCH_INTVRMEN RH16 2 @ 1
18P_0402_50V8J
GCLK@ CH2 10P_0402_50V8J UH1 @

330K_0402_5% +3VS
* LH
1 1
CH3 CH4 INTVRMEN
D
2 2
18P_0402_50V8J
+RTCVCC
Reserve for RF please close to UH1
Integrated
Integrated
VRM enable
VRM disable HDA_SPKR RH17 2 @ 1 1K_0402_5%
D
RH2 1 2 SM_INTRUDER# BD82HM77 QPRG C1 BGA 989P PCH LOW=Default
1M_0402_5%
SA00005AG1L *HIGH=No Reboot
UH1A
SA00005AG1L
keep away hot spot HDA_SDO +3V_PCH
+RTCVCC PCH_RTCX1 A20 C38 LPC_AD0 ME debug mode , this signal has a weak internal PD
1 RTCX1 FWH0 / LAD0 LPC_AD0 <24>
1
CMOS A38 LPC_AD1
LPC
FWH1 / LAD1 LPC_AD1 <24>
CH5 CLRP1 PCH_RTCX2 C20 B37 LPC_AD2 L=>security measures defined in the Flash HDA_SDOUT RH23 2 @ 1 1K_0402_5%
RTCX2 FWH2 / LAD2 LPC_AD2 <24>
1U_0603_10V6K SHORT PADS C37 LPC_AD3
LPC_AD3 <24> Descriptor will be in effect (default)
2
2 PCH_RTCRST# FWH3 / LAD3
1 2
RH3 20K_0402_5%
D20
RTCRST#
FWH4 / LFRAME#
D36 LPC_FRAME#
LPC_FRAME# <24>
*Low = Disabled
High = Enabled
1 2 PCH_SRTCRST# G22 H=>Flash Descriptor Security will be overridden
RH4 20K_0402_5% SRTCRST#
1 E36
RTC
LDRQ0#
1
SM_INTRUDER# K22 K36
CH6 CLRP2 INTRUDER# LDRQ1# / GPIO23
1U_0603_10V6K SHORT PADS PCH_INTVRMEN C17 V5 SERIRQ SERIRQ <24>
2
2 ME CMOS INTVRMEN SERIRQ
CLP1 & CLP2 place near DIMM
SATA0RXN
AM3 SATA_PRX_DTX_N0 <29> HDA_SYNC
<30> HDA_BITCLK_AUDIO 1 2 HDA_BIT_CLK HDA_BIT_CLK N34 AM1 SATA_PRX_DTX_P0 <29>
HDA_BCLK SATA0RXP
SATA 6G
RH5 33_0402_5% AP7 SATA_PTX_DRX_N0 CH7 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N0_C <29> HDD This signal has a weak internal pull-down
+5VS HDA_SYNC SATA0TXN
L34 AP5 SATA_PTX_DRX_P0 CH8 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P0_C <29> On Die PLL VR is supplied by
HDA_RST# HDA_SYNC SATA0TXP
<30> HDA_RST_AUDIO# 1 2 1.5V when smapled high
RH6 33_0402_5% HDA_SPKR T10 AM10 SATA_PRX_DTX_N1 <32>
<30> HDA_SPKR SPKR SATA1RXN 1.8V when sampled low
2
G
AM8 SATA_PRX_DTX_P1 <32>

HDA_RST# SATA1RXP Needs to be pulled High for Huron River platfrom
K34 AP11 SATA_PTX_DRX_N1 CH18 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N1_C <32> mSATA
HDA_SYNC_R HDA_SYNC HDA_RST# SATA1TXN
<30> HDA_SYNC_AUDIO 1 2 3 1 AP10 SATA_PTX_DRX_P1 CH17 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P1_C <32>
RH7 33_0402_5% SATA1TXP +3V_PCH
S
<30> HDA_SDIN0 HDA_SDIN0 E34 AD7 SATA_PRX_DTX_N2 <29>

QH1 BSS138_SOT23 HDA_SDIN0 SATA2RXN
AD5 SATA_PRX_DTX_P2 <29>
SATA2RXP
1 2 1 @ 2 G34 AH5 SATA_PTX_DRX_N2 CH9 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N2_C <29> ODD HDA_SYNC RH32 2 1 1K_0402_5%
HDA_SDIN1 SATA2TXN
RH8 1M_0402_5% RH9 0_0402_5% AH4 SATA_PTX_DRX_P2 CH10 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P2_C <29>
SATA2TXP
C34
HDA_SDIN2
IHDA
C AB8 C
SATA3RXN
A34 AB10
HDA_SDOUT HDA_SDIN3 SATA3RXP
1 2 AF3
<24> ME_EN
RH11 1K_0402_1%
HDA_SDOUT A36
SATA3TXN
SATA3TXP
AF1 RTC Battery
HDA_SDO
SATA
<30> HDA_SDOUT_AUDIO 1 2 HDA_SDOUT Y7
RH15 33_0402_5% SATA4RXN
Y5
SATA4RXP
C36 AD3
HDA_DOCK_EN# / GPIO33 SATA4TXN
AD1
N32
SATA4TXP +RTCBATT
HDA_DOCK_RST# / GPIO13
Y3
SATA5RXN
Y1
SATA5RXP
AB3
SATA5TXN
2
+3V_PCH +3V_PCH +3V_PCH PCH_JTAG_TCK J3 AB1
<6> PCH_JTAG_TCK JTAG_TCK SATA5TXP
+CHGRTC RH34
PCH_JTAG_TMS H7 Y11 +1.05VS_VCC_SATA 1K_0402_5%
JTAG
<6> PCH_JTAG_TMS JTAG_TMS SATAICOMPO
1
@ RH18 @ RH19 @ RH20 PCH_JTAG_TDI K5 Y10 SATA_COMP 1 2

<6> PCH_JTAG_TDI
1
JTAG_TDI SATAICOMPI
200_0402_5% 200_0402_5% 200_0402_5% RH21 37.4_0402_1% W=20mils
PCH_JTAG_TDO H1 W=20mils
<6> PCH_JTAG_TDO JTAG_TDO
2
AB12 +1.05VS_SATA3
2
PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI SATA3RCOMPO DH1

JP12
AB13 SATA3_COMP 1 2 BAT54CW_SOT323-3
SATA3COMPI
1
RH22 49.9_0402_1% 2 1
RH24 RH25 RH26 +CHGRTC 2 1 +3VLP
100_0402_1% 100_0402_1% 100_0402_1% PCH_SPI_CLK T3 AH1 RBIAS_SATA3 1 2 JUMP_43X39
1
SPI_CLK SATA3RBIAS RH28 750_0402_1%~D
PCH_SPI_CS0# Y14
+RTCVCC
2
SPI_CS0# W=20mils 1
PCH_SPI_CS1# T1 CH12
SPI
SPI_CS1# PCH_SATALED# 1U_0603_10V6K

P3 PCH_SATALED# <32>
SATALED#
PCH_SPI_SI V4 V14 HDD_DET#_R RH268 1 2 0_0402_5% HDD_DET# 2
SPI_MOSI SATA0GP / GPIO21 HDD_DET# <29>
PCH_SPI_SO U3 P1 BBS_BIT0_R 2 1 10K_0402_5% +3VS
SPI_MISO SATA1GP / GPIO19 RH29
B BD82HM77 QPRG C1 BGA 989P PCH B
+3V_PCH
+3V_PCH
NEC flash issue.
+3V_PCH
+3V_PCH +3V_PCH
0.1U_0402_16V7K
0.1U_0402_16V7K
CH11
1
SPI ROM FOR ME CH98
1
2
@
( 4MByte )
2
RH262 RH33 2 @
3.3K_0402_5% 3.3K_0402_5% SPI ROM FOR WIN8( 2MByte ) RH263 2
PCH_JTAG_TCK 1 2 @ 3.3K_0402_5%
RH35 51_0402_5% UH6
1
+3V_PCH PCH_SPI_CS0# 1 RH264 2 0_0402_5% PCH_SPI_CS0#_R 1 8
1
UH2 PCH_SPI_SO PCH_SPI_SO_L 2 CS# VCC PCH_SPI_HOLD#
2 1 7
PCH_SPI_CS1# PCH_SPI_CS1#_R PCH_SPI_WP# SO/SIO1 HOLD# PCH_SPI_CLK_L
1 RH36 2 0_0402_5% 1 8 RH265 33_0402_5% 3 6 2 RH266 133_0402_5% PCH_SPI_CLK
PCH_SPI_SO PCH_SPI_SO_R CS# VCC PCH_SPI_HOLD# WP# SCLK PCH_SPI_SI_L PCH_SPI_SI
2 RH37 1 33_0402_5% 2
SO HOLD#
7 4
GND SI/SIO0
5 2 1
1 2 PCH_SPI_WP# PCH_SPI_WP# 3
WP# SCLK
6 PCH_SPI_CLK_R 2 RH27 133_0402_5% PCH_SPI_CLK RH267 33_0402_5%
RH38 3.3K_0402_5% 4 5 PCH_SPI_SI_R 2 RH39 133_0402_5% PCH_SPI_SI EN25Q32B-104HIP_SO8
GND SI
1 2 PCH_SPI_HOLD# EN25QH16-104HIP_SO8
RH40 3.3K_0402_5% 1 EON EN25Q32B-104HIP_SO8
CH99
@ 10P_0402_50V8J
2
EON EN25QH16-104HIP_SO8
A A

PCH (1/8) SATA,HDA,SPI, LPC
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
SMBCLK 1 2 +3V_PCH
RH45 2.2K_0402_5%
UH1B SMBDATA 1 2
RH46 2.2K_0402_5%
<32> PCIE_PRX_LANTX_N1 PCIE_PRX_LANTX_N1 BG34 SML0CLK 1 2
PCIE_PRX_LANTX_P1 PERN1 SMBALERT# RH47 2.2K_0402_5%
<32> PCIE_PRX_LANTX_P1 BJ34 PERP1 SMBALERT# / GPIO11 E12
10/100/1G LAN ---> CH19 1 2 0.1U_0402_10V7K~D PCIE_PTX_LANRX_N1_C AV32 SML0DATA 1 2
<32> PCIE_PTX_LANRX_N1 PETN1
CH20 1 2 0.1U_0402_10V7K~D PCIE_PTX_LANRX_P1_C AU32 H14 SMBCLK RH49 2.2K_0402_5%
<32> PCIE_PTX_LANRX_P1 PETP1 SMBCLK
MEMORY SML1CLK 1 2
<32> PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_N2 BE34 C9 SMBDATA RH50 2.2K_0402_5%
PCIE_PRX_WLANTX_P2 PERN2 SMBDATA SML1DATA
<32> PCIE_PRX_WLANTX_P2 BF34 PERP2 1 2
WLAN (Mini Card 1)---> CH21 1 2 0.1U_0402_10V7K~D PCIE_PTX_WLANRX_N2_C BB32 RH51 2.2K_0402_5%
<32> PCIE_PTX_WLANRX_N2 PETN2
CH22 1 2 0.1U_0402_10V7K~D PCIE_PTX_WLANRX_P2_C AY32 SMBALERT# 1 2
SMBUS
D <32> PCIE_PTX_WLANRX_P2 PETP2 D
A12 DRAMRST_CNTRL_PCH RH52 10K_0402_5%
SML0ALERT# / GPIO60 DRAMRST_CNTRL_PCH <7>
<28> PCIE_PRX_EXPTX_N3 PCIE_PRX_EXPTX_N3 BG36 PCH_HOT# 1 2
PCIE_PRX_EXPTX_P3 PERN3 SML0CLK RH86 10K_0402_5%
<28> PCIE_PRX_EXPTX_P3 BJ36 PERP3 SML0CLK C8
Express Card ---> CH15 1 2 0.1U_0402_10V7K~D PCIE_PTX_EXPRX_N3_C AV34 DRAMRST_CNTRL_PCH 1 2
<28> PCIE_PTX_EXPRX_N3 PETN3
CH16 1 2 0.1U_0402_10V7K~D PCIE_PTX_EXPRX_P3_C AU34 G12 SML0DATA RH53 1K_0402_5%
<28> PCIE_PTX_EXPRX_P3 PETP3 SML0DATA
BF36 PERN4
BE36 PERP4
AY34 C13 PCH_HOT#
PETN4 SML1ALERT# / PCHHOT# / GPIO74 PCH_HOT# <24>
BB34 CLKIN_DMI2# RH54 1 2 10K_0402_5%
PETP4 SML1CLK CLKIN_DMI2 RH55 10K_0402_5%
E14 1 2
PCI-E*
SML1CLK / GPIO58 CLKIN_DMI# RH56 10K_0402_5%
BG37 PERN5 1 2
BH37 M16 SML1DATA CLKIN_DMI RH57 1 2 10K_0402_5%
PERP5 SML1DATA / GPIO75 CLKIN_DOT96# RH58 10K_0402_5%
AY36 PETN5 1 2
BB36 Total device 20090512 CLKIN_DOT96 RH59 1 2 10K_0402_5%
PETP5 CLKIN_SATA# RH60 10K_0402_5%
1 2
BJ38 add double mosfet prevent CLKIN_SATA RH61 1 2 10K_0402_5%
PERN6 CLK_PCH_14M RH62 10K_0402_5%
BG38 PERP6 ATI M92 electric leakage 1 2
Controller
AU36 PETN6 CL_CLK1 M7
AV36 PETP6 If use extenal CLK gen, please place close to CLK gen
Link
BG40 T11 +3V_PCH else, please place close to PCH
PERN7 CL_DATA1
BJ40 PERP7 No support iAMT
AY40 PETN7
BB40 PETP7 CL_RST1# P10
2
BE38 RH64
PERN8
BC38 PERP8 10K_0402_5%
AW38 PETN8
AY38
1
PETP8
M10 PEG_A_CLKRQ# PEG_A_CLKRQ# <35>
C RH67 1 PEG_A_CLKRQ# / GPIO47 C
<32> CLK_PCIE_LAN# 2 0_0402_5% PCIE_LAN# Y40 CLKOUT_PCIE0N
10/100/1G LAN ---> RH68 1 2 0_0402_5% PCIE_LAN Y39
<32> CLK_PCIE_LAN CLKOUT_PCIE0P
+3V_PCH RH69 2 1 10K_0402_5% AB37 CLK_PEG_VGA# CLK_PEG_VGA# <34>
CLKOUT_PEG_A_N
CLOCKS
LAN_CLKREQ# J2 AB38 CLK_PEG_VGA +3VS +3VS
<32> LAN_CLKREQ# PCIECLKRQ0# / GPIO73 CLKOUT_PEG_A_P CLK_PEG_VGA <34>
RH75 2 1 0_0402_5% PCIE_WLAN# AB49 AV22 CLK_CPU_DMI#

<32> CLK_PCIE_WLAN# CLKOUT_PCIE1N CLKOUT_DMI_N CLK_CPU_DMI# <6>
RH76 2 1 0_0402_5% PCIE_WLAN AB47 AU22 CLK_CPU_DMI
<32> CLK_PCIE_WLAN CLKOUT_PCIE1P CLKOUT_DMI_P CLK_CPU_DMI <6>
WLAN (Mini Card 1)---> +3VS RH77 2 1 10K_0402_5%
<32> WLAN_CLKREQ# WLAN_CLKREQ# M1 PCIECLKRQ1# / GPIO18
CLKOUT_DP_N AM12
2
CLKOUT_DP_P AM13
RH79 2 1 0_0402_5% PCIE_EXP# AA48 RH71 RH72
<28> CLK_PCIE_EXP# CLKOUT_PCIE2N
RH80 2 1 0_0402_5% PCIE_EXP AA47 2.2K_0402_5% 2.2K_0402_5%
<28> CLK_PCIE_EXP CLKOUT_PCIE2P
Express Card ---> +3VS RH81 2 1 10K_0402_5% BF18 CLKIN_DMI#
CLKIN_DMI_N
2
<28> EXPCLK_REQ# EXPCLK_REQ# V10 BE18 CLKIN_DMI
1
PCIECLKRQ2# / GPIO20 CLKIN_DMI_P
SMBCLK 6 1 PCH_SMBCLK <6,11,12,28,29,32>
Y37 BJ30 CLKIN_DMI2#
CLKOUT_PCIE3N CLKIN_GND1_N CLKIN_DMI2 DMN66D0LDW-7_SOT363-6
Y36 CLKOUT_PCIE3P CLKIN_GND1_P BG30
QH2A
+3V_PCH RH74 2 1 10K_0402_5% GPIO25 A8 RH78
PCIECLKRQ3# / GPIO25 CLKIN_DOT96#
CLKIN_DOT_96N G24 1 @ 2
5
E24 CLKIN_DOT96 0_0402_5%
CLKIN_DOT_96P
Y43
*PCIE REQ power rail: Y45
CLKOUT_PCIE4N SMBDATA 3 4
CLKOUT_PCIE4P PCH_SMBDATA <6,11,12,28,29,32>
AK7 CLKIN_SATA#
suspend: 0 3 4 5 6 7 +3V_PCH RH66 1 2 10K_0402_5% GPIO26 L12
CLKIN_SATA_N
AK5 CLKIN_SATA DMN66D0LDW-7_SOT363-6
PCIECLKRQ4# / GPIO26 CLKIN_SATA_P
core: 1 2 QH2B
RH82
V45 K45 CLK_PCH_14M 1 @ 2
CLKOUT_PCIE5N REFCLK14IN 0_0402_5%
V46 CLKOUT_PCIE5P
B B
+3V_PCH RH83 1 2 10K_0402_5% GPIO44 L14 H45 CLK_PCI_LPBACK

PCIECLKRQ5# / GPIO44 CLKIN_PCILOOPBACK CLK_PCI_LPBACK <16>
AB42 V47 XTAL25_IN

CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT
AB40 CLKOUT_PEG_B_P XTAL25_OUT V49
+3V_PCH RH84 1 2 10K_0402_5% GPIO56 E6 PEG_B_CLKRQ# / GPIO56

Y47 XCLK_RCOMP 1 2 +1.05VS_VCCDIFFCLKN
XCLK_RCOMP RH85 90.9_0402_1% +3V_PCH
V40 CLKOUT_PCIE6N
V42 CLKOUT_PCIE6P
+3V_PCH RH88 1 2 10K_0402_5% GPIO45 T13 PCIECLKRQ6# / GPIO45
XTAL25_IN V38 K43 CLK_FLEX0 @ T53 PAD~D
FLEX CLOCKS
CLKOUT_PCIE7N CLKOUTFLEX0 / GPIO64
2
V37 CLKOUT_PCIE7P
2 1 XTAL25_OUT F47 CLK_14M_R 1 RH125 2 @ T54 PAD~D
1M_0402_5% RH89 RH90 1 CLKOUTFLEX1 / GPIO65
+3V_PCH 2 10K_0402_5% GPIO46 K12 PCIECLKRQ7# / GPIO46
22_0402_5% SML1CLK 1 6 PCH_SMLCLK <24>
H47 CLK_LAN_25M_R 2 @ 1
CLKOUTFLEX2 / GPIO66 CLK_LAN_25M <32> DMN66D0LDW-7_SOT363-6
CLK_CPU_ITP# RH91 2 1 0_0402_5% CLK_BCLK_ITP# AK14 RH270 22_0402_5%
<6> CLK_CPU_ITP# CLKOUT_ITPXDP_N
CLK_CPU_ITP RH92 2 1 0_0402_5% CLK_BCLK_ITP AK13 K49 DGPU_PRSNT# 2 1 +3VS QH3A
<6> CLK_CPU_ITP CLKOUT_ITPXDP_P CLKOUTFLEX3 / GPIO67 RH269 10K_0402_5%
1
5
UMA@
2
27P_0402_50V8J
27P_0402_50V8J
1 1 RH93 2 @ 1 0_0402_5% BD82HM77 QPRG C1 BGA 989P PCH

GND OSC
OSC
<8> CLK_RES_ITP#
RH94 2 @ 1 0_0402_5% RH261 SML1DATA 4 3 PCH_SMLDATA <24>
<8> CLK_RES_ITP
CH27 CH28 DIS@ 10K_0402_5%
DMN66D0LDW-7_SOT363-6
25MHZ_20PF_FSX3M-25.M20FDO
GND
2 2
QH3B
1
YH2
2
@ @ close to RH270
A RH63 CH25 A
close to YH2 CLK_PCH_14M 2 1 1 2 <31> LAN_X1 1 2 CLK_LAN_25M
33_0402_5% 22P_0402_50V8J~D RH31 0_0402_5%
1 2 XTAL25_IN GCLK@
<31> PCH_X1
RH41 0_0402_5%
GCLK@
@ @
RH65 CH26
CLK_PCI_LPBACK 2 1 1 2
33_0402_5% 22P_0402_50V8J~D 2012/01/17 2013/01/16 Title
Issued Date Deciphered Date
Reserve for EMI please close to
UH1 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (2/8) PCIE, SMBUS, CLK
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
UH1C
<5> DMI_CTX_PRX_N0 DMI_CTX_PRX_N0 BC24 BJ14 FDI_CTX_PRX_N0 FDI_CTX_PRX_N0 <5>

DMI_CTX_PRX_N1 DMI0RXN FDI_RXN0 FDI_CTX_PRX_N1
<5> DMI_CTX_PRX_N1 BE20 AY14 FDI_CTX_PRX_N1 <5>
<5> DMI_CTX_PRX_N2 BG18 BE14 FDI_CTX_PRX_N2 <5> UH1D
<5> DMI_CTX_PRX_N3 BG20 BH13 FDI_CTX_PRX_N3 <5>
DMI3RXN FDI_RXN3 FDI_CTX_PRX_N4 ENBKL
BC12 FDI_CTX_PRX_N4 <5> <24> ENBKL J47 AP43
DMI_CTX_PRX_P0 FDI_RXN4 FDI_CTX_PRX_N5 PCH_ENVDD L_BKLTEN SDVO_TVCLKINN
<5> DMI_CTX_PRX_P0 BE24 BJ12 FDI_CTX_PRX_N5 <5> <22> PCH_ENVDD M45 AP45
DMI_CTX_PRX_P1 DMI0RXP FDI_RXN5 FDI_CTX_PRX_N6 L_VDD_EN SDVO_TVCLKINP
<5> DMI_CTX_PRX_P1 BC20 BG10 FDI_CTX_PRX_N6 <5>
DMI_CTX_PRX_P2 DMI1RXP FDI_RXN6 FDI_CTX_PRX_N7
<5> DMI_CTX_PRX_P2 BJ18 BG9 FDI_CTX_PRX_N7 <5> <22> VGA_PWM P45 AM42
DMI_CTX_PRX_P3 DMI2RXP FDI_RXN7 L_BKLTCTL SDVO_STALLN
<5> DMI_CTX_PRX_P3 BJ20 AM40
DMI3RXP FDI_CTX_PRX_P0 LVDS_DDC_CLK SDVO_STALLP
BG14 FDI_CTX_PRX_P0 <5> <22> LVDS_DDC_CLK T40
DMI_CRX_PTX_N0 FDI_RXP0 FDI_CTX_PRX_P1 LVDS_DDC_DATA L_DDC_CLK
<5> DMI_CRX_PTX_N0 AW24 BB14 FDI_CTX_PRX_P1 <5> <22> LVDS_DDC_DATA K47 AP39
DMI_CRX_PTX_N1 DMI0TXN FDI_RXP1 FDI_CTX_PRX_P2 L_DDC_DATA SDVO_INTN
<5> DMI_CRX_PTX_N1 AW20 BF14 FDI_CTX_PRX_P2 <5> AP40
D DMI_CRX_PTX_N2 DMI1TXN FDI_RXP2 FDI_CTX_PRX_P3 CTRL_CLK SDVO_INTP D
<5> DMI_CRX_PTX_N2 BB18 BG13 FDI_CTX_PRX_P3 <5> T45
DMI_CRX_PTX_N3 DMI2TXN FDI_RXP3 FDI_CTX_PRX_P4 CTRL_DATA L_CTRL_CLK
AV18 BE12 P39
DMI
FDI
<5> DMI_CRX_PTX_N3 DMI3TXN FDI_RXP4 FDI_CTX_PRX_P4 <5> L_CTRL_DATA
BG12 FDI_CTX_PRX_P5 FDI_CTX_PRX_P5 <5>
DMI_CRX_PTX_P0 FDI_RXP5 FDI_CTX_PRX_P6 LVDS_IBG
<5> DMI_CRX_PTX_P0 AY24 BJ10 FDI_CTX_PRX_P6 <5> AF37 P38 PCH_SDVO_CTRLCLK <23>
DMI_CRX_PTX_P1 DMI0TXP FDI_RXP6 FDI_CTX_PRX_P7 PAD~D T56 LVD_IBG SDVO_CTRLCLK
<5> DMI_CRX_PTX_P1 AY20 BH9 FDI_CTX_PRX_P7 <5> AF36 M39 PCH_SDVO_CTRLDATA <23>
DMI_CRX_PTX_P2 DMI1TXP FDI_RXP7 LVD_VBG SDVO_CTRLDATA
<5> DMI_CRX_PTX_P2 AY18
DMI_CRX_PTX_P3 DMI2TXP
<5> DMI_CRX_PTX_P3 AU18 AE48
DMI3TXP FDI_INT LVD_VREFH
AW16 FDI_INT <5> AE47 AT49
FDI_INT LVD_VREFL DDPB_AUXN
AT47
+1.05VS FDI_FSYNC0 DDPB_AUXP HDMI_DET
BJ24 AV12 FDI_FSYNC0 <5> AT40 HDMI_DET <23>
DMI_ZCOMP FDI_FSYNC0 LVDS_ACLK- DDPB_HPD
AK39
LVDS
<22> LVDS_ACLK- LVDSA_CLK#
1 2 DMI_IRCOMP BG25 BC10 FDI_FSYNC1 LVDS_ACLK+ AK40 AV42 HDMI_A2N_VGA
DMI_IRCOMP FDI_FSYNC1 FDI_FSYNC1 <5> <22> LVDS_ACLK+ LVDSA_CLK DDPB_0N HDMI_A2N_VGA <23>
RH99 49.9_0402_1% AV40 HDMI_A2P_VGA
DDPB_0P HDMI_A2P_VGA <23>
1 2 RBIAS_CPY BH21 AV14 FDI_LSYNC0 LVDS_A0- AN48 HDMI AV45 HDMI_A1N_VGA
DMI2RBIAS FDI_LSYNC0 FDI_LSYNC0 <5> <22> LVDS_A0- LVDSA_DATA#0 DDPB_1N HDMI_A1N_VGA <23>
RH100 750_0402_1%~D LVDS_A1- AM47 AV46 HDMI_A1P_VGA
Digital Display Interface

<22> LVDS_A1- LVDSA_DATA#1 DDPB_1P HDMI_A1P_VGA <23>
4mil width and place BB10 FDI_LSYNC1 LVDS_A2- AK47 AU48 HDMI_A0N_VGA
FDI_LSYNC1 FDI_LSYNC1 <5> <22> LVDS_A2- LVDSA_DATA#2 DDPB_2N HDMI_A0N_VGA <23>
AJ48 AU47 HDMI_A0P_VGA
within 500mil of the PCH LVDSA_DATA#3 DDPB_2P
AV47 HDMI_A3N_VGA
HDMI_A0P_VGA <23>
DDPB_3N HDMI_A3N_VGA <23>
LVDS_A0+ AN47 AV49 HDMI_A3P_VGA
<22> LVDS_A0+ LVDSA_DATA0 DDPB_3P HDMI_A3P_VGA <23>
A18 DSWODVREN LVDS_A1+ AM49
DSWVRMEN <22> LVDS_A1+ LVDSA_DATA1
LVDS_A2+ AK49
<22> LVDS_A2+ LVDSA_DATA2
System Power Management

AJ47 P46
PAD~D T57 LVDSA_DATA3 DDPC_CTRLCLK
C12 E22 PCH_DPWROK 1 RH128 2 0_0402_5% PCH_RSMRST#_R P42
SUSACK# DPWROK DDPC_CTRLDATA
@ LVDS_BCLK- AF40
<22> LVDS_BCLK- LVDSB_CLK#
<6> XDP_DBRESET# XDP_DBRESET# K3 B9 WAKE# 1 2 PCIE_WAKE# <24,28,32> <22> LVDS_BCLK+ LVDS_BCLK+ AF39 AP47
SYS_RESET# WAKE# RH103 0_0402_5% LVDSB_CLK DDPC_AUXN
AP49
LVDS_B0- DDPC_AUXP
<22> LVDS_B0- AH45 AT38
SYS_PWROK SYS_PWROK_R P12 PM_CLKRUN# LVDS_B1- LVDSB_DATA#0 DDPC_HPD
1 2 N3 <22> LVDS_B1- AH47
RH104 0_0402_5% SYS_PWROK CLKRUN# / GPIO32 LVDS_B2- LVDSB_DATA#1
<22> LVDS_B2- AF49 AY47
LVDSB_DATA#2 DDPC_0N
AF45 AY49
SUS_STAT# T58 PAD~D LVDSB_DATA#3 DDPC_0P
1 2 L22 G8 AY43
C RH105 0_0402_5% PWROK SUS_STAT# / GPIO61 LVDS_B0+ DDPC_1N C
<22> LVDS_B0+ AH43 AY45
LVDS_B1+ LVDSB_DATA0 DDPC_1P
1 2 L10 N14 SUSCLK 2 1
<22> LVDS_B1+
LVDS_B2+
AH49
AF47
LVDSB_DATA1 mDP DDPC_2N
BA47
BA48
<6,24> PCH_PWROK APWROK SUSCLK / GPIO62 SUSCLK_R <24> <22> LVDS_B2+ LVDSB_DATA2 DDPC_2P
RH106 0_0402_5% RH107 0_0402_5% AF43 BB47
LVDSB_DATA3 DDPC_3N
BB49
PM_DRAM_PWRGD PM_SLP_S5# DDPC_3P
<6> PM_DRAM_PWRGD B13 D10 PM_SLP_S5# <24>
DRAMPWROK SLP_S5# / GPIO63
CRT_B N48 M43
<21> CRT_B CRT_BLUE DDPD_CTRLCLK
<24> EC_RSMRST# 1 2PCH_RSMRST#_R C21 H4 PM_SLP_S4#
PM_SLP_S4# <24> <21> CRT_G
CRT_G P49 M36
RH108 0_0402_5% RSMRST# SLP_S4# CRT_R CRT_GREEN DDPD_CTRLDATA
<21> CRT_R T49
CRT_RED
SUSWARN# K16 F4 PM_SLP_S3# AT45
CRT
SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# PM_SLP_S3# <24,28> DDPD_AUXN
CRT_DDC_CLK T39 AT43
<21> CRT_DDC_CLK CRT_DDC_CLK DDPD_AUXP
CRT_DDC_DATA M40 BH41
<21> CRT_DDC_DATA CRT_DDC_DATA DDPD_HPD
<6,24> PBTN_OUT# 1 2 E20 G10
RH110 0_0402_5% PWRBTN# SLP_A# RH230 33_0402_5% BB43
DH4 DDPD_0N
<21> CRT_HSYNC 1 2 HSYNC M47 BB45
T59 PAD~D CRT_HSYNC DDPD_0P
<24,35,43,44> ACIN 1 2 AC_PRESENT_R H20 G16 PM_SLP_SUS#
<21> CRT_VSYNC 1 2 VSYNC M49 DMC BF44
RB751V-40_SOD323-2 ACPRESENT / GPIO31 SLP_SUS# RH202 33_0402_5% CRT_VSYNC DDPD_1N
BE44
DDPD_1P
BF42
GPIO72 H_PM_SYNC CRT_IREF DDPD_2N
E10 AP14 H_PM_SYNC <6> T43 BE42
BATLOW# / GPIO72 PMSYNCH DAC_IREF DDPD_2P
T42 BJ42
Can be left NC when IAMT is CRT_IRTN DDPD_3N
BG42
1
RI# DDPD_3P
A10
RI# SLP_LAN# / GPIO29
K14 not support on the platfrom
If not using integrated BD82HM77 QPRG C1 BGA 989P PCH
LAN,signal may be left as NC. RH115
BD82HM77 QPRG C1 BGA 989P PCH 1K_0402_0.5%
Check EC for S3 S4 LED
2
+3V_PCH
GPIO72 RH116 1 2 10K_0402_5% CH29

SUSCLK 2 1
B RH117 1 B
RI# 2 10K_0402_5% @
+RTCVCC 10P_0402_50V8J
PCIE_WAKE# RH118 1 @ 2 10K_0402_5%
AC_PRESENT_R RH121 1 2 200K_0402_5% DSWODVREN RH119 2 1 330K_0402_5% Reserve for RF please close to UH1 1 2 PM_CLKRUN#
RH120 10K_0402_5%
SUSWARN# RH124 1 2 10K_0402_5% DSWODVREN RH122 2 @ 1 330K_0402_5% 1 2 LVDS_IBG
RH123 2.37K_0402_1%
WAKE# RH126 1 2 10K_0402_5% +3VS 1 2 PCH_ENVDD
EC_RSMRST# RH127 1 2 10K_0402_5%

*
DSWODVREN - On Die DSW VR Enable
H Enable
L Disable
RH132
RH134
1 2
100K_0402_5%
100K_0402_5%
ENBKL
1 2 CTRL_CLK 1 2 CRT_B
RH133 2.2K_0402_5% RH235 150_0402_1%
1 2 CTRL_DATA 1 2 CRT_G
RH135 2.2K_0402_5% RH236 150_0402_1%
1 2 PM_CLKRUN# 1 2 CRT_R
+3VS RH136 @ 8.2K_0402_5% RH237 150_0402_1%
1 2 LVDS_DDC_CLK
RH137 2.2K_0402_5%
1 1 2 LVDS_DDC_DATA
RH138 2.2K_0402_5%
CH30 1 2 PCH_SDVO_CTRLCLK
0.1U_0402_16V7K RH233 2.2K_0402_5%
2 1 2 PCH_SDVO_CTRLDATA
RH234 2.2K_0402_5%
5
UH3 1 @ 2 CRT_DDC_CLK
RH238 2.2K_0402_5%
VCC
<6,24> PCH_PWROK PCH_PWROK 1 1 @ 2 CRT_DDC_DATA

IN1 SYS_PWROK RH239 2.2K_0402_5%
4 SYS_PWROK <6>
OUT
2
GND
<6,50> VGATE IN2

A A
MC74VHC1G08DFT2G_SC70-5
3

PCH (3/8) DMI,FDI,PM,GFX,DP
1.0
LA-8241P
5 4 3 2 1
Compal Electronics, Inc

5 4 3 2 1
UH1E
RSVD1 AY7
RSVD2 AV7
BG26 TP1 RSVD3 AU3
BJ26 TP2 RSVD4 BG4
BH25 TP3
BJ16 TP4 RSVD5 AT10
BG16 TP5 RSVD6 BC8
AH38 TP6
+3VS AH37 AU2
TP7 RSVD7
AK43 TP8 RSVD8 AT4
RPH1 AK45 AT3
WL_OFF# TP9 RSVD9
8 1 C18 AT1
PCI_PIRQB# TP10 RSVD10
7 2 N30
TP11 RSVD11
AY3
D PCI_PIRQD# Intel Anti-Theft Techonlogy D
6 3 H3
TP12 RSVD12
AT5
5 4 PCI_PIRQC# AH12 AV3
TP13 RSVD13
AM4
TP14 RSVD14
AV1 High=Endabled
8.2K_0804_8P4R_5% AM5
TP15 RSVD15
BB1 NV_ALE
Low=Disable(floating)
RPH2
Y13
K24
TP16
TP17
RSVD16
RSVD17
BA3
BB5 *
8 1 GPIO51 L24 BB3
GPIO52 TP18 RSVD18
7 2 AB46
TP19 RSVD19
BB7
6 3 PXS_PWREN AB45 BE8
RSVD
FFS_INT1 TP20 RSVD20
5 4 BD4
RSVD21 +1.8VS
BF6
8.2K_0804_8P4R_5% RSVD22
B21 AV5 NV_ALE @ RH1391 2 1K_0402_5%
RPH3 TP21 RSVD23
M20 TP22 RSVD24 AV10
8 1 GPIO5 AY16
PCI_PIRQA# TP23
7 2 BG46 TP24 RSVD25 AT8
6 3 GPIO4
5 4 ODD_DA# AY5
RSVD26
RSVD27 BA2
8.2K_0804_8P4R_5% USB3RN1 BE28
<33> USB3RN1 USB3RN2 TP25
<33> USB3RN2 BC30 TP26 RSVD28 AT12
10K_0402_5% 2 RH140 1 DGPU_HOLD_RST# USB3RN3 BE32 BF3
<32> USB3RN3 USB3RN4 TP27 RSVD29
<32> USB3RN4 BJ32 TP28
USB3RP1 BC28
<33> USB3RP1 USB3RP2 TP29
<33> USB3RP2 BE30 TP30
USB3RP3 BF32
<32> USB3RP3 USB3RP4 TP31 USB20_N0
<32> USB3RP4 BG32 TP32 USBP0N C24 USB20_N0 <33>
USB3TN1 AV26 A24 USB20_P0 USB Conn 1
<33> USB3TN1 USB3TN2 TP33 USBP0P USB20_N1 USB20_P0 <33>
<33> USB3TN2 BB26 TP34 USBP1N C25 USB20_N1 <33>
USB3TN3 AU28 B25 USB20_P1 USB Conn 2 (with PWR Share)
<32> USB3TN3 TP35 USBP1P USB20_P1 <33>
USB3TN4 AY30 C26 USB20_N2
<32> USB3TN4 USB3TP1 TP36 USBP2N USB20_P2 USB20_N2 <32>
C <33> USB3TP1 USB3TP2
AU26 TP37 USBP2P A26
USB20_N3 USB20_P2 <32> USB Conn 3 C
<33> USB3TP2 AY26 TP38 USBP3N K28 USB20_N3 <32>
USB3TP3 AV28 H28 USB20_P3 USB Conn 4
<32> USB3TP3 TP39 USBP3P USB20_P3 <32>
USB3TP4 AW30 E28 USB20_N4
<32> USB3TP4 TP40 USBP4N USB20_P4 USB20_N4 <32>
USBP4P D28
USB20_N5 USB20_P4 <32> Mini Card-1 (WLAN)
USBP5N C28 USB20_N5 <32>
A28 USB20_P5 Mini Card-2 (mSATA)
USBP5P USB20_P5 <32>
USBP6N C29
B29
PCI_PIRQA# USBP6P
K40 N28
PCI_PIRQB# PIRQA# USBP7N
K38 M28
PCI
PCI_PIRQC# PIRQB# USBP7P USB20_N8
H38 L30 USB20_N8 <32>
PCI_PIRQD# PIRQC# USBP8N USB20_P8
G38
PIRQD# USBP8P
K30 USB20_P8 <32> Finger Print
G30
DGPU_HOLD_RST# USBP9N
C46 E30
USB
<34> DGPU_HOLD_RST# GPIO52 REQ1# / GPIO50 USBP9P USB20_N10
C44 C30 USB20_N10 <32>
PXS_PWREN REQ2# / GPIO52 USBP10N USB20_P10
<36,52> PXS_PWREN E40
REQ3# / GPIO54 USBP10P
A30
USB20_N11 USB20_P10 <32> Card Reader
L32 USB20_N11 <28>
GPIO51 USBP11N USB20_P11
D47
GNT1# / GPIO51 USBP11P
K32
USB20_N12
USB20_P11 <28> Express Card
E42 G32 USB20_N12 <22>
WL_OFF# GNT2# / GPIO53 USBP12N USB20_P12
<32> WL_OFF# F46
GNT3# / GPIO55 USBP12P
E32 USB20_P12 <22> Camera
C32
CH31 USBP13N
A32
CLK_PCI1 FFS_INT1 USBP13P
2 1 <29> FFS_INT1 G42
@ ODD_DA# PIRQE# / GPIO2
<29> ODD_DA#
GPIO4
G40
PIRQF# / GPIO3 USBRBIAS
Within 500 mils
10P_0402_50V8J C42 C33 1 2
GPIO5 PIRQG# / GPIO4 USBRBIAS# RH143 22.6_0402_1% +3V_PCH
D44
PIRQH# / GPIO5
Reserve for RF please close to PCH
B33 RPH4
PAD~D T60 @ USBRBIAS USB_OC0#
K10 4 5
PME# USB_OC1# 3 6
PCH_PLTRST# C6 A14 USB_OC0# USB_OC2# 2 7
<34> PCH_PLTRST# PLTRST# OC0# / GPIO59 USB_OC0# <33>
K20 USB_OC1# USB_OC3# 1 8
B OC1# / GPIO40 USB_OC1# <33> B
B17 USB_OC2#
CLK_PCI_LPBACK CLK_PCI0 OC2# / GPIO41 USB_OC3# USB_OC2# <32>
RH144 2 1 22_0402_5% H49 C16 10K_1206_8P4R_5%
<14> CLK_PCI_LPBACK CLK_PCI_LPC CLK_PCI1 CLKOUT_PCI0 OC3# / GPIO42 USB_OC4# USB_OC3# <32>
RH145 1 2 22_0402_5% H43 L16 RPH5
<24> CLK_PCI_LPC CLK_PCI2 CLKOUT_PCI1 OC4# / GPIO43 USB_OC5# USB_OC4#
PAD~D T61 @ J48 A16 4 5
PAD~D T62 @ CLK_PCI3 CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# USB_OC5#
K42 D14 3 6
PAD~D T63 @ CLK_PCI4 CLKOUT_PCI3 OC6# / GPIO10 USB_OC7# USB_OC6#
H40 C14 2 7
CLKOUT_PCI4 OC7# / GPIO14 USB_OC7# 1 8
BD82HM77 QPRG C1 BGA 989P PCH 10K_1206_8P4R_5%
+3VS 1 @ 2
RH149 0_0402_5%
2
@ +3VS
RH150 CH101
10K_0402_5% 1 2
0.1U_0402_25V6K
5
UH5
1
1 PCH_PLTRST#
P
IN1
<6,24,28,32> PLT_RST# 4
O
2
IN2
G
1
SN74AHC1G08DCKR_SC70-5
3
RH155
100K_0402_5% RH157
@ 10K_0402_5%
2
A A
1

PCH (4/8) PCI, USB, NVRAM
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
UH1F
+3V_PCH CRT_DET T7 C40 ODD_EN#

BMBUSY# / GPIO0 TACH4 / GPIO68 ODD_EN# <29>
GPIO1 A42 B41 GPIO69 @ T64 PAD~D
TACH1 / GPIO1 TACH5 / GPIO69
1K_0402_5% 2 1 PCH_LID_SW_IN# GPIO6 H36 C41 +3VS
RH240 TACH2 / GPIO6 TACH6 / GPIO70
10K_0402_5% 2 1 PCH_GPIO28 EC_SCI# E38 A40
<24> EC_SCI# TACH3 / GPIO7 TACH7 / GPIO71
2
D RH241 D
EC_SMI# C10 RH159
<24> EC_SMI# GPIO8
10K_0402_5%
+3VS C4
LAN_PHY_PWR_CTRL / GPIO12
1
EC_LID_OUT# 1 2 PCH_LID_SW_IN# G2 P4
<24> EC_LID_OUT# GPIO15 A20GATE GATEA20 <24>
2
0_0402_5% RH73
High: CRT Plugged RH160 AU16 PCH_PECI_R 1 @ 2
GPIO16 PECI H_PECI <6,24>
10K_0402_5% U2 0_0402_5% RH161
SATA4GP / GPIO16 KB_RST#
P5 KB_RST# <24>
RCIN#
GPIO
1
CRT_DET VGA_PWRGD D40 AY11
<36,52> VGA_PWRGD
CPU/MISC
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD <6>
1
D PCH_GPIO22 H_THERMTRIP#_C 1 H_THERMTRIP#

T5 SCLOCK / GPIO22 THRMTRIP# AY10 2 H_THERMTRIP# <6>
2 390_0402_5% RH162
<21> CRT_DET# KB_DET# INIT3_3V#
QH4 G <26> KB_DET# E8 T14
SSM3K7002F_SC59-3 S GPIO24 / MEM_LED INIT3_3V#
3
PCH_GPIO27 E16 AY1 NV_CLE

GPIO27 DF_TVS
1
PCH_GPIO28 P8 @
GPIO28 RH163
TS_VSS1 AH8
+3VS BT_ON# K1 10K_0402_5%
<32> BT_ON# STP_PCI# / GPIO34
TS_VSS2 AK11
GPIO35 K4
2
GPIO35
AH10 INIT3_3V
ODD_DETECT# TS_VSS3
<29> ODD_DETECT# V8 SATA2GP / GPIO36
TS_VSS4 AK10 This signal has weak internal
10K_0402_5% 2 RH164 1 GPIO1 PCH_GPIO37 M5 PU, can't pull low
SATA3GP / GPIO37
PCH_GPIO38 N2 P37
SLOAD / GPIO38 NC_1
PCH_GPIO39 M3
C SDATAOUT0 / GPIO39 C
FFS_INT2 V13 BG2
<29> FFS_INT2 SDATAOUT1 / GPIO48 VSS_NCTF_15
GPIO28
On-Die PLL Voltage Regulator GPIO49 V3 BG48
SATA5GP / GPIO49 VSS_NCTF_16
This signal has a weak internal pull up
* H
L

On-Die voltage regulator enable
On-Die PLL Voltage Regulator disable
<32> HDD_DETECT#
HDD_DETECT# D6 GPIO57 VSS_NCTF_17 BH3
BH47
DMI Termination Voltage
Set to Vcc when HIGH
VSS_NCTF_18
NV_CLE
1 2 PCH_GPIO28 A4 BJ4 Set to Vss when LOW
VSS_NCTF_1 VSS_NCTF_19
@ RH165 1K_0402_5% A44 BJ44
A45 BJ45
NCTF
A46 BJ46 +1.8VS
A5 BJ5 Weak internal
1
PU,Do not pull low
PCH_GPIO37 A6
BJ6 RH166
FDI TERMINATION VOLTAGE OVERRIDE 2.2K_0402_5%
B3 C2
LOW - Tx, Rx terminated
*
2
to same voltage B47 C48 NV_CLE 2 1
VSS_NCTF_8 VSS_NCTF_26 H_SNB_IVB# <6>
(DC Coupling Mode) 1K_0402_5% RH167
BD1 D1
+3VS BD49 D49
BE1
E1 CLOSE TO THE BRANCHING POINT
RH168 2 @ 1 1K_0402_5% PCH_GPIO37
B
BE49
E49 RH161 and RH162 B
RH169 1 2
10K_0402_5%
PCH_GPIO37 BF1
F1 Follow CRB FAB2 setting
BF49 F49
BD82HM77 QPRG C1 BGA 989P PCH
+3VS
CRT_DET# 1 @ 2 10K_0402_5%
RH170
ODD_DETECT# 1 2 200K_0402_5%
RH171
GPIO16 1 2 10K_0402_5%
1 2 PCH_GPIO27 RH172
@ RH173 10K_0402_5% BT_ON# 1 2 8.2K_0402_5%
RH174
KB_RST# 1 2 10K_0402_5%
RH175
+3V_PCH VGA_PWRGD 1 2 10K_0402_5%
RH242
PCH_GPIO22 1 2 10K_0402_5%
RH176
PCH_GPIO28 needs to be connected to XDP_FN8 GPIO35 1 2 10K_0402_5%

ODD_EN# 1 2 10K_0402_5% RH177
PCH_GPIO35 needs to be connected to XDP_FN9 RH178
PCH_GPIO15 needs to be connected to XDP_FN16 HDD_DETECT# 1 2 10K_0402_5% GPIO49 1 2 10K_0402_5%
RH179 RH180
PCH_GPIO38 1 2 10K_0402_5%
A Please refer to Huron River Debug Board DG 0.5 RH181 A
PCH_GPIO39 1 2 10K_0402_5%
RH182
EC_SMI# 1 2 10K_0402_5%
RH183 GPIO6 1 2 10K_0402_5%
RH184

PCH (5/8) GPIO, CPU, MISC
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
D D
+1.05VS PCH Power Rail Table
UH1G POWER +3VS S0 Iccmax
JP1
@ Voltage Rail Voltage Current (A)
1300mA LH1
0.01U_0402_16V7K
0.1U_0402_10V7K~D
2 1 +1.05VS_VCCCORE AA23 U48 +VCCADAC 2 1
VCCCORE[1] 1mA VCCADAC
AC23
VCCCORE[2] 1 1 1 4.7UH_LQM18FN4R7M00D_20% V_PROC_IO 1.05 0.001
10U_0805_4VAM~D
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
CRT
AD21
PAD-OPEN 4x4m 1 1 1 1 VCCCORE[3]
CH32
CH33
AD23 U47 CH34
VCCCORE[4] VSSADAC 10U_0805_4VAM~D
CH35
CH36
CH37
CH38
VCC CORE
AF21
VCCCORE[5]
V5REF 5 0.001
AF23 2 2 2
2 2 2 2 VCCCORE[6] +3VS
AG21 VCCCORE[7]
AG23 VCCCORE[8]
V5REF_Sus 5 0.001
AG24 AK36 +VCCA_LVDS RH185 1 2 0_0805_5%
VCCCORE[9] 1mA VCCALVDS
AG26 VCCCORE[10]
AG27 AK37 +1.8VS Vcc3_3 3.3 0.266
VCCCORE[11] VSSALVDS
AG29 VCCCORE[12]
AJ23 Near AP43 LH2
LVDS
VCCCORE[13] +VCCTX_LVDS
AJ26 VCCCORE[14] VCCTX_LVDS[1] AM37 CH41 2 1 VccADAC 3.3 0.001
AJ27 CH39 1 1 1 0.1UH_MLF1608DR10KT_10%_1608
+1.05VS VCCCORE[15] 0.01U_0402_16V7K 22U_0805_6.3V6M 0.1uH inductor, 200mA
AJ29 VCCCORE[16] VCCTX_LVDS[2] AM38
AJ31 VCCCORE[17]
CH40 VccADPLLA 1.05 0.08
AP36 0.01U_0402_16V7K
60mA VCCTX_LVDS[3] 2 2 2
VCCTX_LVDS[4] AP37 VccADPLLB 1.05 0.08

+1.05VS RH186 2 1 0_0603_5% +1.05VS_VCCDPLLEXP AN19
VCCIO[28]
@ LH3 VccCore 1.05 1.3
2 @ 1 +VCCAPLLEXP_R1 2 +VCCAPLLEXP BJ22
RH187 0_0603_5% 1UH_LB2012T1R0M_20%~D VCCAPLLEXP RH188
10U_0805_4VAM~D
1 V33 +3VS_VCC3_3_6 1 2 VccDMI 1.05 0.042

+3VS
HVCMOS
C VCC3_3[6] 0_0805_5% C
AN16 VCCIO[15]
CH42
Place CH40 Near BJ22 pin 1

AN17 VCCIO[16]
VccIO 1.05 2.925
2 @ CH43
VCC3_3[7] V34
+1.05VS 0.1U_0402_10V7K~D
AN21 2 VccASW 1.05 1.01
VCCIO[17]
AN26
VCCIO[18]
1
VccSPI 3.3 0.02

RH189 AN27 2925mA AT16 +VCCAFDI_VRM
VCCIO[19] VCCVRM[3]
0_0805_5%
AP21 +VCCP_VCCDMI +VCCP VccDSW 3.3 0.003
VCCIO[20] RH190
2
+1.05VS_VCC_EXP AP23 AT20 +VCCP_VCCDMI 1 2

VCCIO[21] VCCDMI[1]
1 VccpNAND 1.8 0.19
DMI
10U_0805_4VAM~D
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 AP24 0_0805_5%
VCCIO
+3VS VCCIO[22] RH191 CH44
CH45
CH46
CH47
CH48
CH49
AP26 20mA VCCCLKDMI AB36 +1.05VS_VCC_DMI_CCI 1 2 VccRTC 3.3 6 uA

VCCIO[23] +1.05VS 2 1U_0402_6.3V6K
1 0_0805_5%
2 2 2 2 2 AT24
VCCIO[24] CH50 VccSus3_3 3.3 0.119
1U_0402_6.3V6K
1
2
AN33
VCCIO[25]
RH192 VccSusHDA 3.3 / 1.5 0.01
0_0805_5% AN34 AG16
VCCIO[26] VCCDFTERM[1] +VCCPNAND
VccVRM 1.8 / 1.5 0.16
2
+3VS_VCCA3GBG BH29 AG17 1 2 +1.8VS

190mAVCCDFTERM[2]
DFT / SPI
VCC3_3[3] RH193 0_0805_5%

1
0.1U_0402_10V7K~D
CH51 VccCLKDMI 1.05 0.02
+1.05VS AJ16 1
0.1U_0402_10V7K~D VCCDFTERM[3]
B 2 B
CH52
+VCCAFDI_VRM AP16 VccSSC 1.05 0.095
VCCVRM[2]
AJ17
VCCDFTERM[4] 2
Place CH53 Near BG6 pin
2 @ 1 +1.05VS_VCCAPLL_FDI BG6 VccDIFFCLKN 1.05 0.055
RH194 0_0603_5% VccAFDIPLL
1U_0402_6.3V6K
1 RH195
+1.05VS 1 2 +1.05VS_VCCDPLL_FDI AP17 RH196 VccALVDS 3.3 0.001
VCCIO[27]
CH53
FDI
0_0805_5% V1 +3V_VCCPSPI 1 2
20mA VCCSPI +3V_PCH
0_0805_5%
2 @ AU20 VccTX_LVDS 1.8 0.06
+VCCP_VCCDMI VCCDMI[2] RH243
2 1 +3VS
BD82HM77 QPRG C1 BGA 989P PCH 1 0_0603_5%
@
CH54
1U_0402_6.3V6K
2
+1.5VS +VCCAFDI_VRM
RH197
2 1 +VCCAFDI_VRM
0_0603_5% 1
A A
CH100
1U_0402_6.3V6K
2

PCH (6/8) PWR
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
+1.05VS
VCC3_3 = 266mA detal waiting for newest spec
VCCDMI = 42mA detal waiting for newest spec
2 @ 1 +VCCACLK
+3V_PCH RH198 0_0603_5%
UH1J POWER QH5
1 2
RH199 0_0603_5% AD49 N26 +1.05VS_VCCUSBCORE 2 1 +5VALW RH201 AO3419L_SOT23-3 +5V_PCH
1 VCCACLK VCCIO[29] +1.05VS
RH200 0_0603_5% 0_0603_5%
D
CH55 P26 1 2 1 3 1
VCCIO[30]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D +VCCPDSW T16
2 VCCDSW3_3 3mA
20K_0402_5%
D CH56 D
P28
VCCIO[31]
1
1U_0402_6.3V6K
G
1
2
2
RH203
+PCH_VCCDSW V12 T27
+1.05VS DCPSUSBYP VCCIO[32]
CH57
@ LH4 1
@ RH204 10UH_LBR2012T100M_20% T29
VCCIO[33] <27> PCH_PWR_EN# 2
1 2 +VCCAPLL_CPY 1 2 @ CH58 +3VS_VCC_CLKF33 T38
2
0.1U_0402_10V7K~D VCC3_3[5]
2
10U_0805_10V6K
0_0805_5% @ 1 T23 +3V_VCCPUSB 2 1
+1.05VS 119mA VCCSUS3_3[7] +3V_PCH
0.1U_0402_10V7K~D
+VCCAPLL_CPY_PCH BH23 RH205 0_0603_5%
VCCAPLLDMI2
CH59
T24 1 +3V_VCCAUBG 2 1 +3V_PCH
VCCSUS3_3[8] +5V_PCH +3V_PCH
0.1U_0402_10V7K~D
1 2 +VCCDPLL_CPY AL29 RH206 0_0603_5%
2 VCCIO[14]
CH60
RH207 0_0603_5% V23 1
USB
VCCSUS3_3[9]
2
2
CH61
+VCCSUS1 AL24 V24 +VCCA_USBSUS
DCPSUS[3] VCCSUS3_3[10]
1U_0402_6.3V6K
1 RH208 DH2
@ P24 2 100_0402_1%
VCCSUS3_3[6] 1 RB751S40T1_SOD523-2~D
CH62
@CH63
1U_0402_6.3V6K AA19
1
2 VCCASW[1] +1.05VS_VCCAUPLL +PCH_V5REF_SUS
VCCIO[34] T26 2 1 +1.05VS
1010mA RH209 0_0603_5% 2
AA21 VCCASW[2] 1
+1.05VM_VCCASW AA24 M26 +PCH_V5REF_SUS CH64
VCCASW[3] 1mA V5REF_SUS
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 2 1 +3V_PCH 0.1U_0603_25V7K
2
0.1U_0402_10V7K~D
Clock and Miscellaneous
AA26 RH210 0_0603_5%
VCCASW[4]
CH65
CH66
AN23 +VCCA_USBSUS 1
DCPSUS[4]
AA27 VCCASW[5]
2 2
CH67
AN24 +3V_VCCPSUS_1
VCCSUS3_3[1]
AA29 VCCASW[6] 2
+1.05VS AA31 +5VS +3VS
VCCASW[7]
1 2 AC26 P34 +PCH_V5REF_RUN
VCCASW[8] 1mA V5REF
2
C C
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
RH211 0_0805_5% 1 1 1 RH213
AC27 0_0603_5% RH212 DH3
VCCASW[9]
CH68
CH69
CH70
N20 +3V_VCCPSUS 2 1 +3V_PCH 100_0402_1% RB751S40T1_SOD523-2~D
VCCSUS3_3[2]
PCI/GPIO/LPC
AC29 VCCASW[10] 1
+3VS 2 2 2 N22
1
VCCSUS3_3[3] CH71 +PCH_V5REF_RUN
AC31 VCCASW[11]
P20 1U_0402_6.3V6K +3VS
VCCSUS3_3[4] 2 1
AD29
VCCASW[12] +3VS_VCCPCORE CH72
P22 2 1
VCCSUS3_3[5] RH214 0_0805_5% 1U_0603_10V6K
1 2 AD31 1
0_0805_5% RH215 VCCASW[13] 2
W21 AA16 CH73
LH5 VCCASW[14] VCC3_3[1] 0.1U_0402_10V7K~D
10UH_LBR2012T100M_20% W23 W16 2 +3VS
+3VS_VCC_CLKF33 VCCASW[15] VCC3_3[8]
1 2
10U_0805_10V6K
1U_0402_6.3V6K
1 1 W24 T34 +3VS_VCCPPCI 2 1

@ VCCASW[16] VCC3_3[4] RH216 0_0603_5%
1
CH74
CH75
W26
VCCASW[17] CH76
2 2 W29 +3VS 0.1U_0402_10V7K~D
VCCASW[18] RH217 2
W31 AJ2 +VCC3_3_2 2 1
VCCASW[19] VCC3_3[2] +1.05VS_SATA3
1
W33 0_0603_5% RH218
VCCASW[20] CH77
AF13 2 1 +1.05VS
VCCIO[5] 0.1U_0402_10V7K~D
2 1
+1.05VS +VCCRTCEXT N16 0_0805_5%
DCPRTC CH78
1 AH13
@ +1.05VM_VCCSUS VCCIO[12] 1U_0402_6.3V6K
2 1
RH219 0_0603_5% CH79 +VCCAFDI_VRM Y49 AH14 +1.05VS_SATA3 2
0.1U_0402_10V7K~D VCCVRM[4] VCCIO[13]
2
B +1.05VS AF14 @ LH6 @ B
+1.05VS_VCCA_A_DPL VCCIO[6] 10UH_LBR2012T100M_20% RH221
BD47
SATA
+VCCDIFFCLK VCCADPLLA 80mA +VCCSATAPLL
2 1 VCCAPLLSATA
AK1 1 2 +VCCSATAPLL_R 2 1 +1.05VS
RH220 0_0603_5% +1.05VS_VCCA_B_DPL BF47 +VCCAFDI_VRM
VCCADPLLB 80mA 0_0805_5%
1 1
CH80 AF11 +VCCAFDI_VRM @ CH81
VCCVRM[1] +1.05VS_VCC_SATA 10U_0805_10V6K
AF17
+1.05VS 1U_0402_6.3V6K +1.05VS_VCCDIFFCLKN VCCIO[7] RH222
AF33
2 VCCDIFFCLKN[1] +1.05VS_VCC_SATA 2
AF34
VCCDIFFCLKN[2]
55mA VCCIO[2]
AC16 2 1 +1.05VS
2 1 +1.05VS_VCCDIFFCLKN AG34
VCCDIFFCLKN[3]
1U_0402_6.3V6K
RH223 0_0603_5% 1 AC17 1 0_0805_5%
VCCIO[3]
CH83
CH82 +1.05VS_SSCVCC AG33 AD17
1U_0402_6.3V6K VCCSSC 95mA VCCIO[4]
+1.05VS 2 2
+VCCSST V16 +1.05VS
DCPSST
2 1
RH224 0_0603_5% 1 1 +1.05VM_VCCSUS
CH85 1 T17 T21
CH84 0.1U_0402_10V7K~D @ DCPSUS[1] VCCASW[22]
V19
DCPSUS[2]
MISC
+VCCP 1U_0402_6.3V6K CH86

2 2 1U_0402_6.3V6K V21
2 VCCASW[23]
CPU
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2 +V_CPU_IO BJ8
RH227 0_0603_5% V_PROC_IO 1mA
1 1 1 T19
VCCASW[21]
+RTCVCC
CH88
CH89
CH87
4.7U_0603_6.3V6K
2 2 2
RTC
A22 P32 +VCCSUSHDA 2 1 If it support 3.3V audio signals

HDA
VCCRTC 10mA VCCSUSHDA +3V_PCH

1U_0402_6.3V6K
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
RH229 0_0603_5% POP:RH244

1 1 1 1 Depop RH245 / RH246
150_0402_1%
LH7 BD82HM77 QPRG C1 BGA 989P PCH
1
A A
CH90
CH91
CH92
10UH_LBR2012T100M_20% 0.1U_0402_10V7K~D CH93

1 2 +1.05VS_VCCA_A_DPL If it support 1.5V audio signals
+1.05VS 2 2 2 2
RH231
@ POP:RH245 / RH246
Depop R244
220U_B2_2.5VM_R35M~D
220U_B2_2.5VM_R35M~D
1 2 +VCCA_DPLL_L 1 2 +1.05VS_VCCA_B_DPL
RH232 LH8 2
1U_0402_6.3V6K
1U_0402_6.3V6K
10UH_LBR2012T100M_20% 1 1
0_0805_5%
+
1
+
CH94
CH95
CH96
CH97

2 2 2 2
PCH (7/8) PWR
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
UH1I
AY4 VSS[159] VSS[259] H46

AY42 K18
VSS[160] VSS[260]
AY46 K26
VSS[161] VSS[261]
AY8 K39
D UH1H VSS[162] VSS[262] D
B11 K46
VSS[163] VSS[263]
H5 B15 K7
VSS[0] VSS[164] VSS[264]
B19 L18
VSS[165] VSS[265]
AA17 AK38 B23 L2
VSS[1] VSS[80] VSS[166] VSS[266]
AA2 AK4 B27 L20
VSS[2] VSS[81] VSS[167] VSS[267]
AA3 AK42 B31 L26
VSS[3] VSS[82] VSS[168] VSS[268]
AA33 AK46 B35 L28
VSS[4] VSS[83] VSS[169] VSS[269]
AA34 AK8 B39 L36
VSS[5] VSS[84] VSS[170] VSS[270]
AB11 AL16 B7 L48
VSS[6] VSS[85] VSS[171] VSS[271]
AB14 AL17 F45 M12
VSS[7] VSS[86] VSS[172] VSS[272]
AB39 AL19 BB12 P16
VSS[8] VSS[87] VSS[173] VSS[273]
AB4 VSS[9] VSS[88] AL2 BB16 VSS[174] VSS[274] M18
AC19 VSS[13] VSS[92] AL27 BB28 VSS[178] VSS[278] M32
AC34 VSS[18] VSS[97] AM11 BC14 VSS[183] VSS[283] M46
AC48 VSS[19] VSS[98] AM14 BC18 VSS[184] VSS[284] M8
AD10 VSS[20] VSS[99] AM36 BC2 VSS[185] VSS[285] N18
AD11 VSS[21] VSS[100] AM39 BC22 VSS[186] VSS[286] P30
AD12 VSS[22] VSS[101] AM43 BC26 VSS[187] VSS[287] N47
AD24 VSS[25] VSS[104] AM7 BC36 VSS[190] VSS[290] T33
AD26 VSS[26] VSS[105] AN2 BC40 VSS[191] VSS[291] P40
AD34 VSS[29] VSS[108] AN31 BD46 VSS[194] VSS[294] P7
C C
AD36 VSS[30] VSS[109] AP12 BD5 VSS[195] VSS[295] R2
AD37 VSS[31] VSS[110] AP19 BE22 VSS[196] VSS[296] R48
AD38 VSS[32] VSS[111] AP28 BE26 VSS[197] VSS[297] T12
AD39 VSS[33] VSS[112] AP30 BE40 VSS[198] VSS[298] T31
AD4 VSS[34] VSS[113] AP32 BF10 VSS[199] VSS[299] T37
AD40 VSS[35] VSS[114] AP38 BF12 VSS[200] VSS[300] T4
AD42 VSS[36] VSS[115] AP4 BF16 VSS[201] VSS[301] W34
AD43 AP42 BF20 T46
VSS[37] VSS[116] VSS[202] VSS[302]
AD45 AP46 BF22 T47
VSS[38] VSS[117] VSS[203] VSS[303]
AD46 AP8 BF24 T8
VSS[39] VSS[118] VSS[204] VSS[304]
AD8 AR2 BF26 V11
VSS[40] VSS[119] VSS[205] VSS[305]
AE2 AR48 BF28 V17
VSS[41] VSS[120] VSS[206] VSS[306]
AE3 AT11 BD3 V26
VSS[42] VSS[121] VSS[207] VSS[307]
AF10 AT13 BF30 V27
VSS[43] VSS[122] VSS[208] VSS[308]
AF12 AT18 BF38 V29
VSS[44] VSS[123] VSS[209] VSS[309]
AD14 AT22 BF40 V31
VSS[45] VSS[124] VSS[210] VSS[310]
AD16 AT26 BF8 V36
VSS[46] VSS[125] VSS[211] VSS[311]
AF16 AT28 BG17 V39
VSS[47] VSS[126] VSS[212] VSS[312]
AF19 AT30 BG21 V43
VSS[48] VSS[127] VSS[213] VSS[313]
AF24 AT32 BG33 V7
VSS[49] VSS[128] VSS[214] VSS[314]
AF26 AT34 BG44 W17
VSS[50] VSS[129] VSS[215] VSS[315]
AF27 AT39 BG8 W19
VSS[51] VSS[130] VSS[216] VSS[316]
AF29 AT42 BH11 W2
VSS[52] VSS[131] VSS[217] VSS[317]
AF31 AT46 BH15 W27
VSS[53] VSS[132] VSS[218] VSS[318]
AF38 AT7 BH17 W48
VSS[54] VSS[133] VSS[219] VSS[319]
AF4 AU24 BH19 Y12
VSS[55] VSS[134] VSS[220] VSS[320]
AF42 AU30 H10 Y38
VSS[56] VSS[135] VSS[221] VSS[321]
AF46 AV16 BH27 Y4
VSS[57] VSS[136] VSS[222] VSS[322]
AF5 AV20 BH31 Y42
VSS[58] VSS[137] VSS[223] VSS[323]
AF7 AV24 BH33 Y46
VSS[59] VSS[138] VSS[224] VSS[324]
AF8 AV30 BH35 Y8
VSS[60] VSS[139] VSS[225] VSS[325]
AG19 AV38 BH39 BG29
B VSS[61] VSS[140] VSS[226] VSS[328] B
AG2 AV4 BH43 N24
VSS[62] VSS[141] VSS[227] VSS[329]
AG31 AV43 BH7 AJ3
VSS[63] VSS[142] VSS[228] VSS[330]
AG48 AV8 D3 AD47
VSS[64] VSS[143] VSS[229] VSS[331]
AH11 AW14 D12 B43
VSS[65] VSS[144] VSS[230] VSS[333]
AH3 AW18 D16 BE10
VSS[66] VSS[145] VSS[231] VSS[334]
AH36 AW2 D18 BG41
VSS[67] VSS[146] VSS[232] VSS[335]
AH39 AW22 D22 G14
VSS[68] VSS[147] VSS[233] VSS[337]
AH40 AW26 D24 H16
VSS[69] VSS[148] VSS[234] VSS[338]
AH42 AW28 D26 T36
VSS[70] VSS[149] VSS[235] VSS[340]
AH46 AW32 D30 BG22
VSS[71] VSS[150] VSS[236] VSS[342]
AH7 AW34 D32 BG24
VSS[72] VSS[151] VSS[237] VSS[343]
AJ19 AW36 D34 C22
VSS[73] VSS[152] VSS[238] VSS[344]
AJ21 AW40 D38 AP13
VSS[74] VSS[153] VSS[239] VSS[345]
AJ24 AW48 D42 M14
VSS[75] VSS[154] VSS[240] VSS[346]
AJ33 AV11 D8 AP3
VSS[76] VSS[155] VSS[241] VSS[347]
AJ34 AY12 E18 AP1
VSS[77] VSS[156] VSS[242] VSS[348]
AK12 AY22 E26 BE16
VSS[78] VSS[157] VSS[243] VSS[349]
AK3 AY28 G18 BC16
VSS[79] VSS[158] VSS[244] VSS[350]
G20 BG28
BD82HM77 QPRG C1 BGA 989P PCH VSS[245] VSS[351]
G26 BJ28
VSS[246] VSS[352]
G28
VSS[247]
G36
VSS[248]
G48
VSS[249]
H12
VSS[250]
H18
VSS[251]
H22
VSS[252]
H24
VSS[253]
H26
VSS[254]
H30
VSS[255]
H32
VSS[256]
H34
VSS[257]
F3 VSS[258]
A A
BD82HM77 QPRG C1 BGA 989P PCH

PCH (8/8) VSS
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
C R T
From VGA for debug CRT
D VGA_CRT_R RV223 1 @ CRT_R D
<35> VGA_CRT_R 20_0402_5%
VGA_CRT_G RV224 1 @ 20_0402_5% CRT_G
<35> VGA_CRT_G VGA_CRT_B RV225 1 CRT_B
@ 20_0402_5%
<35> VGA_CRT_B
VGA_CRT_HSYNCRV226 1 @ 20_0402_5% CRT_HSYNC
<35> VGA_CRT_HSYNC VGA_CRT_VSYNCRV227 1 CRT_VSYNC
@ 20_0402_5%
<35> VGA_CRT_VSYNC
VGA_CRT_CLK RV228 1 @ 20_0402_5% CRT_DDC_CLK
<35> VGA_CRT_CLK VGA_CRT_DATARV229 1 CRT_DDC_DATA
@ 20_0402_5%
<35> VGA_CRT_DATA
+5VS +R_CRT_VCC +CRT_VCC
DV4 FV2 W=40mils

2 1 1 2
W=40mils 3 NC
1
1.1A_6VDC_FUSE 1
BAT1000-7-F_SOT23-3~D RV1 CV1
2 0_1206_5%
1 0.1U_0402_16V7K
RV2 @ 100K_0402_5%
2
2
<17> CRT_DET#
JCRT
LV1 0_0603 LV2 LQW18AN47NG00D _0603 6
1 2 CRT_R_C 1 2 CRT_R_L DV1 @ PAD~D T65 @ 11
<15> CRT_R
2 CRT_R_L 1
LV3 0_0603 LV4 LQW18AN47NG00D _0603 1 7
1 2 CRT_G_C 1 2 CRT_G_L 3 CRT_DDC_DATA_C 12
<15> CRT_G CRT_G_L 2
LV5 0_0603 LV6 LQW18AN47NG00D _0603 PESD5V0U2BT_SOT23-3 8
1 2 CRT_B_C 1 2 CRT_B_L DV2 @ HSYNC_L 13
<15> CRT_B
22P_0402_50V8J
CV3
22P_0402_50V8J
CV4
22P_0402_50V8J
CV5
2 CRT_B_L 3
150_0402_1%
RV3
150_0402_1%
RV4
150_0402_1%
RV5
10P_0402_50V8J
CV9
10P_0402_50V8J
CV10
10P_0402_50V8J
CV11
C C
1 9
1
1
150_0402_1%
CV6
150_0402_1%
CV7
150_0402_1%
CV8
3 VSYNC_L 14
1
1
For EMI 4
For EMI @ @ @ 2 PESD5V0U2BT_SOT23-3 10 G 16
2
CRT_DDC_CLK_C 15 G 17
2
1 5
2
100P_0402_50V8J
CV12
2
SUYIN_070546HR015M22BZR
CONN@
2
B B
CV13 +CRT_VCC
+3VS +3VS +3VS +CRT_VCC +CRT_VCC 0.1U_0402_16V7K
1 2
2
5
1
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
RV6
RV7
2.2K_0402_5%
RV8
RV9
RV10
OE#
P
CRT_HSYNC 2 4 D_CRT_HSYNC 1 2 0_0603_5% HSYNC_L
<15> CRT_HSYNC A Y
G
UV26
1
74AHCT1G125GW_SOT353-5 RV11
3
D_CRT_VSYNC 1 2 0_0603_5% VSYNC_L
2
G
1
+CRT_VCC
10P_0402_50V8J
CV14
10P_0402_50V8J
CV15
3 1 CRT_DDC_DATA_C CV16 RV12
<15> CRT_DDC_DATA
0.1U_0402_16V7K 10K_0402_5%
S
D
2
G
QV1 1 2 1 2
2
2N7002BKW_SOT323-3
3 1 CRT_DDC_CLK_C
<15> CRT_DDC_CLK
5
1
S
QV2
OE#
P
2N7002BKW_SOT323-3 CRT_VSYNC 2 4
<15> CRT_VSYNC A Y
G
UV27
74AHCT1G125GW_SOT353-5
3
A A

VGA / LVDS /camera conn.
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
+3VS
LCD PWR CTRL LVDS Conn.
1
@ RV13
@ 4.7K_0402_5% JLVDS
DV5 <15> LVDS_A0- LVDS_A0- 1
2
+LCDVDD +5VALW BKOFF# DISPOFF# LVDS_A0+ 1
<24> BKOFF# 1 2 <15> LVDS_A0+ 2 41
2 G1
3 42
3 G2
1
<15> LVDS_A1- LVDS_A1- 4 43
4 G3
2
CH751H-40PT_SOD323-2~D <15> LVDS_A1+ LVDS_A1+ 5 44
RV15 +3VS DV6 10K_0402_5% 5 G4
6 45
RV14 47K_0402_5% RV16 5P_0402_50V8C LVDS_A2- 6 G5
2 1 CV17 <15> LVDS_A2- 7 46
100_0402_1% @ LVDS_A2+ 7 G6
W=60mils <15> LVDS_A2+ 8
2
8
1 2 9
1 1
1
RV17 CH751H-40PT_SOD323-2~D LVDS_ACLK- 9
CV18 <15> LVDS_ACLK- 10
10
3
D D 56K_0402_5%
S
AO3419L_SOT23-3 5P_0402_50V8C @ LVDS_ACLK+ D
<15> LVDS_ACLK+ 11
QV3
G
QV4 11
2 2 1 2 1 2 12
SSM3K7002FU_SC70-3~D G LVDS_B0- 12
<15> LVDS_B0- 13
LVDS_B0+ 13
S <15> LVDS_B0+ 14
3
4.14 +LCDVDD DLW21SN900HQ2L_0805_4P~D 14
1 15
15
0.1U_0402_16V7K
CV19
D
DV7 1 2 USB20_P12_R <15> LVDS_B1- LVDS_B1- 16
<16> USB20_P12
1
PCH_ENVDD +LCDVDD 1 2 LVDS_B1+ 16
<15> PCH_ENVDD 2 W=60mils <15> LVDS_B1+ 17
17
1
D
18
QV5 2 USB20_N12_R LVDS_B2- 18
1 2 1 1 <16> USB20_N12 4 3 <15> LVDS_B2- 19
G BSS138_SOT23~D CV21 4 3 LVDS_B2+ 19
<15> LVDS_B2+ 20
20
1
EC_ENVDD 3 S CV20 0.1U_0402_16V7K LV24 @ 21
<24> EC_ENVDD
3
4.7U_0805_10V4Z LVDS_BCLK- 21
1 2 <15> LVDS_BCLK- 22
BAT54C-7-F_SOT23-3 RV18 2 2 RV210 0_0402_5% LVDS_BCLK+ 22
<15> LVDS_BCLK+ 23
10K_0402_5% LCD_TEST 23
<24> LCD_TEST 24
@ EDID_CLK_LCD 24
1 2 <15> LVDS_DDC_CLK 2 1 25
2
RV208 0_0402_5% @ RV19 20_0402_1% 1 EDID_DATA_LCD 25
<15> LVDS_DDC_DATA 26
INV_PWM RV20 0_0402_1% 26
27
DISPOFF# 27
28
USB20_P12_R 28
29
USB20_N12_R 29
30
30
+3VS_CAM 31
MIC_CLK_R 31
32
32
33
MIC_DATA 33
<30> MIC_DATA 34
34
35
35
W=60mils +LCDVDD 36
36
+3VS 37
37
38
38
39
39
0.1U_0402_16V7K
10U_0805_10V6K
W=60mils +INV_PWR_SRC 40
40
1 1 1
CV23
CV24
CV22 STARC_107K40-000001-G2
CONN@
0.1U_0402_16V7K
LCD backlight PWR CTRL 2 2 2
C C
60mil QV6
B+ SI3457CDV-T1-E3_TSOP6~D 60mil
+INV_PWR_SRC_R RV24 1 2 0_0805_5% +INV_PWR_SRC
D
6
S
4 5
2
* Reserved for EMI/ESD/RF
1000P_0402_50V7K
CV25
100K_0402_5%
RV25
1
1
1 1 CV27
5P_0402_50V8C
need to close to JLVDS
3
CV26 1 @2 LVDS_BCLK-
0.1U_0603_50V_X7R
2 2
CV28
2
5P_0402_50V8C DV8
PWR_SRC_ON 1 @2 LVDS_BCLK+ MIC_CLK_R 6 1 USB20_P12_R
V I/O V I/O
1
+5VS 5 2
RV26 V BUS Ground
100K_0402_5% MIC_DATA 4 3 USB20_N12_R
@ V I/O V I/O
B+ RV27 1 2 0_0805_5% +INV_PWR_SRC IP4223CZ6_SO6-6
2
RV28
1
0_0402_5% D
<24> EN_INVPWR 2 1 +LCDVDD_R 2 QV7 RV29 RV30

G SSM3K7002FU_SC70-3~D 0_0402_5% 0_0402_5%
RV31 S 2 1 INV_PWM MIC_CLK 2 1 MIC_CLK_R
<15> VGA_PWM <30> MIC_CLK
3
0_0402_5% 1
+LCDVDD 2 1 @ CV29
1
1
@ RV230 470P_0402_50V7K~D
100K_0402_5% @ CV30 2
680P_0402_50V7K~D
B 2 B
2
Wedcam PWR CTRL * Reserved for LCD
+INV_PWR_SRC sequence tuning
+5VALW
1
@
RV32
1
820_0805_1%
RV33
+3VS +3VS_CAM +3VS 100K_0402_5%
3 2
QV8
2N7002DW-7-F_SOT363-6
@
SI2301CDS-T1-GE3_SOT23-3 @
2
QV9B
S
3 1 2 1
2N7002DW-7-F_SOT363-6
1000P_0402_50V7K
5
1 @ RV231 0_0603_5%
1
6
CV319 @
G
2
4
RV34 QV9A
100K_0402_5% @
@2 +LCDVDD_R 2
2
RV209 @
1
<24> CMOS_ON# 2 1
A A
47K_0402_5%
2
CV31
0.1U_0402_16V7K @
1

LVDS /camera conn.
1.0
5 4 3 2 1
5 4 3 2 1
W=40mils
Place close to JHDMI1

RV36 0_1206_5%
2 1
RV35 1 @ 2 0_0402_5% +VDISPLAY_VCC
LV7 DV9 FV1
10U_0603_6.3V6M
0.1U_0402_10V7K~D
TMDS_TXCN 1 2 TMDS_L_TXCN 2 1 2 1
D 1 2 +5VS D
3 NC 1 1
CV34
<15> HDMI_A3N_VGA
CV32 2 1 0.1U_0402_10V7K~D TMDS_TXCN @ 1.5A_6V_1206L150PR~D
<15> HDMI_A3P_VGA
CV33 2 1 0.1U_0402_10V7K~D TMDS_TXCP TMDS_TXCP 4
4 3
3 TMDS_L_TXCP BAT1000-7-F_SOT23-3~D CV35
2 2
<15> HDMI_A0N_VGA
CV36 2 1 0.1U_0402_10V7K~D TMDS_TX0N WCM-2012HS-900T_4P +3VS
<15> HDMI_A0P_VGA
CV37 2 1 0.1U_0402_10V7K~D TMDS_TX0P
RV37 1 @ 2 0_0402_5%
<15> HDMI_A1N_VGA
CV38 2 1 0.1U_0402_10V7K~D TMDS_TX1N
<15> HDMI_A1P_VGA
CV39 2 1 0.1U_0402_10V7K~D TMDS_TX1P
1
RV38 1 @ 2 0_0402_5%
<15> HDMI_A2N_VGA
CV40 2 1 0.1U_0402_10V7K~D TMDS_TX2N RV39
<15> HDMI_A2P_VGA
CV41 2 1 0.1U_0402_10V7K~D TMDS_TX2P LV8 10K_0402_5%
TMDS_TX0N 1 2 TMDS_L_TX0N
1 2
2
JHDMI
TMDS_TX0P 4 3 TMDS_L_TX0P HDMI_HPLUG 19
4 3 HP_DET
18 +5V
WCM-2012HS-900T_4P 17
@ DDC_DAT_HDMI DDC/CEC_GND
16 SDA
RV42
RV43
RV44
RV45
RV46
RV47
RV48
RV49
RV40 1 2 0_0402_5% DDC_CLK_HDMI 15 SCL
14 Reserved
13 CEC
1
RV41 1 @ 2 0_0402_5% TMDS_L_TXCN 12 CK-
680_0402_1%
680_0402_1%
680_0402_1%
680_0402_1%
680_0402_1%
680_0402_1%
680_0402_1%
680_0402_1%
11 CK_shield
LV9 TMDS_L_TXCP 10
TMDS_TX1N TMDS_L_TX1N TMDS_L_TX0N CK+
1 1 2 2 9 D0-
8
2
TMDS_L_TX0P D0_shield
7 D0+
TMDS_TX1P 4 3 TMDS_L_TX1P TMDS_L_TX1N 6
4 3 D1-
5 D1_shield
WCM-2012HS-900T_4P TMDS_L_TX1P 4 20
TMDS_L_TX2N D1+ GND
3 D2- GND 21
C RV50 1 @ C
2 0_0402_5% 2 D2_shield GND 22
1
0_0402_1% D TMDS_L_TX2P 1 D2+ GND 23
+3VS 1 2 2 QV11
G ACON_HMR2U-AK120C
1
RV51 @ S RV52 1 @ 2 0_0402_5% CONN@
3
RV53 2N7002_SOT23
100K_0402_5% LV10
TMDS_TX2N 1 2 TMDS_L_TX2N
1 2
2
TMDS_TX2P 4 3 TMDS_L_TX2P 46@ ROYALTY HDMI W/LOGO
4 3
Part Number Description
WCM-2012HS-900T_4P
RO0000002HM HDMI W/Logo:RO0000002HM
RV54 1 @ 2 0_0402_5%
TMDS_TXCN @ CV358 1 2 100P_0402_50V8J TMDS_L_TXCN CV349 1 2 3.3P_0402_50V8C~D

TMDS_TXCP @ CV360 1 2 100P_0402_50V8J TMDS_L_TXCP CV350 1 2 3.3P_0402_50V8C~D
TMDS_TX0N @ CV362 1 2 100P_0402_50V8J TMDS_L_TX0N CV351 1 2 3.3P_0402_50V8C~D
TMDS_TX0P @ CV363 1 2 100P_0402_50V8J TMDS_L_TX0P CV352 1 2 3.3P_0402_50V8C~D

B B
20111024 EMI ADD 20110805 EMI ADD
+3VS
1
+5VS C RV57
QV13 2 1 2 HDMI_HPLUG
MMBT3904_NL_SOT23-3 B 150K_0402_5%
+3VS E 1
2
<15> HDMI_DET
2
@ CV42
1
1
@ RV59 220P_0402_50V8J
1
200K_0402_5% 2
@ DV10 0_0402_1% RV55 DV11
1
RB751V-40GTE-17_SOD323-2~D RV56 100K_0402_5% BAV99-7-F_SOT23-3
QV12A @
2
2
2
1
3
1 6 DDC_CLK_HDMI 1 2 +5V_HDMI_DDC
<15> PCH_SDVO_CTRLCLK
RV58 2.2K_0402_5%
A A
5
+3VS
<15> PCH_SDVO_CTRLDATA 4 3 DDC_DAT_HDMI 1 2
RV60 2.2K_0402_5%
QV12B
HDMI
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-8241P 1.0
5 4 3 2 1
5 4 3 2 1
+3VALW LE1
FBMA-L11-160808-800LMT_0603 Board ID
1 2 0.1U_0402_16V7K 0.1U_0402_16V7K +3VALW_EC 1 2 +EC_VCCA +3VALW
RE1 1 1 1 1 2 2
2
0_0805_5% CE1 CE2 CE3 CE4 CE5 CE6 1
2
KB930@
RE2 0.1U_0402_16V7K
1000P_0402_50V7K 0_0402_5% CE7 RE3
2 2 2 2 1 1 ECAGND
2
Ra 100K_0402_5%
0.1U_0402_16V7K 0.1U_0402_16V7K 1000P_0402_50V7K
1
KB9012@
1
RE4 2 1 +3VLP AD_BID0
0_0402_5% RE5 VOS@
2
1
111
125
D Reserved for KB9012 RE5 CE8 D
22
33
96
67
UE1
9
Rb 56K_0402_5%
INS@
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
2
1
100K_0402_5% 0.1U_0402_16V7K
GATEA20 1 21 KB_LED_PWM
<17> GATEA20 KB_RST# GATEA20/GPIO00 GPIO0F BEEP# KB_LED_PWM <26>
<17> KB_RST# SERIRQ
2
KBRST#/GPIO01 BEEP#/GPIO10
23 BEEP# <30>
PCH_PWR_EN
Analog Board ID definition,
3 26 43_0402_1% 2 RE36 1
<13> SERIRQ SERIRQ GPIO12 PCH_PWR_EN <27> Please see page 4.
LPC_FRAME# 4 27 ACOFF
<13> LPC_FRAME# LPC_AD3 LPC_FRAME# ACOFF/GPIO13 ACOFF <44> ECAGND
CE10 5 2 1
<13> LPC_AD3 LPC_AD2 LPC_AD3
@ 22P_0402_50V8J
<13> LPC_AD2 7 LPC_AD2 PWM Output CE9 100P_0402_50V8J
2 1 RE6 2 1 @ 33_0402_5% <13> LPC_AD1 8 63 BATT_TEMP RE19
LPC_AD1 LPC_AD0 LPC_AD1 BATT_TEMP/GPIO38 VCIN0_PH_R VCIN0_PH BATT_TEMP <43,44> VCIN0_PH_R
<13> LPC_AD0 10 LPC_AD0LPC & MISC GPIO39 64 RE17 2 1 2 1 VCIN0_PH2 <25>
65 ADP_I 0_0402_5% @ 0_0402_5%
ADP_I/GPIO3A AD_BID0 ADP_I <43,44>
<16> CLK_PCI_LPC 12 CLK_PCI_EC AD Input GPIO3B 66
13 75 PCH_HOT#_R 2 @ 1 PCH_HOT# PCH_HOT#_R 2 RE76 1
<6,16,28,32> PLT_RST# EC_RST# PCIRST#/GPIO05 GPIO42 RE7 0_0402_5% PCH_HOT# <14> 3S_ON <25>
+3VALW RE8 2 1 47K_0402_5% 37 76 0_0402_5%
EC_RST# IMON/GPIO43 IMVP_IMON <50>
EC_SCI# 20
<17> EC_SCI# EC_SCII#/GPIO0E
CE11 2 1 0.1U_0402_16V7K 38 +5VS
<32> AOAC_ON GPIO1D
DAC_BRIG/GPIO3C 68 EN_INVPWR <22>
70 EN_DFAN1
EN_DFAN1/GPIO3D EN_DFAN1 <25> TP_CLK
DA Output IREF/GPIO3E 71 EC_ENVDD <22> 2 1
+3VALW KSI0 55 72 4.7K_0402_5% RE9
KSI1 KSI0/GPIO30 CHGVADJ/GPIO3F LCD_TEST <22> TP_DATA
56 KSI1/GPIO31 2 1
1 2 EC_SMB_CK1_R KSI2 57 KSI2/GPIO32
4.7K_0402_5% RE10
RE11 2.2K_0402_5% KSI3 58 83 EC_MUTE_R RE12 2 1 0_0402_5% EC_MUTE#
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# <30>
1 2 EC_SMB_DA1_R KSI4 59 KSI4/GPIO34 USB_EN#/GPIO4B 84 USB_EN#
USB_EN# <32,33>
RE13 2.2K_0402_5% KSI5 60 85
KSO1 KSI[0..7] KSI6 KSI5/GPIO35 CAP_INT#/GPIO4C PWRSHARE_OE# <33>
1 2 <25> KSI[0..7] 61 KSI6/GPIO36 PS2 Interface EAPD/GPIO4D 86 EAPD <30,31>
RE62 @ 47K_0402_5% KSI7 62 87 TP_CLK
KSO2 KSO[0..16] KSO0 KSI7/GPIO37 TP_CLK/GPIO4E TP_DATA TP_CLK <25>
1 2 <25> KSO[0..16] 39 88 TP_DATA <25>
C RE63 @ 47K_0402_5% KSO1 KSO0/GPIO20 TP_DATA/GPIO4F C
40 KSO1/GPIO21
KSO2 41
USB_DET#_DELAY KSO3 KSO2/GPIO22 CPU1.5V_S3_GATE
1 2 42 97 CPU1.5V_S3_GATE <10>
RE71 @ 10K_0402_5% KSO4 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 WOL_EN#
43 KSO4/GPIO24 WOL_EN/GPXIOA01 98 WOL_EN# <32>
WLAN_WAKE# KSO5 ME_EN FRD# DASH_LED1#
KSO5/GPIO25 Int. K/B
1 2 44 99 ME_EN <13> 1 2 DASH_LED1# <32>
RE70 10K_0402_5% KSO6 ME_EN/GPXIOA02 RE15 2 RE64 0_0402_5%
45 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 109 1 VCIN0_PH <43>
1 2 DASH_SW3 KSO7 46 SPI Device Interface 0_0402_5% KB9012@ FWR# 1 2 DASH_LED2#
KSO7/GPIO27 DASH_LED2# <32>
RE77 100K_0402_5% KSO8 47 RE65 0_0402_5%
DASH_SW1 KSO9 KSO8/GPIO28 FRD# SPI_CLK 1 DASH_LED3#
1 2 48 119 FRD# <26> 2 DASH_LED3# <32>
RE78 100K_0402_5% KSO10 KSO9/GPIO29 SPIDI/GPIO5B FWR# RE66 0_0402_5%
49 120 FWR# <26>
KSO10/GPIO2A SPIDO/GPIO5C
1 @ 2 EC_SMI# KSO11 50 SPI Flash ROM 126 SPI_CLK
SPI_CLK <26>
FSEL# 1 2 WL_BT_LED#
WL_BT_LED# <32>
RE16 1K_0402_1% KSO12 KSO11/GPIO2B SPICLK/GPIO58 FSEL# RE67 0_0402_5%
51 128 FSEL# <26>
KSO12/GPIO2C SPICS#/GPIO5A
1 2 EC_PME# KSO13 52
KSO13/GPIO2D
RE21 10K_0402_5% KSO14 53
KSO14/GPIO2E
1 2 EC_SMB_CK2 EC_SMB_CK2 <35>
KSO15 54
KSO15/GPIO2F ENBKL/GPIO40
73 RE22 1 2 0_0402_5% ENBKL
ENBKL <15>
RE24 2.2K_0402_5% KSO16 81 74 PECI_KB930 RE23 1 KB930@ 2 43_0402_1% PECI_KB930 1 2
KSO16/GPIO48 PECI_KB930/GPIO41 H_PECI <6,17> WLAN_WAKE# <32>
1 2 EC_SMB_DA2 EC_SMB_DA2 <35> <33> PWRSHARE_EN_EC# 82 89 PX_MODE <36,52,53>
RE69 0_0402_5%
RE25 2.2K_0402_5% KSO17/GPIO49 FSTCHG/GPIO50 BATT_CHG_LED#
90 BATT_CHG_LED# <32> +3VLP
BATT_CHG_LED#/GPIO52 CAPS_LED
91 CAPS_LED <25>
EC_SMB_CK1 1 RE26 EC_SMB_CK1_R CAPS_LED#/GPIO53 PWR_PWM_LED#
<43,44> EC_SMB_CK1 2 0_0402_5% 77
EC_SMB_CK1/GPIO44 GPIO PWR_LED#/GPIO54
92 PWR_PWM_LED# <32> reserve for KB9012 Rev.A2
EC_SMB_DA1 1 RE27 2 0_0402_5% EC_SMB_DA1_R 78 93 BATT_LOW_LED#
<43,44> EC_SMB_DA1 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 BATT_LOW_LED# <32>
EC_SMB_CK2 79 SM Bus 95 SYSON
EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON <27,28,48>
1
1 RE28 2 0_0402_5% EC_SMB_DA2 80 121 VR_ON
+3VS <14> PCH_SMLCLK EC_SMB_DA2/GPIO47 VR_ON/GPIO57 PM_SLP_S4#_R VR_ON <50>
<14> PCH_SMLDATA 1 RE29 2 0_0402_5% 127 RE30
PM_SLP_S4#/GPIO59 @ 47K_0402_5% PM_SLP_S4#_R 1 PM_SLP_S4#
2 PM_SLP_S4# <15>
RE39 0_0402_5%
@ 1 RE31 2 0_0402_5% PM_SLP_S3#_R 6 100 EC_RSMRST#
<15,28> PM_SLP_S3# EC_RSMRST# <15>
2
EC_SCI# PM_SLP_S5#_R PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_LID_OUT#
1 2 <15> PM_SLP_S5# 1 RE33 2 0_0402_5% 14
PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04
101 EC_LID_OUT# <17>
RE32 10K_0402_5% EC_SMI# 15 102 0_0402_5%2 RE34 1 KB9012@
<17> EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 VCIN1_PH <43>
1 @ 2 PCH_HOT# <43> PS_ID 16
GPIO0A H_PROCHOT#_EC/GPXIOA06
103 VCOUT1_PH
RE35 10K_0402_5% TOUCH_LED# 17 104 VCOUT0 KB9012@ 2 RE37 10_0402_5%
<25> TOUCH_LED# GPIO0B VCOUT0_PH/GPXIOA07 VCOUT0_PH <45>
18 GPO 105 BKOFF#
B <22> CMOS_ON# GPIO0C BKOFF#/GPXIOA08 BKOFF# <22> B
19 GPIO 106 PBTN_OUT#
<43> 130W/90W# DASH_LED_PWM GPIO0D PBTN_OUT#/GPXIOA09 HDD_S3.5 PBTN_OUT# <6,15> HDD_S3.5
<32> DASH_LED_PWM 25 107 HDD_S3.5 <29> 1 2 ACIN_65W <35>
VCOUT0 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10
2 RE38 1 0_0402_5% PCH_PWROK FAN_SPEED1 28
FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
108 SA_PGOOD
SA_PGOOD <49>
RE80 0_0402_5%
KB930@ <25> FAN_SPEED1 EC_PME# 29
EC_TX EC_PME#/GPIO15
<32> EC_TX 30
EC_RX EC_TX/GPIO16 ACIN_D RE14 2
<32> EC_RX 31
EC_RX/GPIO17 AC_IN/GPXIOD01
110 1 0_0402_5% ACIN <15,35,43,44>
2 1 PCH_PWROK PCH_PWROK 2 1 0_0402_5% 32 112 EC_ON_R RE41 1 2 0_0402_5%
<6,15> PCH_PWROK PCH_PWROK/GPIO18 EC_ON/GPXIOD02 ON/OFF_R EC_ON <25,28>
10K_0402_5% RE18 KB9012@ RE40 34 114 RE42 1 2 0_0402_5%
<32> DASH_SW1 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 LID_SW# ON/OFF <25>
<32> DASH_SW3 36
NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04
115 LID_SW# <26,32> CE14
116 SUSP#
SUSP#/GPXIOD05 SUSP# <10,27,28,46,47,48> SA_PGOOD
117 65W/90W# <43> 1 2 0.1U_0402_16V7K
GPXIOD06 PECI_KB9012 RE43 1 H_PECI
118 2
PECI_KB9012/GPXIOD07
AGND/AGND
EC_CRY1 122 KB9012@ 43_0402_1%

EC_PME# EC_CRY2 XCLKI/GPIO5D +V18R
GND/GND
GND/GND
GND/GND
GND/GND
1 2 <15> SUSCLK_R 123 124

<15,28,32> PCIE_WAKE# RE61 0_0402_5% XCLKO/GPIO5E V18R
1
GND0
2 RE45 1 100K_0402_5% CE16 Co-lay KB930/KB9012 PECI EC_MUTE# 1 2
USB_DET#_DELAY 1 2 CMOS_ON# 1 2 4.7U_0805_10V4Z Stuff RE46 10K_0402_5%

<28> USB_DET#_DELAY 2
RE72 0_0402_5% CE17 20P_0402_50V8 KB9012@ KB9012QF-A3_LQFP128_14X14
11
24
35
94
113
69
20mil KB930 R4930

LE2 CE18 100P_0402_50V8J
ECAGND 2 1 KB9012 R4944 ACIN 2 1
FBMA-L11-160808-800LMT_0603
VR_HOT# EC_CRY1 EC_CRY2

<50> VR_HOT#
+3VS
0.1U_0402_16V7K
@ 1 1 @
RE44 0_0402_5%
CE12 CE13
1
1
1
CE15
22P_0402_50V8J 22P_0402_50V8J
OSC
OSC
2 2
A 2 A
NC
NC
2
UE2
P
<6,44> H_PROCHOT# H_PROCHOT# 4 2 VCOUT1_PH @

Y A
NC
YE1
G
32.768KHZ_12.5PF_Q13MC14610002
SN74LVC1G06DCKR_SC70-5 RE47
1
100K_0402_5%
CE19 Issued Date 2012/01/17 2013/01/16 Title
Deciphered Date
47P_0402_50V8J
EC ENE-KB930/Co-lay 9012
1
2
5 4 3 2 1
5 4 3 2 1
+FAN_POWER
40mil
FAN Control circuit
Power ON Circuit +3VALW +3VLP
2.2U_0603_6.3V6K
1000P_0402_50V7K
1 1
CE22 CE23
2
RE48 +5VS
ON/OFF switch 100K_0402_5% RE49 2 2 CE25
KB930@ 100K_0402_5% 2.2U_0603_6.3V6K
KB9012@
D TOP Side 1 2
D
HE1 place around FAN area.
1
SW1 DE1
SMT1-05-A_4P 2 UE3
ON/OFF <24>
1 3 ON/OFFBTN# 1 1 8
VEN GND
3 51_ON# <43> 2 7
VIN GND +3VALW +3VLP
2 4 1 3
VO GND
6
BAV70W_SOT323-3 EN_DFAN1 4 5
<24> EN_DFAN1 VSET GND
CE20
6
5
2
0.1U_0402_25V6K APE8873M SOP 8P
2 RE79 RE74
1
D 13.7K_0402_1% @ 13.7K_0402_1%
@ QE1
<24,28> EC_ON 2
G KB930@
1
2
S SSM3K7002F_SC59-3
3
RE51
<24> VCIN0_PH2
1
KB930@ +3VS
Bottom Side RE20 10K_0402_5% +FAN_POWER
1
SW2 0_0402_5%
1
SMT1-05-A_4P VOS@ VOS@
+3VALW RE50 JFAN
1 3 40mil
2
10K_0402_5% 1 1 HE1
2 4 2
2
2 100K_0402_1%_TSM0B104F4251RZ
3
2
3
2
RE75
6
5
100K_0402_5% 4
<24> FAN_SPEED1 GND
5 GND
DE2
@ ACES_85204-0300N
2 1
1
1 CONN@
<32> DASH_SW2
3 CE24
3S_ON <24> 0.01U_0402_16V7K
Pop only for 2
BAV70W_SOT323-3
C SSI debug C
To POWER/B INT_KBD Conn.

KSI[0..7]
<24> KSI[0..7]
+5VALW KSO[0..16]
<24> KSO[0..16]
RE73
390_0402_5% JPWR
1 2 1 1
PWR_LED# 2 2
<32> PWR_LED# ON/OFFBTN# 3 3 G1 5 JKB
4 4 G2 6 1
KSI7 1
2
ACES_50504-0040N-001 KSI6 2
3
3
3
CONN@ KSI4 4
DE5 KSI2 4
5
PESD24VS2UT_SOT23-3~D KSI5 5
6
KSI1 6
7
B KSI3 7 B
8
KSI0 8
9
1
KSO5 9
10
KSO4 10
11
KSO7 11
12
KSO6 12
13
KSO8 13
14
KSO3 14
15
KSO1 15
16
KSO2 16
17
KSO0 17
18
Touch pad KSO12
KSO16
19
20
18
19
Touch Pad LED KSO15

KSO13
21
22
20
21
22
+3VS KSO14 23
KSO9 23
24
+5VS JTP +5VS KSO11 24
25
RE60 KSO10 25
1 26
TP_CLK 1 KB_CAPS_PWR 26
<24> TP_CLK 2 1 2 27
2 27
1
TP_DATA 3 5 28
<24> TP_DATA 3 G1 28
4 6 240_0402_1% 29 31
390_0402_5% 4 G2 KB_CAPS_PWR- 29 GND
30 32
R6 ACES_50504-0040N-001 30 GND
3
CONN@ ACES_51510-03041-001
2
CONN@
+TPLED DE3
1
D
PESD5V0U2BT_SOT23-3 2 QE3
<24> CAPS_LED
2
G SSM3K7002FU_SC70-3~D
S
3
D2 D1
A C191KSKT-5A C191KSKT-5A A
1
VOS@ INS@
A
A
1
<24> TOUCH_LED#
SW/TP/SCREW
5 4 3 2 1
5 4 3 2 1
D Keyboard back light D
SPI ROM 128KB

+3VS
+3VALW
20mils
@ RE68
1 <17> KB_DET# 1 2
CE52
0.1U_0402_16V7K 10K_0402_5% +5VS_KBL
KB930@
2 JKBL
1
+5VS +5VS_KBL D
1 1
UE4 @ 2 2
RE52 1 KB930@ 2 0_0402_5% SPI_FSEL# FE1 G 2
<24> FSEL# 1 CS# VCC 8 3 3
FRD# 2 1 SPI_SO 2 7 0.75A_24V_1812L075-24DR~OK S KB_BL_PWM 4
<24> FRD#
3
SO HOLD# 4
1
RE53 KB930@ 0_0402_5% 3 6 SPI_CLK_R0_0402_5%2 KB930@ 1RE54 2 1 QE4 5
WP# SCLK SPI_CLK <24> GND
10U_0603_6.3V6M
SPI_FWR# 20mil SSM3K7002FU_SC70-3~D RE58
4 GND SI 5 2 1 FWR# <24> 20mil GND 6
1U_0603_10V6K
0_0402_5% KB930@ RE55 1 2 KBBL@ 100K_0402_5%
MX25L1005AMC-12G_SO8 1 RE59 1 KBBL@ ACES_50519-00401-001
CE56
KB930@ 0_0805_5% CONN@
1
2
5
6
CE57
SA00002C100 KBBL@ KBBL@ KBBL@
D QE2
2 2 G SI3456BDV-T1-E3 1N TSOP6 W/D
<24> KB_LED_PWM 3
Reserve for EMI please close to U15 S KBBL@
4
@ @
RE56 CE53
SPI_CLK_R 2 1 1 2
C 22P_0402_50V8J C
33_0402_5%
Screw Hole
H1
B H_3P3X4P3N
@
Lid Switch B
1
ZZZ1
H2
H_3P3N
@
+3VALW
1
PCB-MB
H3 H4 DA80000R900
H_3P5 H_3P5
1
0.1U_0402_16V7K
@ @
CE54
1 RE57
1
2
INS@ UE5 10K_0402_5%
VDD
H5 H6 H7 H8 H9 H10 H14
2
H_3P7 H_3P7 H_3P7 H_3P7 H_3P7 H_3P7 H_3P7 2
@ @ @ @ @ @ @ 3 LID_SW#
OUTPUT LID_SW# <24,32>
1
GND
1
H11 H12 H13 H15 H16 H17 H19 H20 H21 H22 H23 H24 CE55
H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 INS@ 0.1U_0402_16V7K
1
@ @ @ @ @ @ @ @ @ @ @ @ INS@
S-5712ACDL1-M3T1U_SOT23-3 2
1
A A
FD1 FD2 FD3 FD4
@ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL
1

CONN & LID
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
A B C D E
+5VALW to +5VS +3VALW to +3V_PCH

+5VALW QZ1 +5VS
SI4128DY-T1-GE3_SO8
+3VALW
8 1
7 2 JP2 @
2
10U_0805_10V6K
1U_0603_10V6K
1 1 6 3 1 1 1 1 2 2
5 CZ3 CZ4 +1.5V_CPU_VDDQ +0.75VS
CZ1 CZ2 RZ1 JUMP_43X79
10U_0805_10V6K 10U_0805_10V6K 470_0603_5% QZ3 +3V_PCH
1
2 2 2 2 SI4128DY-T1-GE3_SO8
1
1 1
40mil
RZ3 RZ2
+5VS_D
8 1
7 2 220_0402_5% 22_0603_5%~D
RZ5 1 1 6 3 1 1
2
6
B+_BIAS 1 2 5
2
0.1U_0603_50V_X7R
RZ4 CZ5 CZ6 CZ7 CZ8
+1.5V_CPU_VDDQ_CHG
+DDR_CHG
470K_0402_5% 0_0402_5% 1 QZ2A 10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 1U_0603_10V6K
4
3
2
2 2 2 2
1.5M_0402_5%~D
2 SUSP
CZ9
QZ2B DMN66D0LDW-7_SOT363-6
1
SUSP 5 2 RZ6
RZ8
1
DMN66D0LDW-7_SOT363-6 B+_BIAS 1 2
4
0.1U_0603_50V_X7R
SSM3K7002FU_SC70-3~D
RZ7
470K_0402_5% 0_0402_5% 1
1
D D D
1.5M_0402_5%~D
CZ10
QZ5
QZ6
PCH_PWR_EN# 2 QZ4 2 2
<6,10> RUN_ON_CPU1.5VS3#
G SSM3K7002F_SC59-3 G G
S 2 RZ9 S S
3
1
+3VALW to +3VS
+3VALW QZ7 +3VS
SI4128DY-T1-GE3_SO8 +5VALW
8 1
7 2
1 1 6 3 1 1
1
5
2 CZ11 CZ12 CZ13 CZ14 +3VALW +5VALW 2
10U_0805_10V6K 10U_0805_10V6K 10U_0805_10V6K 1U_0603_10V6K RZ10
4
2 2 2 2 100K_0402_5%
2
SUSP
1
1
RZ14 D RZ11
B+_BIAS 1 2 2 QZ8 10K_0402_5% RZ12
<10,24,28,46,47,48> SUSP#
0.1U_0603_50V_X7R
RZ13 G SSM3K7002F_SC59-3 100K_0402_5%
0.1U_0603_50V_X7R
470K_0402_5% 39.2K_0402_1%
1 S
2
1
1
D
1.5M_0402_5%~D
1 PCH_PWR_EN#
<19> PCH_PWR_EN#
CZ15
SUSP 2 QZ9 RZ16 @
1
D
CZ16
G SSM3K7002F_SC59-3 100K_0402_5%
S 2 RZ15 2 QZ10
<24> PCH_PWR_EN
3
2 G SSM3K7002F_SC59-3
1
0.1U_0603_50V_X7R
S
3
1
@ 1
RZ17 @
CZ17
100K_0402_5%
2
2
+1.5V To +1.5VS
B+_BIAS UZ1
+1.5V +1.5VS +5VALW
SI4634DY-T1-E3_SO8~D
1
8 1
10U_0805_10V6K
0.1U_0402_16V7K
RZ18 7 2
100K_0402_5% 6 3 1 1
1
CZ18
CZ19
5
3 3
2
RZ20 RZ19
4
2 2 100K_0402_5%
2
1
D
2M_0402_5%~D
0.1U_0603_50V_X7R
0_0402_5% 1 SYSON#
SUSP 2 RZ21
1
D
CZ20
G QZ11
S SSM3K7002FU_SC70-3 <24,28,48> SYSON 2 QZ12
3
0.1U_0603_50V_X7R
G SSM3K7002F_SC59-3
2
1 S
3
1
@
+VCCP +3V_PCH +3VS
CZ21
+1.5VS RZ22
+1.5V 100K_0402_5%
2
1
2
RZ23 RZ24 RZ25 RZ26
1
470_0402_5% 470_0402_5% 470_0402_5% 470_0402_5% RZ27
2
470_0402_5%
2
+1.5VS_D
+VCCP_D
+1.5V_D
+3V_D
+3VS_D
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
6
1
D
QZ13A QZ13B QZ14A QZ14B SYSON# 2
G QZ15
SUSP 2 SUSP 5 PCH_PWR_EN# 2 SUSP 5 S SSM3K7002FU_SC70-3
3
1
4 4

DC/DC Interface
Size
Document Number Rev
1.0
LA-8241P
A B C D E
5 4 3 2 1
USB Detected for PWR Share

Express Card
+RTCVCC +RTCVCC +RTCVCC +RTCVCC +RTCVCC +CHGRTC
JEXP
1 1
1 2 EXP_USBP11_D- 2
R787 0_0402_5% EXP_USBP11_D+ 2
1 1 3 3
1
D D
220K_0402_5%
SDMK0340L-7-F
C3 @ CPUSB# 4
R778 0.1U_0402_16V7K 4
5 5
100K_0402_5% R779 D3 6
2 CLOSE TO U1 PCH_SMBCLK 6
<6,11,12,14,29,32> PCH_SMBCLK 7 7
<6,11,12,14,29,32> PCH_SMBDATA PCH_SMBDATA 8
D5
2
2
8
+1.5V_CARD 9 9
5
C4 <24,25> EC_ON 2 10 10
1 1 PCIE_WAKE# 11
P
NC EC_ON_35V <45> <15,24,32> PCIE_WAKE# 11
2 1 2 A Y 4 3 +3.3V_CARDAUX 12 12
CARD_RESET# 13
G
2.2U_0603_6.3V6K 13
+3.3V_CARD 14 14
U1 BAV70W-7-F_SOT323-3
15
3
15
1
<14> EXPCLK_REQ# EXPCLK_REQ# 16
TC7SZ14FU_SSOP5~D R780 EXPRCRD_CPPE# 16
17 17
1M_0402_5% <14> CLK_PCIE_EXP# CLK_PCIE_EXP# 18
CLK_PCIE_EXP 18
<14> CLK_PCIE_EXP 19 19
20
2
CX12EXP@ PCIE_PRX_EXPTX_N3_C 20
<14> PCIE_PRX_EXPTX_N3 1 2 0.1U_0402_10V7K~D 21 21
<14> PCIE_PRX_EXPTX_P3 CX13EXP@
1 2 0.1U_0402_10V7K~D PCIE_PRX_EXPTX_P3_C 22 22
23 23
USB_DETECT# 2 1 1 2 USB_DET#_DELAY <14> PCIE_PTX_EXPRX_N3 PCIE_PTX_EXPRX_N3 24
USB_DET#_DELAY <24> 24
R781 0_0402_5% <14> PCIE_PTX_EXPRX_P3 PCIE_PTX_EXPRX_P3 25
D4 25
26 26
C 1 SDMK0340L-7-F 1 27 C
C13 C14 GND
USB_DETECT# <33> 28 GND
0.1U_0402_16V7K 0.1U_0402_16V7K
TYCO_2-2041070-6~D
2 2 CONN@
LX1 EXP@
USB20_N11 1 2 EXP_USBP11_D-
Express Card PWR S/W <16> USB20_N11 1 2
<16> USB20_P11 USB20_P11 4 3 EXP_USBP11_D+

4 3
DLW21SN900SQ2_0805~D
1 2
+1.5VS +3VS +3VALW +3.3V_CARDAUX +3.3V_CARD RX2 @ 0_0402_5%
500mA 1A 275mA 275mA 1A 1 2
RX3 @ 0_0402_5%
0.1U_0402_25V6K
0.1U_0402_25V6K
0.1U_0402_25V6K
0.1U_0402_25V6K
10U_0603_6.3V6M
0.1U_0402_25V6K
10U_0603_6.3V6M
B B
1 1 1 EXP@ 1 1 EXP@ EXP@ 1 1 EXP@
+3.3V_CARD +3.3V_CARDAUX +3VS +3VS
CX3
CX4
CX5
CX6
CX7
CX8
CX9
2 2 2 2 2 2 2
2
2.2K_0402_5%
2.2K_0402_5%
RX4
RX5
UX1
+1.5V_CARD
0.1U_0402_25V6K
0.1U_0402_25V6K
EXP@ EXP@ EXP@ 17 15 EXP@
AUXIN AUXOUT EXP@
2
12
3.3VIN 3.3VOUT 3
11
500mA 1 1
1
1.5VIN 1.5VOUT
0.1U_0402_25V6K
10U_0603_6.3V6M
CX2
CX1
SYSON_R 20 8 CARD_RESET# EXP@ EXP@
STBY#_R SHDN# PERST# EXPRCRD_CPPE#
1 STBY# CPPE# 10
PLT_RST# 6 9 CPUSB# EXP@ 1 EXP@ 2 2
<6,16,24,32> PLT_RST# SYSRST# CPUSB# 1
19 PCH_SMBCLK
OC#
CX10
CX11
+3VS 4 PCH_SMBDATA
NC 2 2
+3.3V_CARD 5 NC RCLKEN 18
+1.5V_CARD 13 NC
+1.5VS 14 NC GND 7
16 NC PAD 21
1 2 SYSON_R TPS2231MRGPR-2_QFN20_4X4~D
<24,27,48> SYSON
A RX8 0_0402_5% EXP@ A
<10,24,27,46,47,48> SUSP# 1 2
RX6 @ 0_0402_5%
<15,24> PM_SLP_S3# 1 2 STBY#_R Security Classification Compal Secret Data Compal Electronics, Inc.
RX7 0_0402_5% 2012/01/17 2013/01/16 Title
Issued Date Deciphered Date
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
1.0
5 4 3 2 1
A B C D E F G H
+3VS
JP6
1 2 +3.3V_RUN_FFS
SATA HDD Conn.
10U_0603_6.3V6M
0.1U_0402_25V6K
PAD-OPEN1x1m
@ 1 1
FFS@ FFS@
CN1 CN2 JHDD
2 2 UN1 1
SATA_PTX_DRX_P0_C GND
LNG3DM <13> SATA_PTX_DRX_P0_C
SATA_PTX_DRX_N0_C
2
A+
10 <13> SATA_PTX_DRX_N0_C 3
RES A-
1 13 4
1 VDD_IO RES CN3 SATA_PRX_DTX_N0_C GND 1
14
VDD RES
15 <13> SATA_PRX_DTX_N0 1 2 0.01U_0402_16V7K 5
B-
16 CN4 1 2 0.01U_0402_16V7K SATA_PRX_DTX_P0_C 6
RES <13> SATA_PRX_DTX_P0 B+
11 7
<16> FFS_INT1 INT 1 GND
9 5
<17> FFS_INT2 INT 2 GND
12
<6,11,12,14,28,32> PCH_SMBDATA
7
6
SDO/SA0
GND
SDA / SDI / SDO

+5V_HDD Source 8
VCC3.3
<6,11,12,14,28,32> PCH_SMBCLK 4 +3VS 9
SCL/SPC VCC3.3
2 10
NC VCC3.3
8 3 11
CS NC +5VALW HDD_DET# GND
12
LNG3DMTR_LGA16_3X3~D B+_BIAS <13> HDD_DET# GND
13 GND
+5V_HDD FFS@ 14 VCC5
+5V_HDD 15 VCC5
+3VALW 16 VCC5
1
1
17 GND
+3VS @ RN1 RN9 @ FFS_INT2_Q 18 RESERVED
1
2
5
6
100K_0402_5% @ 100K_0402_5% 19 GND
1
D QN4 20 VCC12
1
FFS@ RN10 G 21
2
2
RN2 FFS_INT2_Q +3VS @ 100K_0402_5% HDD_EN_5V SI3456DDV-T1-GE3_TSOP6~D VCC12
3 22 VCC12
100K_0402_5% S
3
+5V_HDD +5VS
4
3
1 FFS@ 2 PCH_SMBDATA @ JP13 SUYIN_127043FB022G208ZR_RV
2
QN1B
0.1U_0603_50V_X7R
FFS@ RN3 10K_0402_5% 1 1 2 CONN@
2
QN5B
10U_0805_10V6K
5 1 FFS@ 2 PCH_SMBCLK
RN4 10K_0402_5% 5 1 1 JUMP_43X79
6
1
CN17
1 FFS@ 2 FFS_INT1 @ @ SHORT DEFAULT
4
6
CN18
RN5 100K_0402_5% @ +3VS +5V_HDD
4
QN1A
FFS@ @ @ RN11
2 2
QN5A
FFS_INT2 2 100K_0402_5%
0.1U_0402_25V6K
0.1U_0402_25V6K
1000P_0402_50V7K
0.1U_0402_25V6K
<24> HDD_S3.5 2
10U_0805_10V6K
2 2
1
1 1 1 1 1
1
1
@ RN12 CN8 CN9 CN5 CN6 CN7
100K_0402_5%
2 2 2 2 2
2
SATA ODD Conn.
ODD Power Control +5VS_ODD
Pleace near ODD CONN
1000P_0402_50V7K
0.1U_0402_25V6K
10U_0805_10V6K
3 3
@ JP7 1 1 1
1 2
1 2
CN11
CN10
CN12
JUMP_43X79 2 2 2
+5VS
QN2 +5VS_ODD
D
6
S
1U_0402_6.3V6K
5 4 JODD
1 2 1
SATA_PTX_DRX_P2_C GND
1 <13> SATA_PTX_DRX_P2_C 2
CN13 SI3456BDV-T1-E3 1N TSOP6 SATA_PTX_DRX_N2_C RX+
3
G
<13> SATA_PTX_DRX_N2_C RX-

4
3
B+_BIAS 2 SATA_PRX_DTX_N2_C GND

<13> SATA_PRX_DTX_N2 2 1 5
CN14 2 SATA_PRX_DTX_P2_C TX-
<13> SATA_PRX_DTX_P2 1 0.01U_0402_16V7K 6
CN15 0.01U_0402_16V7K TX+
7
GND
2
RN6 8
<17> ODD_DETECT# DP
470K_0402_5% 9
+5V
10
ODD_DA#_R +5V
<16> ODD_DA# 1 2 11
1
ODD_EN RN8 0_0402_1% MD

12 14
@ GND GND1
13 15
GND GND2
TYCO_2-1759838-8~D
1
D
1.5M_0402_5%~D
0.1U_0402_25V6K
1 CONN@
2 QN3
<17> ODD_EN#
G SSM3K7002FU_SC70-3 RN7 CN16
S
3
2
1
4 4

HDD/ODD/FAN
Size Document Number
Rev
Custom 1.0
LA-8241P
A B C D E F G H
5 4 3 2 1
+FILT_1.65V +MICBIASB
+LDO_OUT_3.3V
1U_0603_10V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0603_6.3V6K
1 1 1 1 AVDD_3.3 pinis output of
CA1
CA2
CA3
CA4
internal LDO. NOT connect
3.3K_0402_5%
3.3K_0402_5%
@
to external supply.
1
1 RA22 2 0_0402_5%
+3V_PCH
RA23 2 0_0402_5%
2 2 2 2
RA1 RA2
MIC JACK
1
+5VS
JMIC
2
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
D
1 G 7 D
+3VS 1 1 1 1
CA5
CA6
CA7
CA8
MIC1_L 1 RA3 2 MIC1_L_R 2 G 8
0.1U_0402_16V7K
100_0402_1%
4.7U_0603_6.3V6K
+5VS
1 1 6 G 9
2 2 2 2
CA9
CA10
+VDD_IO MIC1_R MIC1_R_R

0.1U_0402_16V7K
0.1U_0402_16V7K
1 RA4 2
100_0402_1%
0.1U_0402_16V7K
1 1 3
CA11
CA12
+FILT_1.8V
0.1U_0402_16V7K
2 2 1
CA14
CA13 1 MIC1_PLUG 4
2 2
0.1U_0402_16V7K
Please bypass caps very close to device.
4.7U_0603_6.3V6K
2
2
PESD5V0U2BT_SOT23-3
PESD5V0U2BT_SOT23-3
1 1 5
2
CA15
CA16
1 1 GNDA
DA1
DA2
@ CA17 @ CA18 SINGA_2SJ3013-010311F
220P_0402_50V8J
220P_0402_50V8J
CONN@
2 2
18
26
29
27
28
3
7
2
UA1 2 2
VDD_IO
FILT_1.8
VAUX_3.3
DVDD_3.3
FILT_1.65
AVDD_3.3
AVDD_HP
AVDD_5V
GNDA
12
1
LPW R_5.0
RPW R_5.0 15
HDA_RST_AUDIO# 9 17
<13> HDA_RST_AUDIO# RESET# CLASS-D_REF
Vendor 1 RA6 2 5.11K_0402_1% GNDA GNDA
<13> HDA_BITCLK_AUDIO 1 RA7 2 0_0402_5%
HDA_SYNC_AUDIO
5 BIT_CLK recommend
SENSE_A
+3VS
HeadPhone JACK
<13> HDA_SYNC_AUDIO 8 36 1 RA8 2 20K_0402_1% MIC1_PLUG
1 RA5 2 33_0402_5% 6
SYNC VDD_IO is SENSE_A
1 RA9 2 39.2K_0402_1% HP_PLUG
<13> HDA_SDIN0 HDA_SDOUT_AUDIO SDATA_IN the same
4 JHP
<13> HDA_SDOUT_AUDIO SDATA_OUT
with HDA 35 CA20 1 2 4.7U_0603_6.3V6K MIC1_R 1 G 7
PORTB_R CA19 1 MIC1_L
PORTB_L 34 2 4.7U_0603_6.3V6K LA1
33 +MICBIASB HP_L 1 2 HPL 2 G 8
PC_BEEP B_BIAS FBMA-L10-160808-800LMT_2P
C 10 PC_BEEP 1 2 C
CA21 1000P_0402_50V7K LA2 6 G 9
39 32 @ HP_R 1 2 HPR
SPDIF C_BIAS AMP_RIGHT FBMA-L10-160808-800LMT_2P
PORTC_R 31 AMP_RIGHT <31> 3
@
PORTC_L 30 AMP_LEFT
AMP_LEFT <31> OUTPUT 1Vrms
1 RA10 2 0_0402_5% 38 HP_PLUG 4
<24,31> EAPD GPIO0/EAPD#
<24> EC_MUTE# 2 1 37 GPIO1/SPK_MUTE#
RA11 0_0402_5% 23 RA12 1 2 39.2_0402_1% HP_R
PORTA_R
2
PESD5V0U2BT_SOT23-3
22 RA13 1 2 39.2_0402_1% HP_L 1 1 5
PORTA_L CA22 CA23 GNDA
10P_0402_50V8J
10P_0402_50V8J
DA3
<22> MIC_CLK 1 RA15 2 33_0402_5% 40 @ @ SINGA_2SJ3013-010311F
RA14 2 0_0402_5% DMIC_CLK CONN@
<22> MIC_DATA 1 1 DMIC_1/2 NC 24
25 2 2
NC
@ CA24 15P_0402_50V8J
@ CA25 15P_0402_50V8J
Reserve for EMI

SPK_L2+ 11
SPK_L1- LEFT+ GNDA
1 1 13 LEFT-
Internal SPEAKER 21
1
AVEE
FLY_P 19
SPK_R2+
0.1U_0402_16V7K
Close to UA1 GNDA GNDA
4.7U_0603_6.3V6K
16 RIGHT+ FLY_N 20 1 2
2 2 SPK_R1- 14 CA26 1U_0603_10V6K
RIGHT- 1 1
Pin11,13,14,16
GND
CA27 CA28
@
close to Codec JSPK
CX20672-21Z_QFN40_6X6 2 2 SPK_R1- LA3 1 2 0_0603_5% SPK_R1-_CONN 1
41
SPK_R2+ LA4 0_0603_5% SPK_R2+_CONN 1

1 2 2 2
SPK_L1- LA5 1 2 0_0603_5% SPK_L1-_CONN 3 5
SPK_L2+ LA6 0_0603_5% SPK_L2+_CONN 3 GND
1 2 4 4 GND 6
2
PESD5V0U2BT_SOT23-3
PESD5V0U2BT_SOT23-3
ACES_87213-0400G
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
CONN@
B
wide 30MIL B
DA5
DA6
1 1 1 1
CA29
CA30
CA31
CA32
@ @
2 2 2 2
SPK_L2+_CONN
<31> SPK_L2+_CONN
1
SPK_L1-_CONN
<31> SPK_L1-_CONN
DA7 SPK_R2+_CONN
<31> SPK_R2+_CONN
EC Beep <24> BEEP# 2
CA41 SPK_R1-_CONN
<31> SPK_R1-_CONN
1 1 2 PC_BEEP
HDA_SYNC_AUDIO +5VS
0.1U_0402_16V7K
ICH Beep<13> HDA_SPKR 3
1
1
BAT54C-7-F_SOT23-3 HDA_BITCLK_AUDIO
RA19 @ CA34 RA17
PC Beep
2
10K_0402_5% 10P_0402_50V8J @ 4.7K_0402_5%
RA18 2
2
10_0402_1%
2
@
HDA_SDOUT_AUDIO HDA_RST_AUDIO#
1
1
2 1 CA37
@ 0.1U_0402_16V7K
CA36 @ CA38
CA39 10P_0402_50V8J 2
10P_0402_50V8J
1 2 @ 1 2
@
A A
0.1U_0402_16V7K
CA40
1 2 @ for EMI
0.1U_0402_16V7K
GND GNDA Issued Date 2012/01/17 Deciphered Date 2013/01/16 Title
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
LA9
FBMA-L11-160808-121LMA30T_0805
1 2 +PVDD
40mil
B+
1 1 Close to LA6
1U_0603_25V6K
1U_0603_25V6K
1U_0603_25V6K
1U_0603_25V6K
1U_0603_25V6K
CA44
CA47
CA48
CA45
CA46
AMP@
1
CA42 CA43 LA7
10U_1206_25V6M 0.1U_0402_16V7K UA2 CA53 HCB2012KF-121T50_0805
AMP@ 2 2 AMP@ +PVDD 7 0.22U_0603_25V7K OUTPL 1 2 SPK_L2+_CONN
SPK_L2+_CONN <30>
2
AVCC BSPL
26 1 2 5A/120ohm/100MHz
BSPL
15
Close to LA9 PVCCR AMP@ OUTPL
16 25
D PVCCR OUTPL D
Close to UA2 27 AMP@
PVCCL OUTNL
Pin7,15,16,27,28 28 23
PVCCL OUTNL
AMP@ AMP@ AMP@ AMP@ AMP@
RA37 CA49 22 BSNL 1 2 CA54
AMP_LEFT BSNL
<30> AMP_LEFT 1 2 1 2 0.027U_0402_16V6K AMP_LEFT_C 3 0.22U_0603_25V7K
LINP
1
AMP@
240K_0402_1% RA38 1 2 4 CA55
10K_0402_5%
AMP@ 0.027U_0402_16V6K LINN 17 BSPR 1 2 0.22U_0603_25V7K Close to LA5
CA50 BSPR
AMP@
@ 18 OUTPR LA8
AMP@
2
RA39 CA51 OUTPR HCB2012KF-121T50_0805
AMP@
AMP_RIGHT 1 2 1 2 0.027U_0402_16V6K AMP_RIGHT_C 12 20 OUTNR OUTNL 1 2 SPK_L1-_CONN
<30> AMP_RIGHT RINP OUTNR SPK_L1-_CONN <30>
1
+GVDD 5A/120ohm/100MHz
240K_0402_1% RA40 1 2 11 21 BSNR 1 2
10K_0402_5%
AMP@ 0.027U_0402_16V6K RINN BSNR
1
CA52 CA56
Need final turn R/C AMP@
@ RA24 AMP@ 0.22U_0603_25V7K RA27
AMP@
2
100K_0402_5% 28.7K_0402_1%
10/24 @ GIN0 5 GAIN0 PBTL 14
AMP@
AMP@
+3VALW 1 2
2
GIN1 6 10 PLIMIT
RA25 GAIN1 PLIMIT +GVDD
0_0402_5% Close to LA4
1
1U_0603_25V6K
1U_0603_25V6K
TPA3113 for Speaker <24,30> EAPD 1 2 EAPD_R 1 9 +GVDD
SD# GVDD
CA57
RA28 LA10
CA58
AMP@ 2 10K_0402_1% HCB2012KF-121T50_0805
+5VS RA26 FAULT# OUTPR SPK_R2+_CONN
24 1 2 SPK_R2+_CONN <30>
2
100K_0402_5% PGND 5A/120ohm/100MHz
13 19
2
NC PGND
INPUT AMP@ 29 GND AGND 8
GAIN1 GAIN0 AV(inv) IMPEDANCE
2
2
@ @ TPA3113D2PWPR_HTSSOP28 AMP@ AMP@

RA33 RA35
C C
100K_0402_1% 100K_0402_1% 0 0 20dB 60Kohm AMP@ AMP@
AMP@
2 1
2 1
GIN0 GIN1 0 1 26dB 30Kohm

RA34 RA36 Close to LA3
100K_0402_1% 100K_0402_1% 1 0 32dB 15Kohm
LA11
HCB2012KF-121T50_0805
1
1 1 36dB 9Kohm OUTNR 1 2 SPK_R1-_CONN

SPK_R1-_CONN <30>
5A/120ohm/100MHz
AMP@ AMP@
AMP@
+1.8VGS +VCCP +3VALW +3VLP C5 +RTCBATT +RTCVCC
1 2
2.2U_0603_6.3V6K
B GCLK@ B
1 1 GCLK@ 1 GCLK@ 1 GCLK@
Depop if GCLK GCLK@
U2 1
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
with UMA C6 C7 C8 C9 22U_0805_6.3V6M
C10
GCLK@
2 2 2 2 10 14
VBAT VDD_RTC_OUT 2
+3VLP 15
+V3.3A
2
VDD
9 PCH_RTCX1_R <13>
32kHz
GCLK@
11 12 VGA_X1_R1 2 R785
+1.8VGS VDDIO_27M 27MHz VGA_X1 <35>
33_0402_5%
8 6 LAN_X1_R 1 GCLK@ 2 R782
+3VALW VDDIO_25M_A 25MHz_A LAN_X1 <14>
Y1 33_0402_5%
25MHZ_20PF_7V25000016 3 5 PCH_X1_R1 2 R783
+VCCP VDDIO_25M_B 25MHz_B PCH_X1 <14>
0_0402_5%
CLK_X1 1 3 CLK_X2 CLK_X1 1
1 3 XTAL_IN GCLK@
CLK_X2 16
GND GND XTAL_OUT
GND1
GND2
GND3
GND4
1 1
C11 C12
33P_0402_50V8K 2 4 33P_0402_50V8K
GCLK@ GCLK@ GCLK@ SLG3NB274VTR_TQFN16_2X3
4
7
13
17
2 2 R784
GCLK@ 0_0402_5%
LAN_X1_R 1 2
UMA only reserved for swing level adjustment

A A
(close to U2)
U2
SLG3NB244VTR_TQFN16_2X3
@ Security Classification Compal Secret Data Compal Electronics, Inc.
AMP
5 4 3 2 1
5 4 3 2 1
@ 0_0402_1% JBTB1
1 R771 2 USB3RP3_R 1 2
<16> USB3RP3 USB3RN3_R 1 2 USB_OC2# <16>
<16> USB3RN3 1 R772 2 3 3 4 4 USB_OC3# <16>
@ 0_0402_1% 5 6
5 6 BT_ON# <17>
<16> USB3TP3 7 7 8 8 WL_OFF# <16>
<16> USB3TN3 9 9 10 10 USB_EN# <24,33>
@ 0_0402_1% 11 12
11 12 PCIE_WAKE# <15,24,28>
<16> USB3RP4 1 R775 2 USB3RP4_R 13 14 WLAN_CLKREQ# <14>
13 14
<16> USB3RN4 1 R776 2 USB3RN4_R 15
15 16
16 PLT_RST# <6,16,24,28>
@ 0_0402_1% 17 18
17 18 LAN_CLKREQ# <14>
<16> USB3TP4 19 20
D 19 20 WOL_EN# <24> D
<16> USB3TN4 21 22
21 22 AOAC_ON <24>
23 24 EC_TX <24>
23 24
<16> USB20_P2 25 26 EC_RX <24>
25 26
<16> USB20_N2 27 28 PCH_SMBCLK <6,11,12,14,28,29>
27 28
29 30 PCH_SMBDATA <6,11,12,14,28,29>
29 30
<16> USB20_P3 31 32 HDD_DETECT# <17>
31 32
<16> USB20_N3 33 34 B+_BIAS
33 34
35 36 +3VALW
35 36
<16> USB20_P4 37 38
37 38
<16> USB20_N4 39 40
39 40
41 42
41 42
<16> USB20_P5 43 43 44 44 PCIE_PRX_WLANTX_P2 <14>
<16> USB20_N5 45 45 46 46 PCIE_PRX_WLANTX_N2 <14>
47 48
+3VS
49
51
47
49
51
48
50
52
50
52
PCIE_PTX_WLANRX_P2 <14>
PCIE_PTX_WLANRX_N2 <14> <---WLAN (Mini Card 1)
To CardReader/B
SATA_PRX_DTX_P1 53 54
<13> SATA_PRX_DTX_P1 SATA_PRX_DTX_N1 53 54
<13> SATA_PRX_DTX_N1 55
57
55
57
56
58
56
58
CLK_PCIE_WLAN <14>
CLK_PCIE_WLAN# <14>
* Inspiron only
<13> SATA_PTX_DRX_P1_C SATA_PTX_DRX_P1_C 59 60
SATA_PTX_DRX_N1_C 59 60 +3VS
<13> SATA_PTX_DRX_N1_C 61 61 62 62 PCIE_PTX_LANRX_P1 <14>
+1.5VS 63 63 64 64 PCIE_PTX_LANRX_N1 <14>
65 66 JCR1
<24> WLAN_WAKE# 65 66
+3VS 67 67 68 68 PCIE_PRX_LANTX_P1 <14> 1 1
69 70 <---10/100/1G LAN USB20_N10_R 2
69 70 PCIE_PRX_LANTX_N1 <14> 2
71 72 USB20_P10_R 3 5
71 72 3 G1
73 73 74 74 CLK_PCIE_LAN <14> 4 4 G2 6
75 75 76 76 CLK_PCIE_LAN# <14>
77 78 ACES_50504-0040N-001
77 78 LID_SW# <24,26>
+5VALW 79 80 CONN@
79 80 CLK_LAN_25M <14>
C C
81 GND GND 82
DLW21SN900SQ2_0805~D
USB20_N10 1 2 USB20_N10_R
<16> USB20_N10 1 2
ACES_88079-0800A1
CONN@ USB20_P10 4 USB20_P10_R
<16> USB20_P10 4 3 3
TO Function/B L1
1
INS@
2
R1 @ 0_0402_5%
1 2
JFC R2 @ 0_0402_5%
<24> DASH_SW1 1
1 USB10N
2 1 2
To Finger Print <25> DASH_SW2
<24> DASH_SW3
+DAS_PWR
3
4
2
3
4
R9 VOS@ 0_0402_5%
<24> DASH_LED1# 5 1 2 USB10P

5 R10 VOS@ 0_0402_5%
<24> DASH_LED2# 6 9
6 G1
+3VS <24> DASH_LED3# 7 10
7 G2
2 8
8
C1 ACES_51524-0080N-001
0.1U_0402_25V6K CONN@
1
1
JFP
1
+5VS Q2
AP2301GN-HF_SOT23-3 To CardReader/B
<16> USB20_P8 2
2
<16> USB20_N8 3
4
3
4
3 1
* Vostro only
B
5 7 +3VS B
5 G1
3
2
PESD5V0U2BT_SOT23-3
6 8 R777
6 G2
2
D6
ACES_51524-0060N-001 2 1 JCR2
CONN@ 1
1
1
@ 10K_0402_5% D USB10N_R
1 2
USB10P_R 2
2 DASH_LED_PWM <24> 3 5
C2 G 3 G1
4 6
0.1U_0402_16V7K Q3 4 G2
S
3
2 SSM3K7002FU_SC70-3~D ACES_50504-0040N-001
1
CONN@
To LED/B +5VALW L2 VOS@

USB10N 1 2 USB10N_R
JLED2 1 2
1
1 USB10P USB10P_R
+5VS 2 4 3
+5VALW PWR_LED# 2 4 3
3
PCH_SATALED# 3 DLW21SN900SQ2_0805~D
4
BATT_CHG_LED# 4
10mils, All pins JLED 5
5
1 2
1 BATT_LOW_LED# 6 9 R8 @ 0_0402_5%
1 WL_BT_LED# 6 G1
+5VS 2 7 10
PWR_LED# 2 7 G2
<25> PWR_LED# 3 8 1 2
3 8 R7 @ 0_0402_5%
<13> PCH_SATALED# 4
4 ACES_51524-0080N-001
<24> BATT_CHG_LED# 5
5 CONN@
<24> BATT_LOW_LED# 6 9
6 G1
<24> WL_BT_LED# 7 10
7 G2
8
8
1
A D ACES_51524-0080N-001 A
<24> PWR_PWM_LED# 2 Q1 CONN@

G
S 2N7002_SOT23
3
1
R786
100K_0402_5%
2
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
+5VALW
LI1
USB3RN1 1 2 USB3RN1_R 1 1
<16> USB3RN1 1 2 CI12 CI14
<16> USB3RP1
USB3RP1 4 4 3 3 USB3RP1_R 4.7U_0805_10V4Z
2 2
0.1U_0402_16V7K 2.0A +5V_USB_PWR1
DLW21SN900HQ2L_0805_4P~D
1 2 UI3
@ RI1 0_0402_5% 1 8 80mil
GND VOUT
2 7
1 2 3
VIN
VIN
VOUT
VOUT
6 0_0402_1% USB conn.1
EPAD
D @ RI2 0_0402_5% USB_EN# D
<24,32> USB_EN# 4 EN FLG 5 1 2 USB_OC0# <16>
1 RI19 @ 1
CI13 CI15
9
AP2301MPG-13_MSOP8
+5V_USB_PWR1
0.1U_0402_16V7K
LI3 0.1U_0402_16V7K
USB3TN1 2 1 USB3TN1_C 1 2 USB3TN1_R 2 2 JUSB1
<16> USB3TN1 1 2
CI3 0.01U_0402_16V7K USB3TP1_R 9
SSTX+
1
VBUS
0.1U_0402_25V6K
<16> USB3TP1 USB3TP1 2 1 USB3TP1_C 4 3 USB3TP1_R USB3TN1_R 8
CI4 0.01U_0402_16V7K 4 3 USB20_P0_R SSTX-
1 3
DLW21SN900HQ2L_0805_4P~D D+
1 7 GND
1 2 CI1 + USB20_N0_R 2 10
D- GND
CI2
@ RI4 0_0402_5% USB3RP1_R 6 11
SSRX+ GND
2
DI1 220U_6.3V_M 4 12
2 2 GND GND
PESD5V0U2BT_SOT23-3
DI2
1 2 USB3RP1_R 1 10 USB3RP1_R USB3RN1_R 5 13
@ RI6 0_0402_5% SSRX- GND
USB3RN1_R 2 9 USB3RN1_R TAITW_PUBAU1-09FNLSCNN4H0
CONN@
USB3TP1_R 4 7 USB3TP1_R
LI2 USB3TN1_R 5 6 USB3TN1_R

USB20_P0 1 2 USB20_P0_R
<16> USB20_P0
1
1 2
3
USB20_N0 4 3 USB20_N0_R 8
<16> USB20_N0 4 3
DLW21SN900SQ2L_0805_4P~D IP4292CZ10-TB_XSON10U10~D
1 2
@ RI3 0_0402_5%
1 2
C @ RI5 0_0402_5% C
+5VALW
+5VALW 1 1
CI6 CI7
100K_0402_5%
UI1
2.0A
2
1 RI7 2 0_0402_5% SB# 8 1 PWRSHARE_EN +3VALW 4.7U_0805_10V4Z 0.1U_0402_16V7K
<24> PWRSHARE_OE# CB CEN USB20_N1_SW 2 2 +5V_USB_PWR2
<16> USB20_N1 7 2
TDM DM
RI11
6 3 USB20_P1_SW RI10
<16> USB20_P1 TDP DP
5 4 SEL 1 2 +5VALW UI2
VDD SELCDP
1
+5VALW 9 1 8 80mil
1
Thermal Pad 10K_0402_5% GND VOUT
2 7
VIN VOUT
2
SLG55584AVTR_TDFN8_2X2 RI8 3 6 0_0402_1%

VIN VOUT
@
EPAD
10K_0402_5% PWRSHARE_EN# 4 5 1 2
EN FLG USB_OC1# <16>
1 RI12
10K_0402_5% RI20 @ 1
1
CI5 D CI17
1
9
0.1U_0402_25V6K PWRSHARE_EN 2 AP2301MPG-13_MSOP8
2 G 0.1U_0402_16V7K
2
QI1
S
3
2
DI3
B SDMK0340L-7-F_SOD323-2~D B
1
<24> PWRSHARE_EN_EC#
LI4
<16> USB3RN2
USB3RN2 1
1 2
2 USB3RN2_R
DI4 USB conn.2
USB3RN2_R 1 10 USB3RN2_R
USB3RP2 4 3 USB3RP2_R
<16> USB3RP2 4 3 USB3RP2_R USB3RP2_R <28> USB_DETECT#
2 9
DLW21SN900HQ2L_0805_4P~D
1 2 USB3TN2_R 4 7 USB3TN2_R +5V_USB_PWR2
@ RI13 0_0402_5% JUSB2
USB3TP2_R 5 6 USB3TP2_R USB3TP2_R 9 10
SSTX+ D1-DP
1 2 1
VBUS
0.1U_0402_25V6K
@ RI14 0_0402_5% 3 USB3TN2_R 8
USB20_P1_R SSTX-
1 3
8 D+
1 7
CI8 + USB20_N1_R GND
2 11
D- GND
CI9
IP4292CZ10-TB_XSON10U10~D USB3RP2_R 6 12
SSRX+ GND
2
220U_6.3V_M 4 13
2 2 GND GND
PESD5V0U2BT_SOT23-3
DI5
LI5 USB3RN2_R 5 14
USB20_P1_SW USB20_P1_R SSRX- GND
4 3
LI6 4 3 TAITW_USB011-107BRL-TW
<16> USB3TN2 USB3TN2 2 1 USB3TN2_C 1 2 USB3TN2_R CONN@
CI10 0.01U_0402_16V7K 1 2 USB20_N1_SW USB20_N1_R
1 2
1 2 @
USB3TP2 2 1 USB3TP2_C 4 3 USB3TP2_R DLW21SN900SQ2L_0805_4P~D
<16> USB3TP2 4 3
CI11 0.01U_0402_16V7K 1 2
1
A DLW21SN900HQ2L_0805_4P~D @ RI15 0_0402_5% A
1 2
@ RI17 0_0402_5% 1 2
@ RI16 0_0402_5%
1 2
@ RI18 0_0402_5%

Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
GFX PCIE LANE REVERSAL

PEG_HTX_C_GRX_P[7..0] UV1A PEG_GTX_C_HRX_P[7..0]
<5> PEG_HTX_C_GRX_P[7..0] PEG_GTX_C_HRX_P[7..0] <5>
PEG_HTX_C_GRX_N[7..0] PEG_GTX_C_HRX_N[7..0]
<5> PEG_HTX_C_GRX_N[7..0] PEG_GTX_C_HRX_N[7..0] <5>
D PEG_HTX_C_GRX_P0 AA38 Y33 PCIE_CRX_C_GTX_P0 220nF_0402_16V7K 2 1 CV43 DIS@ PEG_GTX_C_HRX_P0 D

PEG_HTX_C_GRX_N0 PCIE_RX0P PCIE_TX0P
Y37 Y32 PCIE_CRX_C_GTX_N0 220nF_0402_16V7K 2 1 CV44 DIS@ PEG_GTX_C_HRX_N0
PEG_HTX_C_GRX_P1
PCIE_RX0N PCIE_TX0N
LVDS Interface
Y35 PCIE_RX1P PCIE_TX1P W33 PCIE_CRX_C_GTX_P1 220nF_0402_16V7K 2 1 CV45 DIS@ PEG_GTX_C_HRX_P1
PEG_HTX_C_GRX_N1 W36 W32 PCIE_CRX_C_GTX_N1 220nF_0402_16V7K 2 1 CV46 DIS@ PEG_GTX_C_HRX_N1
PCIE_RX1N PCIE_TX1N UV1G
PEG_HTX_C_GRX_P2 W38 U33 PCIE_CRX_C_GTX_P2 220nF_0402_16V7K 2 1 CV47 DIS@ PEG_GTX_C_HRX_P2

V37 PCIE_RX2N PCIE_TX2N U32 PCIE_CRX_C_GTX_N2 220nF_0402_16V7K 2 1 CV48 DIS@ PEG_GTX_C_HRX_N2
LVDS CONTROL AK27
VARY_BL
DIGON AJ27
PEG_HTX_C_GRX_P3 V35 U30 PCIE_CRX_C_GTX_P3 220nF_0402_16V7K 2 1 CV49 DIS@ PEG_GTX_C_HRX_P3
U36 PCIE_RX3N PCIE_TX3N U29 PCIE_CRX_C_GTX_N3 220nF_0402_16V7K 2 1 CV50 DIS@ PEG_GTX_C_HRX_N3
PEG_HTX_C_GRX_P4 U38 T33 PCIE_CRX_C_GTX_P4 220nF_0402_16V7K 2 1 CV51 DIS@ PEG_GTX_C_HRX_P4 AK35

PEG_HTX_C_GRX_N4 PCIE_RX4P PCIE_TX4P TXCLK_UP_DPF3P
T37 PCIE_RX4N PCIE_TX4N T32 PCIE_CRX_C_GTX_N4 220nF_0402_16V7K 2 1 CV52 DIS@ PEG_GTX_C_HRX_N4
TXCLK_UN_DPF3N AL36
PCI EXPRESS INTERFACE

TXOUT_U0P_DPF2P AJ38
PEG_HTX_C_GRX_P5 T35 T30 PCIE_CRX_C_GTX_P5 220nF_0402_16V7K 2 1 CV53 DIS@ PEG_GTX_C_HRX_P5 AK37
PEG_HTX_C_GRX_N5 PCIE_RX5P PCIE_TX5P TXOUT_U0N_DPF2N
R36 PCIE_RX5N PCIE_TX5N T29 PCIE_CRX_C_GTX_N5 220nF_0402_16V7K 2 1 CV54 DIS@ PEG_GTX_C_HRX_N5
TXOUT_U1P_DPF1P AH35
TXOUT_U1N_DPF1N AJ36
PEG_HTX_C_GRX_P6 R38 P33 PCIE_CRX_C_GTX_P6 220nF_0402_16V7K 2 1 CV55 DIS@ PEG_GTX_C_HRX_P6
P37 PCIE_RX6N PCIE_TX6N P32 PCIE_CRX_C_GTX_N6 220nF_0402_16V7K 2 1 CV56 DIS@ PEG_GTX_C_HRX_N6
TXOUT_U2P_DPF0P AG38
TXOUT_U2N_DPF0N AH37
C C
PEG_HTX_C_GRX_P7 P35 P30 PCIE_CRX_C_GTX_P7 220nF_0402_16V7K 2 1 CV57 DIS@ PEG_GTX_C_HRX_P7 AF35
PEG_HTX_C_GRX_N7 PCIE_RX7P PCIE_TX7P TXOUT_U3P
N36 PCIE_RX7N PCIE_TX7N P29 PCIE_CRX_C_GTX_N7 220nF_0402_16V7K 2 1 CV58 DIS@ PEG_GTX_C_HRX_N7
TXOUT_U3N AG36
N38 N33 LVTMDP

PCIE_RX8P PCIE_TX8P
M37 PCIE_RX8N PCIE_TX8N N32
TXCLK_LP_DPE3P AP34
TXCLK_LN_DPE3N AR34
M35 PCIE_RX9P PCIE_TX9P N30
L36 PCIE_RX9N PCIE_TX9N N29 TXOUT_L0P_DPE2P AW37
TXOUT_L0N_DPE2N AU35
L38 PCIE_RX10P PCIE_TX10P L33 TXOUT_L1P_DPE1P AR37

K37 PCIE_RX10N PCIE_TX10N L32 TXOUT_L1N_DPE1N AU39
TXOUT_L2P_DPE0P AP35
K35 PCIE_RX11P PCIE_TX11P L30 TXOUT_L2N_DPE0N AR35
J36 PCIE_RX11N PCIE_TX11N L29
12/8 Remove RX8~15 TXOUT_L3P AN36
J38 K33
12/8 Remove CV59~CV74 TX8~15 TXOUT_L3N AP37
PCIE_RX12P PCIE_TX12P
H37 PCIE_RX12N PCIE_TX12N K32
H35 PCIE_RX13P PCIE_TX13P J33

G36 J32 THAMES XT M2 @
PCIE_RX13N PCIE_TX13N
B B
G38 PCIE_RX14P PCIE_TX14P K30

F37 PCIE_RX14N PCIE_TX14N K29
F35 PCIE_RX15P PCIE_TX15P H33

E37 PCIE_RX15N PCIE_TX15N H32
RV61 2 @ 1 0_0402_5%
CLOCK Chelsea Only +3VGS

CLK_PEG_VGA AB35 1 2 +1.0VGS
<14> CLK_PEG_VGA PCIE_REFCLKP
CLK_PEG_VGA# AA36 RV198 CH@1.69K_0402_1%~D
<14> CLK_PEG_VGA# PCIE_REFCLKN
5
UV13
CALIBRATION Thames/seymour Only 2
P
<16> PCH_PLTRST# B
Y30 1.27K_0402_1% 1 DIS@ 2 RV63 4 GPU_RST#
PCIE_CALRP Y
<16> DGPU_HOLD_RST# 1 A
G
1RV64 DIS@2 AH16 PWRGOOD PCIE_CALRN Y29 2K_0402_1% 1 DIS@ 2 RV65 +1.0VGS 2
1K_0402_5% 1K_0402_1% 1 CH@ 2 RV203 DIS@
3
CV326 MC74VHC1G08DFT2G SC70 5P
GPU_RST# AA30 Install 2K for Thames/Seymour 0.1U_0402_25V6K
PERSTB DIS@ 1
1
DIS@
RV66 THAMES XT M2 TH@
A 100K_0402_5% A
2
UV1 CH@

Chelsea Pro ATI_SeymourXT_M2_PCIE/LVDS
Custom 1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
UV1B CONFIGURATION STRAPS RECOMMENDED SETTINGS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE 0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET X = DESIGN DEPENDANT
AU24 NA = NOT APPLICABLE
TXCAP_DPA3P
AV23
+1.8VGS TXCAM_DPA3N
AT25 RECOMMENDED
RV67 X76@ 10K_0402_5% VRAM_ID0 MUTI GFX TX0P_DPA2P STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
1 2 AR24 SETTINGS
RV68 X76@ 10K_0402_5% DPA TX0M_DPA2N
1 2
RV69 1 X76@ 2 10K_0402_5% VRAM_ID1 AU26 0: 50% swing
RV70 X76@ 10K_0402_5% TX1P_DPA1P TX_PWRS_ENB GPIO0 PCIE FULL TX OUTPUT SWING 1: Full swing X
1 2 TX1M_DPA1N AV25
RV71 1 X76@ 2 10K_0402_5% VRAM_ID2
RV72 1 X76@ 2 10K_0402_5% AR8 AT27 0: disable
DVPCNTL_MVP_0 TX2P_DPA0P TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS 1: enable X
AU8 DVPCNTL_MVP_1 TX2M_DPA0N AR26
AP8 DVPCNTL_0
AW8 AR30 Advertises PCIE speed 0: 2.5GT/s
DVPCNTL_1 TXCBP_DPB3P +3VGS RSVD GPIO2 when compliance test 1: 5GT/s 0
AR3 DVPCNTL_2 TXCBM_DPB3N AT29
AR1 DVPCLK
VRAM_ID0 AU1 AV31
DVPDATA_0 TX3P_DPB2P
1
D VRAM_ID1 AU3 AU30 RSVD GPIO8 RESERVED 0 D
VRAM_ID2 DVPDATA_1 DPB TX3M_DPB2N
AW3 DVPDATA_2
AP6 AR32 +3VGS DIS@ RV73
DVPDATA_3 TX4P_DPB1P 10K_0402_5% BIF_VGA DIS GPIO9 VGA ENABLED 0
Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2 AW5 DVPDATA_4 TX4M_DPB1N AT31
AU5
2
DVPDATA_5
1
AR6 AT33 AC_BATT
H5TQ1G63DFR-11C DVPDATA_6 TX5P_DPB0P RV74 RSVD GPIO21 RESERVED 0
AW6 DVPDATA_7 TX5M_DPB0N AU32
3
64MX16 (1G) *Hynix 1GB RV67 RV70 RV72 DIS@ 4.7K_0402_5%
PT AU6
AT7
DVPDATA_8
AU14 0: disable
PN:SA000041S3L 1 0 0 DVPDATA_9 TXCCP_DPC3P DIS@ BIOS_ROM_EN GPIO_22_ROMCSB ENABLE EXTERNAL BIOS ROM 1: enable X
AV7 AV13
2
K4W1G1646G-BC11 DVPDATA_10 TXCCM_DPC3N PACIN#
AN7 DVPDATA_11 5
64MX16 (1G) *Samsung 1GB RV68 RV69 RV72 QV14B
PT AV9 DVPDATA_12 TX0P_DPC2P AT15
6
AT9 AR14 2N7002DW-7-F_SOT363-6 ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT XXX
4
PN:SA00004GS1L 0 1 0 DVPDATA_13 TX0M_DPC2N
AR10 DVPDATA_14
H5TQ2G63BFR-11C AW10 DPC AU16 RV250 DIS@
DVPDATA_15 TX1P_DPC1P QV14A VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS 0
128M16 (2G) Hynix 2GB RV67 RV70 RV71 AU10 DVPDATA_16 TX1M_DPC1N AV15<15,24,43,44> ACIN 1 2 2
AP10 @ 0_0402_5% 2N7002DW-7-F_SOT363-6
PN:SA00003YO1L 1 0 1 DVPDATA_17
AV11 AT17
1
K4W2G1646C-HC11 DVPDATA_18 TX2P_DPC0P RSVD H2SYNC 0
AT11 DVPDATA_19 TX2M_DPC0N AR16
128M16 (2G) Samsung 2GB RV68 RV69 RV71 AR12 DVPDATA_20
AW12 AU20 RV251
PN:SA000047Q1L 0 1 1 DVPDATA_21 TXCDP_DPD3P RSVD GENERICC 0
AU12 DVPDATA_22 TXCDM_DPD3N AT19 <24> ACIN_65W 1 2
MT41J64M16JT-107G AP12 DIS@ 0_0402_5%
DVPDATA_23 AUD[1] AUD[0]
64MX16 (1G) *Micron 1GB RV67 RV69 RV71 PT TX3P_DPD2P AT21
AJ21 AR20 AUD[1] HSYNC 0 0 No audio function 11
PN:SA00004Y20L 1 1 1 SWAPLOCKA TX3M_DPD2N 0 1 Audio for DisplayPort and HDMI if dongle is detected
AK21 SWAPLOCKB DPD AU22 AUD[0] VSYNC 1 0 Audio for DisplayPort only
TX4P_DPD1P
AV21 1 1 Audio for both DisplayPort and HDMI
TX4M_DPD1N
I2C AT23
TX5P_DPD0P
TX5M_DPD0N AR22 AMD RESERVED CONFIGURATION STRAPS
AK26 SCL ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL
AJ26 SDA Not share via for other GND
RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND
R AD39 VGA_CRT_R <21> NOT CONFLICT DURING RESET
GENERAL PURPOSE I/O AD37
GPU_GPIO0 RB
AH20 GPIO_0
GPU_GPIO1 AH18 AE36 VGA_CRT_G <21> GPIO21 H2SYNC GENERICC GPIO2 GPIO8
GPU_GPIO2 GPIO_1 G
AN16 GPIO_2 GB AD35
VGA_SMB_DA2
AH23
VGA_SMB_CK2 GPIO_3_SMBDATA
AJ23 GPIO_4_SMBCLK B AF37 VGA_CRT_B <21> Reserved test pad of CRT Signals for debug
AC_BATT AH17 AE38
VDDCI_VID GPIO_5_AC_BATT DAC1 BB
AJ17
+3VGS STRAPS <53> VDDCI_VID R02
AK17
GPIO_6
GPIO_7_BLON HSYNC AC36 VGA_CRT_HSYNC <21>
+1.8VGS +1.8VGS +1.8VGS
GPU_GPIO8 AJ13 AC38 VGA_CRT_VSYNC <21>
C
GPU_GPIO9 GPIO_8_ROMSO VSYNC C
AH15 GPIO_9_ROMSI
10K_0402_5% 1 DIS@ 2 RV75 GPU_GPIO0 AJ16 +1.8VGS
GPIO_10_ROMSCK
1
10K_0402_5% 1 DIS@ 2 RV76 GPU_GPIO1 GPU_GPIO11 AK16 AB34 RV84 1 DIS@ 2 499_0402_1% 65mA
10K_0402_5% @ RV77 GPU_GPIO2 GPU_GPIO12 GPIO_11 RSET RV237 RV239 RV241
1 2
GPU_GPIO13
AL16
AM16
GPIO_12
AD34
10mil
+AVDD (1.8V@65mA AVDD) 1 2 8.45K_0402_1% 10K_0402_5% 10K_0402_5%
GPIO_13 AVDD LV12DIS@
AM14 GPIO_14_HPD2 AVSSQ AE34 @ @ @
10K_0402_5% @ RV78 AC_BATT GPU_VID0 BLM15BD121SN1D_0402
CV75
CV76
CV77
1 2 AM13 10mil 100mA
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
<52> GPU_VID0
2
GPU_VID2 GPIO_15_PWRCNTL_0 +VDD1DI PS_1 PS_2 PS_3
<52> GPU_VID2 AK14 GPIO_16 VDD1DI AC33 (1.8V@100mA VDD1DI) 1 2 +1.8VGS 1 1 1
THM_ALERT# AG30 AC34 LV13DIS@
GPIO_17_THERMAL_INT VSS1DI
1
10K_0402_5% @ RV79 GPU_GPIO8 BLM15BD121SN1D_0402
CV78
CV79
CV80
1 2 AN14
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
10K_0402_5% @ RV80 GPU_GPIO9 RV89 1 @ GPIO_18_HPD3
1 2 2 10K_0402_5% AM17 1 1 1 1 RV238 1 RV240 1 RV242
0.68U_0402_10V
0.68U_0402_10V
0.68U_0402_10V
GPU_VID1 GPIO_19_CTF 2 2 2
DIS@
DIS@
DIS@
<52> GPU_VID1 AL13 GPIO_20_PWRCNTL_1 R2/NC AC30 4.75K_0402_1% 4.75K_0402_1% 4.75K_0402_1%
10K_0402_5% 1 DIS@ 2 RV81 GPU_GPIO11 GPIO21_BBEN AJ14 AC31 CV329 CH@ CV331 CH@ CV333 CH@
10K_0402_5% @ RV82 GPU_GPIO12 T78 GPIO_21_BB_EN R2B/NC
1 2 AK13
2
10K_0402_5% @ RV83 GPU_GPIO13 VGA_CLKREQ#_R GPIO_22_ROMCSB 2 2 2 @ 2 CH@ 2 @ 2
DIS@
DIS@
DIS@
1 2 AN13 GPIO_23_CLKREQB G2/NC AD30
GPIO24_TRSTB AM23 AD31 PS_1
GPIO25_TDI JTAG_TRSTB G2B/NC
AN23 JTAG_TDI
GPIO26_TCK AK23 AF30
GPIO27_TMS JTAG_TCK B2/NC
T79 GPIO28_TDO
AL24
AM24
JTAG_TMS B2B/NC AF31
RV246
Add 12/6 for MLPS
JTAG_TDO
AJ19 1 2 +DPLL_PVDD
GENERICA @ 0_0402_5%
AK19 GENERICB C/NC AC32 Transmitter Power Saving Enable
RV247
+3VGS
AJ20
AK20
GENERICC Y/NC AD32
AF32 1 2 DPLL_PVSS
Add 12/8 TX_PWRS_ENB GPIO0 0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
GENERICD COMP/NC @ 0_0402_5%
AJ24 GENERICE_HPD4
10K_0402_5% 1 @ 2 RV85 GPIO24_TRSTB AH26 DAC2 PCI Express Transmitter De-emphasis Enable
10K_0402_5% @ GENERICF_HPD5
1 2 RV86 GPIO25_TDI AH24 GENERICG_HPD6 H2SYNC/GENLK_CLK AD29 GENLK_CLK T80 TX_DEEMPH_EN GPIO1 0: Tx de-emphasis diabled for mobile mode
10K_0402_5% 1 @ 2 RV87 GPIO27_TMS AC29 GENLK_VSYNC T81 1: Tx de-emphasis enabled (Defailt setting for desktop)
V2SYNC/GENLK_VSYNC
10K_0402_5% 1 @ 2 RV88 GPIO26_TCK AK24 HPD1 PS_2
VDD2DI/NC AG31
AG32
0.60 V level, Please

VSS2DI/NC +3VGS
Internal VGA Thermal Sensor
VREFG Divider ans A2VDD/NC AG33
+1.8VGS
DIS@ cap close to ASIC 20mil AD33 PS_3 +3VGS
A2VDDQ/NC
1
+1.8VGS 2 RV93 1 499_0402_1% +VREFG_GPU AH13 RV207 DIS@ DIS@
DIS@ VREFG RV90 RV91
LV14DIS@
(Thames 75mA) A2VSSQ/TSVSSQ AF33 1 2
2 RV95 1 249_0402_1% DIS@ 0_0402_5% 10K_0402_5% 10K_0402_5%
+DPLL_PVDD
2 1 20mil
2
BLM15BD121SN1D_0402 2 1 AA29 NC_TSVSSQ should be tied to GND on Thames/Seymour
2
CV81 0.1U_0402_16V7K +DPLL_PVDD AM32 R2SET/NC
CV82
CV83
CV84
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
DIS@ DPLL_PVDD
1 1 1 10_0402_5% 2 DPLL_PVSS AN32 DPLL_PVSS
VGA_SMB_CK2 1 6 EC_SMB_CK2 <24>
TH@ RV248
B
20mil B
5
DDC/AUX AM26 QV15A TH@
+DPLL_VDDC AN31 PLL/CLOCK DDC1CLK DMN66D0LDW-7_SOT363-6
DPLL_VDDC DDC1DATA AN26
2 2 2 +3VGS VGA_SMB_DA2
DIS@
DIS@
DIS@
4 3 EC_SMB_DA2 <24>
AUX1P AM27
XTALIN XTALIN AV33 AL27 QV15B TH@
XTALIN AUX1N
1
XTALOUT AU34 DMN66D0LDW-7_SOT363-6

RV235
Voltage Swing: 1.8 V XTALOUT
DDC2CLK AM19
+1.0VGS @1 RV92 2 0_0402_5%
LV15DIS@
(Thames 125mA) 10K_0402_5%
DDC2DATA AL19
0.935V@Chelsea @ AW34 XO_IN
2 1 +DPLL_VDDC AN20 @1 RV94 2 0_0402_5%
2
BLM15BD121SN1D_0402 TS_FDO AUX2P

AW35 XO_IN2 AUX2N AM20
CV86
CV87
CV88
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
1 1 1 DDCCLK_AUX3P AL30
RV236 AM30
DDCDATA_AUX3N
10K_0402_5%
2 2 2 CH@ DDCCLK_AUX4P AL29 Reserved test pad of CRT Signals for debug
GPU_THERMAL_D+
DIS@
DIS@
DIS@
AF29 AM29
2
GPU_THERMAL_D- DPLUS THERMAL DDCDATA_AUX4N

AG29 DMINUS
Add 12/6 for MLPS AN21 VGA_CRT_CLK
DDCCLK_AUX5P VGA_CRT_CLK <21>
VGA_CRT_DATA
TS_FDO AK32
DDCDATA_AUX5N AM21 VGA_CRT_DATA <21> CRT
TS_FDO
DIS@
RV97 (Thames 5mA) DDC6CLK AJ30
AL31 TS_A/NC DDC6DATA AJ31
XTALOUT XTALIN DIS@ (1.8V@20mA TSVDD)
1M_0402_5% +1.8VGS 1
LV16
2 +TSVDD
10mil
AJ32
DDCCLK_AUX7P AK30
AK29
VGA Thermal Sensor ADM1032ARMZ
YV1 BLM15BD121SN1D_0402 TSVDD DDCDATA_AUX7N
AJ33 Closed to GPU
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
TSVSS +3VGS +3VGS

DIS@ CV91
DIS@ CV92
DIS@ CV93
1 1 1
3 3 1 1
DIS@ GND GND DIS@ THAMES XT M2 CH@ 2
2
CV94 CV95 2 2 2 CV85
18P_0402_50V8J 4 2 18P_0402_50V8J RV96
@ for debug CRT +3VGS
27MHZ_16PF_7V27000011 0.1U_0402_16V7K CH@ 4.7K_0402_5%
1
DIS@ VGA_CRT_VSYNC RV216 1 @ 210K_0402_5% UV14
1
VGA_CRT_HSYNC RV217 1 @ 210K_0402_5% 1 8 VGA_SMB_CK2
RV218 1 @ VDD SCLK
VGA_CRT_CLK 210K_0402_5%
VGA_CRT_DATA RV219 1 @ 210K_0402_5% GPU_THERMAL_D+ 2 7 VGA_SMB_DA2
CV89 D+ SDATA
+3VGS VGA_CRT_R RV220 1 @ 2150_0402_1% 1 2 3 6 THM_ALERT#
RV221 1 @ D- ALERT#
VGA_CRT_G 2150_0402_1% CH@
close to YV1 VGA_CRT_B RV222 1 @ 2150_0402_1% GPU_THERMAL_D- 2200P_0402_50V7K 4 5 1
THERM# GND
1
A +3VGS A
1 2 XTALIN CV90
<31> VGA_X1 10P_0402_50V8J
RV199 RV232 0_0402_5% ADM1032ARMZ-2REEL_MSOP8
2.2K_0402_5% +3VGS CH@ 2 @
GCLK@
@ Address:100_1101
2
G
1 2
2
RV98 4.7K_0402_5%
VGA_CLKREQ#_R
<14> PEG_A_CLKRQ# 1 3 CH@ 12/8 Add external thermal sensor BOM
D
@
2N7002_SOT23-3
QV28
2 RV200 1
0_0402_5%
@
ATI_SeymourXT_M2_Main_MSIC
Custom 1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
+3VGS +5VS +5VS Switch circuits in BACO desingns for Thanes/Seymour only
Circuits to support BACO
1
+3VGS RV99
0.1U_0402_16V7K
1
10K_0402_5% 1 RV249 2
@ CV96
1
RV100 @ @ 0_0805_5% 55mA@1.0V, in BACO mode
10K_0402_5%
<17,52> VGA_PWRGD
2
CH@ VDDC_ON# QV16 QV17
2
2 CH@ CH@
2
RV101 1.0V_ON# +1.0VGS AO3416_SOT23-3 AO3416_SOT23-3
+BIF_VDDC +VGA_CORE
10K_0402_5% 60mil
D
DIS@ UV15 3 1 3 1
6
@
2 60mil 60mil
P
1
B
4
Y @ @ 1 RV103 2 1 RV234 2
G
1
2
A
G
D D
5 QV18B 2 QV18A 1.0V_ON# CH@ 0_0805_5% TH@ 0_0603_5%
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 1 for PX5.0
3
1 MC74VHC1G08DFT2G SC70 5P QV19 QV20 CV97
1
@ @
CV98 +VGA_CORE AO3416_SOT23-3 AO3416_SOT23-3 DIS@ 22U_0805_6.3V6M
for PX4.0
1
D 0.1U_0402_16V7K 2
+3VGS CV99 2 60mil
D
2 QV21 @ @ 3 1 3 1
<37> PX_EN
G 2N7002K_SOT23-3 0.1U_0402_16V7K
S DIS@ 1 2
3
1
G
2
2
RV104 UV16
5
5.11K_0402_1% VDDC_ON#
DIS@ 2
P
B PX_MODE
4 PX_MODE <24,52,53>
2
+3VGS Y
1
A
G
PX_MODE=1 for Normal Operation
@
3
MC74VHC1G08DFT2G SC70 5P PX_MODE=0 for BACO mode to shut down power rails expcept VDDR3,PCIE_VDDC and 1.8V rail
1
DIS@
RV105
20K_0402_5%
@
RV102
2
PXS_PWREN 1 2 RUNPWROK 1 DIS@ 2 PX_MODE

DV12
RB751V_SOD323 0_0402_5%
1 2 1 for PX5.0 +3VALW +1.8VS TO +1.8VGS
RV233 0_0402_5%
DIS@ CV100
for PX4.0 and PX5.0 1U_0603_10V6K
1
2 +1.8VS @ +1.8VGS
@
DIS@
RV109 2 1
100K_0402_5%
2MM J9
2
PXS_PWREN# UV35
C DMN3030LSS-13_SOP8L-8 C
8 1
1
D
7 2
PXS_PWREN 2 DIS@ 6 3 1 1
<16,52> PXS_PWREN
1
G QV25 5
S 2N7002_SOT23 CV320 CV321
3
DIS@ 10U_0805_10V6K 1U_0603_10V6K RV213
4
2 DIS@ 2 DIS@ 470_0603_5%
Note: @
1 2
PX4.0 +VGA_CORE,VDDCI,+1.5VGS ON B+_BIAS D
2N7002H_SOT23-3
PX4.0 +3VGS, +1.0VGS,+1.8VGS OFF QV29
2
G
1
PX5.0 +3VGS,+VGA_CORE,VDDCI,+1.5VGV,+1.0VGS,+1.8VGS OFF @ S
3
330K_0402_5%
RV128
DIS@
2
1 RV211 2
DIS@ 470K_0402_5% PXS_PWREN# 1 RV214 2
2
1 @ 0_0402_5%
1
D RV212 CV2
+1.5VS TO +1.5VGS PXS_PWREN# 2 0_0402_5% 0.1U_0603_25V7K
G QV10 @ DIS@
S 2
1
2N7002H_SOT23-3
Power Seguence of Thames and Chelsea +1.5V
JP9 @
+1.5VGS DIS@
2 1
2MM
UV17 DIS@
+3VGS 10U_0603_6.3V6M AO4304L_SO8
8 1 10U_0603_6.3V6M
1 7 2 1 1
1
CV104 CV105 CV106 DIS@
B
+VGA_CORE DIS@
6
5
3
DIS@ 1U_0603_10V6K RV111 @
B
470_0603_5%
2 2 2
4
+VDDCI
1 2
B+_BIAS D
2
+3.3VS TO +3.3VGS
+1.5VGS RV112 DIS@ S
G
QV26 @
3
+3VALW 20K_0402_5% 2N7002K_SOT23-3
RV113
+1.0VGS
1
1 DIS@ 2 +3VS +3VGS

DIS@ 300K_0402_5%
6
RV114 JP8 @
2
100K_0402_5% @ 10U_0603_6.3V6M 1U_0603_10V6K

+1.8VGS <20ms DIS@ RV115
1
PX_MODE# 1 RV116 2 0_0402_5%
2 1
3 2
1
PX_MODE# 2 QV27A 0_0402_5% CV107 DIS@ 2MM 1 1
0.1U_0603_25V7K CV101 CV102 RV106

@ 2 DIS@ DIS@ 470_0603_5%
1
DIS@ @
PX_MODE 5 QV27B 3 1 2 2
2
1
4
1
DIS@ RV117 QV22 DIS@ D
100K_0402_5% +5VALW AP2301GN-HF_SOT23-3 2
2
DIS@ DIS@ G
2
RV107 RV108 S QV23
3
2N7002K_SOT23-3
20K_0402_5% 1K_0402_5% @
1 DIS@ RV110
1
D CV103 PXS_PWREN# 1 2
PXS_PWREN 2 DIS@ 0.1U_0603_25V7K @ 0_0402_5%
G QV24
S 2
3
2N7002H_SOT23-3
A A

ATI_SeymourXT_M2_BACO POWER
C 1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
UV1F
AB39 A3
PCIE_VSS#1 GND#1
E39 A37
PCIE_VSS#2 GND#2
F34 AA16
PCIE_VSS#3 GND#3
F39 AA18
PCIE_VSS#4 GND#4
G33 AA2
PCIE_VSS#5 GND#5
G34 AA21
PCIE_VSS#6 GND#6
H31 AA23
PCIE_VSS#7 GND#7
H34 AA26
D PCIE_VSS#8 GND#8 D
H39 AA28
PCIE_VSS#9 GND#9
J31 AA6
PCIE_VSS#10 GND#10
J34 AB12
PCIE_VSS#11 GND#11
K31 AB15
PCIE_VSS#12 GND#12
K34 AB17
PCIE_VSS#13 GND#13
(Thames 330mA) K39
L31
PCIE_VSS#14 GND#14
AB20
AB22
+DPAB_VDD18 +1.8VGS PCIE_VSS#15 GND#15
L34 AB24
PCIE_VSS#16 GND#16
1.8V@300mA DPAB_VDD18) M34
PCIE_VSS#17 GND#17
AB27
+DPAB_VDD18 1 RV118 2 M39 AC11
PCIE_VSS#18 GND#18
1 1 1 N31 AC13
0_0402_5% PCIE_VSS#19 GND#19
CV108
CV109
CV110
N34 AC16
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
UV1H PCIE_VSS#20 GND#20
(Thames 330mA) DIS@ P31
PCIE_VSS#21 GND#21
AC18
20mil DP C/D POWER 2 @ 2 @ 2
P34
PCIE_VSS#22 GND#22
AC2
+1.8VGS 1.8V@300mA DPCD_VDD18) +DPCD_VDD18 DP A/B POWER 20mil @ P39 AC21
PCIE_VSS#23 GND#23
130mA R34
PCIE_VSS#24 GND#24
AC23
1 RV119 2 +DPCD_VDD18 AP20 AN24 T31 AC26
DPCD/DPC_VDD18#1 DPAB/DPA_VDD18#1 PCIE_VSS#25 GND#25
0_0402_5%
AP21
DPCD/DPC_VDD18#2 DPAB/DPA_VDD18#2
AP24 (Thames 330mA) T34
PCIE_VSS#26 GND#26
AC28
CV111
CV112
CV113
1U_0402_6.3V6K T39 AC6
10U_0603_6.3V6M
0.1U_0402_16V7K
+DPCD_VDD10 +DPAB_VDD10 +1.0VGS PCIE_VSS#27 GND#27
DIS@ 1 1 1 20mil (1.0V@220mA DPAB_VDD10) U31
PCIE_VSS#28 GND#28
AD15
20mil 110mA 0.935V@Chelsea U34
PCIE_VSS#29 GND#29
AD17
@ @ @ AP13 AP31 +DPAB_VDD10 1 RV120 2 V34 AD20
DPCD/DPC_VDD10#1 DPAB/DPA_VDD10#1 PCIE_VSS#30 GND#30
AT13 AP32 V39 AD22
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
2 2 2 DPCD/DPC_VDD10#2 DPAB/DPA_VDD10#2 0_0402_5% PCIE_VSS#31 GND#31
CV114
CV115
CV116
W31 AD24
PCIE_VSS#32 GND#32
1 1 1 DIS@ W34 AD27
PCIE_VSS#33 GND#33
AN17 AN27 Y34 AD9
DP/DPC_VSSR#1 DP/DPA_VSSR#1 @ @ @ PCIE_VSS#34 GND#34
AP16 AP27 Y39 AE2
DP/DPC_VSSR#2 DP/DPA_VSSR#2 PCIE_VSS#35 GND#35
AP17 AP28 AE6
DP/DPC_VSSR#3 DP/DPA_VSSR#3 2 2 2 GND#36
(Thames 220mA) +DPCD_VDD10
AW14
AW16
DP/DPC_VSSR#4 DP/DPA_VSSR#4
AW24
AW26
GND#37
AF10
AF16
+1.0VGS DP/DPC_VSSR#5 DP/DPA_VSSR#5 GND#38
1.0V@220mA DPCD_VDD10) GND#39
AF18
0.935V@Chelsea +DPCD_VDD18 +DPAB_VDD18 AF21
1 RV121 2
0_0402_5%
+DPCD_VDD10 20mil
AP22
DPCD/DPD_VDD18#1 DPAB/DPB_VDD18#1
20mil
AP25 130mA F15
GND#100
GND GND#40
GND#41
GND#42
AG17
AG2
DIS@
@ CV117
@ CV118
@ CV119
AP23 AP26 F17 AG20

1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
DPCD/DPD_VDD18#2 DPAB/DPB_VDD18#2 GND#101 GND#43

1 1 1 F19 AG22
+DPCD_VDD10 +DPAB_VDD10 GND#102 GND#44
F21 AG6
GND#103 GND#45
C 20mil 20mil F23
GND#104 GND#46
AG9 C
AP14 AN33 110mA F25 AH21
2 2 2 DPCD/DPD_VDD10#1 DPAB/DPB_VDD10#1 GND#105 GND#47
AP15 AP33 F27 AJ10
DPCD/DPD_VDD10#2 DPAB/DPB_VDD10#2 GND#106 GND#48
F29 AJ11
GND#107 GND#49
F31 AJ2
GND#108 GND#50
F33 AJ28
GND#109 GND#51
AN19 AN29 F7 AJ6
DP/DPD_VSSR#1 DP/DPB_VSSR#1 GND#110 GND#52
AP18 AP29 F9 AK11
AP19 AP30 G2 AK31
AW20 AW30 G6 AK7
AW22 AW32 H9 AL11
J2 AL14
GND#115 GND#57
J27 AL17
GND#116 GND#58
J6 AL2
150_0402_1% 2 DIS@ GND#117 GND#59
1 RV122 AW18 AW28 RV123 1 DIS@ 2 150_0402_1% J8 AL20
DPCD_CALR DPAB_CALR GND#118 GND#60
+1.8VGS (Thames 330mA) +DPEF_VDD18 +DPAB_VDD18
K14
K7
GND#119 GND/PX_EN#61
AL21
AL23
PX_EN <36>
GND#120 GND#62
1.8V@300mA DPEF_VDD18) 20mil DP E/F POWER DP PLL POWER 20mA 10mil L11 AL26
+DPEF_VDD18 GND#121 GND#63
1 RV124 2 AH34 AU28 L17 AL32
DPEF/DPE_VDD18#1 DPAB_VDD18/DPA_PVDD GND#122 GND#64
1
AJ34 AV27 L2 AL6
0_0402_5% DPEF/DPE_VDD18#2 DP_VSSR/DPA_PVSS GND#123 GND#65 RV125
@ CV120
@ CV121
@ CV122
L22 AL8
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
+DPEF_VDD10 +DPAB_VDD18 GND#124 GND#66 4.7K_0402_5%

DIS@ 1 1 1 L24 AM11
GND#125 GND#67
20mil 20mA 10mil L6 AM31 DIS@
GND#126 GND#68
AL33 AV29 M17 AM9
2
DPEF/DPE_VDD10#1 DPAB_VDD18/DPB_PVDD GND#127 GND#69
AM33 AR28 M22 AN11
2 2 2 DPEF/DPE_VDD10#2 DP_VSSR/DPB_PVSS GND#128 GND#70
M24 AN2
+DPCD_VDD18 GND#129 GND#71
N16 AN30
GND#130 GND#72
20mA 10mil N18 AN6
GND#131 GND#73
AN34 AU18 N2 AN8
DP/DPE_VSSR#1 DPCD_VDD18/DPC_PVDD GND#132 GND#74
AP39 AV17 N21 AP11
+DPEF_VDD10 DP/DPE_VSSR#2 DP_VSSR/DPC_PVSS GND#133 GND#75
(Thames 220mA) AR39
AU37
DP/DPE_VSSR#3 +DPCD_VDD18
N23
N26
GND#134 GND#76
AP7
AP9
+1.0VGS DP/DPE_VSSR#4 GND#135 GND#77
1.0V@240mA DPEF_VDD10) 20mA 10mil N6 AR5
GND#136 GND#78
0.935V@Chelsea DPCD_VDD18/DPD_PVDD
AV19 R15
GND#137 GND#79
B11
1 RV126 2 +DPEF_VDD10 +DPEF_VDD18 AR18 R17 B13
DP_VSSR/DPD_PVSS GND#138 GND#80
20mil R2
GND#139 GND#81
B15
0_0402_5% +DPEF_VDD18
@ CV123
@ CV124
@ CV125
AF34 R20 B17

1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
DPEF/DPF_VDD18#1 GND#140 GND#82

DIS@ 1 1 1 AG34 20mA 10mil R22 B19
B DPEF/DPF_VDD18#2 GND#141 GND#83 B
AM37 R24 B21
+DPEF_VDD10 DPEF_VDD18/DPE_PVDD GND#142 GND#84
AN38 R27 B23
DP_VSSR/DPE_PVSS GND#143 GND#85
2 2 2 20mil R6
GND#144 GND#86
B25
AK33 +DPEF_VDD18 T11 B27
AK34 20mA 10mil T13 B29
AL38 T16 B31
DPEF_VDD18/DPF_PVDD GND#147 GND#89
AM35 T18 B33
DP_VSSR/DPF_PVSS GND#148 GND#90
T21 B7
GND#149 GND#91
AF39 T23 B9
DP/DPF_VSSR#1 GND#150 GND#92
AH39 T26 C1
AK39 U15 C39
AL34 U17 E35
PS_0 DP/DPF_VSSR#4 GND#154 GND#95
AM34 U2 E5
U20 F11
GND#156 GND#97
U22 F13
+1.8VGS GND#157 GND#98
U24
GND#158
AM39 U27
DPEF_CALR GND#159
U6
GND#160
V11
GND#161
1
THAMES XT M2 V16
GND#163
1
RV127 @ V18
RV243 150_0402_1% GND#164
V21
DIS@ GND#165
8.45K_0402_1% V23
GND#166
CH@ V26
2
GND#167
W2
2
GND#168
AMD recommended setting W6
GND#169
PS_0 MLPS Bit Y15
RV201 GND#170
strap R_PU R_PD C Y17
GND#171
Y20
GND#172
1
1 PS0: 11001 RV243=8.45K RV201=2K CV335=NC Y22 A39 MECH#1

0.68U_0402_10V
GND#173 VSS_MECH#1 T82 PAD

CH@ RV201 Y24 AW1 MECH#2
0_0402_5% CV335 PS1: 11000 RV237=NC RV238=4.75K CV329=NC Y27 AW39MECH#3
TH@ U13
@ 2 GND#152
2K_0402_1% PS2: 00000 RV239=NC RV240=4.75K CV331=0.68u V13
2
GND#162
Thames/Seymour Only PS3: 11000 RV241=NC RV242=4.75K CV333=NC THAMES XT M2
@
A Do not install for Heathrow/Chelsea A
PS_0 Should be tied to GND on Thames/Seymour

ATI_SetmourXT_M2_PWR_GND
C 1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
(Thames 440mA) +1.8VGS

(1.8V@504mA PCIE_VDDR) DIS@ LV17
+PCIE_VDDR 2 1
MBK1608121YZF_0603
CV126
CV127
CV128
CV129
CV130
CV131
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1 1 1
2 2 2 2 2 2
40mA
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
UV1E +1.8VGS
For DDR3 MVDDQ = 1.5V (1.8V@40mA PCIE_PVDD) DIS@ LV18
+1.5VGS MEM I/O
(Thames 1.7)A PCIE 40mil 2 1
MBK1608121YZF_0603
CV132
CV133
CV134
Add 12/8
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
AC7 AA31 1 1 1
VDDR1#1 PCIE_VDDR#1 RV244
AD11 AA32
VDDR1#2 PCIE_VDDR#2
2 +PCIE_VDDR
CV135
CV136
CV137
CV138
CV139
CV140
CV141
CV142
CV143
CV144
CV145
1 AF7 AA33 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
220U_B2_2.5VM_R35
D VDDR1#3 PCIE_VDDR#3 TH@ 0_0402_5%
D
1 1 1 1 1 1 1 1 1 1 AG10 AA34
+ VDDR1#4 PCIE_VDDR#4 RV245 2 2 2
DIS@
DIS@
DIS@
AJ7 V28
@ VDDR1#5 PCIE_VDDR#5
AK8 W29 1 2 +BIF_VDDC
VDDR1#6 PCIE_VDDR#6 @ 0_0402_5%
AL9 W30
2 2 2 2 2 2 2 2 2 2 2 VDDR1#7 PCIE_VDDR#7
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
G11 Y31
VDDR1#8 PCIE_VDDR#8 +PCIE_PVDD +1.0VGS
G14 AB37
VDDR1#9 PCIE_VDDR/PCIE_PVDD
G17
VDDR1#10
G20 G30
VDDR1#11 PCIE_VDDC#1
G23 G31
(Thames 1.1A)
CV146
CV147
CV148
CV149
CV150
CV151
G26 H29
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
G29 H30 1 1 1 1 1 1
H10
J29 (1.0V@1920mA PCIE_VDDC)
+1.5VGS J7 J30
J9
L28
2 2 2 2 2 2 (Chelsea)
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
K11 M28
K13
N28 (0.935V@2.5A PCIE_VDDC)
CV152
CV153
CV154
CV155
CV156
K8 R28
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1 1 1 1 1 L12 T28
L16 U28
VDDR1#22 PCIE_VDDC#12 +VGA_CORE
L21
VDDR1#23
2 2 2 2 2
L23
VDDR1#24 (Thames 20.5A)
DIS@
DIS@
DIS@
DIS@
DIS@
L26 AA15
VDDR1#25 VDDC#1
330U_D2_2VM_R6M~D
L7 CORE AA17
VDDR1#26 VDDC#2
CV157
CV158
CV159
CV160
CV161
CV162
CV163
CV164
CV165
CV166
CV167
CV168
CV169
M11 AA20 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDDR1#27 VDDC#3
N11 AA22 1 1 1 1 1 1 1 1 1 1 1 1 1
VDDR1#28 VDDC#4
CV327
+
DIS@
P7 AA24
VDDR1#29 VDDC#5
R11 AA27
VDDR1#30 VDDC#6
U11 AB16
+1.8VGS +VDDC_CT VDDR1#31 VDDC#7 2 2 2 2 2 2 2 2 2 2 2 2 2 2
(Thames 250mA)
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
U7 AB18
VDDR1#32 VDDC#8
Y11 AB21
DIS@ LV19 VDDR1#33 VDDC#9
(1.8V@110mA VDD_CT) Y7
VDDR1#34 VDDC#10
AB23
1 2 AB26
BLM15BD121SN1D_0402 VDDC#11
AB28
VDDC#12 +VGA_CORE
CV170
CV171
CV172
CV173
CV174
AC17
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
VDDC#13
1 1 1 1 1 AC20
LEVEL VDDC#14
+3VGS 20mil TRANSLATION VDDC#15
AC22
AC24
VDDC#16
POWER
(Thames 60mA)
CV175
CV176
CV177
CV178
CV179
CV180
CV181
CV182
CV183
CV184
CV185
CV186
C AF26 AC27 C
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
DIS@ 2 2 2 2 2 VDD_CT#1 VDDC#17
DIS@
DIS@
DIS@
DIS@
AF27 AD18 1 1 1 1 1 1 1 1 1 1 1 1
VDD_CT#2 VDDC#18
AG26 AD21
VDD_CT#3 VDDC#19
CV187
CV188
CV189
CV190
AG27 AD23
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDD_CT#4 VDDC#20
1 1 1 1 AD26
VDDC#21 2 2 2 2 2 2 2 2 2 2 2 2
10mil
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
AF17
I/O VDDC#22
AF20
VDDC#23
AF23 AF22
2 2 2 2 VDDR3#1 VDDC#24
DIS@
DIS@
DIS@
DIS@
AF24 AG16
VDDR3#2 VDDC#25
AG23 AG18
VDDR3#3 VDDC#26 +VGA_CORE
AG24 AG21
+1.8VGS VDDR3#4 VDDC#27
DIS@ LV20
20mil VDDC#28
AH22
AH27
+VDDR4 AF13 VDDC#29
1 2 AH28
BLM15BD121SN1D_0402 VDDR4#4 VDDC#30
CV191
CV192
AF15 M26
10U_0603_6.3V6M
22U_0603_6.3V6M
VDDR4#5 VDDC#31
CV193
CV194 AG13 N24 1 1

1U_0402_6.3V6K
0.1U_0402_16V7K
VDDR4#7 VDDC#32
1 1 AG15 N27
VDDR4#8 VDDC/BIF_VDDC#33
R18
VDDC#34
R21
VDDC#35 2 2
DIS@
DIS@
AD12 R23
2 2 VDDR4#1 VDDC#36
DIS@
DIS@
AF11 R26
VDDR4#2 VDDC#37
AF12 T17
VDDR4#3 VDDC#38
AG11 T20
VDDR4#6 VDDC#39 +BIF_VDDC
T22
VDDC#40
+1.8VGS (Thames 150mA)
(M97, Broadway and Madison: 1.8V@150mA MPV18)
VDDC#41
T24
T27
55mA
VDDC/BIF_VDDC#42
U16
LV21 DIS@ VDDC#43
For non-BACO designs, connect BIF_VDDC to VDDC.
CV195
CV196
M20 U18
1U_0402_6.3V6K
1U_0402_6.3V6K
NC_VDDRHA VDDC#44
1 2 M21 U21 1 1
(Thames 50mA) MCK1608471YZF 0603 NC_VSSRHA VDDC#45
U23 For BACO designs - see BACO reference schematics
+1.8VGS VDDC#46
U26
LV22 DIS@ VDDC#47
(1.8V@75mA SPV18)
CV197
CV198
CV199
V12 V17
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
NC_VDDRHB VDDC#48 2 2
DIS@
DIS@
1 2 1 1 1 U12 V20
BLM15BD121SN1D_0402 NC_VSSRHB VDDC#49
V22
VDDC#50
CV200
CV201
CV202
V24
1U_0402_6.3V6K
10U_0603_6.3V6M
0.1U_0402_16V7K
VDDC#51
1 1 1 V27
2 2 2 VDDC#52
DIS@
DIS@
DIS@
Y16
PLL VDDC#53
Y18
B VDDC#54 B
2 2 2 20mil VDDC#55
Y21
DIS@
DIS@
DIS@
Y23
+MPV18 VDDC#56
H7 Y26
MPV18#1 VDDC#57
H8 Y28
MPV18#2 VDDC#58
(GDDR3/DDR3 1.12V@4A VDDCI)
+VDDCI +VGA_CORE
+1.0VGS (Thames 100mA)
0.935V@Chelsea
10mil +SPV18 AM10 (GDDR5 1.12V@16A VDDCI) LV25 @
LV23 DIS@ (120mA SPV10)
SPV18 4A
1 2
20mil +SPV10 AN9
VDDCI#1
AA13
AB13
1 2
BLM15BD121SN1D_0402
MCK1608471YZF 0603 SPV10 VDDCI#2 LV26 @
CV203
CV204
CV205
CV206
CV207
CV208
CV209
CV210
CV211
CV212
CV213
CV214
AC12
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
22U_0603_6.3V6M
+VDDCI +VGA_CORE VDDCI#3
CV215
CV216
CV217
AN10 AC15 1 1 1 1 1 1 1 1 1 1 1 1 1 2
10U_0603_6.3V6M
1U_0402_6.3V6K
0.1U_0402_16V7K
SPVSS VDDCI#4 BLM15BD121SN1D_0402

1 1 1 AD13
VDDCI#5
AD16
VDDCI#6
1
M15
RV215 RV202 VDDCI#7 2 2 2 2 2 2 2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
M16
2 2 2 10_0402_1% 10_0402_1% VOLTAGE VDDCI#8
DIS@
DIS@
DIS@
M18
DIS@ DIS@ SENESE VDDCI#9
M23
VDDCI#10
10mil N13
2
VGA_CORE_SEN VDDCI#11
<52> VCCSENSE_VGA AF28 N15
FB_VDDC VDDCI#12
N17
VDDCI#13
10mil
CV325
CV324
CV322
CV323
N20
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
VDDCI_SEN VDDCI#14
<53> VDDCI_SEN AG28 N22 1 1 1 1
FB_VDDCI ISOLATED VDDCI#15 R12
CORE I/O VDDCI#16 R13
VSSSENSE_VGA VDDCI#17
<52> VSSSENSE_VGA AH29 R16
FB_GND VDDCI#18 2 2 2 2
DIS@
DIS@
DIS@
DIS@
T12
VDDCI#19
1
T15
RV204 VDDCI#20
V15
DIS@ 10_0402_1% VDDCI#21
Y13
VDDCI#22
VDDCI and VDDC should have seperate regulators with a merge option on PCB
2
THAMES XT M2
@
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator
A A

ATI_SeymourXT_M2_Power
C 1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
UV1C MDA[0..63] UV1D MDB[0..63]

DDR2 DDR2 <40> MDA[0..63] DDR2 DDR2 <41> MDB[0..63]
GDDR3/GDDR5 GDDR5/GDDR3 GDDR3/GDDR5 GDDR5/GDDR3
DDR3 DDR3 MAA[12..0] DDR3 DDR3 MAB[12..0]
MAA[12..0] <40> MAB[12..0] <41>
MDA0 C37 G24 MAA0 MDB0 C5 P8 MAB0
MDA1 DQA0_0/DQA_0 MAA0_0/MAA_0 MAA1 A_BA[2..0] MDB1 DQB0_0/DQB_0 MAB0_0/MAB_0 MAB1 B_BA[2..0]
C35 J23 A_BA[2..0] <40> C3 T9 B_BA[2..0] <41>
MDA2 DQA0_1/DQA_1 MAA0_1/MAA_1 MAA2 MDB2 DQB0_1/DQB_1 MAB0_1/MAB_1 MAB2
A35 H24 E3 P9
E34 J24 E1 N7
DQA0_3/DQA_3 MAA0_3/MAA_3 DQB0_3/DQB_3 MAB0_3/MAB_3
MEMORY INTERFACE A
MDA4 G32 H26 MAA4 MDB4 F1 N8 MAB4
DQA0_4/DQA_4 MAA0_4/MAA_4 DQB0_4/DQB_4 MAB0_4/MAB_4
MEMORY INTERFACE B
MDA5 D33 J26 MAA5 MDB5 F3 N9 MAB5
F32 H21 F5 U9
E32 G21 G4 U8
D31 H19 H5 Y9
F30 H20 H6 W9
C30 L13 J4 AC8
A30 G16 K6 AC9
F28 J16 K5 AA7
D
MDA13 DQA0_12/DQA_12 MAA1_4/MAA_12 A_BA2 MDB13 DQB0_12/DQB_12 MAB1_4/MAB_12 B_BA2 D
C28 H16 L4 AA8
MDA14 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 A_BA0 MDB14 DQB0_13/DQB_13 MAB1_5/BA2 B_BA0
A28 J17 M6 Y8
MDA15 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 A_BA1 MDB15 DQB0_14/DQB_14 MAB1_6/BA0 B_BA1
E28 H17 M1 AA9
MDA16 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 MDB16 DQB0_15/DQB_15 MAB1_7/BA1
D27 DQMA#[7..0] <40> M3 DQMB#[7..0] <41>
MDA17 DQA0_16/DQA_16 DQMA#0 MDB17 DQB0_16/DQB_16 DQMB#0
F26 A32 M5 H3
MDA18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 DQMA#1 MDB18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 DQMB#1
C26 C32 N4 H1
MDA19 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 DQMA#2 MDB19 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 DQMB#2
A26 D23 P6 T3
F24 E22 P5 T5
C24 C14 R4 AE4
A24 A14 T6 AF5
E24 E10 T1 AK6
C22 D9 U4 AK5
MDA25 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 MDB25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
A22 QSA[7..0] <40> V6 QSB[7..0] <41>
MDA26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 QSA0 MDB26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 QSB0
F22 C34 V1 F6
MDA27 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 QSA1 MDB27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 QSB1
D21 D29 V3 K3
A20 D25 Y6 P3
F20 E20 Y1 V5
D19 E16 Y3 AB5
E18 E12 Y5 AH1
C18 J10 AA4 AJ9
A18 D7 QSA#[7..0] <40> AB6 AM5 QSB#[7..0] <41>
MDA34 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 MDB34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
F18 AB1
MDA35 DQA1_2/DQA_34 QSA#0 MDB35 DQB1_2/DQB_34 QSB#0
D17 A34 AB3 G7
MDA36 DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 QSA#1 MDB36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 QSB#1
A16 E30 AD6 K1
F16 E26 AD1 P1
D15 C20 AD3 W4
E14 C16 AD5 AC4
F14 C12 AF1 AH3
D13 J11 AF3 AJ8
F12 F8 AF6 AM3
MDA43 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 MDB43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
A12 AG4
MDA44 DQA1_11/DQA_43 ODTA0 MDB44 DQB1_11/DQB_43 ODTB0
D11 J21 ODTA0 <40> AH5 T7 ODTB0 <41>
MDA45 DQA1_12/DQA_44 ADBIA0/ODTA0 ODTA1 MDB45 DQB1_12/DQB_44 ADBIB0/ODTB0 ODTB1
F10 G19 ODTA1 <40> AH6 W7 ODTB1 <41>
MDA46 DQA1_13/DQA_45 ADBIA1/ODTA1 MDB46 DQB1_13/DQB_45 ADBIB1/ODTB1
A10 AJ4
MDA47 DQA1_14/DQA_46 CLKA0 MDB47 DQB1_14/DQB_46 CLKB0
C10 H27 CLKA0 <40> AK3 L9 CLKB0 <41>
MDA48 DQA1_15/DQA_47 CLKA0 CLKA0# MDB48 DQB1_15/DQB_47 CLKB0 CLKB0#
G13 G27 CLKA0# <40> AF8 L8 CLKB0# <41>
MDA49 DQA1_16/DQA_48 CLKA0B MDB49 DQB1_16/DQB_48 CLKB0B
H13 AF9
MDA50 DQA1_17/DQA_49 CLKA1 MDB50 DQB1_17/DQB_49 CLKB1
C J13 J14 CLKA1 <40> AG8 AD8 CLKB1 <41>
C
MDA51 DQA1_18/DQA_50 CLKA1 CLKA1# MDB51 DQB1_18/DQB_50 CLKB1 CLKB1#
H11 H14 CLKA1# <40> AG7 AD7 CLKB1# <41>
MDA52 DQA1_19/DQA_51 CLKA1B MDB52 DQB1_19/DQB_51 CLKB1B
G10 AK9
MDA53 DQA1_20/DQA_52 RASA0# MDB53 DQB1_20/DQB_52 RASB0#
G8 K23 RASA0# <40> AL7 T10 RASB0# <41>
MDA54 DQA1_21/DQA_53 RASA0B RASA1# MDB54 DQB1_21/DQB_53 RASB0B RASB1#
K9 K19 RASA1# <40> AM8 Y10 RASB1# <41>
MDA55 DQA1_22/DQA_54 RASA1B MDB55 DQB1_22/DQB_54 RASB1B
K10 AM7
MDA56 DQA1_23/DQA_55 CASA0# MDB56 DQB1_23/DQB_55 CASB0#
G9 K20 CASA0# <40> AK1 W10 CASB0# <41>
MDA57 DQA1_24/DQA_56 CASA0B CASA1# MDB57 DQB1_24/DQB_56 CASB0B CASB1#
A8 K17 CASA1# <40> AL4 AA10 CASB1# <41>
MDA58 DQA1_25/DQA_57 CASA1B MDB58 DQB1_25/DQB_57 CASB1B
C8 AM6
MDA59 DQA1_26/DQA_58 CSA0#_0 MDB59 DQB1_26/DQB_58 CSB0#_0
E8 K24 CSA0#_0 <40> AM1 P10 CSB0#_0 <41>
MDA60 DQA1_27/DQA_59 CSA0B_0 MDB60 DQB1_27/DQB_59 CSB0B_0
A6 K27 AN4 L10
C6 AP3
MDA62 DQA1_29/DQA_61 CSA1#_0 MDB62 DQB1_29/DQB_61 CSB1#_0
E6 M13 CSA1#_0 <40> AP1 AD10 CSB1#_0 <41>
A5 K16 AP5 AC10
DQA1_31/DQA_63 CSA1B_1 DQB1_31/DQB_63 CSB1B_1
+VDD_MEM15_REFDA L18 K21 CKEA0 U10 CKEB0
+1.5VGS MVREFDA CKEA0 CKEA0 <40> CKEB0 CKEB0 <41>
+VDD_MEM15_REFSA L20 J20 CKEA1 +VDD_MEM15_REFDB Y12 AA11 CKEB1
MVREFSA CKEA1 CKEA1 <40> MVREFDB CKEB1 CKEB1 <41>
+VDD_MEM15_REFSB AA12
RV129 1 DIS@ WEA0# MVREFSB WEB0#
2 240_0402_1% L27 K26 WEA0# <40> N10 WEB0# <41>
RV130 1 SE@ MEM_CALRN0 WEA0B WEA1# WEB0B WEB1#
2 240_0402_1% N12 L15 WEA1# <40> AB11 WEB1# <41>
RV131 1 DIS@ MEM_CALRN1 WEA1B WEB1B
2 240_0402_1% AG12
MEM_CALRN2 DIS@
RV132 1 SE@ 2 240_0402_1% M12 H23 MAA13 RV133 1 2 TESTEN AD28 T8 MAB13
MEM_CALRP1 MAA0_8 MAA13 <40> TESTEN MAB0_8 MAB13 <41>
RV134 1 DIS@ 2 240_0402_1% M27 J19 MAA14 5.11K_0402_1% W8 MAB14
MEM_CALRP0 MAA1_8 MAA14 <40> MAB1_8 MAB14 <41>
RV135 1 DIS@ 2 240_0402_1% AH12 AK10
GDDR5
MEM_CALRP2 CLKTESTA
GDDR5
RV206 1 CH@ 2 120_0402_5% AL10 AH11 DRAM_RST#_R

RV205 1 CH@ 120_0402_5% CLKTESTB DRAM_RST
2
Co-lay Thames/Seymour/Chelsea
THAMES XT M2 THAMES XT M2
@ @
1
Thames M2 Seymour M2 Chelsea M2 @ @
CV218 CV219
RV129 POP @ @ 0.1U_0402_16V7K 0.1U_0402_16V7K
2
B B
route 50ohms single-ended/100ohms diff
RV130 @ POP @ This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
and keep short
Capacitors and Resistor values are an example only. The Series R and
1
RV131 POP @ @ || Cap values will depend on the DRAM load and will have to be Debug only, for clock observation, if not needed, DNI
@ @
RV132 @ POP @ calculated for different Memory ,DRAM Load and board to pass Reset RV136 RV137 5mil 5mil
Signal Spec. 51.1_0402_1% 51.1_0402_1%
RV134 POP @ @ Place all these components very close to GPU (Within
2
25mm) and keep all component close to each Other (within
RV135 POP @ @ 5mm) except Rser2
RV206 @ @ POP
RV205 @ @ POP +1.5VGS
1
+1.5VGS +1.5VGS RV138

4.7K_0402_5% +1.5VGS +1.5VGS
@
1
1
RV139 RV140
40.2_0402_1% 40.2_0402_1% RV141 RV142
DIS@ DIS@ 40.2_0402_1% 40.2_0402_1%
1 RV143 2 1 RV144 2 DRAM_RST#_R DIS@ DIS@
2
<40,41> DRAM_RST# 51.1_0402_1% 10_0402_1%
2
+VDD_MEM15_REFDA +VDD_MEM15_REFSA DIS@ DIS@
+VDD_MEM15_REFDB +VDD_MEM15_REFSB
2
1
CV220 CV221 DIS@ DIS@
1
RV146 0.1U_0402_16V7K RV147 0.1U_0402_16V7K CV222 RV145 CV223 CV224
100_0402_1% DIS@ 100_0402_1% DIS@ 120P_0402_50V9 4.99K_0402_1% RV148 0.1U_0402_16V7K RV149 0.1U_0402_16V7K
2
DIS@ DIS@ 100_0402_1% DIS@ 100_0402_1% DIS@

1
2
DIS@
2
DIS@
2
A A

ATI_SeymourXT_M2_MEM IF
C 1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
CHANNEL A: 256MB/512MB DDR3

UV18 UV19 UV20 UV21
VREFC_A1 M8 E3 MDA29 VREFC_A2 M8 E3 MDA17 VREFC_A3 M8 E3 MDA38 VREFC_A4 M8 E3 MDA55

VREFD_Q1 VREFCA DQL0 MDA27 VREFD_Q2 VREFCA DQL0 MDA23 VREFD_Q3 VREFCA DQL0 MDA36 VREFD_Q4 VREFCA DQL0 MDA51
H1 F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1 MDA30 VREFDQ DQL1 MDA16 VREFDQ DQL1 MDA39 VREFDQ DQL1 MDA48
F2 F2 F2 F2
MAA0 DQL2 MDA26 MAA0 DQL2 MDA19 MAA0 DQL2 MDA34 MAA0 DQL2 MDA52
N3 F8 N3 F8 N3 F8 N3 F8
MAA1 A0 DQL3 MDA28 MAA1 A0 DQL3 MDA18 MAA1 A0 DQL3 MDA35 MAA1 A0 DQL3 MDA50
P7 H3 P7 H3 P7 H3 P7 H3
P3 H8 P3 H8 P3 H8 P3 H8
N2 G2 N2 G2 N2 G2 N2 G2
P8 H7 P8 H7 P8 H7 P8 H7
MAA5 A4 DQL7 MAA5 A4 DQL7 MAA5 A4 DQL7 MAA5 A4 DQL7
P2 P2 P2 P2
MAA6 A5 MAA6 A5 MAA6 A5 MAA6 A5
R8 R8 R8 R8
D MDA[0..63] MAA7 A6 MDA0 MAA7 A6 MDA15 MAA7 A6 MDA42 MAA7 A6 MDA60 D
<39> MDA[0..63] R2 D7 R2 D7 R2 D7 R2 D7
MAA8 A7 DQU0 MDA5 MAA8 A7 DQU0 MDA10 MAA8 A7 DQU0 MDA44 MAA8 A7 DQU0 MDA57
T8 C3 T8 C3 T8 C3 T8 C3
R3 C8 R3 C8 R3 C8 R3 C8
L7 C2 L7 C2 L7 C2 L7 C2
MAA11 A10/AP DQU3 MDA3 MAA11 A10/AP DQU3 MDA13 MAA11 A10/AP DQU3 MDA43 MAA11 A10/AP DQU3 MDA61
R7 A7 R7 A7 R7 A7 R7 A7
N7 A2 N7 A2 N7 A2 N7 A2
MAA[14..0] MAA13 A12 DQU5 MDA2 MAA13 A12 DQU5 MDA12 MAA13 A12 DQU5 MDA41 MAA13 A12 DQU5 MDA62
<39> MAA[14..0] T3 B8 T3 B8 T3 B8 T3 B8
T7 A3 T7 A3 T7 A3 T7 A3
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 M7 M7 M7
A15/BA3 +1.5VGS A15/BA3 +1.5VGS A15/BA3 +1.5VGS A15/BA3 +1.5VGS
M2 B2 A_BA0 M2 B2 A_BA0 M2 B2 A_BA0 M2 B2

<39> A_BA0 BA0 VDD BA0 VDD BA0 VDD BA0 VDD
N8 D9 A_BA1 N8 D9 A_BA1 N8 D9 A_BA1 N8 D9
DQMA#[7..0] <39> A_BA1 BA1 VDD BA1 VDD BA1 VDD BA1 VDD
M3 G7 A_BA2 M3 G7 A_BA2 M3 G7 A_BA2 M3 G7
<39> DQMA#[7..0] <39> A_BA2 BA2 VDD BA2 VDD BA2 VDD BA2 VDD
K2 K2 K2 K2
VDD VDD VDD VDD
K8 K8 K8 K8
VDD VDD VDD VDD
N1 N1 N1 N1
VDD CLKA0 VDD VDD CLKA1 VDD
<39> CLKA0 J7 N9 J7 N9 <39> CLKA1 J7 N9 J7 N9
CK VDD CLKA0# CK VDD CK VDD CLKA1# CK VDD
<39> CLKA0# K7 R1 K7 R1 <39> CLKA1# K7 R1 K7 R1
QSA[7..0] CK VDD CKEA0 CK VDD CK VDD CKEA1 CK VDD
<39> QSA[7..0] <39> CKEA0 K9 R9 K9 R9 <39> CKEA1 K9 R9 K9 R9
CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS
K1 A1 ODTA0 K1 A1 K1 A1 ODTA1 K1 A1
<39> ODTA0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ <39> ODTA1 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
L2 A8 CSA0#_0 L2 A8 L2 A8 CSA1#_0 L2 A8
<39> CSA0#_0 CS/CS0 VDDQ CS/CS0 VDDQ <39> CSA1#_0 CS/CS0 VDDQ CS/CS0 VDDQ
J3 C1 RASA0# J3 C1 J3 C1 RASA1# J3 C1
<39> RASA0# RAS VDDQ RAS VDDQ <39> RASA1# RAS VDDQ RAS VDDQ
K3 C9 CASA0# K3 C9 K3 C9 CASA1# K3 C9
QSA#[7..0] <39> CASA0# CAS VDDQ CAS VDDQ <39> CASA1# CAS VDDQ CAS VDDQ
L3 D2 WEA0# L3 D2 L3 D2 WEA1# L3 D2
<39> QSA#[7..0] <39> WEA0# WE VDDQ WE VDDQ <39> WEA1# WE VDDQ WE VDDQ
E9 E9 E9 E9
VDDQ VDDQ VDDQ VDDQ
F1 F1 F1 F1
QSA3 VDDQ QSA2 VDDQ QSA4 VDDQ QSA6 VDDQ
F3 H2 F3 H2 F3 H2 F3 H2
QSA0 DQSL VDDQ QSA1 DQSL VDDQ QSA5 DQSL VDDQ QSA7 DQSL VDDQ
C7 H9 C7 H9 C7 H9 C7 H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
DQMA#3 E7 A9 DQMA#2 E7 A9 DQMA#4 E7 A9 DQMA#6 E7 A9

DQMA#0 DML VSS DQMA#1 DML VSS DQMA#5 DML VSS DQMA#7 DML VSS
D3 B3 D3 B3 D3 B3 D3 B3
DMU VSS DMU VSS DMU VSS DMU VSS
E1 E1 E1 E1
VSS VSS VSS VSS
G8 G8 G8 G8
QSA#3 VSS QSA#2 VSS QSA#4 VSS QSA#6 VSS
C G3 J2 G3 J2 G3 J2 G3 J2 C
QSA#0 DQSL VSS QSA#1 DQSL VSS QSA#5 DQSL VSS QSA#7 DQSL VSS
B7 J8 B7 J8 B7 J8 B7 J8
DQSU VSS DQSU VSS DQSU VSS DQSU VSS
M1 M1 M1 M1
VSS VSS VSS VSS
M9 M9 M9 M9
VSS VSS VSS VSS
P1 P1 P1 P1
VSS DRAM_RST# T2 VSS DRAM_RST# T2 VSS DRAM_RST# T2 VSS
<39,41> DRAM_RST# T2 P9 P9 P9 P9
RESET VSS RESET VSS RESET VSS RESET VSS
T1 T1 T1 T1
VSS VSS VSS VSS
L8 T9 L8 T9 L8 T9 L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1
1
J1 B1 J1 B1 J1 B1 J1 B1
RV150 NC/ODT1 VSSQ RV151 NC/ODT1 VSSQ RV152 NC/ODT1 VSSQ RV153 NC/ODT1 VSSQ
L1 B9 L1 B9 L1 B9 L1 B9
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ
240_0402_1% J9 D1 240_0402_1% J9 D1 240_0402_1% J9 D1 240_0402_1% J9 D1
DIS@ NC/CE1 VSSQ DIS@ NC/CE1 VSSQ DIS@ NC/CE1 VSSQ DIS@ NC/CE1 VSSQ
L9 D8 L9 D8 L9 D8 L9 D8
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
E8 E8 E8 E8
VSSQ VSSQ VSSQ VSSQ
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
G1 G1 G1 G1
VSSQ VSSQ VSSQ VSSQ
G9 G9 G9 G9
VSSQ VSSQ VSSQ VSSQ
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
DIS@ K4W1G1646G-BC11 K4W1G1646G-BC11 K4W1G1646G-BC11 K4W1G1646G-BC11
CLKA0 1 2 X76@ X76@ X76@ X76@
RV154 56_0402_1%
DIS@
CLKA0# 1 2
RV155 56_0402_1%
1
CV225
0.01U_0402_16V7K
DIS@ +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS
2
1
RV156 RV157 RV158 RV159 RV160 RV161 RV162 RV163
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
B B
DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
DIS@
15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil
2
2
CLKA1 1 2
RV164 56_0402_1% VREFD_Q1 VREFC_A1 VREFC_A2 VREFD_Q2 VREFC_A3 VREFD_Q3 VREFC_A4 VREFD_Q4
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
DIS@
CV226
CV227
CV228
CV229
CV230
CV231
CV232
1
1
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
CLKA1# 1 RV166 RV167 RV168 RV169 RV170 RV171 RV172 RV173
CV233
2
RV165 56_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
1
CV234 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
2
2
0.01U_0402_16V7K DIS@ DIS@ DIS@
2
2
DIS@
2
+1.5VGS
+1.5VGS
+1.5VGS +1.5VGS
CV235
CV236
CV237
CV238
CV239
CV240
CV241
CV242
CV243
CV244
CV245
CV246
CV247
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
CV248
CV249
CV250
CV251
CV252
CV253
CV254
CV255
CV256
CV257
CV258
CV259
CV260
CV261
CV262
CV263
CV264
CV265
CV266
CV267
CV268
CV269
CV270
CV271
1 1 1 1 1 1 1 1 1 1 1 1 1
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
A A

ATI_SeymourXT_M2_VRAM_A
C 1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
CHANNEL B: 256MB/512MB DDR3

UV22 UV23 UV24 UV25
VREFC_A1_B M8 E3 MDB29 VREFC_A2_B M8 E3 MDB16 VREFC_A3_B M8 E3 MDB33 VREFC_A4_B M8 E3 MDB55

VREFD_Q1_B H1 VREFCA DQL0 MDB26 VREFD_Q2_B VREFCA DQL0 MDB19 VREFD_Q3_B VREFCA DQL0 MDB37 VREFD_Q4_B VREFCA DQL0 MDB50
F7 H1 F7 H1 F7 H1 F7
VREFDQ DQL1 MDB30 VREFDQ DQL1 MDB20 VREFDQ DQL1 MDB35 VREFDQ DQL1 MDB54
F2 F2 F2 F2
MAB0 DQL2 MDB27 MAB0 DQL2 MDB22 MAB0 DQL2 MDB39 MAB0 DQL2 MDB51
N3 F8 N3 F8 N3 F8 N3 F8
MAB1 A0 DQL3 MDB31 MAB1 A0 DQL3 MDB17 MAB1 A0 DQL3 MDB32 MAB1 A0 DQL3 MDB53
P7 H3 P7 H3 P7 H3 P7 H3
P3 H8 P3 H8 P3 H8 P3 H8
N2 G2 N2 G2 N2 G2 N2 G2
P8 H7 P8 H7 P8 H7 P8 H7
MAB5 A4 DQL7 MAB5 A4 DQL7 MAB5 A4 DQL7 MAB5 A4 DQL7
P2 P2 P2 P2
MAB6 A5 MAB6 A5 MAB6 A5 MAB6 A5
R8 R8 R8 R8
MAB7 A6 MDB0 MAB7 A6 MDB15 MAB7 A6 MDB44 MAB7 A6 MDB56
R2 D7 R2 D7 R2 D7 R2 D7
D MDB[0..63] MAB8 A7 DQU0 MDB4 MAB8 A7 DQU0 MDB10 MAB8 A7 DQU0 MDB41 MAB8 A7 DQU0 MDB59 D
<39> MDB[0..63] T8 C3 T8 C3 T8 C3 T8 C3
MAB9 A8 DQU1 MDB1 MAB9 A8 DQU1 MDB14 MAB9 A8 DQU1 MDB47 MAB9 A8 DQU1 MDB63
R3 C8 R3 C8 R3 C8 R3 C8
L7 C2 L7 C2 L7 C2 L7 C2
MAB11 A10/AP DQU3 MDB3 MAB11 A10/AP DQU3 MDB12 MAB11 A10/AP DQU3 MDB45 MAB11 A10/AP DQU3 MDB57
R7 A7 R7 A7 R7 A7 R7 A7
N7 A2 N7 A2 N7 A2 N7 A2
T3 B8 T3 B8 T3 B8 T3 B8
MAB[14..0] MAB14 A13 DQU6 MDB5 MAB14 A13 DQU6 MDB8 MAB14 A13 DQU6 MDB42 MAB14 A13 DQU6 MDB60
<39> MAB[14..0] T7 A3 T7 A3 T7 A3 T7 A3
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M7 M7 M7 M7
A15/BA3 +1.5VGS A15/BA3 +1.5VGS A15/BA3 +1.5VGS A15/BA3 +1.5VGS
M2 B2 B_BA0 M2 B2 B_BA0 M2 B2 B_BA0 M2 B2

<39> B_BA0 BA0 VDD BA0 VDD BA0 VDD BA0 VDD
N8 D9 B_BA1 N8 D9 B_BA1 N8 D9 B_BA1 N8 D9
<39> B_BA1 BA1 VDD BA1 VDD BA1 VDD BA1 VDD
M3 G7 B_BA2 M3 G7 B_BA2 M3 G7 B_BA2 M3 G7
DQMB#[7..0] <39> B_BA2 BA2 VDD BA2 VDD BA2 VDD BA2 VDD
<39> DQMB#[7..0] K2 K2 K2 K2
VDD VDD VDD VDD
K8 K8 K8 K8
VDD VDD VDD VDD
N1 N1 N1 N1
VDD CLKB0 VDD VDD CLKB1 VDD
<39> CLKB0 J7 N9 J7 N9 <39> CLKB1 J7 N9 J7 N9
CK VDD CLKB0# CK VDD CK VDD CLKB1# CK VDD
<39> CLKB0# K7 R1 K7 R1 <39> CLKB1# K7 R1 K7 R1
CK VDD CKEB0 CK VDD CK VDD CKEB1 CK VDD
<39> CKEB0 K9 R9 K9 R9 <39> CKEB1 K9 R9 K9 R9
QSB[7..0] CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS CKE/CKE0 VDD +1.5VGS
<39> QSB[7..0]
K1 A1 ODTB0 K1 A1 K1 A1 ODTB1 K1 A1
<39> ODTB0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ <39> ODTB1 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
L2 A8 CSB0#_0 L2 A8 L2 A8 CSB1#_0 L2 A8
<39> CSB0#_0 CS/CS0 VDDQ CS/CS0 VDDQ <39> CSB1#_0 CS/CS0 VDDQ CS/CS0 VDDQ
J3 C1 RASB0# J3 C1 J3 C1 RASB1# J3 C1
<39> RASB0# RAS VDDQ RAS VDDQ <39> RASB1# RAS VDDQ RAS VDDQ
K3 C9 CASB0# K3 C9 K3 C9 CASB1# K3 C9
<39> CASB0# CAS VDDQ CAS VDDQ <39> CASB1# CAS VDDQ CAS VDDQ
L3 D2 WEB0# L3 D2 L3 D2 WEB1# L3 D2
QSB#[7..0] <39> WEB0# WE VDDQ WE VDDQ <39> WEB1# WE VDDQ WE VDDQ
<39> QSB#[7..0] E9 E9 E9 E9
VDDQ VDDQ VDDQ VDDQ
F1 F1 F1 F1
QSB3 VDDQ QSB2 VDDQ QSB4 VDDQ QSB6 VDDQ
F3 H2 F3 H2 F3 H2 F3 H2
QSB0 DQSL VDDQ QSB1 DQSL VDDQ QSB5 DQSL VDDQ QSB7 DQSL VDDQ
C7 H9 C7 H9 C7 H9 C7 H9
DQSU VDDQ DQSU VDDQ DQSU VDDQ DQSU VDDQ
DQMB#3 E7 A9 DQMB#2 E7 A9 DQMB#4 E7 A9 DQMB#6 E7 A9

DQMB#0 DML VSS DQMB#1 DML VSS DQMB#5 DML VSS DQMB#7 DML VSS
D3 B3 D3 B3 D3 B3 D3 B3
DMU VSS DMU VSS DMU VSS DMU VSS
E1 E1 E1 E1
VSS VSS VSS VSS
G8 G8 G8 G8
QSB#3 VSS QSB#2 VSS QSB#4 VSS QSB#6 VSS
G3 J2 G3 J2 G3 J2 G3 J2
DIS@ QSB#0 DQSL VSS QSB#1 DQSL VSS QSB#5 DQSL VSS QSB#7 DQSL VSS
C B7 J8 B7 J8 B7 J8 B7 J8 C
CLKB0 1 DQSU VSS DQSU VSS DQSU VSS DQSU VSS
2 M1 M1 M1 M1
RV174 56_0402_1% VSS VSS VSS VSS
M9 M9 M9 M9
VSS VSS VSS VSS
P1 P1 P1 P1
DIS@ VSS DRAM_RST# T2 VSS DRAM_RST# T2 VSS DRAM_RST# T2 VSS
<39,40> DRAM_RST# T2 P9 P9 P9 P9
CLKB0# 1 RESET VSS RESET VSS RESET VSS RESET VSS
2 T1 T1 T1 T1
RV175 56_0402_1% VSS VSS VSS VSS
L8 T9 L8 T9 L8 T9 L8 T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1
CV272
1
1
0.01U_0402_16V7K J1 B1 J1 B1 J1 B1 J1 B1
DIS@ RV176 NC/ODT1 VSSQ RV177 NC/ODT1 VSSQ RV178 NC/ODT1 VSSQ RV179 NC/ODT1 VSSQ
L1 B9 L1 B9 L1 B9 L1 B9
2
NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ NC/CS1 VSSQ

240_0402_1% J9 D1 240_0402_1% J9 D1 240_0402_1% J9 D1 240_0402_1% J9 D1
DIS@ NC/CE1 VSSQ DIS@ NC/CE1 VSSQ DIS@ NC/CE1 VSSQ DIS@ NC/CE1 VSSQ
L9 D8 L9 D8 L9 D8 L9 D8
NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ NCZQ1 VSSQ
E2 E2 E2 E2
2
2
VSSQ VSSQ VSSQ VSSQ
E8 E8 E8 E8
VSSQ VSSQ VSSQ VSSQ
F9 F9 F9 F9
VSSQ VSSQ VSSQ VSSQ
G1 G1 G1 G1
DIS@ VSSQ VSSQ VSSQ VSSQ
G9 G9 G9 G9
CLKB1 1 VSSQ VSSQ VSSQ VSSQ
2
RV180 56_0402_1% 96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
DIS@ K4W1G1646G-BC11 K4W1G1646G-BC11 K4W1G1646G-BC11 K4W1G1646G-BC11
CLKB1# 1 2 X76@ X76@ X76@ X76@
RV181 56_0402_1%
1
CV273
0.01U_0402_16V7K
DIS@
2
+1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS +1.5VGS

B B
1
1
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
15mil 15mil 15mil 15mil 15mil 15mil 15mil 15mil
2
2
VREFD_Q1_B VREFC_A1_B VREFC_A2_B VREFD_Q2_B VREFC_A3_B VREFD_Q3_B VREFC_A4_B VREFD_Q4_B
CV274
CV275
CV276
CV277
CV278
CV279
CV280
CV281
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
1
1
1 1 1 1 1 1 1 1
4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1% 4.99K_0402_1%
2 2 2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
2
2
+1.5VGS
+1.5VGS
+1.5VGS +1.5VGS
CV282
CV283
CV284
CV285
CV286
CV287
CV288
CV289
CV290
CV291
CV292
CV293
CV294
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
CV295
CV296
CV297
CV298
CV299
CV300
CV301
CV302
CV303
CV304
CV305
CV306
CV307
CV308
CV309
CV310
CV311
CV312
CV313
CV314
CV315
CV316
CV317
CV318
1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
DIS@
A A

ATI_SeymourXT_M2_VRAM_B
C 1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Issue Description Solution Description Rev.
Owner
The M3 traces are routed to the Sandy Bridge Processor reserved pins for DDR3
1 08,11,12 DIMM 11/07/28 COMPAL VREF Intel CHKLST Rev1.5 required 0.1
D D
2 18,19 PCH 11/07/28 COMPAL VCCDMI, V_PROC_IO change to +VCCP from +1.05VS Intel CHKLST Rev1.5 required 0.1
remove decoupling cap for +VCC_CORE, +VCCP, +VCC_GFXCORE_AXG, owner change to
3 09,10 CPU 11/07/28 COMPAL PWR Intel CHKLST Rev1.5 required 0.1
VCCSA_SELECT[0:1] which should be connected to VID[1:0] of the System Agent
4 10 CPU 11/07/28 COMPAL (SA) VR controller. Intel CHKLST Rev1.5 required 0.1
10
11
12
13
C 14 C
15
16
17
18
B B
A A

HW-PIR
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0
5 4 3 2 1
A B C D
PL901
VIN +5VALW +3VALW
BAV99W-7-F_SOT-323-3~D
SMB3025500YA_2P
ADPIN 1 2
PR901
1000P_0402_50V7K
1000P_0402_50V7K
2
PD901
@ PJPDC9 @ 0_0402_5%
2.2K_0402_5%
100P_0402_50V8J
100P_0402_50V8J
1
1
1 1 1 2
2
PC901
PC902
PC903
PC904
2 2
3
2
3
PR902
4 4
5 PR903
1
5 33_0402_5%
Erp lot6 Circuit VIN
1
6 1 3 PSID-3 1
S
1
GND 2 1
7 PQ901 PS_ID <24>

GND FDV301N_NL_SOT23-3~D
ACES_50299-00501-003
1.2K_1206_5%~D
G
2
+5VALW
100K_0402_1%
1
2
PL902 +5VALW
PR931
PR904
BLM18BD102SN1D_0603~D
DA204U_SOT323~D
PSID 2 1 PR929 PSID-2
ACIN <15,24,35,44>
10K_0402_1%
1
2
PD900
1M_0402_1%
32
1
2
PR905
C
PSID-1 2 PQ900
SSM6N7002FU-2N_SOT363-6
PQ907B
B
15K_0402_1%
MMST3904-7-F_SOT323~D @
1
1
2
5 E
2
PR900
PR928
1
6
2
@
1
PQ907A
200K_0402_1% PD902 PR906
PR930 SM24_SOT23 1 2 PSID-5
1
2
BATT+ BATT++ 1M_0402_1% 10K_0402_1%
1
1
PC916
1
0.1U_0402_25V6
BATT+
2
PL900
SMB3025500YA_2P
1 2 BATT++
100P_0402_50V8J
1
1
1000P_0402_50V7K
100P_0402_50V8J
0.01U_0402_25V7K
1
PC900
PC907
PC905
PC906
JRTC9
2
@
2
2 2
2 - + 1 +RTCBATT
1
PD904 @ B+
3 1
B+_BIAS
@
100K_0402_1%
0.1U_0402_25V6
0.22U_0603_25V7K
PESD24VS2UT_SOT23-3
1
@ PD905
1
PR907
PC908
PC909
RB751V-40_SOD323-2
PD903 1 2
+3VLP
2
SUYIN_060003FA002G202NL
2
PESD24VS2UT_SOT23-3
2
+5VALW PR908
PQ902
TP0610K-T1-E3_SOT23-3
22K_0402_1%
PBATT9 @ BATT_TEMP <24,44> 1 2 VSB_N_001
1VSB_N_003
1 1 PR909
2 2 CLK_SMB PR910 PR911 100K_0402_1%
3 3 DAT_SMB 100_0402_5% 10K_0402_1%
4 4 BATT_PRS PR912
5 5 1 2 1 2
+3VALW
1
SYS_PRES 0_0402_5% D
6 6
7 7 <45> POK 1 2VSB_N_002 2 PQ903
PR914 G 2N7002KW _SOT323-3
8 8 100_0402_5%
.1U_0402_16V7K
9 9
S
3
1
PC910
GND 10 1 2
EC_SMB_CK1 <24,44>
GND 11 PR913
2
2
0_0402_5%
ALLTO_C144FE-109A7-L 100_0402_5%
PR919
1 2
EC_SMB_DA1 <24,44>
PBATT1 battery connector (Follow E3)

1
VIN
3
SMART 3
2
Battery:
01.BATT1+ PD906 @930 ADP_I <24,44> PH901 under CPU botten side :
02.BATT2+ LL4148_LL34-2
CPU thermal protection at 90 degree C
VS_N_001
03.CLK_SMB
1
04.DAT_SMB
@930 PD907
05.BATT_PRS
2
BATT+ 2 1
PR918 PR926 @
06.SYS_PRES
1
LL4148_LL34-2 90.9K_0402_1% 6.81K_0402_1% +3VALW +3VLP
2N7002KW_SOT323-3
2N7002KW_SOT323-3
2
07.BAT_ALERT @930 PQ905 @930 PR920 PR921 @930
TP0610K-T1-E3_SOT23-3 68_1206_5% 68_1206_5% PR915
08.GND1
1 1
1 1
2
332K_0402_1% @
D D
09.GND2 PR927 PR916 @
2
PQ904
PQ906
N1 3 1 2 2 13K_0402_1% 13K_0402_1%
1
VS G
65W /90W # <24>
G
130W /90W # <24>
S S
1
<24> VCIN0_PH
1
PC912 @930
@930 PR922 PC911 @930 0.1U_0402_25V6
100K_0402_1% 0.22U_0603_25V7K
2
<24> VCIN1_PH
1
2
65W 90W 130W

2
1 2 VS_N_002
<25> 51_ON#
2
@930 PR923 PR917 PC915 @

22K_0402_1% 65W/90W# High Low PH900
2
499K_0402_1% .1U_0402_16V7K 100K_0402_1%_TSM0B104F4251RZ
1
1
130W/90W# Low High

4 4
@930
PU900
+CHGRTC G920AT24U_SOT89-3 @930
PR925
3 OUT IN 2 1 2
1U_0603_25V6K
4.7U_0603_6.3V6K~D
@930 PR924
0_0603_5% GND 200_0805_5% Security Classification Compal Secret Data Compal Electronics, Inc.
1
+3VLP 1 2 Issued Date 2012/01/17 Deciphered Date 2013/01/16 Title

1
PC913
PC914
PWR-DCIN / BATT CONN / OTP

2
@930 @930 1.0
Date: W ednesday, February 01, 2012 Sheet 43 of 56
A B C D
A B C D
VIN
PQ101 Iada=0~4.62A(90W)
PQ100 AO4409L_SO8 P3
AO4407AL_SO8 P2
8 1 1 8 ADP_I = 19.9*Iadapter*Rsense CC = 3.52A (Normal)
7 2 2 7
6 3 3 6
5 5
CV = 13.3V
PR102 B+ PQ102
0.01_1206_1% AO4407AL_SO8
4
1 8
1
1 4 2 7
200K_0402_1%
3.3_1210_5%
0.1U_0603_25V7K
3 6
PR101
PQ103 2 3 CSIN 5
1
PC101
PDTA144EU PNP_SOT323
5600P_0402_25V7K~D
1
1 1
PR100
CSIP
4
2
200K_0402_1%
2
CHG_B+
PR103
PL101
1UH_NRS4018T1R0NDGJ_3.2A_30%
2
1
1 2 PR108
2
200K_0402_1%
3.3_1210_5%
PC102
2200P_0402_25V7K~D
0.1U_0603_25V7K
1 2
1 VIN
1
PQ104
4.7U_0805_25V6-K
4.7U_0805_25V6-K
DDTC115EUA-7-F_SOT323
PR104
PC103
PC104
1
2
V1
10_0402_5%
10_0402_5%
2 VIN 100K_0402_1%
1
1
PR106
PR107
PC106
PC105
PR110
PR115
2 2
PR105 47K_0402_1%
0.1U_0603_25V7K
2
150K_0402_1% 1 2 V1
PC100
2.2U_0805_25V6K
0.1U_0603_25V7K
3
1
3
PC107 731@
731@
1
2
2
PQ106B
PR109
1
731@ PC108
5 10_1206_1% 731@
<24,43> BATT_TEMP
6
2
PC112
0.1U_0402_10V7K
1 2
1
1
PC109
PQ105A
PQ105B 0.047U_0603_25V7M PC110 731@
1
1
3
1U_0603_10V6K
PQ107
5 SSM6N7002FU-2N_SOT363-6 @ 1 2
1
2 PC111 2
2
1MAX8731_REF
PQ113B
@ 1U_0603_25V6K PR111 731@
4
2
1VDDP_LDO
4.7_0603_5% 5
1
VIN 2 1
PC135 PR132
210K_0402_1%
4
PC113 PR114 VDDP_LDO 1 2
2
1000P_0402_50V7K 731@ 0_0603_5% 0.1U_0603_25V7K
28
27
1
731@
PR113
PU100 2BST_CHGA 10K_0402_5%
100K_0402_1%
100K_0402_1%
1 2 1 1 2
6
731@
747@
PR112
PR133
ICREF
CSSP
CSSN
2
DCIN 22 26 2
DCIN ICOUT PD101 747@ PC115
1
1 PR116
2 ACSETIN 2 BAT54HT1G_SOD323-2~D 2
<24> ACOFF
2
ACIN <15,24,35,43> ACIN
5
6
7
8
PR118 49.9K_0402_1% 25 BST 1 2 1 2 PQ113A
BOOT
PQ108
47K_0402_5% ACIN
AO4466L_SO8~D
13
1
ACOK
ACIN 1 2 +5VALW 1U_0603_10V6K SSM6N7002FU-2N_SOT363-6
1
158K_0402_1%
11 VDDSMB
PR119
0.1U_0402_10V7K
731@
PR117
0_0402_5% 10 4
<24,43> EC_SMB_CK1 SCL
1
1
PC116
1 2
9 21 VDDP_LDO
2
PR120 SDA VDDP

ACOFF <24>
2
PR131 0_0402_5% 14 PR121
3
2
1
<24,43> EC_SMB_DA1 NC
PQ109
1 2 2 1 2 24 DH_CHG PL100 0.01_1206_1%

UGATE
8 VICM
10UH_PCMB063T-100MS_4A_20% BATT+
10K_0402_5% 23 LX_CHG 1 2 CHG
1 4
PHASE
4.7_1206_5%
6 FBO
2 3
1
1 2 5 EAI
6
5
6
7
8
PR124
747@ PC117 PR123 747@
PQ110
PQ112A
747@ PR122 DL_CHG

4.7K_0402_5%
AO4712L_SO8~D
2 1 1 2 4 EAO LGATE 20
200K_0402_5%
10U_0805_25V5K~D
10U_0805_25V5K~D
10U_0805_25V5K~D
10U_0805_25V5K~D
2
0_0402_5%
731@ 10_0402_5%
2 2200P_0402_50V7K 7.5K_0402_5% @
1 2
1
PR126
PC122
PC118
PC119
PC120
PR125
100_0402_1% MAX8731_REF
680P_0402_50V7K
BATT_TEMP 3 19 4
1
VREF PGND
PC121
PR127
PR128
18
2
747@ PR129 CSOP @
56P_0402_50V8~D
1
2
PC124
1 2 7 17
2
747@ PC123 CE CSON @
3
2
1
2
1 2 10K_0402_5%
VFB 15 VFB 1 PR130 2 BATT+
<24,43> ADP_I 12 GND
747@
120P_0402_50VNPO~D 100_0402_5%
0.1U_0402_10V7K
16
1
3
NC 731@ PC126
3
29
<6,24> H_PROCHOT# MAX8731_REF TP
1U_0603_10V6K
1 2
2
1
747@ PC125
PC128
0_0402_5% 0_0402_5%
PR134
ISL88731CHRTZ-T_QFN28_5X5~D 747@ PC129 0.22U_0603_25V7K

1
0.1U_0603_25V7K @ PC130
2
@ PC127 731@ @ 1 2 1 2
2
1U_0603_25V6K @
0.01U_0402_25V7K
0.01U_0402_25V7K
0.01U_0402_25V7K
2
2 1
PC131 0.1U_0603_25V7K
1
1
731@ PC132
@ PC133
731@ PC134
.1U_0402_16V7K
1
PR135
2
@
ISL88731C BQ24747 ISL88731C BQ24747 ISL88731C BQ24747 ISL88731C BQ24747
1
1
D
2 PQ111 @
<24,43> BATT_TEMP
SSM3K7002FU_SC70-3
G
S
PU100 ISL88731C BQ24747 PR122 @ 200k PC134 0.01u @ PC108 0.1u @
3
For DT Mode PR133 @ 100k PR123 @ 7.5k PC129 @ 0.1u PR106 10 0

PU100 747@ PR113 747@ PC131 747@ PC126 747@ PR127 747@
PR112 100k @ PR129 @ 10k PC126 0.22u 0.1u PR107 10 0
VIN
PR117 158k @ PC117 @ 2200p PR127 10 0 PC112 0.047u 0.1u
1.2K_1206_5%~D
BQ24747 309K/0402 0.1U/0402 0.1U/0603 0/0402

1
PR113 210k 309k PC124 @ 56p PR111 4.7 @

PR136
PR107 747@ PC112 747@

731@ for ISL88731C
V1
PC131 0.1u 220p PC123 @ 120p PC110 1u @
4
747@ for BQ24747 4
2
PC132 0.01u @ PC125 @ 1u PD101 @ BAT54HT1G

3
ACOFF <24> 0/0402 0.1U/0603

PQ112B
PQ106A
5
2
PR106 747@ Security Classification Compal Secret Data Compal Electronics, Inc.
4
@ 2012/01/17 2013/01/16 Title

<24,43> BATT_TEMP Issued Date Deciphered Date
1
PWR-Charger
1.0
0/0402
A B C D
A B C D E
2VREF_6182
1U_0603_16V6K
1
PC201
1 1
2
0.1U_0402_25V6
0.1U_0402_25V6
@ @ PC200
PC202
1 2 1 2
PR201 PR202
13.7K_0402_1% 30.9K_0402_1%
1 2 1 2
B+ B++ PR203 PR204

20K_0402_1% 20K_0402_1% B++
PL202 1 2 FB_3V FB_5V 1 2
1UH_PCMB061H-1R0MS_7A_20%
1 2
+3VLP
ENTRIP2
ENTRIP1
PR205 PR206
2200P_0402_50V7K
0.1U_0402_25V6
0.1U_0402_25V6
4.7U_0805_25V6-K
110K_0402_1% 110K_0402_1%
1
1
2200P_0402_50V7K
4.7U_0805_25V6-K
1 2 1 2
1
1
PC203
PC207
PC208
PC204
PC205
PC209
PQ202
2
2
6
1
AON7408L_DFN8-5 PU200
2
5
ENTRIP2
FB2
TONSEL
FB1
ENTRIP1
REF
1
PC206 PQ203
4 10U_0805_6.3V6M 25 AON7408L_DFN8-5
P PAD
2
7 VO2 VO1 24 4
2 2
1
2
3
PC210 8 23 PC211
VREG3 PGOOD
PR208POK <43>
0.22U_0603_10V7K 0.22U_0603_10V7K
2 1 BST1_3V 1 PR207 2 BST_3V 9 22 BST_5V 1 2 BST1_5V 2 1
3
2
1
BOOT2 BOOT1
2.2_0603_5% 2.2_0603_5%
PL200 UG_3V 10 21 UG_5V PL201
3.3UH_PCMC063T-3R3MS_6A_20% UGATE2 UGATE1 3.3UH_PCMC063T-3R3MS_6A_20%
LX_3V LX_5V
+3VALWP 1 2 11
PHASE2 PHASE1
20 1 2
+5VALWP
1
1
4.7_1206_5%
4.7_1206_5%
LG_3V 12 19 LG_5V
LGATE2 LGATE1
PR209
PR210
@
SKIPSEL
@ PD200 @ PR200 @
VREG5
1
499K_0402_1% 1
GND
B++
VIN
+
NC
PC212
EN
1 2 1 2
2
2
330U_6.3V_M 4 4 + PC213
BZV55-B5V1_SOD80C2 PR211 330U_6.3V_M
SNUB_3V
SNUB_5V
13
14
15
16
17
18
2 @ 0_0402_5%
RT8205LZQW(2) WQFN 24P PWM 2
1 2
<24> VCOUT0_PH
680P_0603_50V7K
1
2
3
3
2
1
680P_0603_50V7K
PQ204 PQ205
AON7702A_DFN8-5 VL AON7702A_DFN8-5
1
PC214
PC215
3.3VALWP @
2
TDC 5.4A
2
1
1
200K_0402_1%
1U_0603_10V6K
@
Peak Current 7.7A
1
PC217
PC216
PR212 4.7U_0805_10V6K
OCP current 9.2A
2
ENTRIP2
1
6 ENTRIP1
TYP MAX 2 @ B++

H/S Rds(on) :27mohm , 34mohm PC218
2
3 0.1U_0402_25V6 3
3
L/S Rds(on) :11mohm , 14mohm 2VREF_6182

PQ200A PQ200B
2 N_3_5V_001 5
SSM6N7002FU-2N_SOT363-6 SSM6N7002FU-2N_SOT363-6
1
5VALWP
PR213 2.2K_0402_5% TDC 5.6A
1 2 1 2
<28> EC_ON_35V VL PJP202 PJP203 Peak Current 8A
PR215 0_0402_5% PR214 1 2 1 2 +3VALW
+5VALWP +5VALW +3VALWP OCP current 9.6A
1
1 2 100K_0402_5%
<24> VCOUT0_PH
PQ201
PAD-OPEN 4x4m PAD-OPEN 4x4m TYP MAX
PJP204 PJP200
3/5V_EN-2 2
DTC115EUA_SC70-3 H/S Rds(on) :27mohm , 34mohm
1 2 1 2 1 2
VS L/S Rds(on) :11mohm , 14mohm
40.2K_0402_1%
PR216
1
150K_0402_1%
PAD-OPEN 4x4m PAD-OPEN 4x4m
PR217
@930
4.7U_0603_10V6K
3
1
PC219
2
@930
2
4 4

PWR-3VALWP/5VALWP
Size
Document Number Rev
1.0
LA-8241P
A B C D E
A B C D
1 1
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR401/PR404)=0.6*(1+20K/10K)=1.8V
PU400 PL400
4
PJP400 @ 1UH_NRS4018T1R0NDGJ_3.2A_30%
+3VALW 1 2 1.8VSP_VIN 10 2 1.8VSP_LX 1 2
PG
PVIN LX
+1.8VSP
22P_0402_50V8J
9 PVIN LX 3
PC402
PAD-OPEN 3x3m
4.7_1206_5%
+1.8VSP
1
PC403 8 SVIN
TDC 2.6A
PR404
22U_0805_6.3VAM PR403
6 1.8VSP_FB 20K_0402_1%
2
FB
Peak Current 3.8A
22U_0805_6.3V6M
22U_0805_6.3V6M
5
1SNUB_1.8VSP 2
2
EN
1
NC
NC
TP
OCP current 4.5A
PC400
PC404
11
2
1 2 EN_1.8VSP
<10,24,27,28,47,48> SUSP#
1
1
PR402 100K_0402_5%
0.22U_0402_16V7K
PC405
SY8033BDBC_DFN10_3X3 PR400
1
@ PR401 10K_0402_1%
680P_0603_50V7K
PC401
47K_0402_5%
2
2
2
2 2
PJP401 @
1 2
+1.8VSP +1.8VS
PAD-OPEN 3x3m
3 3
4 4

PWR-1.8VSP
1.0
A B C D
5 4 3 2 1
@ PJP500
+V1.05S_VCCPP_B+ 2 2 1 1 B+
JUMP_43X118
+3VS
SIR472DP-T1-GE3_POWERPAK8-5~D
2200P_0402_50V7K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
0.1U_0402_25V6
1
1
PC501
PC502
PC503
PC504
2
D D
2
5
PR501
PQ500
100K_0402_5%
1
<49> +V1.05S_VCCP_PWRGOOD 4
PC505
PU500 .1U_0603_25V7K
PR500
1 10 BST_+V1.05S_VCCPP 1 2 2 1
3
2
1
PGOOD VBST
PR502 2.2_0603_5%
1 2 TRIP_+V1.05S_VCCPP 2 TRIP DRVH 9 UG_+V1.05S_VCCPP PL500
47.5K_0402_1% 1UH_PCMC063T-1R0MN_11A_20%
PR503 EN_+V1.05S_VCCPP 3 8 SW _+V1.05S_VCCPP 1 2
EN SW
+VCCP
150K_0402_5%
1 2 FB_+V1.05S_VCCPP 4 7 +V1.05S_VCCPP_5V
<10,24,27,28,46,48> SUSP# VFB V5IN
+5VALW
RF_+V1.05S_VCCPP 5 6 LG_+V1.05S_VCCPP
TST DRVL
1
1
1 2 PC500
1U_0603_10V6K
PQ501
PC506 11
0.22U_0402_16V7K TP PR505
2
TPS51212DSCR_SON10_3X3 @ 4.7_1206_5% @
0.1U_0402_10V7K
2
2
PR504 4
PC507
470K_0402_1%
1
PC508
2
1
@ 1000P_0402_50V7K
3
2
1
2
C C
2 1 2 1
+VCCP
PC509 PR506
PR507 @ 1000P_0402_50V7K @ 1.2K_0402_1%
PR508
4.99K_0402_1% 0_0402_5%
2 1 2 1 VCCIO_SENSE <9>
2
PR509
10K_0402_1%
1
@ PJP501
B B
1 2
+VCCP +1.05VS
PAD-OPEN 4x4m
+V1.05S_VCCP
TDC 11A
Peak Current 16A
OCP current 19A
TYP MAX
H/S Rds(on) 10mohm , 14.5mohm
L/S Rds(on) :3mohm , 3.6mohm
A A

PWR-V1.05S_VCCPP
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
PJP301 0.75Volt +/- 5%

VLDOIN_1.5V 2 1 +1.5V TDC 0.7A
Peak Current 1A
B+ @ PJP302 PAD-OPEN1x1m
2 2 1 1
1.5V_B+ 1
PR301
2 BOOT_1.5V OCP Current 1.2A
2.2_0603_5%
JUMP_43X118
DH_1.5V
2200P_0402_50V7K
0.1U_0402_25V6
D D
4.7U_0805_25V6-K
4.7U_0805_25V6-K
+0.75VSP
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
PC304 SW _1.5V
PC301
PC302
PC303
PC305
0.22U_0603_10V7K
1
2
1
DL_1.5V
PC306
PC307
16
17
18
19
20
PQ300
PU300
VLDOIN
PHASE
UGATE
BOOT
VTT
2
PAD 21
4 15 LGATE VTTGND 1
PR302 14 2
PL300 7.15K_0402_1% PGND VTTSNS
1
2
3
0.68UH_PCMC063T-R68MN_15.5A_20% 1 2 CS_1.5V
1 2 13 3
+1.5V @ CS RT8207MZQW _W QFN20_3X3 GND
5
@
4.7_1206_5%
PQ302
PQ301
PR304 1 2 PC309 12 4 VTTREF_1.5V
VDDP VTTREF
5.1_0603_5% 1U_0603_10V6K
PR303
1
+ PC308 +5VALW 1 2 VDD_1.5V 11 5
+1.5V PC310
1 SNUB_1.5V 2
VDD VDDQ
PGOOD
330U_2.5V_M 4 4 0.033U_0402_16V7~D
TON
2 PC311
FB
S5
S3
1U_0603_10V6K
2
PC314 220P_0402_50V8J~D
680P_0603_50V7K
1
2
3
1
2
3
10
6
C C
@ +5VALW 1 2
PR305
PC312
10K_0402_1%
2
1.5V_FB 2 1
PR300
1M_0402_1%
2
PR306 1.5V_B+ 1 2
1
200K_0402_5% PR307
1 2 S5_1.5V 10K_0402_1% PC313
<24,27,28> SYSON @ .1U_0402_16V7K
2
1
PC300 PR308
1
0_0402_5%
1U_0402_6.3VX5R 1 2 S3_1.5V
2
<10,24,27,28,46,47> SUSP#
1.5VP
TDC 14A +1.5V
Peak Current 20A
OCP current 24A
TYP MAX
B H/S Rds(on) :10mohm , 14.5mohm B
L/S Rds(on) :3mohm , 3.6mohm @

PJP300
+0.75VSP 1 2 +0.75VS
PAD-OPEN 3x3m
A A

PWR-1.5V/0.75VSP
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
D
VID [0] VID[1] VCCSA Vout D
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
output voltage adjustable network
2
PC600
680P_0402_50V7K
1
+VCC_SAP
SNUB_+1.5VP
TDC 4.2A
Peak Current 6A
OCP current 7.2A
2
PR600
4.7_1206_5%
PL601
PU600 PL600
1
C HCB1608KF-121T30_0603 SY8037BDCC_DFN12_3X3 0.47UH_FDVE0630-H-R47M=P3_17.7A_20% C
+3VALW 1 2 +VCCSA_PWR_SRC 12
PVIN LX
1 +VCCSA_PHASE 1 2 +VCCSAP
11 2
10U_0805_6.3V6M
10U_0805_6.3V6M
22U_0805_6.3VAM
PVIN LX SA_PGOOD <24>
2
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
1
1
2200P_0402_50V7K
0.1U_0603_25V7K
PC610 PR605
PC605
PC611
PC612 10 3
SVIN LX
2
68P_0402_50V8J 100K_0402_5%
PC603
PC604
PC606
PC607
PC609
+VCCSAP_FB 2 1 9 4 2 1
+3VS
2
1 FB PG
1
8 5 +VCCSA_EN 1 2
VOUT EN
GND
0.1U_0402_10V7K
7 6 0_0402_5%
VID1 VID0
1
PR601
<47> +V1.05S_VCCP_PWRGOOD
2
PR606
@ PC601
1K_0402_5%
1K_0402_5%
13
100_0402_5%
PR603
PR604
2
2 1
1
1
PR602
0_0402_5%
2 1 VCCSA_SENSE <10>
VCCSA_VID0 <10>
VCCSA_VID1 <10>
B The 1k PD on the VCCSA VIDs are empty. B

These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
@
PJP601
+VCCSAP 1 2 +VCCSA
PAD-OPEN 4x4m
A A

PWR-VCC_SAP
1.0
5 4 3 2 1
5 4 3 2 1
PR700 PC700
10_0402_1% 0.033U_0603_16V7 PC701
1200P_0402_50V7K
1 2 FBA3 1 2 1 2
680P_0402_50V7K
D PUT COLSE D
75K_0402_1%
.1U_0402_16V7K
TO GT
1
PR702 PR703 1 PR701 2
PC702
PC703
PR704
TRBSTA# 1 2 FBA1 1 2 PH700 Inductor
0.033U_0603_16V7
24.9K_0402_1% PR705 PC705
1
1
8.06K_0402_1% 806_0402_1% 10P_0402_50V8J 220K_0402_5%_ERTJ0EV224J CSCOMPA 1 2 DROOPA 1 2 CSREFA
PC704
2
PR707 PC706 PC707 2 1 NTC_PH203 1K_0402_1% 1000P_0402_50V7K
2
1 2 FBA2 1 2 1 2 <BOM Structure>
10_0402_1% PR706
560P_0402_50V7K PR709 PC708
1 PR708 2 1 2 COMPA1 1 2 165K_0402_1%
1K_0402_1% 5.11K_0402_1% 1500P_0402_50V7K CSREFA

PR711 PC709 TSENSEA
2
1 2 SWN1A 0.047U_0402_16V7K
69.8K_0603_1% PR712 6.98K_0402_1%
1
CSP1A 1 2 SWN1A <51>
2
15.8K_0402_1%
PR753
CSCOMPA
1 2 PC710
<10> VCC_AXG_SENSE
2
8.25K_0402_1%
1PR713
0_0402_5% 1000P_0402_50V7K
1
PC711 PH701
PR714
PR765 1000P_0402_50V7K
CSREFA <51>
1
1 2 100K_0402_1%_TSM0B104F4251RZ
<10> VSS_AXG_SENSE
0_0402_5% PC713
1
+3VS
CSP2A
CSP1A
1 2
TRBSTA#
DROOPA
CSSUMA
TSENSEA
COMPA
IMONA
FBA
+5VS .1U_0402_16V7K
DIFFA
ILIMA
1
PR716 @ PC753
10K_0402_1% 1 2 6132_VDDBP PR717
1 2 PUT COLSE
2.2U_0603_10V7K 28K_0402_1%
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
TO V_GT
2
+5VS 1 PR718 2 PU700

C +VCCP VR_RDYA C
2_0603_5% HOT SPOT
VSNA
VSPA
DIFFA
FBA
COMPA
IOUTA
ILIMA
DROOPA
CSCOMPA
CSSUMA
CSREFA
CSP2A
CSP1A
TSNSA
PAD
TRBSTA#
6132_PWMA <51>
PC714
1 2 6132_VCC
.1U_0402_16V7K
.1U_0402_16V7K
1 VCC PWMA 45
2.2U_0603_10V7K 6132_VDDBP 2 44
VDDBP BSTA +5VS
130_0402_1%
54.9_0402_1%
PR720 VR_RDYA 3 43
VRDYA HGA
1
PR721 2
1 2VR_ON_CPU 4 42
<24> VR_ON EN SWA
PR722
PC716 PC717 0_0402_5% VR_SVID_DAT1 5 41 PC718

VR_SVID_ALRT# 6 SDIO LGA BST2 PR723 2 BST2_1 2
40 1 1
2
PR726 PR724 VR_SVID_CLK ALERT# BST2 2.2_0603_5%

7 39 HG2 <51>
0_0402_5% 95.3K_0402_1% SCLK HG2
1 2 VBOOT 8 38 0.22U_0603_10V7K
SW2 <51> Option for
1
VBOOT NCP6132BMNR2G_QFN60_7X7 SW2

<9> VR_SVID_DAT 1 PR725 2VR_SVID_DAT1 1 2 10K_0402_1% ROSC_CPU 9 37 LG2 <51> 1 phase GFX
VRMP ROSC LG2 6132P_VCCP PC719
<9> VR_SVID_ALRT# CPU_B+ 1 2 10 36 2 1 2.2U_0603_10V7K
VR_HOT# VRMP PVCC
<9> VR_SVID_CLK 11 35
VRHOT# PGND
0.01U_0402_25V7K
PR727 1K_0402_1% VGATE 12 34 1 PR728 2

VRDY LG1 LG1 <51> +5VS
1
PC720
13 33 0_0402_5% CSP2A
+VCCP VSN SW1 SW1 <51>
14 32 HG1 <51>
+3VS DIFF_CPU 15
VSP HG1
31 BST1 1 PR730 2 BST1_1 2 1
CSCOMP
2
DIFF BST1
TRBST#
2.2_0603_5%
DROOP
CSSUM
DRVEN
CSREF
1
COMP
TSNS
PC721
CSP3
CSP2
CSP1
PWM
IOUT
ILIM
1
PR731 0.22U_0603_10V7K
FB
75_0402_1% PR732 +5VS
10K_0402_5%
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
2
1 PR733 2
<24> VR_HOT#
2
COMP_CPU
FB_CPU 43.2K_0402_1% Option for
TRBST#
<6,15> VGATE
PR735 PR740 2 phase CPU
DROOP
TSENSE
ILIM_CPU
1 2 VSN CSP2 1 2
<9> VSSSENSE SWN2 <51>
1
0_0402_5% 6.98K_0402_1%
0.047U_0402_16V7K
PC722
DRVEN <51>
13.3K_0402_1%
PR737 1000P_0402_50V7K CSP3
2
2
1 2 VSP PC723
<9> VCCSENSE
2
1
PR738 12.7K_0402_1%
PC726
PR766
0_0402_5% 1 2
.1U_0402_16V7K
B B
2
PC725 CSP1 TSENSE
1
1 PR739 2 2 1 CSP2
1
1K_0402_1% CSP3
10P_0402_50V8J CSREF
PR744
PR741 PC727 PR742 PC728 CSP1 1 2 SWN1 <51>
1 2FB_CPU1 1 2 2 1COMP_CPU1 2 1 6.98K_0402_1%
0.047U_0402_16V7K
PR743 PC729 49.9_0402_1% 6.34K_0402_1%
13.3K_0402_1%
8.25K_0402_1%
1 2FB_CPU3 1 2 560P_0402_50V7K 1800P_0402_50V7K
PR745 1
2
10_0402_1%
CSREF <51>
CSCOMP
1
PC731
PR767
0.033U_0603_16V7 PH702
PR746 PR747 PC730
TRBST# 1 2 FB_CPU2 1 2 1000P_0402_50V7K 100K_0402_1%_TSM0B104F4251RZ
1
2
0.033U_0603_16V7
1
1
8.06K_0402_1% 806_0402_1%
PC732
CSSUM CSREF
2
PC733
2
1 2
@ PR736 1500P_0402_50V7K 1 PR748 2 SWN1
24.9K_0402_1%
0_0402_5% 130K_0603_1% PUT COLSE

2
.1U_0402_16V7K
TO VCORE
PC734
1 2 PC735 1 PR750 2 SWN2

1
560P_0402_50V7K
PR749
130K_0603_1% HOT SPOT

1
1 PR751 2NTC_PH201 1 PR752 2

1
75K_0402_1%
PR754 PC736 165K_0402_1%
CSCOMP 1 2 DROOP 1 2 CSREF PH703
PUT COLSE
1K_0402_1% 1000P_0402_50V7K 2 1
<24> IMVP_IMON TO VCORE
Phase 1 220K_0402_5%_ERTJ0EV224J
A Inductor A

CPU Core
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
VCC_core
TDC 32A
Peak Current 53A
OCP current 65
Load line -1.9mV/A
FSW=300kHz
DCR 1.1mohm +/-5%
B+
D
@ PJP700 TYP MAX D
2
2 1
1 CPU_B+ H/S Rds(on) :10mohm , 14.5mohm
JUMP_43X118 1 1 L/S Rds(on) :3mohm , 3.6mohm
100U_25V_M~D
100U_25V_M~D
+ +
PC712
PC724
2 2
CPU_B+ CPU_B+
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC739
PC740
PC741
PC742
PC743
PC744
1
1
5
5
PQ701
2
2
PQ700
<50> HG2 4
4
<50> HG1 +VCC_CORE
+VCC_CORE
PL702
3
2
1
PL701 0.36UH_FDU1040J-H-R36M=P3_33A_20%
3
2
1
0.36UH_FDU1040J-H-R36M=P3_33A_20%
C
<50> SW2 4 1 C
<50> SW1 4 1
1
3 2
1
5
3 2
5
PR756 @
PQ703
PQ708
PR755 @ 4.7_1206_5%
PQ702
PQ707
4.7_1206_5% PR758
2
@ 10_0402_1%
2
@ PR757 4 4 V2N_CPU 2 1 CSREF

<50> LG2
SNUB_CPU2
4 4 V1N_CPU 2 1
<50> LG1 CSREF <50>
1SNUB_CPU1
10_0402_1%
SWN2 <50>
3
2
1
3
2
1
SWN1 <50>
3
2
1
3
2
1
QC-SV 35W CPU PC745 @
1
VID1=1.05V PC746 @
680P_0402_50V7K
IccMax=53A
2
680P_0402_50V7K
2
Icc_Dyn=43A
Icc_TDC=32A
R_LL=1.9m ohm
OCP~65A
+VCC_GFXCORE_AXG
B+ TDC 21.5A
@ PJP701
2
2 1
1 Peak Current 33A
OCP current 40A
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
JUMP_43X118
PC747
PC748
PC749
B B
Load line -3.9mV/A
1
PR759
FSW=300kHz
2
DCR 1.1mohm +/-5%
5
GFX_BST 1 2 GFX_BST_1 PQ704

TYP MAX
2
2.2_0603_5%
PC750
0.22U_0603_10V7K
H/S Rds(on) :10mohm , 14.5mohm
1
GFX_HG 4 L/S Rds(on) :3mohm , 3.6mohm

PU701
1 9
BST FLAG PL704 +VCC_GFXCORE_AXG
3
2
1
2 8 0.36UH_FDU1040J-H-R36M=P3_33A_20%
<50> 6132_PWMA PWM DRVH
PR760
DRVEN 2 1EN_GFX 3 7 GFX_SW 4 1
<50> DRVEN EN SW
2K_0402_1%
1
4 6 @ 4.7_1206_5% 3 2
VCC GND
5
PR762
1VCC_GFX
PQ705
PQ706
+5VS 2
DRVL
5
PR761
0_0402_5% NCP5911MNTBG_DFN8_2X2
2
1
GFX_LG 4 4
PC751
1 SNUB_GFX1
2.2U_0603_10V7K
2
2 PR764 1
CSREFA <50>
3
2
1
3
2
1
@ 680P_0402_50V7K
10_0402_1%
PC752
SWN1A <50>
2
A A

PWR-VCC_SAP
1.0
5 4 3 2 1
5 4 3 2 1
<38> VCCSENSE_VGA @ PJP800

VGA_CORE_B+ 2 2 1 1 B+
VGA@
JUMP_43X118
PC828 VGA@
10P_0402_50V8J
PC801 VGA@
PC802 VGA@
PC803 VGA@
PC804 VGA@
0_0402_5%
PR830
VGA@ PC829
2200P_0402_50V7K
0.1U_0402_25V6
4.7U_0805_25V6-K
4.7U_0805_25V6-K
2
1
10P_0402_50V8J
2
VGA@ PR835 2 1
2
5
0_0402_5%
VGA@ PQ800
<38> VSSSENSE_VGA 1 2
D D
2
VGA@
4700P_0402_25V7K
2 1 2 1 4
PR807
PR814 VGA@ PR815 VGA@ 43K_0402_1%
2
PR813 VGA@
2.49K_0402_1% 76.8K_0402_1%
5.11K_0402_1%
2
PC814
1
3
2
1
19 1
VGA@ VGA@ VGA@ PL800
PQ803 0.36UH_FDU1040J-H-R36M=P3_33A_20%
21
20
18
17
16
2
2N7002KW _SOT323-3 PU801 1U_0603_10V6K 1 2 +VGA_CORE
1
PC807 VGA@
PR811 VGA@
5.11K_0402_1%
PAD
VSNS
SLEW
TRIP
GND
MODE
S
3 1
1
2
PC800 VGA@
PC809 VGA@
PC810 VGA@
PC811 VGA@
PC812 VGA@
1 15 VGA_CORE_5V
470U_D2_2VM_R4.5M
470U_D2_2VM_R4.5M
GSNS V5IN +5VALW 1 1
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
G
2
+ +
VGA@ PQ801
VGA@ PQ802
1
2 14 LG_VGA_CORE PR808 @
1
V3 DRVL 4.7_1206_5%
2 3 2 3
PR810 VGA@
5.11K_0402_1%
2
2
4 4
3 13 UG_VGA_CORE
V2 DRVH
1
TPS51518RUKR_QFN20_3X3 PC813 @
4 12 SW _VGA_CORE 1000P_0603_50V7K
1
3
2
1
3
2
1
2
V1 SW
5 V0 BST 11 BST_VGA_CORE 2 1 1 2
1
PGOOD
PR833 VGA@
PR802 VGA@ PC805 VGA@

105K_0402_1%
VREF
2.2_0603_5% 0.1U_0603_25V7K
VID0
VID1
EN
C C
PR834 VGA@
2
10
2.49K_0402_1%
1 2
PQ804
SI2301CDS-T1-GE3_SOT23-3 0_0402_5%~D
0_0402_5%~D
2 +VGA_CORE
2
PR838
PR839
1
S
3
D
VGA@
TDC 22A
@ @ Peak Current 30A
0.1U_0402_10V7K
G
2
1
VGA@ PC830
OCP current 36A

1
PR803 VGA@
FSW=350kHz
2
10K_0402_1%
<35> GPU_VID2 1 2 DCR 1.1mohm +/-5%
+3VS
TYP MAX
H/S Rds(on) :10mohm , 14.5mohm
PR801 VGA@
10K_0402_1%
<17,36> VGA_PW RGD L/S Rds(on) :3mohm , 3.6mohm +VGA_PCIE

1
VGA@ TDC 3.6A

VGA@ PR800 Peak Current 5.2A
PR804 0_0402_5%
OCP current 6A
2
2.2K_0402_5% 1 2
1 2 VGA@
<24,36,53> PX_MODE @ VGA@ PL801
PJP805 +VGA_PCIEP
4
+3VALW PU800 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
B 1 2 EN_VGA_CORE 2 1 PCIE_B+ 10 2 LX_PCIE 1 2 B
PG
2 1 PVIN LX
PC806 9 3
JUMP_43X79 PVIN LX
1
VGA@
4.7_1206_5%
1
.1U_0402_16V7K PC819 8 SVIN
VGA@ PR829
VGA@ 22U_0805_6.3VAM
2
FB_PCIE
1K_0402_5%
1K_0402_5%
Chelsea Pro 6
2
FB
VGA@ PR836
VGA@ PR837
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
22U_0805_6.3VAM
5
2
EN
1
SS
TP
LX
VGA@ PC821
VGA@ PC820
VGA@ PC824
VGA@ PC818
VGA@ PR826 SY8036LDBC_DFN10_3x3
<16,36> PXS_PWREN
GPU_VID1 GPU_VID0 GPU_VID2 Core Voltage Level
1
11
2
1 2EN_PCIE
SNUB_PCIE
<35>
<35>
PC822
VGA@
GPU_VID1
GPU_VID0
0.1U_0402_10V7K
1
1
0 0 0 0.95V 200K_0402_5% PR825 VGA@
0.1U_0402_10V7K
PC823
@ PR828 1 5.9K_0402_1%
VGA@
0 0 1 0.925V 47K_0402_5% 2 1
2
1
0 1 0 0.9V
680P_0603_50V7K
VGA@ PC826
PC825
VGA@
2
1
0 1 1 0.875V 2 1
Thames XT Chelsea Pro
VGA@ PR827
+VGA_PCIEP
22P_0402_50V8J
1 0 0 0.85V 10K_0402_1%
2
VGA_PCIE 1.0V 0.95V
1 0 1 0.825V
@
PJP804
A 1 1 0 0.8V 2 1 PR825 6.81K 5.9K A
+VGA_PCIEP 2 1 +1.0VGS
JUMP_43X79
1 1 1 0.775V

VGA_COREP
1.0
5 4 3 2 1
A B C D
1
+VDDCI 1
TDC 2.8A
Peak Current 4A
OCP current 6A
PL1000 VGA@
PJ1000
4
@ PU1000 VGA@ 0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 1 2 10 2 LX_VDDCIP 1 2
+3VALW
PG
2 PVIN LX +VDDCIP
PR1001 VGA@
JUMP_43X79
22P_0402_50V8J
9 PVIN LX 3
2
4.7_1206_5%
22U_0805_6.3V6M
1
1
VGA@ PC1000
PC1001 VGA@ PR1006 VGA@
22U_0805_6.3V6M
8 SVIN
1
22U_0805_6.3V6M 10_0402_5%
FB_VDDCIP
VGA@ PC1003
VGA@ PC1005
6
2
EN_VDDCIP FB
5
2
EN
SS
TP
LX
SY8036LDBC_DFN10_3x3 1 2
FB=0.6Volt
11
1
1 2 VGA@ PR1003
<24,36,52> PX_MODE
1
PR1002 10K_0402_5% 4.99K_0402_1%
680P_0603_50V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
2
VGA@ PC827
PC1004
VGA@ PC1002
VGA@ VGA@
PR1004
1
PR1005
2
1M_0402_5% 2 1 VDDCI_SEN <38>
@
2
1
0_0402_5%
+3VGS
VGA@
1
2
VGA@ 2
1
PR1007
1
29.4K_0402_1% PR1008 VGA@
VGA@ 10K_0402_5%
2
PR1000
10K_0402_1% PR1009 VGA@
2
1
D 10K_0402_5%
2
2 2 1
G VDDCI_VID <35>
1
S
1
PQ1000 VGA@
2N7002W -T/R7_SOT323-3 @ PC1006 PR1010 @
4700P_0402_25V7K 100K_0402_5%
2
VDDCI_VID
High 1V
Low 0.9V
3
@ 3
PJ1001
+VDDCIP 1 2 +VDDCI
PAD-OPEN 4x4m
4 4

+VDDCIP
1.0
A B C D
5 4 3 2 1
+VCC_CORE Below is 458544_CRV_PDDG_0.5 Table 5-8.

+VCC_CORE +VCC_GFXCORE_AXG
1 1 1 1 1
5 x 22 F (0805)
PC1201 PC1202 PC1203 PC1204 PC1205
Socket Bottom 5 x (0805) no-stuff
2
10U_0805_6.3VAM
2
10U_0805_6.3VAM
2
10U_0805_6.3VAM
2
10U_0805_6.3VAM
2
10U_0805_6.3VAM +VCC_GFXCORE_AXG sites
D
7 x 22 F (0805) D
Socket Top 2 x (0805) no-stuff
sites
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1 1 1 1 1 1 1 1 1 1
PC1211
PC1212
PC1213
PC1214
PC1215
PC1216
PC1217
PC1218
PC1206 PC1207 PC1208 PC1209 PC1210
10U_0805_6.3VAM 10U_0805_6.3VAM 10U_0805_6.3VAM 10U_0805_6.3VAM 10U_0805_6.3VAM
2 2 2 2 2 2 2 2 2 2 2 2 2
+VCCP
+VCC_CORE +VCCP
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1 1 1 1 1 1 1 1
1 1 1 1 1
PC1224
PC1225
PC1226
PC1227
PC1228
PC1229
PC1230
PC1231
PC1232
PC1233
PC1219 PC1220 PC1221 PC1222 PC1223
2 2 2 2 2 2 2 2 2 2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 1 1 1 1
2 2 2 2 2
PC1234
PC1235
PC1236
PC1237
2 2 2 2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1 1 1
1 1 1 1 1
PC1243
PC1244
PC1245
PC1238 PC1239 PC1240 PC1241 PC1242
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 2 2 2
2 2 2 2 2
1 1
PC1246
+ + PC1247
C 330U_D2_2V_Y 330U_D2_2V_Y C
2 2
330U_D2_2VM_R9M
330U_D2_2VM_R9M
330U_D2_2VM_R9M
1 1 1
1 1 1 1 1
PC1200
PC1254
PC1255
+ + +
PC1249 PC1250 PC1251 PC1252 PC1253
22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
2 2 2 2 2 2 2 2
1
PC1256
22U_0805_6.3V6M
2
+VCC_CORE
1 1 1 1
+ PC1257 + PC1258 + PC1259 + PC1260
330U_D2_2V_Y 330U_D2_2V_Y
330U_D2_2VM_R9M 330U_D2_2VM_R9M
B 2 3 2 2 3 2 B
1 1
+ PC1261 @ + PC1262 @
330U_D2_2V_Y 330U_D2_2V_Y
2 2
A A

PROCESSOR DECOUPLING
1.0
LA-8241P
5 4 3 2 1
5 4 3 2 1
Power block
CPU OTP
Page 43
D Turn Off D
Input B+
DC IN +3VALWP: TDC:5.4A
Switch Page 44 +5VALWP: TDC:5.6A Always
RT8205LZQW(2) WQFN Page 45
CHARGER
CC:0A~3.52A +1.8VSP: TDC:2.6A SUSP#
CV:13.3V(6cell) SY8033BDBC
ISL88731CHRTZ-T Page 46
Page 44
C C
+VCCP: TDC:11A SUSP#
Battery TPS51212DSCR Page 47
+1.5V/+0.75VSP: TDC:14A/0.7A SYSON

RT8207MZQW
Page 48
+VCCSAP: TDC:4.2A +V1.05S_VCCP_PWRGOOD

SY8037DCC
Page 49
+VGA_CORE
PX_MODE
TDC:23.4A
B TPS51518RUKR B
Page 52
+VGA_PCIEP: TDC:3.5A PXS_PWREN
SY8036LDBC Page 52
+VCC_CORE
VR_ON +VDDCIP: TDC:2.8A PX_MODE
TDC: 32A
NCP6132BMNR2G SY8036LDBC Page 53
Page 50/51
+VCC_GFXCORE_AXG
VR_ON
A TDC: 21.5A A
NCP6132BMNR2G
Page 50/51

PROCESSOR DECOUPLING
Size
Document Number Rev
0.2
LA-8241P
5 4 3 2 1
5 4 3 2 1
Version Change List ( P. I. R. List ) Page 1

Request
Item Page# Title Date Owner Issue Description Solution Description Rev.
1 44 Charger. 11/12/08 Frank Change PR113 for temperature and voltage test. Change PR113 from 316k to 309k for Charger IC BQ24747RHDR. X00
Remove PR132.
D D
2 45 3.3VALWP/5VALWP 11/12/08 Frank Design change. Change PC219 from 1uF to 4.7uF. X00
3 53 +VDDCIP 11/12/08 Frank Fine tune time sequence. Change PR1002 from 100k to 0ohm. X00
Remove PR1005 and PC1004.
C C
B B
A A

PWR-PIR
Size
Document Number Rev
1.0
LA-8241P
5 4 3 2 1
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A B C D E

MODEL NAME : QCL00_QCL20

4619GP31L01 Vostro DIS

Dell / Compal Confidential

Ivy Bridge(rPGA) + Panther Point(mainstream)

@ : Nopop Component Rev: 1.0 SE@ : Seymour M2

UMA@ : Only for UMA

Compal Confidential CPU XDP

AMD PEG 3.0 x16

LVDS Conn. Port 2

Mini Card-1 Express Card Ethernet Port 4 Mini Card-1 (WLAN)

Half RTL8111F (10/100/1000) Daughter board

34mm Slot RJ45 Daughter board 3

SPI Digital Mic.

PS/2 only for Vostro 3560

Int.KBD Touch Pad Dashboard SPI ROM

Security Classification Compal Secret Data Compal Electronics, Inc.

8 pin-Hot Bar LS-8241P (Ins) LED/B

Lid (Inspiron) 80 pin

Security Classification Compal Secret Data Compal Electronics, Inc.

Board ID Table for AD channel

SATA2 ODD Lane 3 Express Card

PEG_ICOMPI and RCOMPO signals should be shorted and routed

PCI EXPRESS* - GRAPHICS

Security Classification Compal Secret Data Compal Electronics, Inc.

<15,24> PCH_PWROK +3V_PCH

The resistor SAMTE_BSH-030-01-L-D-A

RC41 XDP_PREQ# 51_0402_5% 1 @ 2 RC47

XDP_TRST#_R 51_0402_5% 1 2 RC54

AP29 XDP_PRDY# RC1211 @ 2 0_0402_5% XDP_PRDY#_R

@ AR27 XDP_TMS RC1241 @ 2 0_0402_1% XDP_TMS_R

RC49 2 H_PM_SYNC_R TMS XDP_TRST# RC1251 @ XDP_TRST#_R

Security Classification Compal Secret Data Compal Electronics, Inc.

DDR_A_D31 M7 AG2 DDR_B_D29 N5 AE4 M_ODT2

DDR SYSTEM MEMORY B

<6> H_DRAMRST# H_DRAMRST# 3 1 DDR3_DRAMRST#_R 1 2 DDR3_DRAMRST# <11,12>

RC77 1 @ 2 DRAMRST_CNTRL_PCH <14>

CFG Straps for Processor

@ <6> CFG15 CFG15 AM27 H16 @ T12 PAD~D CFG4

VSS_AXG_VAL_SENSE VAXG_VAL_SENSE RSVD42 @ T16 PAD~D

PAD~D T19 @ AJ26 Display Port Presence Strap

@ @ PAD~D T25 @ F25

PAD~D T30 @ RSVD11 RSVD51 @ T31 PAD~D CFG6

PAD~D T44 @ J20

VSS_VAL_SENSE PEG DEFER TRAINING

0: PEG Wait for BIOS for training

INTEL 12/28 recommand

PEG AND DDR

Security Classification Compal Secret Data Compal Electronics, Inc.

VAXG24 VSS52 VSS132

VAXG49 + CC48 VSS77 VSS157

1 C22 VCCSA_VID0 <49>

add CC181 , CC182, 4 caps are all pop.

Security Classification Compal Secret Data Compal Electronics, Inc.

M_CLK_DDR#0 103 104 M_CLK_DDR#1

@ 1 DDR_A_MA10 107 108 DDR_A_BS1

167 168 @ RD8 1 2 0_0402_5%

173 174 DDR_A_D54 QD1

1 2 201 202 PCH_SMBCLK QD2

M3 Circuit (Processor Generated SO-DIMM VREF_DQ)

@ 125 126 +VREF_CB

+ 133 134 RD18