5 4 3 2 1

Compal Confidential
Model Name : AMD Kabini

D D

Graphic 204pin DDRIII-SO-DIMM

Memory BUS(DDR3) Single Channel page11
VRAM X 4PCS PEGX4 BANK 0, 1, 2
ATI SUN LE
DDR3 1G BGA 631-balls AMD 1.5V DDRIII 1600MHz

USB2.0

Kabini USB2.0
Port 0 / Port 9
WLAN
Port 2
USB
Port 3 Port 5
Touch Screen
Conn. X2 BT Combo Camera
Display Port
(Beema) USB3.0
page15 page12 page12
DP Port 1 DP Port 0 Beema co-lay reverse

HDMI Conn. AMD FT3 APU Port 0, 1

page13 LVDS USB3.0 Port 8
Jaguar Core Conn.X1
LVDS Conn. LVDS RTD2132 page18
eDP to LVDS Integrated Yangtze FCH HD Audio(AZ)
C page12 page27 C

BGA 769-balls
PCIE
page5~10
SATA III SATA I
GPP1 GPP2 GPP3 Port 0 Port1
SPI LPC Audio ALC3227
10/100
MINI Card HDD ODD page19
Card Reader LAN Controller
(WLAN/BT) Conn. Conn.
Conn. RTL8166 BIOS (4MByte) page16 page16
page15 page17
ENE
Share ROM
KBC9012
Transformer
Sub-borad FAN LDO page21
RJ45
page23 page17 APE8873 page23 Int. Speaker Combo Jacks
FAN Conn. Int.KBD Touch Pad Conn. page20 page20
USB/B page23 page22 page22

B B

PWR BTN/B

TP BTN/B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BLOCK DIAGRAMS
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A997P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 2 of 47

5 4 3 2 1
 5 4 3 2 1

RAM DDRIII SODIMMX2

+1.5V VDD_MEM 8A
AMD APU FT3 Kabini (25W)

+0.75VS VTT_MEM 2A
D D

B+ +APU_CORE +0.5~+1.4V VDDCR_CPU @ 21A(EDC)

AC ADAPTOR VIN PU201
19V 65W CHARGER PU901
BQ24725ARGRR ISL6277HRTZ-T
+APU_CORE_NB
+0.7~1.325V VDDCR_NB @ 17A(EDC)
BATT+
+1.5V
+1.5V VDDIO_MEM_S @ 3A
BATTERY PU501
RT8207MZQW +0.75VS +1.5VS
Q20 +1.5VS VDDIO_AZ_ALW @ 0.1A
LP2301ALT1G
CRT / HDMI
VDD_095_USB3_Dual @ 1A
+5VS +0.95VALW
C +5VS_DISP VDD_095_ALW @ 0.5A C

+0.95VALW +0.95VS VDD_095 @ 5A

PU1 +0.95VS
HDD x1 SY8208DQNC U3 VDD_095_GFX @ 0.6A
ODD x1 TPS22966DPUR

+5VS_HDD @ 1.1A
+5VS
+1.8VS VDD_18 @ 1.5A
+5VS_ODD @ 2A +1.8VS
PU601 +1.8VALW
SY8033BDBC
Audio +1.8VALW VDD_18_ALW @ 0.5A
ALC259-VC2-CG +5VS
+5VDDA_CODEC
+5VS_PVDD +3VS +3VALW
PU401 +3VALW VDD_33_ALW @ 0.2A
+3VDD_CODEC +1.5VS SY8208BQNC
+IOVDD_CODEC
+3VS
+3VS VDD_33 @ 0.2A
B EC U2 B
FAN TPS22966DPUR +5VS
+3VLP +1.5V_RTC VDDBT_RTC_G @ 4.5uA
+VCC_FAN +5VS +EC_VCC
+3VALW
PU402
SY8208BQNC
USB2.0 x2 LCD panel +RTCBATT
USB3.0 x1 14" +RTC_APU
B+ PU101 RTC
+USB3_VCCA +5VALW +INVPWR_B+ NCP698SQ15T1G
+LCDVDD @ 1.4A Bettary
+3VS

LAN/CR Combo
RTL8411-CG HD Camera

+3V_LAN @ 1A +3VALW +3VS_CMOS +3VS

A A

Mini Card (WLAN) Touch Screen

Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/01/04 Deciphered Date 2015/01/04 Title

+3VS_WLAN @ 2A
+3VS +5VS_TS POWER MAP
+5VS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
+1.5VS Document Number Rev
+1.5VS B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 3 of 47
5 4 3 2 1
 A B C D E

Voltage Rails
SIGNAL
Power Plane Description S0 S3 S5 STATE SLP_S3# SLP_S5# +VALW +V +VS Clock
VIN Adapter power supply (19V) ON ON ON
Full ON HIGH HIGH ON ON ON ON
B+ AC or battery power rail for power circuit. ON ON ON
+APU_CORE Core voltage for APU ON OFF OFF S1(Power On Suspend) HIGH HIGH ON ON ON LOW
1
+APU_CORE_NB Voltage for On-die VGA of APU ON OFF OFF 1
S3 (Suspend to RAM) HIGH HIGH ON ON OFF OFF
+0.95VALW 0.95V always on power rail ON OFF OFF
+0.95VS 0.95V switched power rail ON OFF OFF S4 (Suspend to Disk) LOW HIGH ON OFF OFF OFF
+1.8VALW 1.8V always on power rail ON ON ON*
S5 (Soft OFF) LOW LOW ON OFF OFF OFF
+1.8VS 1.8V switched power rail ON OFF OFF
+1.5V 1.5V power rail for APU and DDR ON ON OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+0.75VS 0.75V switched power rail for DDR terminator ON OFF OFF
+3VALW 3.3V always on power rail ON ON OFF Board ID / SKU ID Table for AD channel
+3VS 3.3V switched power rail ON OFF OFF Vcc 3.3V +/- 1%
+5VALW 5V always on power rail ON ON ON Ra 100K +/- 1% BOARD ID Table
+5VS 5V switched power rail ON OFF OFF Board ID Rb V AD_BID min V AD_BID typ V AD_BID max EC AD Board ID PCB Revision
+RTC_APU RTC power 0 0 0.000 V 0.000 V 0.300 V 0x00 - 0x0B 0 EVT
1 12K +/- 1% 0.347 V 0.354 V 0.360 V 0x0C - 0x1C 1
2 15K +/- 1% 0.423 V 0.430 V 0.438 V 0x1D - 0x26 2
3 20K +/- 1% 0.541 V 0.550 V 0.559 V 0x27 - 0x30 3
2 4 27K +/- 1% 0.691 V 0.702 V 0.713 V 0x31 - 0x3B 4 2

5 33K +/- 1% 0.807 V 0.819 V 0.831 V 0x3C - 0x46 5

6 43K +/- 1% 0.978 V 0.992 V 1.006 V 0x47 - 0x54 6
7 56K +/- 1% 1.169 V 1.185 V 1.200 V 0x55 - 0x64 7

SMBus List BOM Structure Table APU POWER SEQUENCE

EC SMBus Port1 (+3VALW) EC SMBus Port2 (+3VS) BOM Structure BTO Item
@ Unpop
Device Address HEX Device Address HEX G-A +RTC
CONN@ Connector Part Control by ME
EC_ON
Smart Battery 0001 011X b 16H SB-TSI (APU) 1001 100X b 98H EMI@ EMI pop component
G-B +3VALW/+5VALW
@EMI@ EMI unpop component
ESD@ ESD pop component
+1.8VALW
@ESD@ ESD Unpop component
+0.95VALW
eDP@ eDP Panel
SYSON
3 LVDS@ LVDS Panel 3
G-C +1.5V
AL@ Auto Load EC ROM
APU SMBus Port0 (+3VS) APU SMBus Port1(+3VALW) SUSP#
DB@ Debug only, remove at MP
G-D +3VS
Device Address HEX Device Address HEX
+1.8VS
DDR DIMM2 1010 000Xb A0H +1.5VS
+0.95VS
DDR DIMM1 1010 001Xb A2H
VR_ON
Mini Card (DNI) G-E +APU_CORE
+APU_CORE_NB

UAPU1 E2_6200@ UAPU1 A4_6300@ re check

ZZZ UAPU1 A8_6410@ UAPU1 A4_6210@ UAPU1 E1_6050@

CPU E2-6200 CPU A4-6300

PCB CUP A8-6410 CPU A4-6210 CPU E1-6050 Part Number = SA00007OQ20 Part Number = SA00007OP20
Part Number = DAZ14C00100 Part Number = SA00007TQ10 Part Number = SA00007RA40 Part Number = SA00007IQ50 S IC A32 E2-6200 EM6200ITJ44JB 1.5G BGA S IC A32 A4-6300 AM6300ITJ44JB 1.8G BGA
PCB LA-A997P REV0 M/B S IC A32 A8-6410 AM6410ITJ44JB 2G BGA769 S IC A32 A4-6210 AM6210ITJ44JB 1.8G BGA S IC A32 E1-6050 ZM1332M2J2370 1.35G BGA
UAPU1 A8_6410_R3@ UAPU1 A4_6210_R3@ UAPU1 E1_6010_R3@ UAPU1 E2_6110_R3@
4 4
ZZZ UAPU1 E1_6010@ UAPU1 E2_6110@ UAPU1 A6_6400@

CUP A8-6410 CPU A4-6210 CPU E1-6010 CPU E2-6110

Part Number = SA00007TQ20 Part Number = SA00007RA60 Part Number = SA00007RC60 Part Number = SA00007RB60
@ HDMI CPU E1-6010 CPU E2-6110 CUP A6-6400 S IC A8-6410 AM6410ITJ44JB 2G BGA A32! S IC A32 A4-6210 AM6210ITJ44JB 1.8G BGA S IC E1-6010 EM6010IUJ23JB 1.35G A32! S IC A32 E2-6110 EM6110ITJ44JB 1.5G BGA
Part Number = RO0000003HM Part Number = SA00007RC40 Part Number = SA00007RB30 Part Number = SA00007IP50
PCB 102 LA-A997P REV0 M/B 2 S IC A32 E1-6010 EM6010IUJ23JB 1.35G BGA S IC A32 E2-6110 EM6110ITJ44JB 1.5G BGA S IC A32 A6-6400 ZM18D703J4470 2.4G BGA Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NOTES LIST
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 4 of 47
A B C D E
 5 4 3 2 1

@
UAPU1A
18 DDRAB_SMA[15..0] DDRAB_SDQ[63..0] 18
MEMORY
DDRAB_SMA0 AG38 B30 DDRAB_SDQ0
M_ADD0 M_DATA0
DDRAB_SMA1 W35 A32 DDRAB_SDQ1
M_ADD1 M_DATA1
DDRAB_SMA2 W38 B35 DDRAB_SDQ2
M_ADD2 M_DATA2
DDRAB_SMA3 W34 A36 DDRAB_SDQ3
M_ADD3 M_DATA3
DDRAB_SMA4 U38 B29 DDRAB_SDQ4
M_ADD4 M_DATA4
DDRAB_SMA5 U37 A30 DDRAB_SDQ5
M_ADD5 M_DATA5
DDRAB_SMA6 U34 A34 DDRAB_SDQ6
M_ADD6 M_DATA6
DDRAB_SMA7 R35 B34 DDRAB_SDQ7 @
M_ADD7 M_DATA7
DDRAB_SMA8 R38 UAPU1B
M_ADD8
DDRAB_SMA9 N38 B37 DDRAB_SDQ8 PCIE
M_ADD9 M_DATA8
DDRAB_SMA10 AG34 A38 DDRAB_SDQ9
D M_ADD10 M_DATA9 D
DDRAB_SMA11 R34 D40 DDRAB_SDQ10
M_ADD11 M_DATA10
DDRAB_SMA12 N37 D41 DDRAB_SDQ11 R10 L2
M_ADD12 M_DATA11 P_GPP_RXP0 P_GPP_TXP0
DDRAB_SMA13 AN34 B36 DDRAB_SDQ12 Follow CRB Use PCIE Port R8 L1 Follow CRB Use PCIE Port
M_ADD13 M_DATA12 P_GPP_RXN0 P_GPP_TXN0
DDRAB_SMA14 L38 A37 DDRAB_SDQ13
M_ADD14 M_DATA13
DDRAB_SMA15 L35 B41 DDRAB_SDQ14 R5 K2 PCIE_ATX_DRX_P1 CC31 2 .1U_0402_16V7K
M_ADD15 M_DATA14 24 PCIE_ARX_DTX_P1 P_GPP_RXP1 P_GPP_TXP1 PCIE_ATX_C_DRX_P1 24
C40 DDRAB_SDQ15 R4 CR K1 PCIE_ATX_DRX_N1 CC41 2 .1U_0402_16V7K
M_DATA15 24 PCIE_ARX_DTX_N1 P_GPP_RXN1 P_GPP_TXN1 PCIE_ATX_C_DRX_N1 24
AJ38
18 DDRAB_SBS0# M_BANK0
AG35 F40 DDRAB_SDQ16 N5 J2 PCIE_ATX_DRX_P2 CC51 2 .1U_0402_16V7K
18 DDRAB_SBS1# M_BANK1 M_DATA16 22 PCIE_ARX_DTX_P2 P_GPP_RXP2 P_GPP_TXP2 J1 PCIE_ATX_C_DRX_P2 22
N34 F41 DDRAB_SDQ17 Swap LAN and CR for layout 08/15 N4 WLAN PCIE_ATX_DRX_N2 CC61 2 .1U_0402_16V7K
18 DDRAB_SBS2# M_BANK2 M_DATA17 22 PCIE_ARX_DTX_N2 P_GPP_RXN2 P_GPP_TXN2 PCIE_ATX_C_DRX_N2 22
K40 DDRAB_SDQ18
18 DDRAB_SDM[7..0] M_DATA18
DDRAB_SDM0 B32 K41 DDRAB_SDQ19 N10 H2 1
PCIE_ATX_DRX_P3 CC12 2 .1U_0402_16V7K
M_DM0 M_DATA19 24 PCIE_ARX_DTX_P3 P_GPP_RXP3 P_GPP_TXP3 PCIE_ATX_C_DRX_P3 24
DDRAB_SDM1 B38 E40 DDRAB_SDQ20 N8 LAN H1 1
PCIE_ATX_DRX_N3 CC16 2 .1U_0402_16V7K
M_DM1 M_DATA20 24 PCIE_ARX_DTX_N3 P_GPP_RXN3 P_GPP_TXN3 PCIE_ATX_C_DRX_N3 24
DDRAB_SDM2 G40 E41 DDRAB_SDQ21
M_DM2 M_DATA21
DDRAB_SDM3 N41 J40 DDRAB_SDQ22 RC2 1 2 P_TX_ZVDD W8 W7 P_RX_ZVDD 2 RC3 1
M_DM3 M_DATA22 +0.95VS P_TX_ZVDD_095 P_RX_ZVDD_095 +0.95VS
DDRAB_SDM4 AG40 J41 DDRAB_SDQ23
M_DM4 M_DATA23
DDRAB_SDM5 AN41 1.69K_0402_1% 1K_0402_1%
M_DM5
DDRAB_SDM6 AY40 M41 DDRAB_SDQ24
M_DM6 M_DATA24
DDRAB_SDM7 AY34 N40 DDRAB_SDQ25 L5 G2 PCIE_ATX_GRX_P0 C1 PX@ 1 2 0.1U_0402_16V7K
M_DM7 M_DATA25 11 PCIE_GTX_C_ARX_P0 P_GFX_RXP0 P_GFX_TXP0 PCIE_ATX_C_GRX_P0 11
DDRA_SDM8 Y40 T41 DDRAB_SDQ26 L4 G1 PCIE_ATX_GRX_N0 C2 PX@ 1 2 0.1U_0402_16V7K
T1 M_DM8 M_DATA26 11 PCIE_GTX_C_ARX_N0 P_GFX_RXN0 P_GFX_TXN0 PCIE_ATX_C_GRX_N0 11
U40 DDRAB_SDQ27
M_DATA27
B33 L40 DDRAB_SDQ28 J5 F2 PCIE_ATX_GRX_P1 C3 PX@ 1 2 0.1U_0402_16V7K
18 DDRAB_SDQS0 M_DQS_H0 M_DATA28 11 PCIE_GTX_C_ARX_P1 P_GFX_RXP1 P_GFX_TXP1 PCIE_ATX_C_GRX_P1 11
A33 M40 DDRAB_SDQ29 J4 F1 PCIE_ATX_GRX_N1 C4 PX@ 1 2 0.1U_0402_16V7K
18 DDRAB_SDQS0# M_DQS_L0 M_DATA29 11 PCIE_GTX_C_ARX_N1 P_GFX_RXN1 P_GFX_TXN1 PCIE_ATX_C_GRX_N1 11
B40 R40 DDRAB_SDQ30 VGA
18 DDRAB_SDQS1 M_DQS_H1 M_DATA30
A40 T40 DDRAB_SDQ31 G5 E2 PCIE_ATX_GRX_P2 C5 PX@ 1 2 0.1U_0402_16V7K
18 DDRAB_SDQS1# M_DQS_L1 M_DATA31 11 PCIE_GTX_C_ARX_P2 P_GFX_RXP2 P_GFX_TXP2 PCIE_ATX_C_GRX_P2 11
H41 G4 E1 PCIE_ATX_GRX_N2 C6 PX@ 1 2 0.1U_0402_16V7K
18 DDRAB_SDQS2 M_DQS_H2 11 PCIE_GTX_C_ARX_N2 P_GFX_RXN2 P_GFX_TXN2 PCIE_ATX_C_GRX_N2 11
H40 AF40 DDRAB_SDQ32
18 DDRAB_SDQS2# M_DQS_L2 M_DATA32
P41 AF41 DDRAB_SDQ33 D7 D2 PCIE_ATX_GRX_P3 C7 PX@ 1 2 0.1U_0402_16V7K
18 DDRAB_SDQS3 M_DQS_H3 M_DATA33 11 PCIE_GTX_C_ARX_P3 P_GFX_RXP3 P_GFX_TXP3 PCIE_ATX_C_GRX_P3 11
P40 AK40 DDRAB_SDQ34 E7 D1 PCIE_ATX_GRX_N3 C8 PX@ 1 2 0.1U_0402_16V7K
18 DDRAB_SDQS3# M_DQS_L3 M_DATA34 11 PCIE_GTX_C_ARX_N3 P_GFX_RXN3 P_GFX_TXN3 PCIE_ATX_C_GRX_N3 11
AH41 AK41 DDRAB_SDQ35
18 DDRAB_SDQS4 M_DQS_H4 M_DATA35
C AH40 AE40 DDRAB_SDQ36 C
18 DDRAB_SDQS4# M_DQS_L4 M_DATA36
AP41 AE41 DDRAB_SDQ37
18 DDRAB_SDQS5 M_DQS_H5 M_DATA37
AP40 AJ40 DDRAB_SDQ38
18 DDRAB_SDQS5# M_DQS_L5 M_DATA38
BA40 AJ41 DDRAB_SDQ39 FT3_BGA_769P-T_A39
18 DDRAB_SDQS6 M_DQS_H6 M_DATA39
AY41 Part Number = SA00006V710
18 DDRAB_SDQS6# M_DQS_L6
AY33 AM41 DDRAB_SDQ40
18 DDRAB_SDQS7 M_DQS_H7 M_DATA40
BA34 AN40 DDRAB_SDQ41
18 DDRAB_SDQS7# M_DQS_L7 M_DATA41
AA40 AT41 DDRAB_SDQ42
M_DQS_H8 M_DATA42
Y41 AU40 DDRAB_SDQ43
M_DQS_L8 M_DATA43
AL40 DDRAB_SDQ44
M_DATA44
AC35 AM40 DDRAB_SDQ45
18 DDRA_CLK0 M_CLK_H0 M_DATA45
AC34 AR40 DDRAB_SDQ46
18 DDRA_CLK0# M_CLK_L0 M_DATA46
AA34 AT40 DDRAB_SDQ47
18 DDRA_CLK1 M_CLK_H1 M_DATA47
AA32
18 DDRA_CLK1# M_CLK_L1
AE38 AV41 DDRAB_SDQ48
M_CLK_H2 M_DATA48
AE37 AW40DDRAB_SDQ49
M_CLK_L2 M_DATA49
AA37 BA38 DDRAB_SDQ50
M_CLK_H3 M_DATA50
AA38 AY37 DDRAB_SDQ51
M_CLK_L3 M_DATA51
AU41 DDRAB_SDQ52
M_DATA52
G38 AV40 DDRAB_SDQ53
18 MEM_MAB_RST# M_RESET_L M_DATA53
MEM_MAB_EVENT# AE34 AY39 DDRAB_SDQ54
18 MEM_MAB_EVENT# M_EVENT_L M_DATA54
AY38 DDRAB_SDQ55
M_DATA55
L34
18 DDRA_CKE0 M0_CKE0
J38 BA36 DDRAB_SDQ56
18 DDRA_CKE1 M0_CKE1 M_DATA56
J37 AY35 DDRAB_SDQ57
M1_CKE0 M_DATA57
J34 BA32 DDRAB_SDQ58
M1_CKE1 M_DATA58
AY31 DDRAB_SDQ59
M_DATA59
AN38 BA37 DDRAB_SDQ60
18 DDRA_ODT0 M0_ODT0 M_DATA60
AU38 AY36 DDRAB_SDQ61
18 DDRA_ODT1 M0_ODT1 M_DATA61
AN37 BA33 DDRAB_SDQ62
B M1_ODT0 M_DATA62 B
AR37 AY32 DDRAB_SDQ63
M1_ODT1 M_DATA63
AJ34 V41
18 DDRA_SCS0# M0_CS_L0 M_CHECK0
AR38 W40
18 DDRA_SCS1# M0_CS_L1 M_CHECK1
AL38 AB40
M1_CS_L0 M_CHECK2
AN35 AC40
M1_CS_L1 M_CHECK3
U41
M_CHECK4
AJ37 V40
18 DDRAB_SRAS# M_RAS_L M_CHECK5
AL34 AA41
18 DDRAB_SCAS# M_CAS_L M_CHECK6
AL35 AB41
18 DDRAB_SWE# M_WE_L M_CHECK7
M_VREF AD40 RC5
M_VREF
M_VREFDQ AC38 AD41 M_ZVDDIO 2 1
M_VREFDQ M_ZVDDIO_MEM_S +1.35V_VDDQ
39.2_0402_1%
0.1U_0402_10V6K
CC7

1 FT3_BGA_769P-T_A39
1

Part Number = SA00006V710

RC6
1K_0402_1%
2
2

+1.35V_VDDQ
RPC1
1 8
2 7 M_VREF
3 6 MEM_MAB_EVENT#

1U_0402_6.3V6K
4 5

CC8
0.1U_0402_25V6

CC9
A 1K_0804_8P4R_1% 1 1 A

2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MEM & PCIE
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A997P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 5 of 47
5 4 3 2 1
 5 4 3 2 1

@
UAPU1C RPC12
DISPLAY/SVI2/JTAG/TEST DAC_BLU 1 8
APU_DP1_TXP0 A9 TDP1_TXP0 DP_150_ZVSS B16DP_150_ZVSS 2 RC101 150_0402_1% DAC_GRN 2 7
20 APU_DP1_TXP0 B9 TDP1_TXN0 A21DP_2K_ZVSS 2
APU_DP1_TXN0 DP_2K_ZVSS RC111 2K_0402_1% DAC_RED 3 6
20 APU_DP1_TXN0 B17 DP_ENBKL 4 5
DP_BLON
APU_DP1_TXP1 A10 TDP1_TXP1 A17 DP_ENVDD DP_ENBKL 28
DP_DIGON VDDIO level
20 APU_DP1_TXP1 APU_DP1_TXN1 B10 TDP1_TXN1 A18 DP_INT_PWM DP_ENVDD 19
DP_VARY_BL 150_0804_8P4R_1%
20 APU_DP1_TXN1 DP_INT_PWM 19,27 Need Level shift
To HDMI APU_DP1_TXP2 A11 TDP1_TXP2
D 20 APU_DP1_TXP2 APU_DP1_TXN2 B11 TDP1_TXN2 D17 DP1_AUXP D
TDP1_AUXP
20 APU_DP1_TXN2 E17 DP1_AUXN DP1_AUXP 20
TDP1_AUXN To HDMI
APU_DP1_TXP3 A12 TDP1_TXP3 DP1_AUXN 20
@
20 APU_DP1_TXP3 APU_DP1_TXN3 B12 TDP1_TXN3 H19 DP1_HPD
TDP1_HPD HDMI RPC7
20 APU_DP1_TXN3 DP1_HPD 20 APU_TEST10 1 8
A4 LTDP0_TXP0 LTDP0_AUXP D15 AUXP_DDC_CLK APU_TEST9 2 7
27 LVDS_TXP2 B4 LTDP0_TXN0 E15 AUXN_DDC_DATA AUXP_DDC_CLK 27 GIO_TSTDTM0_SERIALCLK 3 6
LTDP0_AUXN To LVDS
27 LVDS_TXN2 AUXN_DDC_DATA 27 GIO_TSTDTM0_CLKINIT 4 5
A5 LTDP0_TXP1 LTDP0_HPD H17 EDP_HPD
27 LVDS_TXP1 B5 LTDP0_TXN1 EDP_HPD 27
RC103 1K_0804_8P4R_5%
27 LVDS_TXN1 B14DAC_R_RED 1 2 47NH_LQG15HS47NJ02D_0.2A_5% DAC_RED
To LVDS DAC_RED
A6 LTDP0_TXP2 DAC_RED 21
RC104 EMI@
27 LVDS_TXP0 B6 LTDP0_TXN2 A14DAC_R_GRN1 2 47NH_LQG15HS47NJ02D_0.2A_5% DAC_GRN
DAC_GREEN
27 LVDS_TXN0 DAC_GRN 21
RC118 EMI@ CRT
A7 LTDP0_TXP3 DAC_BLUE B15DAC_R_BLU 1 2 47NH_LQG15HS47NJ02D_0.2A_5% DAC_BLU @
27 LVDS_CLKP B7 LTDP0_TXN3 DAC_BLU 21
EMI@ RPC3
27 LVDS_CLKN APU_TEST7 1 8
DAC_HSYNC G19 DAC_HSYNC APU_TEST8 2 7
K15 DISP_CLKIN_H E19 DAC_VSYNC DAC_HSYNC 21 PLLTEST0 3 6
DAC_VSYNC
+3VS H15 DISP_CLKIN_L DAC_VSYNC 21 PLLTEST1 4 5
DAC_SCL D19
APU_SVT G31 SVT D21 DAC_DDC_CLK 21
RPC5 DAC_SDA 1K_0804_8P4R_5%
8 1 ALERT_L 43 APU_SVT APU_SVC D27 SVC DAC_DDC_DATA 21
7 2 PROCHOT# 43 APU_SVC APU_SVD E29 SVD A16DAC_ZVSS 1 RC17 2 499_0402_1%
SVI 2.0 DAC_ZVSS
6 3 43 APU_SVD
5 4 EC_SMB_CK2 B22 SIC THERMDA H27
12,27,28 EC_SMB_CK2 T2
SB-TSI EC_SMB_DA2 B21 SID THERMDC H29
12,27,28 EC_SMB_DA2 T3
C 1K_0804_8P4R_5% DIECRACKMON D25 APU_TEST6 C
+1.8VS T4 +1.8VS
APU_RST#_APU B20 APU_RST_L BP0 A27 APU_TEST7 @
Kabini@ RC22 1 2 0_0402_5% APU_TEMPIN1 A20 LDT_RST_L BP1 B27 APU_TEST8 RPC6
RC22,23 CNG to 0ohm for FT3/FT3b Co lay Cloud BP2 A26 APU_TEST9 APU_SVC 1 8
RC25 1 2 300_0402_5% APU_RST#_APU APU_PWRGD_L B19 APU_PWROK BP3 B26 APU_TEST10 APU_SVD 2 7
43 APU_PWRGD_L
RC28 1 2 300_0402_5% APU_PWRGD_L Kabini@ RC23 1 2 0_0402_5% APU_TEMPIN2 A19 LDT_PWROK PLLTEST1 B28 PLLTEST1 APU_SVT 3 6
PLLTEST0 A28 PLLTEST0 4 5
PROCHOT# A22 PROCHOT_L BYPASSCLK_H B24 BYPASSCLK_H 1
RC34 2 511_0402_1%
36,43,9 PROCHOT# ALERT_L B18 ALERT_L A24 BYPASSCLK_L 1 2 511_0402_1%
1 1 BYPASSCLK_L RC35 +1.8VS 1K_0804_8P4R_5%
PLLCHRZ_H AV35
T5

150P_0402_50V8J
CC11
CC10 APU_TDI D29 TDI PLLCHRZ_L AU35
T35 T6
150P_0402_50V8J APU_TDO D31 TDO M_TEST E33
2 2 T15 T7 +1.8VS
@ RC26 1 2 0_0402_5% APU_TEMPIN0
T36
APU_TCK D35 TCK
@ RC27 1 2 0_0402_5% APU_TEMPIN1
T37
APU_TMS D33 TMS FREE_2 A29 APU_TEMPIN0
RC29 1 2 0_0402_5% APU_TEMPIN2
T39
APU_TRST# G27 TRST_L GIO_TSTDTM0_SERIALCLK H21 GIO_TSTDTM0_SERIALCLK 1
RC38 @ 2 1K_0402_1%
+1.8VS
@ APU_DBRDY B25 DBRDY GIO_TSTDTM0_CLKINIT H25 GIO_TSTDTM0_CLKINIT 1
RC40 @ 2 1K_0402_1%
T38
APU_DBREQ# A25 DBREQ_L APU_DBREQ# RC42 1 2 1K_0402_1%
T40
USB_ATEST0 AJ10 DP_STEREOSYNC RC43 1 @ 2 1K_0402_1%
T9
APU_VDDNB_SEN D23 VDDCR_NB_SENSE USB_ATEST1 AJ8
43 APU_VDDNB_SEN T10
MMBT3904WH_SOT323-3

MMBT3904WH_SOT323-3

MMBT3904WH_SOT323-3

APU_VDD_SEN G23 VDDCR_CPU_SENSE M_ANALOGIN R32 @RC45

@ RC45
T11
1

43 APU_VDD_SEN
100P_0402_50V8J

100P_0402_50V8J

100P_0402_50V8J

C C C 1 1 1 E25 VDDIO_MEM_S_SENSE M_ANALOGOUT N32 0_0402_5%

T12 +3VS
2 2 2 APU_VDD_RUN_FB_L E23 VSS_SENSE TMON_CAL AP29 TMON_CAL 1 2
B B B 43 APU_VDD_RUN_FB_L
C194 C195 C196
E E E @ @ @ VDD_095_FB_H AV33 VDD_095_FB_H HDMI_EN/DP_STEREOSYNC E21 DP_STEREOSYNC RC47 1 @ 2 1K_0402_1%
T13
3

Q92 Q93 Q94 2 2 2 VDD_095_FB_L AU33 VDD_095_FB_L RC39 1 2 1K_0402_1%

T14
@ @ @ DAC_HSYNC RC41 1 @ 2 1K_0402_1%
RC48 1 @ 2 0_0402_5%
HDT Debug conn
B B
RC49 1 @ 2 0_0402_5%
+0.95VALW
FT3_BGA_769P-T_A39
Part Number = SA00006V710
APU_TEMPRETURN 8
Close to Header
+1.8VS
RPC4
APU_TCK 1 8
@ESD@ APU_TMS 2 7
APU_RST#_APU C189 2 1 100P_0402_50V8J APU_TDI 3 6
APU_TRST# 4 5
APU_PWRGD_L C192 2 1 100P_0402_50V8J
1K_0804_8P4R_5%
@ESD@

Close to APU

PROCHOT# DAC_RED 1 2
CC13 @EMI@ .1U_0402_16V7K
DAC_GRN 1 2

6
CC15 @EMI@ .1U_0402_16V7K
Q4A DAC_BLU 1 2
2N7002KDW_SOT363-6 CC125 @EMI@ .1U_0402_16V7K
A 2 A
H_PROCHOT#_EC 28,36
This power part.

1
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SATA_USB_LPC_SPI
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A997P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 6 of 47
5 4 3 2 1
 5 4 3 2 1

@
UAPU1E
4MB SPI ROM +3VALW

SATA_ITX_C_DRX_P0 BA14
SATA_TX0P
CLK/SATA/USB/SPI/LPC

USBCLK/14M_25M_48M_OSC
W4 & Non-share ROM. 0.1U_0402_25V6
2
CC14
1
23 SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0 AY14
23 SATA_ITX_C_DRX_N0 SATA_TX0N
USB_ZVSS AG4 USB_RCOMP RC60 1 2 11.8K_0402_1% U2 Kabini@
HDD SATA_PRX_DTX_N0 BA16 FCH_SPI_CS1# 1 8
23 SATA_PRX_DTX_N0 SATA_RX0N CS# VCC
SATA_PRX_DTX_P0 AY16 AL4 USB20_P0 FCH_SPI_MISO 2 7 FCH_SPI_HOLD#
23 SATA_PRX_DTX_P0 SATA_RX0P USB_HSD0P USB20_P0 25 SO/SIO1 HOLD#
AL5 USB20_N0 External USB conn. FCH_SPI_WP# 3 6 FCH_SPI_CLK
USB_HSD0N USB20_N0 25 WP# SCLK
SATA_PTX_DRX_P1_C AY19 4 5 FCH_SPI_MOSI
23 SATA_PTX_DRX_P1_C SATA_TX1P GND SI/SIO0
SATA_PTX_DRX_N1_C BA19 AJ4
23 SATA_PTX_DRX_N1_C SATA_TX1N USB_HSD1P
AJ5 W25Q64FVSSIG_SO8
USB_HSD1N
ODD SATA_PRX_DTX_N1_C AY17 Check CS# PU R 1kor10k and pop/nopop SA00003K810
23 SATA_PRX_DTX_N1_C SATA_RX1N
SATA_PRX_DTX_P1_C BA17 AG7 SCL v1.20 : If an SPI ROM is shared between
23 SATA_PRX_DTX_P1_C SATA_RX1P USB_HSD2P
AG8 the FCH and the Embedded Controller
D USB_HSD2N D
2 RC63 1 1K_0402_1% SATA_CALRN AR19 a 10-K pull-up resistor to +3.3V_S5 is installed. U2
SATA_ZVSS
2 1 1K_0402_1% SATA_CALRP AP19 AG1 USB20_P3 Beema@
+0.95VS SATA_ZVDD_095 USB_HSD3P USB20_P3 22
RC65 AG2 USB20_N3 Mini PCIe CONN S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
USB_HSD3N USB20_N3 22
SA000039A30
SATA_LED# BA30 AF1 USB20_P4
30 SATA_LED# SATA_ACT_L/GPIO67 USB_HSD4P USB20_P4 19
AF2 USB20_N4 Front Camera
USB_HSD4N USB20_N4 19
AY12
SATA_X1
AE1 USB20_P5
USB_HSD5P USB20_P5 19
AE2 USB20_N5 Touch Screen
USB_HSD5N USB20_N5 19 +3VALW
+3VS BA12 AD1
SATA_X2 USB_HSD6P
AD2
USB_HSD6N
2 RC64 1 SATA_LED# RP12
560_0402_5% CLK_PEG_VGA U4 AC1 FCH_SPI_CS1# 1 8
11 CLK_PEG_VGA GFX_CLKP USB_HSD7P
GPU CLK_PEG_VGA#U5 AC2 FCH_SPI_CS2# 2 7
11 CLK_PEG_VGA# GFX_CLKN USB_HSD7N
FCH_SPI_WP# 3 6
AC8 AB1 USB20_P8 FCH_SPI_HOLD# 4 5
GPP_CLK0P USB_HSD8P USB20_P8 25
AC10 AB2 USB20_N8 MB USB3.0 port0 (2.0)
GPP_CLK0N USB_HSD8N USB20_N8 25
10K_0804_8P4R_5%
AE4 AA1 USB20_P9
24 CLK_PCIE_CR GPP_CLK1P USB_HSD9P USB20_P9 25
CR AE5 AA2 USB20_N9 External USB conn.
24 CLK_PCIE_CR# GPP_CLK1N USB_HSD9N USB20_N9 25
AC4 USB_SS_ZVSS AE10 USBSS_CALRN RC72 1 2 1K_0402_1%
22 CLK_PCIE_MINI1 GPP_CLK2P
WLAN AC5 AE8 USBSS_CALRP RC73 1 2 1K_0402_1% Support Share ROM
22 CLK_PCIE_MINI1# GPP_CLK2N USB_SS_ZVDD_095_USB3_DUAL +0.95V_DUAL
AA5 T2 USB30_MTX_DRX_P0 0_0804_8P4R_5%
24 CLK_PCIE_LAN GPP_CLK3P USB_SS_0TXP USB30_MTX_DRX_P0 25
LAN AA4 T1 USB30_MTX_DRX_N0 4 5
24 CLK_PCIE_LAN# GPP_CLK3N USB_SS_0TXN USB30_MTX_DRX_N0 25 FCH_SPI_MISO 3 6 EC_SPI_SO
1 2 15P_0402_50V8J AP13 V2 USB30_MRX_DTX_P0 FCH_SPI_MOSI 2 7 EC_SPI_SI EC_SPI_SO 28
CC17 X14M_25M_48M_OSC USB_SS_0RXP
V1 USB30_MRX_DTX_N0 USB30_MRX_DTX_P0 25 FCH_SPI_CS1# 1 8 EC_SPI_CS0# EC_SPI_SI 28
USB_SS_0RXN USB30_MRX_DTX_N0 25 EC_SPI_CS0# 28
48M_X1 N2
X48M_X1

1
2 1 R1 RPH42
GND IN USB_SS_1TXP
RC76 R2
USB_SS_1TXN
4 3 1M_0402_1%
GND OUT 48M_X2 N1 W1
X48M_X2 USB_SS_1RXP
48MHZ_20PF_E3SB48.0000F20M22 Y1 W2
USB_SS_1RXN

2
C SJ10000EK00 C
CC18 1 2 15P_0402_50V8J RC95 FCH_SPI_CLK RC78 1 EMI@ 2 15_0402_5% EC_SPI_CLK
+3VS LPC_CLK0_EC EMI@ 1 2 0_0402_5% LPC_CLK0_R_EC
AY2 EC_SPI_CLK 28
LPCCLK0 RC77
28 LPC_CLK0_EC LPC_CLK1 EMI@ 1 RC110 2 33_0402_5% LPC_CLK1_RAW2 AU7 FCH_SPI_CLK_R
LPCCLK1 SPI_CLK/GPIO162 EMI@ 1 2 0_0402_5% FCH_SPI_CLK Close to ROM
31 LPC_CLK1 AW9 FCH_SPI_CS1#
SPI_CS1_L/GPIO165
1

LPC_AD0 AT2 AR4 FCH_SPI_CS2#

28,31 LPC_AD0 LAD0 SPI_CS2_L/GPIO166
@R1382
@ R1382 LPC_AD1 AT1 AR11 FCH_SPI_MOSI
28,31 LPC_AD1 LAD1 SPI_DO/GPIO163
4.7K_0402_5% 28,31 LPC_AD2 LPC_AD2 AR2 AR7 FCH_SPI_MISO
LAD2 SPI_DI/GPIO164
28,31 LPC_AD3 LPC_AD3 AR1 AU11 FCH_SPI_HOLD#
LAD3 SPI_HOLD_L/GEVENT9_L
LPC_FRAME# AP2 AU9 FCH_SPI_WP#
LFRAME_L SPI_WP_L/GPIO161
2

28,31 LPC_FRAME# AP1

LDRQ0_L
SUS_STAT# 28,31 SERIRQ SERIRQ AV29
SERIRQ/GPIO48
LPC_CLKRUN_L AP25
28 LPC_CLKRUN_L LPC_CLKRUN_L
SUS_STAT# AV2
LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L

STRAPS OF APU FT3_BGA_769P-T_A39

Part Number = SA00006V710

LPC_FRAME# LPC_CLK0_EC LPC_CLK1 GEVENT2_L RTC_CLK

SPI ROM BOOT FAIL TIMER CLKGEN 1.8V SPI ROM NORMAL POWR
H (DEFAULT) ENABLED ENABLE
(DEFAULT)
UP/RESET TIMING
(DEFAULT)

BOOT FAIL TIMER CLKGEN 3.3V SPI ROM FAST POWER

L LPC ROM DISABLED
(DEFAULT)
DISABLED (DEFAULT) UP/RESET TIMING
FOR SIMULATION

+3VALW

B B

2 RC79 1 10K_0402_1% LPC_FRAME#

2 RC80@ 1 10K_0402_1% LPC_CLK0_EC
2 RC81 1 10K_0402_1% LPC_CLK1

1 RC83@ 2 2K_0402_5% LPC_FRAME#

1 RC84 2 2K_0402_5% LPC_CLK0_EC
1 RC85@ 2 2K_0402_5% LPC_CLK1

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SATA_USB_LPC_SPI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A997P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 7 of 47

5 4 3 2 1
 5 4 3 2 1

10UX3
+CPU_CORE
180PX1
1UX11
6 APU_TEMPRETURN

+1.35V_VDDQ @ +CPU_CORE @ @
UAPU1F UAPU1G UAPU1H
POWER GND GND
J35 L21 A8 J3 W29 AL39
VDDIO_MEM_S_1 VDDCR_CPU_1 VSS_1 VSS_63 VSS_125 VSS_187
10U_0603_6.3V6M
CC19

10U_0603_6.3V6M
CC20

10U_0603_6.3V6M
CC23

180P_0402_50V8J
CC24

1U_0402_6.3V6K
CC25

1U_0402_6.3V6K
CC26

1U_0402_6.3V6K
CC39

1U_0402_6.3V6K
CC21

1U_0402_6.3V6K
CC27

1U_0402_6.3V6K
CC28

1U_0402_6.3V6K
CC29

1U_0402_6.3V6K
CC30

1U_0402_6.3V6K
CC31

1U_0402_6.3V6K
CC32

1U_0402_6.3V6K
CC33
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 L32 L23 +APU_VDD_18 +1.8VS A13 J7 W39 AL41
VDDIO_MEM_S_2 VDDCR_CPU_2 VSS_2 VSS_64 VSS_126 VSS_188
L37 L25 A23 J8 W41 AM11
VDDIO_MEM_S_3 VDDCR_CPU_3 VSS_3 VSS_65 VSS_127 VSS_189

2
N35 L27 RC86 @ A31 J39 Y1 AM27
VDDIO_MEM_S_4 VDDCR_CPU_4 VSS_4 VSS_66 VSS_128 VSS_190

RC24

0_0402_5%
R31 L29 1 2 0_0805_5% A35 K11 Y2 AM31
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 VDDIO_MEM_S_5 VDDCR_CPU_5 VSS_5 VSS_67 VSS_129 VSS_191
R37 N21 A39 K13 AA3 AN3
VDDIO_MEM_S_6 VDDCR_CPU_6 VSS_6 VSS_68 VSS_130 VSS_192
U32 N23 CC34 1 210U_0603_6.3V6M B8 K17 AA7 AN7
D VDDIO_MEM_S_7 VDDCR_CPU_7 VSS_7 VSS_69 VSS_131 VSS_193 D
U35 N27 B13 K19 AA8 AN39
VDDIO_MEM_S_8 VDDCR_CPU_8 VSS_8 VSS_70 VSS_132 VSS_194

1
W31 R21 CC22 1 2 1U_0402_6.3V6K B23 K21 AA11 AP31
W32
VDDIO_MEM_S_9
VDDIO_MEM_S_10
VDDCR_CPU_9
VDDCR_CPU_10
R23 180PX1 B31
VSS_9
VSS_10
VSS_71
VSS_72
K23 AA15
VSS_133
VSS_134
VSS_195
VSS_196
AR3
W37 R27 CC35 1 2 1U_0402_6.3V6K B39 K25 AA19 AR13
AA31
VDDIO_MEM_S_11 VDDCR_CPU_11
U21 10UX1 C1
VSS_11 VSS_73
K27 AA25
VSS_135 VSS_197
AR17
VDDIO_MEM_S_12 VDDCR_CPU_12 VSS_12 VSS_74 VSS_136 VSS_198
AA35 U23 CC36 1 2 1U_0402_6.3V6K C2 K29 AA29 AR21
10UX4 AC32
VDDIO_MEM_S_13 VDDCR_CPU_13
U27 1UX7 C5
VSS_13 VSS_75
K31 AA39
VSS_137 VSS_199
AR25
VDDIO_MEM_S_14 VDDCR_CPU_14 VSS_14 VSS_76 VSS_138 VSS_200
AC37 W21 CC37 1 2 1U_0402_6.3V6K C7 L3 AC3 AR29
+CPU_CORE_NB 180PX1 AE31
VDDIO_MEM_S_15 VDDCR_CPU_15
W23 C9
VSS_15 VSS_77
L7 AC7
VSS_139 VSS_201
AR39
VDDIO_MEM_S_16 VDDCR_CPU_16 VSS_16 VSS_78 VSS_140 VSS_202
AE35 W27 CC38 1 2 1U_0402_6.3V6K C11 L8 AC11 AR41
1UX9 AG32
VDDIO_MEM_S_17 VDDCR_CPU_17
AA21 C13
VSS_17 VSS_79
L10 AC15
VSS_141 VSS_203
AU1
VDDIO_MEM_S_18 VDDCR_CPU_18 VSS_18 VSS_80 VSS_142 VSS_204
AG37 AA23 CC40 1 2 1U_0402_6.3V6K C15 L11 AC19 AU2
VDDIO_MEM_S_19 VDDCR_CPU_19 VSS_19 VSS_81 VSS_143 VSS_205
AJ35 AA27 C17 L15 AC25 AU3
VDDIO_MEM_S_20 VDDCR_CPU_20 VSS_20 VSS_82 VSS_144 VSS_206
AL32 AC21 CC41 1 2 1U_0402_6.3V6K C19 L19 AC29 AU15
VDDIO_MEM_S_21 VDDCR_CPU_21 VSS_21 VSS_83 VSS_145 VSS_207
AL37 AC23 C21 L31 AC31 AU19
VDDIO_MEM_S_22 VDDCR_CPU_22 VSS_22 VSS_84 VSS_146 VSS_208
AR35 AC27 CC42 1 2 180P_0402_50V8J C23 L39 AC39 AU23
VDDIO_MEM_S_23 VDDCR_CPU_23 VSS_23 VSS_85 VSS_147 VSS_209
AE21 C25 L41 AC41 AU27
VDDCR_CPU_24 VSS_24 VSS_86 VSS_148 VSS_210
10U_0603_6.3V6M
CC43

10U_0603_6.3V6M
CC44

10U_0603_6.3V6M
CC45

10U_0603_6.3V6M
CC46

180P_0402_50V8J
CC47

1U_0402_6.3V6K
CC48

1U_0402_6.3V6K
CC49

1U_0402_6.3V6K
CC50

1U_0402_6.3V6K
CC51

1U_0402_6.3V6K
CC52

1U_0402_6.3V6K
CC53

1U_0402_6.3V6K
CC54

1U_0402_6.3V6K
CC55

1U_0402_6.3V6K
CC56
1 1 1 1 1 1 1 1 1 1 1 1 1 1 AE23 C27 M1 AE3 AU39
VDDCR_CPU_25 VSS_25 VSS_87 VSS_149 VSS_211
AE27 C29 M2 AE7 AV9
VDDCR_CPU_26 +APU_VDDIO_AZ +1.5VS VSS_26 VSS_88 VSS_150 VSS_212
C31 N3 AE25 AW3
VSS_27 VSS_89 VSS_151 VSS_213
L13 C33 N7 AE29 AW7
2 2 2 2 2 2 2 2 2 2 2 2 2 2 VDDCR_NB_1
L17 +CPU_CORE_NB RC87 @ C35
VSS_28 VSS_90
N15 AE32
VSS_152 VSS_214
AW13
VDDCR_NB_2 VSS_29 VSS_91 VSS_153 VSS_215
VDDCR_NB_3 N11 1 2 0_0805_5% C37 N19 AE39 AW15
VSS_30 VSS_92 VSS_154 VSS_216
VDDCR_NB_4 N13 C39 N25 AG3 AW17
VSS_31 VSS_93 VSS_155 VSS_217
N17 CC57 1 2 4.7U_0603_6.3V6K C41 N29 AG5 AW19
VDDCR_NB_5
VDDCR_NB_6 R11 4.7UX1 D9
VSS_32
VSS_33
VSS_94
VSS_95
N31 AG10
VSS_156
VSS_157
VSS_218
VSS_219
AW21
R13 CC58 1 2 1U_0402_6.3V6K D11 N39 AG11 AW23
VDDCR_NB_7
VDDCR_NB_8 R17 180PX1 D13
VSS_34 VSS_96
P1 AG13
VSS_158 VSS_220
AW25
VSS_35 VSS_97 VSS_159 VSS_221
U13 CC59 1 2 1U_0402_6.3V6K E3 P2 AG15 AW27
VDDCR_NB_9
U17 1UX3 E4
VSS_36 VSS_98
R3 AG19
VSS_160 VSS_222
AW31
10UX3 VDDCR_NB_10
VDDCR_NB_11
W13 CC60 1 2 1U_0402_6.3V6K E9
VSS_37
VSS_38
VSS_99
VSS_100
R7 AG25
VSS_161
VSS_162
VSS_223
VSS_224
AW33
W17 E11 R15 AG29 AW35
180PX4 VDDCR_NB_12
AA13 CC61 1 2 180P_0402_50V8J E13
VSS_39 VSS_101
R19 AG31
VSS_163 VSS_225
AW37
+1.35V_VDDQ VDDCR_NB_13 VSS_40 VSS_102 VSS_164 VSS_226
AA17 E27 R25 AG39 AW39
0.1UX8 VDDCR_NB_14
AC13 E31
VSS_41 VSS_103
R29 AG41
VSS_165 VSS_227
AW41
VDDCR_NB_15 VSS_42 VSS_104 VSS_166 VSS_228
AC17 E35 R39 AH1 AY13
VDDCR_NB_16 VSS_43 VSS_105 VSS_167 VSS_229
AE15 E38 R41 AH2 AY15
C VDDCR_NB_17 VSS_44 VSS_106 VSS_168 VSS_230 C
AE17 E39 U1 AJ3 AY18
VDDCR_NB_18 +APU_VDD_0.95 +0.95VS VSS_45 VSS_107 VSS_169 VSS_231
AE19 G3 U2 AJ7 AY30
VDDCR_NB_19 VSS_46 VSS_108 VSS_170 VSS_232
AG17 G7 U3 AJ15 BA2
VDDCR_NB_20 VSS_47 VSS_109 VSS_171 VSS_233
AL10 AG21 G11 U7 AJ17 BA7
+APU_VDDIO_AZ VDDIO_AZ_ALW_1 VDDCR_NB_21 VSS_48 VSS_110 VSS_172 VSS_234
AL11 RC88 1 2 0_0805_5% G13 U8 AJ19 BA13
VDDIO_AZ_ALW_2 VSS_49 VSS_111 VSS_173 VSS_235
10U_0603_6.3V6M
CC62

10U_0603_6.3V6M
CC63

10U_0603_6.3V6M
CC64

180P_0402_50V8J
CC65

180P_0402_50V8J
CC66

180P_0402_50V8J
CC67

180P_0402_50V8J
CC68

0.1U_0402_10V6K
CC69

0.1U_0402_10V6K
CC70

0.1U_0402_10V6K
CC71

0.1U_0402_10V6K
CC72

0.1U_0402_10V6K
CC73

0.1U_0402_10V6K
CC74

0.1U_0402_10V6K
CC75

0.1U_0402_10V6K
CC77
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 G15 U11 AJ23 BA15
VSS_50 VSS_112 VSS_174 VSS_236
B1 A2 CC76 1 2 10U_0603_6.3V6M G17 U15 AJ25 BA18
+APU_VDD18_ALW
B2
VDD_18_ALW_1
VDD_18_ALW_2
VDD_18_1
VDD_18_2
A3
+APU_VDD_18 180PX1 G21
VSS_51
VSS_52
VSS_113
VSS_114
U19 AJ29
VSS_175
VSS_176
VSS_237
VSS_238
BA21
B3 CC78 1 2 10U_0603_6.3V6M G25 U25 AJ31 BA25
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 VDD_18_3
C3 10UX2 G29
VSS_53 VSS_115
U29 AJ32
VSS_177 VSS_239
BA31
VDD_18_4 VSS_54 VSS_116 VSS_178 VSS_240
CC79 1 2 1U_0402_6.3V6K G35 U31 AJ39 BA35
AL13 AM15 1UX6 G37
VSS_55 VSS_117
U39 AL3
VSS_179 VSS_241
BA39
+APU_VDD33_ALW VDD_33_ALW_1 VDD_33_1 +APU_VDD_33 VSS_56 VSS_118 VSS_180 VSS_242
AM13 AM17 CC80 1 2 1U_0402_6.3V6K G39 W3 AL8 A15
VDD_33_ALW_2 VDD_33_2 VSS_57 VSS_119 VSS_181 VSSBG_DAC
G41 W5 AL15 AL31
VSS_58 VSS_120 VSS_182 VBURN
AR5 AG23 CC81 1 2 1U_0402_6.3V6K H11 W11 AL17 AM29
+0.95V_DUAL VDD_095_USB3_DUAL_1 VDD_095_1 +APU_VDD_0.95 VSS_59 VSS_121 VSS_183 PSEN
AU4 AG27 H13 W15 AL19
VDD_095_USB3_DUAL_2 VDD_095_2 VSS_60 VSS_122 VSS_184
AV7 AJ21 CC82 1 2 1U_0402_6.3V6K H23 W19 AL25
VDD_095_USB3_DUAL_3 VDD_095_3 VSS_61 VSS_123 VSS_185
AW5 AJ27 H31 W25 AL29
4.7UX1 VDD_095_USB3_DUAL_4 VDD_095_4
VDD_095_5
AL21 CC83 1 2 1U_0402_6.3V6K
VSS_62 VSS_124 VSS_186
AE11 AL23
180PX2 +VDD_0.95_ALW
AE13
VDD_095_ALW_1 VDD_095_6
AL27 CC84 1 2 1U_0402_6.3V6K FT3_BGA_769P-T_A39 FT3_BGA_769P-T_A39
+1.8VALW VDD_095_ALW_2 VDD_095_7
AJ11 AM23
1UX6 +APU_VDD18_ALW +3VALW +APU_VDD33_ALW AJ13
VDD_095_ALW_3 VDD_095_8
AM25 CC85 1 2 180P_0402_50V8J
Part Number = SA00006V710 Part Number = SA00006V710
VDD_095_ALW_4 VDD_095_9
RC89 RC90
0_0603_5% VDD_095_GFX_1 U10APU_VDD_0.95_GFX 1 2
+APU_VDD_0.95
1 2 @RC91
@ RC91 VDD_095_GFX_2 W10
1 2 AN4 VDD_095_GFX_3 AA10 0_0805_5%
VDDBT_RTC_G
0_0603_5%

10U_0603_6.3V6M
CC86

1U_0402_6.3V6K
CC87
FT3_BGA_769P-T_A39 1 1 +3VS +APU_VDD_33
Part Number = SA00006V710
180P_0402_50V8J
CC88

180P_0402_50V8J
CC89

1U_0402_6.3V6K
CC90

1U_0402_6.3V6K
CC91

1U_0402_6.3V6K
CC92

1U_0402_6.3V6K
CC93

1U_0402_6.3V6K
CC94

1U_0402_6.3V6K
CC95

1 1 1 1 1 1 1 1 2
1U_0402_6.3V6K
CC97

1U_0402_6.3V6K
CC98

1 1 RC92
CC96 2 2 0_0603_5%
1 Don't use GFX reserve
1 2 CC99 1 2 1U_0402_6.3V6K
4.7U_0603_6.3V6K

2 2 2 2 2 2 2 2 1 CC100
RC90, CC86, CC87
B
2 2 0.22U_0402_6.3V6K Cloud 08/12 CC1011 2 1U_0402_6.3V6K B
2
CC1021 2 180P_0402_50V8J

+RTCBATT

1
RH13
+0.95VALW +VDD_0.95_ALW +0.95VALW +0.95V_DUAL 1K_0402_5%
W>=15mils W>=15mils
U4

2
RC97 RC98 AP2138N-1.5TRG1_SOT23-3 DC3
1 2 1 2 1 RC94 2 3 2
10K_0402_5% Vout 1 1
0_0805_5% 0_0805_5% 2 Vin 3
GND +3VLP
RC99
+0.95VS 0_0805_5% BAV70W_SOT323-3
1 2
1U_0402_6.3V6K
CC104

1U_0402_6.3V6K
CC105

1U_0402_6.3V6K
CC106

1U_0402_6.3V6K
CC107

180P_0402_50V8J
CC108

1U_0402_6.3V6K
CC109

1U_0402_6.3V6K
CC110

1U_0402_6.3V6K
CC111

10U_0603_6.3V6M
CC112

10U_0603_6.3V6M
CC113

@ DC3 close to UCPU1

1 1 1 1 1 1 1 1 1 1 SA000066U00
L
2

JC1 1
2

@
2 2 2 2 2 2 2 2 2 2 JUMP_43X39 CC103
1

1U_0402_16V6K
2
1

+RTCBATT

180PX1 20mils
1UX4 2 1
10UX2 - +

1UX3
A A

JRTC1
LOTES_AAA-BAT-054-K01
CONN@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
POWER & DECOUPLING
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 8 of 47
5 4 3 2 1
 5 4 3 2 1

+3VALW

RPC11 CC1141 2 150P_0402_50V8J @ +3VALW

1 8 PBTN_OUT# UAPU1D CC115
2 7 FCH_PCIE_WAKE# ACPI/SD/AZ/GPIO/RTC/MISC 1 2
3 6 RTC_CLK_R RC1001 2 33_0402_5%LPC_RST_L AY4 BA23
28 LPC_RESET# LPC_RST_L SD_PWR_CTRL
4 5 APU_PCIE_RST#_C AY9 AY22 0.1U_0402_25V6
PCIE_RST_L SD_CLK/GPIO73

5
10K_0804_8P4R_5% EC_RSMRST#_R AY5 AY23 2 @

P
RSMRST_L SD_CMD/GPIO74 B
AY20 APU_PCIE_RST#_C RC1021 2 33_0402_5% 4
D SD_CD/GPIO75 Y PLT_RST# 11,22,24,31 D
PBTN_OUT# BA8 BA20 1
28 PBTN_OUT# PWR_BTN_L SD_WP/GPIO76 A

G
SYS_PWRGD AM19 1 1 U3
+3VALW 28 SYS_PWRGD PWR_GOOD
SYS_RESET# AY7 BA22 RC105 NC7SZ08P5X_NL_SC70-5
SYS_RESET_L/GEVENT19_L SD_DATA0/GPIO77

3
FCH_PCIE_WAKE# AW11 AY21 ESD@ CC121 CC116 @ 8.2K_0402_5%
WAKE_L/GEVENT8_L SD_DATA1/GPIO78
AY24 100P_0402_50V8J 150P_0402_50V8J
SD_DATA2/GPIO79 2 2
RC106 1 2 100K_0402_5% USB_OC0# SLP_S3# AY3 BA24
SLP_S3_L SD_DATA3/GPIO80

1
1 2 15K_0402_5% SYS_RESET# 28 SLP_S3# SLP_S5# BA5
RC107 SLP_S5_L
1 2 100K_0402_5% 28 SLP_S5# AY25
RC108 USB_OC1#
SD_LED/GPIO45 RC1091 @ 2 0_0402_5%
TEST0 AU13
TEST0
TEST1 AY10 AU25 APU_SCLK0
T17 TEST1/TMS SCL0/GPIO43 APU_SCLK0 18 +3VS
TEST2 AY6 AV25 APU_SDATA0
TEST2 SDA0/GPIO47 APU_SDATA0 18
EC_KBRST# AR23 SCL1/GPIO227 AY11 SIC
28 EC_KBRST# KBRST_L
EC_GA20 AR31 BA11 SID
28 EC_GA20 GA20IN/GEVENT0_L SDA1/GPIO228
TEST0 RC1191 2 15K_0402_5% EC_SCI# AN5
LPC_PME_L/GEVENT3_L
28 EC_SCI#
TEST2 RC1201 @ 2 15K_0402_5% EC_SMI# AL7
LPC_SMI_L/GEVENT23_L GPIO49
AP27 ODD_PWR APU_SCLK0 RC1111 2 2.2K_0402_5%
28 EC_SMI# AY28 ODD_PWR 23
GPIO50
APU_SDATA0 RC1121 2 2.2K_0402_5%
BA28 VGA_PWRGD
GPIO51 VGA_PWRGD 45 +3VALW
ODD_PLUG# AP15 AV23 DEVSLP0
23 ODD_PLUG# AC_PRES/IR_RX0/GEVENT16_L GPIO55 DEVSLP0 23
IR_TX0 AV13 AP21 FCH_GPIO57
+1.8VALW T21 IR_TX0/GEVENT21_L GPIO57
ODD_DA# BA9 BA26 FCH_GPIO58
23 ODD_DA# IR_TX1/GEVENT6_L GPIO58
IR_RX1 BA10 AV19
T23 IR_RX1/GEVENT20_L GPIO59
DC1 GPIO184 AV15 AY27 PXS_RST# SIC RC1131 2 10K_0402_1%
T24 IR_LED_L/LLB_L/GPIO184 GPIO64 PXS_RST# 11
RC1221 2 2.2K_0402_5% EC_RSMRST#_R 2 1 EC_RSMRST#
SPKR/GPIO66
BA27 APU_SPKR SID RC1141 2 10K_0402_1%
EC_RSMRST# 28 AU29 AU21 DGPU_PWR_EN APU_SPKR 26
CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60 GPIO68 DGPU_PWR_EN 13,28,45
CR_CLKREQ# AW29 AY26 DEVSLP0 RC1241
@RC124
@ 2 10K_0402_1%
RB751V-40_SOD323-2 24 CR_CLKREQ# CLK_REQ1_L/GPIO61 GPIO69
MINI1_CLKREQ# AR27 AV21
22 MINI1_CLKREQ# CLK_REQ2_L/GPIO62 GPIO70
LAN_CLKREQ# AV27 AM21 GPIO71 RC1261 @ 2 0_0402_5% EC_LID_OUT# RC1251 2 100K_0402_5%
24 LAN_CLKREQ# CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63 GPIO71 PROCHOT# 36,43,6
VGA_CLKREQ# AY29 GPIO174 BA3 GPIO174
12 VGA_CLKREQ# CLK_REQG_L/GPIO65/OSCIN
+3VS USB_OC0# AY8 AV17 GEVENT2_L
25 USB_OC0# USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L GEVENT2_L +3VALW
USB_OC1# AW1 BA4 SERR#_B
25 USB_OC1# USB_OC1_L/TDI/GEVENT13_L GEVENT4_L
USB_OC2# AV1 AR15
T26 USB_OC2_L/TCK/GEVENT14_L GEVENT7_L
RC1151 2 8.2K_0402_5% MINI1_CLKREQ#
T27
USB_OC3# AY1
USB_OC3_L/TDO/GEVENT15_L GEVENT10_L
AP17

2
RC1161 2 8.2K_0402_5% LAN_CLKREQ# 33ohm termination resistor at CODEC side GEVENT11_L
AP11
RC1171 2 8.2K_0402_5% CR_CLKREQ# HDA_BITCLK AN2
AZ_BITCLK GEVENT17_L
AN8 Beema@ RC131
C RC1211 @ 2 8.2K_0402_5% VGA_CLKREQ# HDA_SDOUT AN1
AZ_SDOUT BLINK/GEVENT18_L
AU17 SERR#_K 10K_0402_1% C
HDA_SDIN0 AK2 GEVENT22_L BA6 EC_LID_OUT#
26 HDA_SDIN0 AZ_SDIN0/GPIO167 EC_LID_OUT# 28
HDA_SDIN1 AK1 Kabini@ RK10
T29 AZ_SDIN1/GPIO168

1
HDA_SDIN2 AM1 BA29 0_0402_5%
T30 AZ_SDIN2/GPIO169 GENINT1_L/GPIO32 ACCEL_INT# 31
HDA_SDIN3 AL2 AP23 APU_BT_ON# SERR#_K 1 2 SERR#
T31 AZ_SDIN3/GPIO170 GENINT2_L/GPIO33 APU_BT_ON# 22 SERR# 28
RPC10 HDA_SYNC AM2
AZ_SYNC
1 8 HDA_RST# AL1 AV31 APU_WL_OFF# @RC135
@ RC135
AZ_RST_L FANOUT0/GPIO52 APU_WL_OFF# 22
2 7 HDA_RST# AU31 TS_GPIO_APU 2K_0402_5%
26 HDA_RST_AUDIO# FANIN0/GPIO56 TS_GPIO_APU 19
3 6 HDA_SYNC 1 2
26 HDA_SYNC_AUDIO 4 5 HDA_SDOUT 32K_X1 AJ2
26 HDA_SDOUT_AUDIO X32K_X1
Beema@ RK11
33_0804_8P4R_5% 0_0402_5%
AV11 RTC_CLK_R 1 2 SERR#_B 1 2
RTCCLK RTC_CLK 28
32K_X2 AJ1 RC141 22_0402_5%
X32K_X2
RC1011 EMI@ 2 33_0402_5%HDA_BITCLK
26 HDA_BITCLK_AUDIO +3VALW
+3VS For Strain pin, dont modify to R-Pak
FT3_BGA_769P-T_A39
Part Number = SA00006V710
GEVENT2_L RC1281 @ 2 10K_0402_1%
08/20 change to Sherk Crystal GPIO174 RC1301 @ 2 10K_0402_1%

CC117 22P_0402_50V8J
1 2 32K_X1
GEVENT2_L RC1341 2 2K_0402_5%

2
GPIO174 RC1361 2 10K_0402_1%
1

@R175
@ R175 @R176
@ R176
Y2 2.2K_0402_5% 2.2K_0402_5%
RC140 32.768KHZ Q13FC1350000500
20M_0402_5%
2

1
2

CC118 22P_0402_50V8J
1 2 32K_X2 FCH_GPIO57

Close to FT3 FCH_GPIO58 GPIO58 GPIO57

1
B UMA@R188
UMA@ R188 UMA@R189
UMA@ R189 ZSO41 L L B
R188
PX@ 10K_0402_5% 10K_0402_5% 14" UMA ( R188 ) ( R189 )
10K_0402_5%
SD028100280

2
ZSO41 L H
14" DIS ( R188 ) ( Internal PH )

ZSO51 H L
15" UMA ( Internal PH ) ( R189 )

ZSO51 H H
15" DIS ( Internal PH ) ( Internal PH )

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GEVENT_GPIO_SD
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A997P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 9 of 47

5 4 3 2 1

www.vinafix.vn
 5 4 3 2 1

P
a
n
e
D D

E
N
B
K
L

C C

P
a
n
e

E
N
V
D
B
D B

P
a
n
e

P
W
A
M A

Security Classification Compal Secret Data

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Level Shifter
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 10 of 47
5 4 3 2 1
 1 2 3 4 5

U666A PX@
AC Coupling Capacitor
PCIe Gen3: Recommended value is 220 nF
A A
PCIe Gen1 and Gen2 only: Recommended value is 100 nF
AF30 AH30 PCIE_GTX_ARX_P0 0.1U_0402_16V7K 2 1 PX@ C5187
5 PCIE_ATX_C_GRX_P0 PCIE_RX0P PCIE_TX0P PCIE_GTX_C_ARX_P0 5
AE31 AG31 PCIE_GTX_ARX_N0 0.1U_0402_16V7K 2 1 PX@ C5188
5 PCIE_ATX_C_GRX_N0 PCIE_RX0N PCIE_TX0N PCIE_GTX_C_ARX_N0 5

AE29 AG29 PCIE_GTX_ARX_P1 0.1U_0402_16V7K 2 1 PX@ C5189

5 PCIE_ATX_C_GRX_P1 PCIE_RX1P PCIE_TX1P PCIE_GTX_C_ARX_P1 5
AD28 AF28 PCIE_GTX_ARX_N1 0.1U_0402_16V7K 2 1 PX@ C5190
5 PCIE_ATX_C_GRX_N1 PCIE_RX1N PCIE_TX1N PCIE_GTX_C_ARX_N1 5

AD30 AF27 PCIE_GTX_ARX_P2 0.1U_0402_16V7K 2 1 PX@ C5191

5 PCIE_ATX_C_GRX_P2 PCIE_RX2P PCIE_TX2P PCIE_GTX_C_ARX_P2 5
AC31 AF26 PCIE_GTX_ARX_N2 0.1U_0402_16V7K 2 1 PX@ C5192
5 PCIE_ATX_C_GRX_N2 PCIE_RX2N PCIE_TX2N PCIE_GTX_C_ARX_N2 5

AC29 AD27 PCIE_GTX_ARX_P3 0.1U_0402_16V7K 2 1 PX@ C5193

5 PCIE_ATX_C_GRX_P3 PCIE_RX3P PCIE_TX3P PCIE_GTX_C_ARX_P3 5
AB28 AD26 PCIE_GTX_ARX_N3 0.1U_0402_16V7K 2 1 PX@ C5194
5 PCIE_ATX_C_GRX_N3 PCIE_RX3N PCIE_TX3N PCIE_GTX_C_ARX_N3 5
No Use GPU Display Port outpud
AB30 AC25
AA31 PCIE_RX4P PCIE_TX4P AB25
PCIE_RX4N PCIE_TX4N U666F PX@

AA29 Y23
Y28 PCIE_RX5P PCIE_TX5P Y24
PCIE_RX5N PCIE_TX5N AB11
VARY_BL AB12
Y30 AB27 DIGON
W31 PCIE_RX6P PCIE_TX6P AB26
PCIE_RX6N PCIE_TX6N

W29 Y27 AL15

V28 PCIE_RX7P PCIE_TX7P Y26 TXCAP_DPA3P AK14
PCIE_RX7N PCIE_TX7N TXCAM_DPA3N
B B
AH16
V30 W24 TX0P_DPA2P AJ15
U31 NC#V30 NC#W24 W23 TX0M_DPA2N
NC#U31 NC#W23 AL17
TX1P_DPA1P AK16
U29 V27 TX1M_DPA1N
T28 NC#U29 NC#V27 U26 AH18
NC#T28 NC#U26 TX2P_DPA0P AJ17
TX2M_DPA0N

PCI EXPRESS INTERFACE

T30 U24 AL19
R31 NC#T30 NC#U24 U23 NC_TXOUT_L3P AK18
NC#R31 NC#U23 NC_TXOUT_L3N

R29 T26 TMDP

P28 NC#R29 NC#T26 T27
NC#P28 NC#T27 AH20
TXCBP_DPB3P AJ19
P30 T24 TXCBM_DPB3N
N31 NC#P30 NC#T24 T23 AL21
NC#N31 NC#T23 TX3P_DPB2P AK20
TX3M_DPB2N
N29 P27 AH22
M28 NC#N29 NC#P27 P26 TX4P_DPB1P AJ21
NC#M28 NC#P26 TX4M_DPB1N
AL23
M30 P24 TX5P_DPB0P AK22
L31 NC#M30 NC#P24 P23 TX5M_DPB0N
NC#L31 NC#P23 AK24
NC_TXOUT_U3P AJ23
L29 M27 NC_TXOUT_U3N
K30 NC#L29 NC#M27 N26
NC#K30 NC#N26

C CLOCK 216-0841018 A0 SUN? PRO S3 C

CLK_PEG_VGA AK30
7 CLK_PEG_VGA PCIE_REFCLKP
CLK_PEG_VGA# AK32
7 CLK_PEG_VGA# PCIE_REFCLKN +0.95VS_VGA

CALIBRATION
Y22 R5159 1 PX@ 2 1.69K_0402_1%
PCIE_CALR_TX
R1400 1 PX@ 2 1K_0402_5% N10 AA22 R717 1 PX@ 2 1K_0402_1%
TEST_PG PCIE_CALR_RX

GPU_RST# AL27
PERSTB

216-0841018 A0 SUN PRO S3

+3VS_VGA +3VS
1

@ R1681 R1691
0_0402_5% 0_0402_5%
@
2
2
5

U6 PX@
PXS_RST# 2
P

9 PXS_RST# B 4 GPU_RST#
PLT_RST# 1 Y
22,24,31,9 PLT_RST# A
G

1
3

R1631
MC74VHC1G08DFT2G_SC70-5 100K_0402_5%
D D
PX@
2

Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2013/01/11 Deciphered Date 2013/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_PCIE/DP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-A997P
Tuesday, May 20, 2014 Sheet 11 of 47
1 2 3 4 5
 1 2 3 4 5

+3VS_VGA

EC_SMB_DA2 1 2 VGA_SMB_DA3
R162 @ 0_0402_5%
U666B PX@ +1.8VS_VGA
U? PS_0[3:1]=001 Strap Name :

1
EC_SMB_CK2 1 2 VGA_SMB_CK3
R164 @ 0_0402_5% R327 R328 PS_0[5:4]=11

1
10K_0402_5% 10K_0402_5% PS_0[1] ROM_CONFIG[0]
PX@ PX@ AF2 PX@
NC#AF2

2
AF4 R5165 PS_0[2] ROM_CONFIG[1]

2
NC#AF4 8.45K_0402_1%
6 1 VGA_SMB_DA3 1 N9 AG3 PS_0[3] ROM_CONFIG[2]
27,28,6 EC_SMB_DA2 T201

2
1 L9 DBG_DATA16 NC#AG3 AG5 PS_0
T202 DBG_DATA15 NC#AG5
Q2416A 1 AE9 DPA PS_0[4] N/A
T203 DBG_DATA14

1
ME2N7002D1KW-G 2N_SOT363-6 1 Y11 AH3
T204 1 AE8 DBG_DATA13 NC#AH3 AH1
PX@ PX@ PS_0[5] AUD_PORT_CONN_PINSTRAP[0]
T205 DBG_DATA12 NC#AH1

5
1 AD9 C=NC R5166
A T206 DBG_DATA11 A
1 AC10 AK3 2K_0402_1%
T207 DBG_DATA10 NC#AK3
3 4 VGA_SMB_CK3 1 AD7 AK1
27,28,6 EC_SMB_CK2 T208

2
1 AC8 DBG_DATA9 NC#AK1
T209 DVO
Q2416B 1 AC7 DBG_DATA8 AK5
T210 DBG_DATA7 NC#AK5
ME2N7002D1KW-G 2N_SOT363-6 1 AB9 AM3
T211 DBG_DATA6 NC#AM3
PX@ 1 AB8
T212 DBG_DATA5
1 AB7 AK6
T213 DBG_DATA4 NC#AK6
1 AB4 AM5 Resistor Divider Lookup Lable
T214 DBG_DATA3 NC#AM5
1 AB2 DPB
T215 1 Y8 DBG_DATA2 AJ7 +1.8VS_VGA
T216
1 Y7 DBG_DATA1 NC#AJ7 AH6
PS_1[3:1]=000 Strap Name :
+3VS_VGA T217 DBG_DATA0 NC#AH6 R_pu (ohm) R_pd (ohm) Bitd [3:1]
PS_1[5:4]=11

1
AK8 PS_1[1] STRAP_BIF_GEN3_EN_A
NC#AK8 AL7 @
NC#AL7 NC 4.75k 000 R5167 PS_1[2] TRAP_BIF_CLK_PM_EN
8
7
6
5

8.45k 2k 001 8.45K_0402_1%

RP35 W6 PS_1[3] N/A

2
V6 NC#W6 PS_1
10K_8P4R_5% NC#V6 V4
4.53k 2k 010
PX@ NC#V4 PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING

1
AC6 U5 6.98k 4.99k 011
1
2
3
4

AC5 NC#AC5 NC#U5 PX@

NC#AC6 W3 R5168
PS_1[5] STRAP_TX_DEEMPH_EN
VGA_AC_BATT_R AA5 NC#W3 V2
4.53k 4.99k 100 C=NC 4.75K_0402_1%
AA6 NC#AA5 NC#V2
DPC 3.24k 5.62k 101

2
NC#AA6 Y4
NC#Y4
6

ME2N7002D1KW-G 2N_SOT363-6

W5 3.4k 10k 110

NC#W5
U1 AA3 4.75k NC 111
2 W1 NC#U1 NC#AA3 Y2
U3 NC#W1 NC#Y2
PX@Q16B
PX@Q16B PX@ Q16A Y6 NC#U3 J8
0402 1% resistors are equired
1

NC#Y6 NC#J8
3

ME2N7002D1KW-G 2N_SOT363-6

AA1 +1.8VS_VGA
NC#AA1 PS_2[3:1]=000 Strap Name :
5
PS_2[5:4]=11
28 VGA_AC_BATT Capacitor Divider Lookup Lable PS_2[1] N/A
R=NC
I2C PS_2[2] N/A
4

B R1
Cap (nF) Bitd [5:4] B
R3 SCL PS_2
PS_2[3] STRAP_BIOS_ROM_EN
SDA
680nF 00 PS_2[4] STRAP_BIF_VGA_DIS

1
AM26 1
R AK26 PX@
GPU_GPIO0 U6
GENERAL PURPOSE I/O AVSSN#AK26 82nF 01 C5203 R5164
PS_2[5] N/A
1 2 45 GPU_GPIO0 U10 GPIO_0 AL25 10nF 10 0.082U_0402_16V6K 4.75K_0402_1%
R174 @ 0_0402_5% T10 GPIO_1 G AJ25 2

2
+3VS_VGA VGA_SMB_DA3 U8 GPIO_2 AVSSN#AJ25
VGA_SMB_CK3 U7 SMBDATA AH24
NC 11
VGA_AC_BATT 28,36,37,38 ACIN
ACIN 1 2 T9 SMBCLK
GPIO_5_AC_BATT
B
AVSSN#AG25
AG25
R165 @ 0_0402_5% T8
R1444 1 @ 2 100K_0402_5% ACIN pull up VGA_AC_BATT_R 1 2 T7 GPIO_6
GPIO_7_BLON
DAC1
HSYNC
AH26
R1445 1 @ 2 100K_0402_5% VGA_AC_BATT_R R1661 PX@ 0_0402_5% P10 AJ27 ZZZ ZZZ ZZZ
P4 GPIO_8_ROMSO VSYNC
P2 GPIO_9_ROMSI +1.8VS_VGA
N6 GPIO_10_ROMSCK AD22
PS_3[3:1]=000 Strap Name :
N5 GPIO_11 RSET
GPIO_12 PS_3[5:4]=11

1
N3 AG24 PS_3[1] BOARD_CONFIG[0] (Memory ID)
Y9 GPIO_13 AVDD AE22 @
GPU_VID1 N1 GPIO_14_HPD2 AVSSQ SAM_1G@ HYX_1G@ MIC_1G@ R5174
+3VS_VGA 45 GPU_VID1
M4 GPIO_15_PWRCNTL_0 AE23 8.45K_0402_1%
PS_3[2] BOARD_CONFIG[1] (Memory ID)
GPIO_16 VDD1DI 1G SAMSUNG 1G HYNIX 1G MICRON
GPU_GPIO17 R6 AD23 X7654132L13 X7654132L02 X7654132L03 PS_3[3] BOARD_CONFIG[2] (Memory ID)

2
W10 GPIO_17_THERMAL_INT VSS1DI PS_3
@ RP34 T291 1 GPIO19_CTF M2 GPIO_18 ZZZ ZZZ ZZZ
GPIO_19_CTF FutureASIC/SEYMOUR/PARK PS_3[4] AUD_PORT_CONN_PINSTRAP[1]

1
1 8 JTAG_TRSTB GPU_VID2 P8 AM12
2 7 45 GPU_VID2 P7 GPIO_20_PWRCNTL_1 CEC_1
JTAG_TDI GPU_VID5 @ PS_3[5] AUD_PORT_CONN_PINSTRAP[2]
45 GPU_VID5 GPIO_21
3 6 JTAG_TMS N8 C=NC R5169
4 5 JTAG_TCK GPU_VID4 AK10 GPIO_22_ROMCSB AK12 2K_0402_1%
45 GPU_VID4 GPIO_29 RSVD#AK12
GPU_VID3 AM10 AL11
45 GPU_VID3

2
10K_8P4R_5% 1 2 VGA_CLKREQ#_R N7 GPIO_30 RSVD#AL11 AJ11
9 VGA_CLKREQ# CLKREQB RSVD#AJ11 SAM_2G@ MIC_2G@ HYX_2G@
PX@R167
PX@R167 0_0402_5% JTAG_TRSTB L6 2G SAMSUNG 2G MICRON 2G HYNIX
JTAG_TDI L5 JTAG_TRSTB X7654132L04 X7654132L05 X7654132L14
@ C5213 JTAG_TCK L3 JTAG_TDI
1 JTAG_TCK
68P_0402_50V8J JTAG_TMS L1 AL13
RF T70 1 JTAG_TDO
TESTEN
K4
K7
JTAG_TMS
JTAG_TDO
GENLK_CLK
GENLK_VSYNC
AJ13

C 2 AF24 TESTEN C
NC#AF24 AG13 Memory ID Memory Type Configuration Size R5174 R5169 X76 P/N
R1446 1 PX@ 2 GPIO19_CTF SWAPLOCKA AH12
10K_0402_5% AB13 SWAPLOCKB
R1443 1 PX@ 2 VGA_CLKREQ# W8 GENERICA
10K_0402_5% W9 GENERICB 000 SA000068U40 Samsung K4W2G1646E-BC1A 1GB NC 4.75K X7654132L01
R1439 1 PX@ 2 TESTEN W7 GENERICC AC19 PS_0
1K_0402_5% AD10 GENERICD PS_0
AJ9 GENERICE AD19 PS_1 001 SA000067500 Micron MT41J128M16JT-093G:K 1GB 8.45K 2K X7654132L03
NC#AJ9 PS_1
(default)
AL9
NC#AL9 AE17 PS_2
AC14 PS_2 010 SA00006H400 Hynix H5TC2G63FFR-11C 1GB 4.53K 2K X7654132L02
1 AB16 HPD1 AE20 PS_3
T218 PX_EN PS_3
011 SA000076P00 Samsung K4W4G1646D-BC1A 2GB 6.98K 4.99K X7654132L04
AE19
1 AC16 TS_A
T221 DBG_VREFG 100 SA000077K00 Micron MT41J256M16HA-093G:E 2GB 4.53K 4.99K X7654132L05
XTALIN R349 1 PX@ 2 XTALOUT
10M_0402_5% DDC/AUX
101 SA00006E800 Hynix H5TC4G63AFR-11C 2GB 3.24K 5.62K X7654132L06
AE6
PLL/CLOCK DDC1CLK AE5
Y6 PX@ DDC1DATA
4 3 AD2
NC OSC AUX1P AD4
1 2 AUX1N
OSC NC AC11
27MHZ 10PF +-10PPM 7V27000050 DDC2CLK AC13
2 2 DDC2DATA
C341 SJ100009700 C350
8.2P_0402_50V_NPO 8.2P_0402_50V_NPO XTALIN AM28 AD13 External VGA Thermal Sensor
PX@ PX@ XTALOUT AK28 XTALIN AUX2P AD11
1 1 XTALOUT AUX2N +3VS_VGA PX@
1 AC22 AD20 PX@ UV13
T219 XO_IN NC#AD20
R1442 1 PX@ 2 10K_0402_5% 1 AB22 AC20 2 1 1 8 VGA_SMB_CK3
T220 XO_IN2 NC#AC20 CV271 0.1U_0402_16V4Z VDD SCLK
Enable MLPS AE16 THERM_D+ 2 7 VGA_SMB_DA3
NC#AE16 AD16 CV272 D+ SDATA
D NC#AD16 1 2 3 6 2 PX@ 1 D
D- ALERT# +3VS_VGA
SEYMOUR/FutureASIC AC1 THERM_D- PX@ RV134 2.2K_0402_5%
+1.8VS_VGA THERM_D+ T4 DDCVGACLK AC3 2200P_0402_50V7K 4 5 1 @ 2 GPU_GPIO17
L54 PX@ THERM_D- T2 DPLUS THERMAL DDCVGADATA 2 PX@ 1 THERM# GND R168 0_0402_5%
1 2 13mA DMINUS +3VS_VGA
RV133 2.2K_0402_5%
BLM15BD121SN1D_0402 ADM1032ARMZ-2REEL_MSOP8
GPIO28 R5
C414 2 PX@1 10U_0603_6.3V6M +TSVDD AD17 GPIO28_FDO
AC17 TSVDD
C421 2 PX@1 1U_0402_6.3V4Z TSVSS

C438 2 PX@1 0.1U_0402_10V6K Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
216-0841018 A0 SUN PRO ?S3
Issued Date 2013/01/11 Deciphered Date 2013/12/31 SUN_MSIC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-A997P
Tuesday, May 20, 2014 Sheet 12 of 47
1 2 3 4 5
 1 2 3 4 5

+1.5VS to +1.5VS_VGA (2.096A) U666E PX@ U?

+1.5VS +1.5VS_VGA
U4101 PX@ AA27 A3
AO4354_SO8 370mA (HDMI) No Use GPU Display Port outpud AB24 GND GND A30
8 1 +1.8VS_VGA AB32 GND GND AA13
7 2 188mA (Display Port) AC24 GND GND AA16
GND GND

2
0.1U_0402_16V7K
6 3 R319 1 @ 2 +DP_VDDR U666G PX@ U? AC26 AB10
GND GND

10U_0603_6.3V6M

1U_0402_6.3V4Z
1 5 1 1 0_0603_5% AC27 AB15
GND GND

C4105

C4106

C4107
R4102 AD25 AB6

C446

C447
DP POWER NC/DP POWER
10_0603_5% AD32 GND GND AC9
1 1

4
PX@ AG15 AE11 AE27 GND GND AD6
A A

31
2 PX@ 2 PX@ 2 PX@ AG16 DP_VDDR#AG15 NC#AE11 AF11 AF32 GND GND AD8
AF16 DP_VDDR#AG16 NC#AF11 AE13 AG27 GND GND AE7

0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 AG17 DP_VDDR#AF16 NC#AE13 AF13 AH32 GND GND AG12
DP_VDDR#AG17 NC#AF13 GND GND

@
5 PXS_PWREN# AG18 AG8 K28 AH10
AG19 DP_VDDR#AG18 NC#AG8 AG10 K32 GND GND AH28
1 2 1.5VSG_GATE QV4101B AF14 DP_VDDR#AG19 NC#AG10 L27 GND GND B10
B+

4
R4101 200K_0402_5% ME2N7002D1KW-G 2N_SOT363-6 DP_VDDR#AF14 M32 GND GND B12
PX@ PX@ N25 GND GND B14
GND GND

1
1 N27 B16
R4103 C4109 P25 GND GND B18
0.01U_0402_25V7K AG20 AF6 P32 GND GND B20
1.5M_0402_5% DP_VDDC#AG20 NC#AF6 GND GND
PXS_PWREN# 2 @ PX@ AG21 AF7 R27 B22
2 +0.95VS_VGA AF22 DP_VDDC#AG21 NC#AF7 AF8 T25 GND GND B24
280mA

2
AG22 DP_VDDC#AF22 NC#AF8 AF9 T32 GND GND B26

1
QV4101A R320 1 @ 2 +DP_VDDC AD14 DP_VDDC#AG22 NC#AF9 U25 GND GND B6
ME2N7002D1KW-G 2N_SOT363-6 0_0603_5% DP_VDDC#AD14 U27 GND GND B8
PX@ V32 GND GND C1

C450

C451
W25 GND GND C32
1 1 GND GND
AG14 AE1 W26 E28
AH14 DP_VSSR NC#AE1 AE3 W27 GND GND F10
AM14 DP_VSSR NC#AE3 AG1 Y25 GND GND F12

0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 AM16 DP_VSSR NC#AG1 AG6 Y32 GND GND F14
DP_VSSR NC#AG6 GND GND

@
AM18 AH5 F16
AF23 DP_VSSR NC#AH5 AF10 GND F18
AG23 DP_VSSR NC#AF10 AG9 GND F2
AM20 DP_VSSR NC#AG9 AH8 GND F20
AM22 DP_VSSR NC#AH8 AM6 M6 GND F22
AM24 DP_VSSR NC#AM6 AM8 N13 GND GND F24
AF19 DP_VSSR NC#AM8 AG7 N16 GND GND F26
AF20 DP_VSSR NC#AG7 AG11 N18 GND GND F6
AE14 DP_VSSR NC#AG11 N21 GND GND
GND F8
DP_VSSR P6 GND GND G10
P9 GND GND G27
R12 GND GND G31
B
AF17 AE10 R15 GND GND G8 B

+3VS to +3VS_VGA (25mA) DPAB_CALR NC#AE10 R17

R20
GND
GND
GND
GND
H14
H17
GND GND
+1.8VS_VGA +VGA_CORE T13 H2
+1.8VALW to +1.8VS_VGA (311mA) 216-0841018 A0 SUN PRO? S3
T16
T18
GND
GND
GND
GND
H20
H6
U4103 JG3 @ T21 GND GND J27
1 14
60mA 1 2 T6 GND GND J31
+3VS VIN1 VOUT1 +3VS_VGA GND GND
2 13 U15 K11
VIN1 VOUT1 GND GND
0.1U_0402_16V7K

0.1U_0402_16V7K
1 PAD-OPEN 4x4m 1 U17 K2
GND GND
C4111

C4124
DGPU_PWR_EN 3 12 C4112 1 2 PX@ U20 K22
ON1 CT1 470P_0402_50V7K U9 GND GND K6
4 11 V13 GND GND
2 PX@ +5VALW VBIAS GND 2 PX@ GND
V16
DGPU_PWR_EN 5 10 C4126 1 2 PX@ V18 GND
ON2 CT2 2200P_0402_50V7K Y10 GND
6 9 JG18 @ Y15 GND
7 VIN2 VOUT2 8
818mA 1 2 Y17 GND
+1.8VALW VIN2 VOUT2 +1.8VS_VGA GND
Y20
GND
0.1U_0402_16V7K

0.1U_0402_25V6
1 15 PAD-OPEN 4x4m 1 R11 A32
GPAD GND VSS_MECH

2
C4123

C4125
T11 AM1
TPS22966DPUR_SON14_2X3 PX@ AA11 GND VSS_MECH AM32
PX@ R346 M12 GND VSS_MECH
2 PX@ 2 PX@ 10_0603_5% N11 GND
V11 GND

1
GND

1
D Q91
Main: SA00004MM00, TI, TPS22966
2 PXS_PWREN# ?
216-0841018 A0 SUN PRO S3
2nd: SA00006FD00, A-Power, APE8990GN3B
G
3rd: AOS, AOZ1331 (engineering sample available on 2013/Jan/18) S PX@
3

ME2N7002D1W-G 1N_SC70-3

C C

+0.95VALW to +0.95VSG (4.016A)

+0.95VALW +0.95VS_VGA +5VALW
U4102 PX@ +VGA_CORE
AO4354_SO8

2
8 1

2
7 2 R4113
2
0.1U_0402_16V7K

6 3 100K_0402_5% R4114
10U_0603_6.3V6M

1U_0402_6.3V4Z

1 5 1 1 PX@ 470_0603_5%
C4113

C4114

C4115

R4107 PX@

3 1

ME2N7002D1KW-G 2N_SOT363-6

ME2N7002D1KW-G 2N_SOT363-6
10_0603_5% PXS_PWREN#
4

6 1
PX@
3 1

2 PX@ 2 PX@ 2 PX@

DGPU_PWR_EN 5
28,45,9 DGPU_PWR_EN
2 PXS_PWREN#

1
5 PXS_PWREN# Q4105B

4
B+ 1 2 0.95VSG_GATE R4115 PX@ Q4105A

1
R4109 200K_0402_5% Q4102B 100K_0402_5% PX@
4

PX@ ME2N7002D1KW-G 2N_SOT363-6 PX@

1

1 PX@

2
6

R4104 C4122
1.5M_0402_5% 0.01U_0402_25V7K
D D
@ PX@
PXS_PWREN# 2 2
2

Q4102A
1

ME2N7002D1KW-G 2N_SOT363-6
PX@

Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2013/01/11 Deciphered Date 2013/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_Power/GND
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-A997P
Tuesday, May 20, 2014 Sheet 13 of 47
1 2 3 4 5
 1 2 3 4 5

+1.5VS_VGA

A
+VGA_CORE 10uF 1uF 0.1uF A

C365

C367

C375

C370

C371

C372

C373

C374
1 1 1 1 1 1 1 1
VDDC TBD 5 (1@) 10 (2@) 0 +PCIE_PVDD:
+1.8VS_VGA
U666D PX@ U? 50mA (PCIE2.0)

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

2.2U_0402_6.3V5M

2.2U_0402_6.3V5M

2.2U_0402_6.3V5M

2.2U_0402_6.3V5M

2.2U_0402_6.3V5M
2 2 2 2 2 2 2 2
80mA (PCIE3.0)

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@
AM30
VDDCI 3.5A 1 3 0 1A MEM I/O PCIE_PVDD

PCIE

C380

C387

C394
H13 AB23 1 1 1
H16 VDDR1 NC#AB23 AC23
H19 VDDR1 NC#AC23 AD24
J10 VDDR1 NC#AD24 AE24

10U_0603_6.3V6M

0.1U_0402_10V6K
1U_0402_6.3V4Z
J23 VDDR1 NC#AE24 AE25 2 2 2
+0.95VS_VGA 10uF 1uF 0.1uF VDDR1 NC#AE25

PX@

PX@

PX@
J24 AE26
J9 VDDR1 NC#AE26 AF25
K10 VDDR1 NC#AF25 AG26
K23 VDDR1 NC#AG26
PCIE_VDDC 2.5A 2 (1@) 5 (1@) 0 K24 VDDR1
K9 VDDR1 L23

C389

C390

C391

C381

C392
C3719

C3720

C3721

C3722

C3723
0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K

0.01U_0402_16V7K
L11 VDDR1 PCIE_VDDC L24
2 2 2 2 2 1 1 1 1 1 VDDR1 PCIE_VDDC
L12 L25
BIF_VDDC 1.4A 0 0 0 L13 VDDR1 PCIE_VDDC L26 +PCIE_VDDC:
VDDR1 PCIE_VDDC +0.95VS_VGA
L20 M22 1.88A (PCIE2.0)

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
1 1 1 1 1 2 2 2 2 2 VDDR1 PCIE_VDDC

PX@

PX@

PX@

PX@

PX@
L21 N22
VDDR1 PCIE_VDDC
2.5A (PCIE3.0)

PX@

PX@

PX@

PX@

PX@
L22 N23
SPLL_VDDC 100mA 1 1 1 VDDR1 PCIE_VDDC N24
PCIE_VDDC R22
PCIE_VDDC T22

C384

C386

C398

C399

C383

C403

C388

C3724

C3725
+1.8VS_VGA 13mA LEVEL PCIE_VDDC U22 1 1 1 1 1 1 1 1 1

1U_0402_6.3V6K

1U_0402_6.3V6K
L56 PX@ TRANSLATION PCIE_VDDC V22
1 2 +VDD_CT AA20 PCIE_VDDC
+1.5VS_VGA 10uF 1uF 0.1uF BLM15BD121SN1D_0402 AA21 VDD_CT

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z
AB20 VDD_CT AA15 2 2 2 2 2 2 2 2 2

C404

C405

C422
B VDD_CT CORE VDDC B

PX@

PX@

PX@

PX@

PX@

PX@

PX@
@

@
1 1 1 AB21 N15
VDD_CT VDDC N17
VDDR1 1.5A 3 5 5 +3VS_VGA VDDC R13
L24 PX@ 25mA I/O VDDC R16

10U_0603_6.3V6M

0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2 1 2 +VDDR3 AA17 VDDC R18
VDDR3 VDDC

PX@

PX@

PX@
BLM15BD121SN1D_0402 AA18 Y21
AB17 VDDR3 VDDC T12

C410

C428

C429

C417
AB18 VDDR3 VDDC T15 +VGA_CORE
+1.8VS_VGA 10uF 1uF 0.1uF 1 1 1 1 VDDR3 VDDC T17
V12 VDDC T20
Y12 VDDR4 VDDC U13

10U_0603_6.3V6M
1U_0402_6.3V4Z

1U_0402_6.3V4Z

0.1U_0402_10V6K
2 2 2 2 U12 VDDR4 VDDC U16
PCIE_PVDD 100mA 1 1 1 VDDR4 VDDC

PX@

PX@

PX@
@
U18
VDDC V21
VDDC V15
VDDC V17
MPLL_PVDD 130mA 1 1 1 VDDC V20
VDDC

POWER
Y13
VDDC Y16
VDDC Y18
SPLL_PVDD 75mA 1 1 1 VDDC AA12
VDDC M11
VDDC N12 21A (VDDC + VDDCI (Merged) - PRO S3 (DDR3))
VDDC U11
VDDR4 (300mA) 0 0 0 VDDC
+1.8VS_VGA
L47 PX@ 90mA PLL
1 2 +MPLL_PVDD
VDD_CT 13mA 1 1 1 MBK1608221YZF_2P
C406

C407

C433

1 1 1
1.4A +0.95VS_VGA
R21 R398
BIF_VDDC U21 +BIF_VDDC 1 2
+TSVDD 13mA 1 1 1 BIF_VDDC
10U_0603_6.3V6M

0.1U_0402_10V6K
1U_0402_6.3V4Z

2 2 2 L8 0_0805_5%
+1.8VS_VGA MPLL_PVDD
PX@

PX@

PX@

@
C
L48 PX@ 75mA +VGA_CORE
C

C413

C415

C416
+DP_VDDR 0 0 0 1 2 +SPLL_PVDD
ISOLATED
CORE I/O 1 1 1
BLM15BD121SN1D_0402 M13
C408

C409

C434
H7 VDDCI M15
1 1 1 SPLL_PVDD VDDCI M16
+DP_VDDC 0 0 0

10U_0603_6.3V6M

1U_0402_6.3V4Z

1U_0402_6.3V4Z
VDDCI M17 2 2 2
+0.95VS_VGA VDDCI

@
M18
100mA
10U_0603_6.3V6M

0.1U_0402_10V6K
1U_0402_6.3V4Z

2 2 2 L53 PX@ VDDCI M20

VDDCI
PX@

PX@

PX@

1 2 +SPLL_VDDC H8 M21
BLM15BD121SN1D_0402 SPLL_VDDC VDDCI N20

C411

C412

C435
J7 VDDCI
+3VS_VGA 10uF 1uF 0.1uF 1 1 1 SPLL_PVSS

10U_0603_6.3V6M

0.1U_0402_10V6K
1U_0402_6.3V4Z
2 2 2
VDDR3 25mA 0 2 (1@) 1

PX@

PX@

PX@
216-0841018 A0 SUN PRO S3?

D D

Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2013/01/11 Deciphered Date 2013/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_Power
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-A997P
Tuesday, May 20, 2014 Sheet 14 of 47
1 2 3 4 5
 1 2 3 4 5

M_DA[63..0]
16,17 M_DA[63..0]
M_MA[15..0]
16,17 M_MA[15..0]
M_DQM[7..0]
16,17 M_DQM[7..0]
M_DQS[7..0]
16,17 M_DQS[7..0]
A A
M_DQS#[7..0]
16,17 M_DQS#[7..0]

PX@
U666C U?

GDDR5/DDR3 GDDR5/DDR3
M_DA0 K27 K17 M_MA0
M_DA1 J29 DQA0_0 MAA0_0/MAA_0 J20 M_MA1
M_DA2 H30 DQA0_1 MAA0_1/MAA_1 H23 M_MA2
M_DA3 H32 DQA0_2 MAA0_2/MAA_2 G23 M_MA3
M_DA4 G29 DQA0_3 MAA0_3/MAA_3 G24 M_MA4
M_DA5 F28 DQA0_4 MAA0_4/MAA_4 H24 M_MA5
M_DA6 F32 DQA0_5 MAA0_5/MAA_5 J19 M_MA6
+1.5VS_VGA +1.5VS_VGA M_DA7 F30 DQA0_6 MAA0_6/MAA_6 K19 M_MA7
M_DA8 C30 DQA0_7 MAA0_7/MAA_7 G20 M_MA13
M_DA9 F27 DQA0_8 MAA0_8/MAA_13 L17 M_MA15
M_DA10 A28 DQA0_9 MAA0_9/MAA_15
DQA0_10
1

1
M_DA11 C28 J14 M_MA8
PX@ PX@ M_DA12 E27 DQA0_11 MAA1_0/MAA_8 K14 M_MA9
R363 R365 M_DA13 G26 DQA0_12 MAA1_1/MAA_9 J11 M_MA10
40.2_0402_1% 40.2_0402_1% M_DA14 D26 DQA0_13 MAA1_2/MAA_10 J13 M_MA11
M_DA15 F25 DQA0_14 MAA1_3/MAA_11 H11 M_MA12
2

M_DA16 A25 DQA0_15 MAA1_4/MAA_12 G11 M_BA2

DQA0_16 MAA1_5/MAA_BA2 M_BA2 16,17
+MVREFDA +MVREFSA M_DA17 C25 J16 M_BA0
DQA0_17 MAA1_6/MAA_BA0 M_BA0 16,17
M_DA18 E25 L15 M_BA1
DQA0_18 MAA1_7/MAA_BA1 M_BA1 16,17
M_DA19 D24 G14 M_MA14
DQA0_19 MAA1_8/MAA_14
1

1 1 M_DA20 E23 L16

MEMORY INTERFACE
PX@ PX@ PX@ PX@ M_DA21 F23 DQA0_20 MAA1_9/RSVD
R364 C467 R457 C514 M_DA22 D22 DQA0_21 E32 M_DQM0
100_0402_1% 1U_0402_6.3V4Z 100_0402_1% 1U_0402_6.3V4Z M_DA23 F21 DQA0_22 WCKA0_0/DQMA0_0 E30 M_DQM1
2 2 M_DA24 E21 DQA0_23 WCKA0B_0/DQMA0_1 A21 M_DQM2
2

M_DA25 D20 DQA0_24 WCKA0_1/DQMA0_2 C21 M_DQM3

M_DA26 F19 DQA0_25 WCKA0B_1/DQMA0_3 E13 M_DQM4
B
M_DA27 A19 DQA0_26 WCKA1_0/DQMA1_0 D12 M_DQM5 B
M_DA28 D18 DQA0_27 WCKA1B_0/DQMA1_1 E3 M_DQM6
M_DA29 F17 DQA0_28 WCKA1_1/DQMA1_2 F4 M_DQM7
M_DA30 A17 DQA0_29 WCKA1B_1/DQMA1_3
M_DA31 C17 DQA0_30 H28 M_DQS0
M_DA32 E17 DQA0_31 EDCA0_0/QSA0_0 C27 M_DQS1
M_DA33 D16 DQA1_0 EDCA0_1/QSA0_1 A23 M_DQS2
M_DA34 F15 DQA1_1 EDCA0_2/QSA0_2 E19 M_DQS3
M_DA35 A15 DQA1_2 EDCA0_3/QSA0_3 E15 M_DQS4
M_DA36 D14 DQA1_3 EDCA1_0/QSA1_0 D10 M_DQS5
PX@ PX@ M_DA37 F13 DQA1_4 EDCA1_1/QSA1_1 D6 M_DQS6
R5160 R455 M_DA38 A13 DQA1_5 EDCA1_2/QSA1_2 G5 M_DQS7
49.9_0402_1% 10_0402_1% M_DA39 C13 DQA1_6 EDCA1_3/QSA1_3
1 2 2 1 DRAM_RST M_DA40 E11 DQA1_7 H27 M_DQS#0
16,17 DRAM_RST# DQA1_8 DDBIA0_0/QSA0_0B
M_DA41 A11 A27 M_DQS#1
M_DA42 C11 DQA1_9 DDBIA0_1/QSA0_1B C23 M_DQS#2
DQA1_10 DDBIA0_2/QSA0_2B
1

1 M_DA43 F11 C19 M_DQS#3

PX@ PX@ M_DA44 A9 DQA1_11 DDBIA0_3/QSA0_3B C15 M_DQS#4
C469 R5161 M_DA45 C9 DQA1_12 DDBIA1_0/QSA1_0B E9 M_DQS#5
120P_0402_50V8J 5.1K_0402_1% M_DA46 F9 DQA1_13 DDBIA1_1/QSA1_1B C5 M_DQS#6
2 M_DA47 D8 DQA1_14 DDBIA1_2/QSA1_2B H4 M_DQS#7
2

M_DA48 E7 DQA1_15 DDBIA1_3/QSA1_3B

M_DA49 A7 DQA1_16 L18 VRAM_ODT0
DQA1_17 ADBIA0/ODTA0 VRAM_ODT0 16
M_DA50 C7 K16 VRAM_ODT1
DQA1_18 ADBIA1/ODTA1 VRAM_ODT1 17
M_DA51 F7
M_DA52 A5 DQA1_19 H26 M_CLK0
DQA1_20 CLKA0 M_CLK0 16
M_DA53 E5 H25 M_CLK#0
DQA1_21 CLKA0B M_CLK#0 16
M_DA54 C3
M_DA55 E1 DQA1_22 G9 M_CLK1
Place close to GPU (within 25mm) M_DA56 G7 DQA1_23 CLKA1 H9 M_CLK#1
M_CLK1 17
DQA1_24 CLKA1B M_CLK#1 17
and place componment close to each other M_DA57 G6
DQA1_25
M_DA58 G1 G22 M_RAS#0
DQA1_26 RASA0B M_RAS#0 16
M_DA59 G3 G17 M_RAS#1
DQA1_27 RASA1B M_RAS#1 17
M_DA60 J6
M_DA61 J1 DQA1_28 G19 M_CAS#0
C C
DQA1_29 CASA0B M_CAS#0 16
M_DA62 J3 G16 M_CAS#1
DQA1_30 CASA1B M_CAS#1 17
M_DA63 J5
DQA1_31 H22 M_CS#0
CSA0B_0 M_CS#0 16
+MVREFDA K26 J22
+MVREFSA J26 MVREFDA CSA0B_1
MVREFSA G13 M_CS#1
CSA1B_0 M_CS#1 17
J25 K13
R5162 1 PX@ 2 120_0402_1% K25 NC#J25 CSA1B_1
MEM_CALRP0 K20 M_CKE0
CKEA0 M_CKE0 16
J17 M_CKE1
CKEA1 M_CKE1 17
G25 M_WE#0
WEA0B M_WE#0 16
DRAM_RST L10 H10 M_WE#1
DRAM_RST WEA1B M_WE#1 17
R460 @ 1 2 51.1_0402_1% C542 @1
@ 2 0.1U_0402_16V4Z K8
R373 @ 1 2 51.1_0402_1% C541 @
@1 2 L7 CLKTESTA
0.1U_0402_16V4Z CLKTESTB

Route 50ohms single-ended/100ohm diff and keep short

216-0841018 A0 SUN PRO S3
debug only, for clock observation,if not need, DNI. ?

D D

Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2013/01/11 Deciphered Date 2013/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_MEM
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-A997P
Tuesday, May 20, 2014 Sheet 15 of 47
1 2 3 4 5
 1 2 3 4 5

Memory Partition A - Lower 32 bits

M_DA[63..0]
15,17 M_DA[63..0]
M_MA[15..0]
15,17 M_MA[15..0]
M_DQM[7..0]
15,17 M_DQM[7..0]
M_DQS[7..0]
15,17 M_DQS[7..0]
M_DQS#[7..0]
15,17 M_DQS#[7..0]
+1.5VS_VGA +1.5VS_VGA
A A

1
PX@ PX@
R452 R463
4.99K_0402_1% U1406 4.99K_0402_1% U1407

2
+FBA_VREF0 M8 E3 M_DA17 +FBA_VREF1 M8 E3 M_DA30
H1 VREFCA DQL0 F7 M_DA23 H1 VREFCA DQL0 F7 M_DA27
VREFDQ DQL1 F2 M_DA21 VREFDQ DQL1 F2 M_DA31
DQL2 DQL2

1
1 M_MA0 N3 F8 M_DA22 1 M_MA0 N3 F8 M_DA24
PX@ PX@ M_MA1 P7 A0 DQL3 H3 M_DA18 PX@ PX@ M_MA1 P7 A0 DQL3 H3 M_DA29
R453 C472 M_MA2 P3 A1 DQL4 H8 M_DA19 R464 C540 M_MA2 P3 A1 DQL4 H8 M_DA26
4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA16 4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA28
2 M_MA4 P8 A3 DQL6 H7 M_DA20 2 M_MA4 P8 A3 DQL6 H7 M_DA25

2
M_MA5 P2 A4 DQL7 M_MA5 P2 A4 DQL7
M_MA6 R8 A5 M_MA6 R8 A5
M_MA7 R2 A6 D7 M_DA5 M_MA7 R2 A6 D7 M_DA8
M_MA8 T8 A7 DQU0 C3 M_DA3 M_MA8 T8 A7 DQU0 C3 M_DA14
M_MA9 R3 A8 DQU1 C8 M_DA4 M_MA9 R3 A8 DQU1 C8 M_DA9
M_MA10 L7 A9 DQU2 C2 M_DA1 M_MA10 L7 A9 DQU2 C2 M_DA12
M_MA11 R7 A10/AP DQU3 A7 M_DA6 M_MA11 R7 A10/AP DQU3 A7 M_DA10
M_MA12 N7 A11 DQU4 A2 M_DA0 M_MA12 N7 A11 DQU4 A2 M_DA15
M_MA13 T3 A12 DQU5 B8 M_DA7 M_MA13 T3 A12 DQU5 B8 M_DA11
M_MA14 T7 A13 DQU6 A3 M_DA2 M_MA14 T7 A13 DQU6 A3 M_DA13
M_MA15 M7 A14 DQU7 M_MA15 M7 A14 DQU7
A15/BA3 +1.5VS_VGA A15/BA3 +1.5VS_VGA

M_BA0 M2 B2 M_BA0 M2 B2
15,17 M_BA0 BA0 VDD BA0 VDD
M_BA1 N8 D9 M_BA1 N8 D9
15,17 M_BA1 BA1 VDD BA1 VDD
M_BA2 M3 G7 M_BA2 M3 G7
15,17 M_BA2 BA2 VDD BA2 VDD
K2 K2
VDD K8 VDD K8
VDD N1 VDD N1
M_CLK0 J7 VDD N9 M_CLK0 J7 VDD N9
B 15 M_CLK0 CK VDD CK VDD B
M_CLK#0 K7 R1 M_CLK#0 K7 R1
15 M_CLK#0 CK VDD CK VDD
M_CKE0 K9 R9 M_CKE0 K9 R9
15 M_CKE0 CKE/CKE0 VDD +1.5VS_VGA CKE/CKE0 VDD +1.5VS_VGA

VRAM_ODT0 K1 A1 VRAM_ODT0 K1 A1
15 VRAM_ODT0 ODT/ODT0 VDDQ ODT/ODT0 VDDQ
M_CS#0 L2 A8 M_CS#0 L2 A8
15 M_CS#0 CS/CS0 VDDQ CS/CS0 VDDQ
M_RAS#0 J3 C1 M_RAS#0 J3 C1
15 M_RAS#0 RAS VDDQ RAS VDDQ
M_CAS#0 K3 C9 M_CAS#0 K3 C9
15 M_CAS#0 CAS VDDQ CAS VDDQ
M_WE#0 L3 D2 M_WE#0 L3 D2
15 M_WE#0 WE VDDQ WE VDDQ
E9 E9
VDDQ F1 VDDQ F1
M_DQS2 F3 VDDQ H2 M_DQS3 F3 VDDQ H2
M_DQS0 C7 DQSL VDDQ H9 M_DQS1 C7 DQSL VDDQ H9
DQSU VDDQ DQSU VDDQ

M_DQM2 E7 A9 M_DQM3 E7 A9
M_DQM0 D3 DML VSS B3 M_DQM1 D3 DML VSS B3
DMU VSS E1 DMU VSS E1
VSS G8 VSS G8
M_DQS#2 G3 VSS J2 M_DQS#3 G3 VSS J2
M_DQS#0 B7 DQSL VSS J8 M_DQS#1 B7 DQSL VSS J8
DQSU VSS M1 DQSU VSS M1
VSS M9 VSS M9
VSS P1 VSS P1
T2 VSS P9 DRAM_RST# T2 VSS P9
15,17 DRAM_RST# RESET VSS RESET VSS
T1 T1
L8 VSS T9 L8 VSS T9
ZQ/ZQ0 VSS ZQ/ZQ0 VSS
1

1
J1 B1 J1 B1
M_CLK0 PX@ L1 NC/ODT1 VSSQ B9 PX@ L1 NC/ODT1 VSSQ B9
M_CLK#0 R454 J9 NC/CS1 VSSQ D1 R456 J9 NC/CS1 VSSQ D1
243_0402_1% L9 NC/CE1 VSSQ D8 243_0402_1% L9 NC/CE1 VSSQ D8
NCZQ1 VSSQ E2 NCZQ1 VSSQ E2
2

2
VSSQ VSSQ
1

C E8 E8 C
R5171 R5170 VSSQ F9 VSSQ F9
40.2_0402_1% 40.2_0402_1% VSSQ G1 VSSQ G1
PX@ PX@ VSSQ G9 VSSQ G9
VSSQ VSSQ
2

96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3
H5TC2G63FFR-11C_FBGA96 H5TC2G63FFR-11C_FBGA96
1
PX@ @ @
C506
0.01U_0402_25V7K
2 +1.5VS_VGA
+1.5VS_VGA
U1406 side
U1407 side
C491

C512

C511

C519

C510

C521

C532

C520

C480

C481

C482

C485

C483

C531

C486

C490

C496

C497

C498

C499

C518

C533

C516

C474

C475

C476

C477

C478

C534

C479
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@
@

10U_0603_6.3V6M

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z
PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@
@

@
D D

Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2013/01/11 Deciphered Date 2013/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_VRAM
Size Document Number
A Lower Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-A997P
Tuesday, May 20, 2014 Sheet 16 of 47
1 2 3 4 5
 1 2 3 4 5

Memory Partition A - Upper 32 bits

+1.5VS_VGA
+1.5VS_VGA

1
1
PX@
PX@ R461
R458 4.99K_0402_1% U1409
4.99K_0402_1% U1408

2
A M_DA[63..0] +FBA_VREF3 M8 E3 M_DA49 A
15,16 M_DA[63..0]

2
+FBA_VREF2 M8 E3 M_DA38 H1 VREFCA DQL0 F7 M_DA53
M_MA[15..0] H1 VREFCA DQL0 F7 M_DA36 VREFDQ DQL1 F2 M_DA51
15,16 M_MA[15..0] VREFDQ DQL1 DQL2

1
F2 M_DA37 1 M_MA0 N3 F8 M_DA54
DQL2 A0 DQL3

1
M_DQM[7..0] 1 M_MA0 N3 F8 M_DA35 PX@ PX@ M_MA1 P7 H3 M_DA50
15,16 M_DQM[7..0] A0 DQL3 A1 DQL4
PX@ PX@ M_MA1 P7 H3 M_DA39 R462 C539 M_MA2 P3 H8 M_DA55
M_DQS[7..0] R459 C473 M_MA2 P3 A1 DQL4 H8 M_DA32 4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 A2 DQL5 G2 M_DA48
15,16 M_DQS[7..0] A2 DQL5 2 A3 DQL6
4.99K_0402_1% 0.1U_0402_10V6K M_MA3 N2 G2 M_DA34 M_MA4 P8 H7 M_DA52

2
M_DQS#[7..0] 2 M_MA4 P8 A3 DQL6 H7 M_DA33 M_MA5 P2 A4 DQL7
15,16 M_DQS#[7..0]

2
M_MA5 P2 A4 DQL7 M_MA6 R8 A5
M_MA6 R8 A5 M_MA7 R2 A6 D7 M_DA60
M_MA7 R2 A6 D7 M_DA41 M_MA8 T8 A7 DQU0 C3 M_DA59
M_MA8 T8 A7 DQU0 C3 M_DA44 M_MA9 R3 A8 DQU1 C8 M_DA63
M_MA9 R3 A8 DQU1 C8 M_DA43 M_MA10 L7 A9 DQU2 C2 M_DA56
M_MA10 L7 A9 DQU2 C2 M_DA45 M_MA11 R7 A10/AP DQU3 A7 M_DA62
M_MA11 R7 A10/AP DQU3 A7 M_DA42 M_MA12 N7 A11 DQU4 A2 M_DA57
M_MA12 N7 A11 DQU4 A2 M_DA46 M_MA13 T3 A12 DQU5 B8 M_DA61
M_MA13 T3 A12 DQU5 B8 M_DA40 M_MA14 T7 A13 DQU6 A3 M_DA58
M_MA14 T7 A13 DQU6 A3 M_DA47 M_MA15 M7 A14 DQU7
M_MA15 M7 A14 DQU7 A15/BA3 +1.5VS_VGA
A15/BA3 +1.5VS_VGA
M_BA0 M2 B2
M_BA0 M2 B2 M_BA1 N8 BA0 VDD D9
15,16 M_BA0 BA0 VDD BA1 VDD
M_BA1 N8 D9 M_BA2 M3 G7
15,16 M_BA1 BA1 VDD BA2 VDD
M_BA2 M3 G7 K2
15,16 M_BA2 BA2 VDD VDD
K2 K8
VDD K8 VDD N1
VDD N1 M_CLK1 J7 VDD N9
M_CLK1 J7 VDD N9 M_CLK#1 K7 CK VDD R1
15 M_CLK1 CK VDD CK VDD
M_CLK#1 K7 R1 M_CKE1 K9 R9
15 M_CLK#1 CK VDD CKE/CKE0 VDD +1.5VS_VGA
M_CKE1 K9 R9
15 M_CKE1 CKE/CKE0 VDD +1.5VS_VGA
VRAM_ODT1 K1 A1
VRAM_ODT1 K1 A1 M_CS#1 L2 ODT/ODT0 VDDQ A8
15 VRAM_ODT1 ODT/ODT0 VDDQ CS/CS0 VDDQ
M_CS#1 L2 A8 M_RAS#1 J3 C1
B 15 M_CS#1 CS/CS0 VDDQ RAS VDDQ B
M_RAS#1 J3 C1 M_CAS#1 K3 C9
15 M_RAS#1 RAS VDDQ CAS VDDQ
M_CAS#1 K3 C9 M_WE#1 L3 D2
15 M_CAS#1 CAS VDDQ WE VDDQ
M_WE#1 L3 D2 E9
15 M_WE#1 WE VDDQ VDDQ
E9 F1
VDDQ F1 M_DQS6 F3 VDDQ H2
M_DQS4 F3 VDDQ H2 M_DQS7 C7 DQSL VDDQ H9
M_DQS5 C7 DQSL VDDQ H9 DQSU VDDQ
DQSU VDDQ
M_DQM6 E7 A9
M_DQM4 E7 A9 M_DQM7 D3 DML VSS B3
M_DQM5 D3 DML VSS B3 DMU VSS E1
DMU VSS E1 VSS G8
VSS G8 M_DQS#6 G3 VSS J2
M_DQS#4 G3 VSS J2 M_DQS#7 B7 DQSL VSS J8
M_DQS#5 B7 DQSL VSS J8 DQSU VSS M1
DQSU VSS M1 VSS M9
VSS M9 VSS P1
M_CLK1 VSS P1 DRAM_RST# T2 VSS P9
M_CLK#1 DRAM_RST# T2 VSS P9 RESET VSS T1
15,16 DRAM_RST# RESET VSS VSS
T1 L8 T9
L8 VSS T9 ZQ/ZQ0 VSS
ZQ/ZQ0 VSS
1

1
R5173 R5172 J1 B1
NC/ODT1 VSSQ
1

40.2_0402_1% 40.2_0402_1% J1 B1 PX@ L1 B9

PX@ PX@ PX@ L1 NC/ODT1 VSSQ B9 R444 J9 NC/CS1 VSSQ D1
R410 J9 NC/CS1 VSSQ D1 243_0402_1% L9 NC/CE1 VSSQ D8
2

243_0402_1% L9 NC/CE1 VSSQ D8 NCZQ1 VSSQ E2

2
NCZQ1 VSSQ E2 VSSQ E8
2

VSSQ E8 VSSQ F9
VSSQ F9 VSSQ G1
1 VSSQ VSSQ
PX@ G1 G9
C507 VSSQ G9 VSSQ
0.01U_0402_25V7K VSSQ 96-BALL
2 96-BALL SDRAM DDR3
C SDRAM DDR3 H5TC2G63FFR-11C_FBGA96 C
H5TC2G63FFR-11C_FBGA96 @
@

+1.5VS_VGA +1.5VS_VGA

U1408 side U1409 side

C495

C525

C524

C526

C513

C527

C536

C528

C504

C508

C505

C509

C529

C535

C530

C492

C501

C502

C503

C500

C523

C538

C522

C487

C484

C488

C489

C493

C537

C494
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
10U_0603_6.3V6M

10U_0603_6.3V6M
0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1U_0402_6.3V4Z
PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@

PX@
@

@
D D

Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2013/01/11 Deciphered Date 2013/12/31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL SUN_VRAM
Size Document Number
A Upper Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
LA-A997P
Tuesday, May 20, 2014 Sheet 17 of 47
1 2 3 4 5
 A B C D E

+VREF_DQ +1.35V_VDDQ +1.35V_VDDQ

CONN@
15mil JDIMM1
1 2
3 VREF_DQ VSS1 4 DDRAB_SDQ4 DDRAB_SDQ[0..63]

.1U_0402_16V7K

1000P_0402_50V7K
DDRAB_SDQ0 5 VSS2 DQ4 6 DDRAB_SDQ5 DDRAB_SDQ[0..63] 5
2 1 DQ0 DQ5
DDRAB_SDQ1 7 8 DDRAB_SDM[0..7]

CD1

CD2
DQ1 VSS3 DDRAB_SDM[0..7] 5
9 10 DDRAB_SDQS0#
VSS4 DQS#0 DDRAB_SDQS0# 5 DDRAB_SMA[0..15]
DDRAB_SDM0 11 12 DDRAB_SDQS0 DDRAB_SMA[0..15] 5
1 2 13 DM0 DQS0 14 DDRAB_SDQS0 5
DDRAB_SDQ2 15 VSS5 VSS6 16 DDRAB_SDQ6
DDRAB_SDQ3 17 DQ2 DQ6 18 DDRAB_SDQ7
19 DQ3 DQ7 20
DDRAB_SDQ8 21 VSS7 VSS8 22 DDRAB_SDQ12
DDRAB_SDQ9 23 DQ8 DQ12 24 DDRAB_SDQ13
25 DQ9 DQ13 26
1
DDRAB_SDQS1# 27 VSS9 VSS10 28 DDRAB_SDM1 1
5 DDRAB_SDQS1# 29 DQS#1 DM1 30
DDRAB_SDQS1 MEM_MAB_RST#
5 DDRAB_SDQS1 DQS1 RESET# MEM_MAB_RST# 5
31 32
DDRAB_SDQ10 33 VSS11 VSS12 34 DDRAB_SDQ14
DDRAB_SDQ11 35 DQ10 DQ14 36 DDRAB_SDQ15
37 DQ11 DQ15 38
DDRAB_SDQ16 39 VSS13 VSS14 40 DDRAB_SDQ20
DDRAB_SDQ17 41 DQ16 DQ20 42 DDRAB_SDQ21
43 DQ17 DQ21 44
DDRAB_SDQS2# 45 VSS15 VSS16 46 DDRAB_SDM2
5 DDRAB_SDQS2# DQS#2 DM2
DDRAB_SDQS2 47 48
5 DDRAB_SDQS2 49 DQS2 VSS17 50 DDRAB_SDQ22
DDRAB_SDQ18 51 VSS18 DQ22 52 DDRAB_SDQ23
DDRAB_SDQ19 53 DQ18 DQ23 54
55 DQ19 VSS19 56 DDRAB_SDQ28
DDRAB_SDQ24 57 VSS20 DQ28 58 DDRAB_SDQ29
DDRAB_SDQ25 59 DQ24 DQ29 60
61 DQ25 VSS21 62 DDRAB_SDQS3#
63 VSS22 DQS#3 64 DDRAB_SDQS3# 5
DDRAB_SDM3 DDRAB_SDQS3
DM3 DQS3 DDRAB_SDQS3 5
65 66
DDRAB_SDQ26 67 VSS23 VSS24 68 DDRAB_SDQ30
DDRAB_SDQ27 69 DQ26 DQ30 70 DDRAB_SDQ31
71 DQ27 DQ31 72
VSS25 VSS26

5 DDRA_CKE0
DDRA_CKE0 73
75 CKE0 CKE1
74
76
DDRA_CKE1
DDRA_CKE1 5
+1.35V_VDDQ/+0.675VS OF DIMM1
77 VDD1 VDD2 78 DDRAB_SMA15
DDRAB_SBS2# 79 NC1 A15 80 DDRAB_SMA14 +1.35V_VDDQ +0.6V_0.675VS
5 DDRAB_SBS2# BA2 A14
81 82
DDRAB_SMA12 83 VDD3 VDD4 84 DDRAB_SMA11
DDRAB_SMA9 85 A12/BC# A11 86 DDRAB_SMA7
A9 A7

CD3

CD4

CD5

CD6

CD7

CD8

CD9

CD10

CD11

CD12

CD13

CD14
87 88 1
DDRAB_SMA8 89 VDD5 VDD6 90 DDRAB_SMA6
A8 A6 1 1 1 1 1 1 1 1 1 1 1 1
DDRAB_SMA5 91 92 DDRAB_SMA4 + CD18 @
93 A5 A4 94 330U_B2_2.5VM_R15M
VDD7 VDD8

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

.1U_0402_16V7K

4.7U_0603_6.3V6K
2 DDRAB_SMA3 95 96 DDRAB_SMA2 SGA00004400 2
DDRAB_SMA1 97 A3 A2 98 DDRAB_SMA0 2 2 2 2 2 2 2 2 2 2 2 2 2
99 A1 A0 100
DDRA_CLK0 101 VDD9 VDD10 102 DDRA_CLK1
5 DDRA_CLK0 103 CK0 CK1 104 DDRA_CLK1 5
DDRA_CLK0# DDRA_CLK1#
5 DDRA_CLK0# CK0# CK1# DDRA_CLK1# 5
105 106
DDRAB_SMA10 107 VDD11 VDD12 108 DDRAB_SBS1#
A10/AP BA1 DDRAB_SBS1# 5
DDRAB_SBS0# 109 110 DDRAB_SRAS#
5 DDRAB_SBS0# BA0 RAS# DDRAB_SRAS# 5
111 112 @ @ @ @ @ @
DDRAB_SWE# 113 VDD13 VDD14 114 DDRA_SCS0#
5 DDRAB_SWE# WE# S0# DDRA_SCS0# 5
DDRAB_SCAS# 115 116 DDRA_ODT0
5 DDRAB_SCAS# 117 CAS# ODT0 118 DDRA_ODT0 5
DDRAB_SMA13 119 VDD15 VDD16 120 DDRA_ODT1 0.1UX10
A13 ODT1 DDRA_ODT1 5
DDRA_SCS1# 121 122
5 DDRA_SCS1# 123 S1# NC2 124
125 VDD17 VDD18 126
15mil
NCTEST VREF_CA +VREF_CA
127 128
DDRAB_SDQ32 129 VSS27 VSS28 130 DDRAB_SDQ36

.1U_0402_16V7K
1000P_0402_50V7K

DDRAB_SDQ33 131 DQ32 DQ36 132 DDRAB_SDQ37

DQ33 DQ37 1 2
133 134
CD15

CD16
DDRAB_SDQS4# 135 VSS29 VSS30 136 DDRAB_SDM4
5 DDRAB_SDQS4# 137 DQS#4 DM4 138
DDRAB_SDQS4
5 DDRAB_SDQS4 DQS4 VSS31 2 1
139 140 DDRAB_SDQ38
DDRAB_SDQ34 141 VSS32 DQ38 142 DDRAB_SDQ39
DDRAB_SDQ35 143 DQ34 DQ39 144

DDRAB_SDQ40
145
147
DQ35
VSS34
VSS33
DQ44
146
148
DDRAB_SDQ44
DDRAB_SDQ45
VREF for DIMM1
DDRAB_SDQ41 149 DQ40 DQ45 150
151 DQ41 VSS35 152 DDRAB_SDQS5#
153 VSS36 DQS#5 154 DDRAB_SDQS5# 5
DDRAB_SDM5 DDRAB_SDQS5
DM5 DQS5 DDRAB_SDQS5 5
155 156
DDRAB_SDQ42 157 VSS37 VSS38 158 DDRAB_SDQ46 +VREF_DQ +1.35V_VDDQ
DDRAB_SDQ43 159 DQ42 DQ46 160 DDRAB_SDQ47 RPD2
161 DQ43 DQ47 162 1 8
DDRAB_SDQ48 163 VSS39 VSS40 164 DDRAB_SDQ52 +VREF_CA 2 7
DDRAB_SDQ49 165 DQ48 DQ52 166 DDRAB_SDQ53 3 6
167 DQ49 DQ53 168 4 5
DDRAB_SDQS6# 169 VSS41 VSS42 170 DDRAB_SDM6
3 5 DDRAB_SDQS6# DQS#6 DM6 3
DDRAB_SDQS6 171 172 1K_0804_8P4R_1%
5 DDRAB_SDQS6 173 DQS6 VSS43 174 DDRAB_SDQ54
DDRAB_SDQ50 175 VSS44 DQ54 176 DDRAB_SDQ55
DDRAB_SDQ51 177 DQ50 DQ55 178
179 DQ51 VSS45 180 DDRAB_SDQ60
DDRAB_SDQ56 181 VSS46 DQ60 182 DDRAB_SDQ61
DDRAB_SDQ57 183 DQ56 DQ61 184
185 DQ57 VSS47 186 DDRAB_SDQS7#
187 VSS48 DQS#7 188 DDRAB_SDQS7# 5
DDRAB_SDM7 DDRAB_SDQS7
DM7 DQS7 DDRAB_SDQS7 5
189 190
DDRAB_SDQ58 191 VSS49 VSS50 192 DDRAB_SDQ62
DDRAB_SDQ59 193 DQ58 DQ62 194 DDRAB_SDQ63
195 DQ59 DQ63 196
197 VSS51 VSS52 198 MEM_MAB_EVENT#
SA0 EVENT# MEM_MAB_EVENT# 5
199 200
+3VS VDDSPD SDA APU_SDATA0 9
201 202
203 SA1 SCL 204 APU_SCLK0 9
1 <Address: 00> VTT1 VTT2 +0.6V_0.675VS
CD17 205 206
.1U_0402_16V7K G1 G2
2 TE_2-2013287-5

DIMM_1 H:4mm Reverse

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR3 SODIMM Socket
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 18 of 47
A B C D E
 5 4 3 2 1

LVDS Power
Camera @ W=60mils W=60mils
+3VS R170 1 2 0_0402_5%
KabiniLvds@ UG1 INVPWR_B+ B+
L12 EMI@
5 1 1 2 D5
USB20_N4_R @EMI@
IN OUT +LCDVDD 7 USB20_N4 1 2 USB20_P4_R 2 0_0805_5% 2 1 L1
2 1
GND

4.7U_0603_6.3V6K

0.1U_0402_16V7K
KabiniLvds@ KabiniLvds@ 4 3 USB20_P4_R USB20_N4_R 3 @EMI@ 0_0805_5%
1 2 0_0201_5% 4 3 7 USB20_P4 4 3 2 1 L2
RG1 @ 1 1 1
SS EN WCM-2012-900T_4P
CG1 PESD5V0U2BT_SOT23-3
1 1
D KabiniLvds@ APL3512_SOT23-5 1 R171 2 0_0402_5% @ESD@ SCA00000U10 @EMI@ C117 C118 SM010014520 3000ma D
2 2 2

CG2

CG3
1500P_0402_50V7K 680P_0402_50V7K 68P_0402_50V8J
220ohm@100mhz
@
2 2
DCR 0.04

KabiniLvds@
RG3 1 2 0_0402_5% +5VALW
6 DP_ENVDD
Touch Screen Touch Screen Power
2132S@ @

1
RG4 1 2 0_0402_5% R172 1 2 0_0402_5%
27 +DP_ENVDD
RTS2 BeemaeDP@
D4
L3EMI@ 100K_0402_5%
1 2 USB20_P5_R USB20_P5_R 2
7 USB20_P5 1 2 1
UG1 CG1 RG3 CG2 CG3

2
BeemaeDP@ BeemaeDP@ BeemaeDP@ BeemaeDP@ BeemaeDP@ USB20_N5_R 3

1
APL3512_SOT23-5 1500P_0402_50V7K 0_0402_5% 4.7U_0603_6.3V6K 0.1U_0402_16V7K 4 3 USB20_N5_R
7 USB20_N5 4 3

1
SA00003AR00 SE074152K80 SD028000080 SE107475K80 SE076104K80 RTS1 BeemaeDP@ D
WCM-2012-900T_4P PESD5V0U2BT_SOT23-3 2
1K_0402_5% TOUCH_ON# 28
UG1 CG1 RG3 CG2 CG3 @ESD@ SCA00000U10 G
KabinieDP@ KabinieDP@ KabinieDP@ KabinieDP@ KabinieDP@ 1 R173 2 0_0402_5% CTS2 BeemaeDP@ S

3
APL3512_SOT23-5 1500P_0402_50V7K 0_0402_5% 4.7U_0603_6.3V6K 0.1U_0402_16V7K 1 2 QTS1 BeemaeDP@
SA00003AR00 SE074152K80 SD028000080 SE107475K80 SE076104K80 @ +VCC_TOUCH 2N7002_SOT23

2
0.047U_0402_16V7K

G
1 3 +VCC_TOUCH_S

S
0.1U_0402_16V4Z @ RTS5
1 BeemaeDP@ 1 2 0_0402_5%
C +5VS C
CTS1
QTS2 RTS6
AO3413L_SOT23-3 1 2 0_0402_5%
2 +3VS
LCD_CLK USB20_N4
BeemaeDP@
LCD_DATA
1

1 1 R258 R258
@ C119 @ C120 R202 @ BeemaeDP@ KabinieDP@
10P_0402_50V8J 10P_0402_50V8J 300_0402_5% 0_0402_5% 0_0402_5%
SD028000080 SD028000080 +LCDVDD
2 2
LCD/LED PANEL Conn.
2

1 10P_0402_50V8J CONN@
C290@ 28 EC_INVT_PWM R2591 @ 2 INVTPWM JLVDS1
0_0402_5% 1
C121 2 1 220P_0402_50V7K INVTPWM 2 1 41
2 LCD_CLK 3 2 G1 42
27 LCD_CLK 3 G2
C122 2 1 220P_0402_50V7K DISPOFF# KabiniLvds@ 27 LCD_DATA
LCD_DATA 4 43
4 G3

1
27,6 DP_INT_PWM R258 1 2 0_0402_5% 5 44
R163 LVDS_TXP0_F 6 5 G4 45
27 LVDS_TXP0_F 7 6 G5 46
BeemaLvds@ 100K_0402_5% LVDS_TXN0_F
1 2 0_0402_5% 27 LVDS_TXN0_F 8 7 G6
27 eDP_DP_INT_PWM R262
LVDS_TXP1_F 9 8
27 LVDS_TXP1_F

2
LVDS_TXN1_F 10 9
27 LVDS_TXN1_F 11 10
LVDS_TXP2_F 12 11
27 LVDS_TXP2_F LVDS_TXN2_F 13 12
B 27 LVDS_TXN2_F 13 B
14
LVDS_CLKP_F 15 14
TS_GPIO_APU R2601 2 TS_GPIO 27 LVDS_CLKP_F LVDS_CLKN_F 16 15
@
9 TS_GPIO_APU 27 LVDS_CLKN_F 17 16
0_0402_5%
TS_GPIO_EC R2611 @ 2 USB20_N4_R 18 17
28 TS_GPIO_EC 18
0_0402_5% USB20_P4_R 19
20 19
USB20_P5_R 21 20
R166 33_0402_5% USB20_N5_R 22 21
1 2 DISPOFF#_R 23 22
27 DISPOFF# 23
INVTPWM 24
TS_GPIO 25 24
25

1
26
R1671 27 26
INVPWR_B+ 27
10K_0402_5% 28
29 28
30 29
+VCC_TOUCH

2
31 30
32 31
+3VS 32
33
D3 33
34
D_MIC_L_CLK 2 D_MIC_L_CLK 35 34
1 26 D_MIC_L_CLK D_MIC_L_DATA 36 35
D_MIC_L_DATA 3 26 D_MIC_L_DATA 37 36
38 37
27 EDP_HPD_panel 38
39
PESD5V0U2BT_SOT23-3 40 39
A 40 A
@ESD@ SCA00000U10
STARC_107K40-000001-G2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS Connector
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-A997P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 19 of 47
5 4 3 2 1
 5 4 3 2 1

APU_DP1_TXP3_C 0.1U_0402_16V7K 1 2 C123 APU_DP1_TXP3

APU_DP1_TXP3 6
APU_DP1_TXN3_C 0.1U_0402_16V7K 1 2 C124 APU_DP1_TXN3
APU_DP1_TXN3 6 CLK
+3VS APU_DP1_TXP2_C 0.1U_0402_16V7K 1 2 C125 APU_DP1_TXP2
APU_DP1_TXP2 6
APU_DP1_TXN2_C 0.1U_0402_16V7K 1 2 C126 APU_DP1_TXN2
APU_DP1_TXN2 6 Data0
APU_DP1_TXP1_C 0.1U_0402_16V7K 1 2 C127 APU_DP1_TXP1
APU_DP1_TXP1 6
APU_DP1_TXN1_C 0.1U_0402_16V7K 1 2 C128 APU_DP1_TXN1
APU_DP1_TXN1 6 Data1
APU_DP1_TXP0_C 0.1U_0402_16V7K 1 2 C129 APU_DP1_TXP0
APU_DP1_TXP0 6
APU_DP1_TXN0_C 0.1U_0402_16V7K 1 2 C130 APU_DP1_TXN0
APU_DP1_TXN0 6 Data2
D D

8
7
6
5

8
7
6
5
RPH2 RPH1
DP1_AUXP 4 3 HDMI_SCLK 499_0804_8P4R_1% 499_0804_8P4R_1%
6 DP1_AUXP
2N7002KDW _SOT363-6 NET: HDMIRES_GND

1
2
3
4

1
2
3
4
Q6B
+3VS
WIDTH>20 mils

HDMIRES_GND
2
DP1_AUXN 1 6 HDMI_SDATA
6 DP1_AUXN
2N7002KDW _SOT363-6
D

1
Q6A
+3VS R180 1 @ 2 0_0402_5% 2 Q17
G SSM3K7002FU_SC70-3

1
S

3
R181
100K_0402_5%

2
+3VS
SM070001310 400ma 90ohm@100mhz DCR 0.3
C C
APU_DP1_TXP3_C R182 1 EMI@ 2 22_0402_5% HDMI_R_CK+

1
4 3 R183
4 3 1M_0402_5%
W CM-2012-900T_0805

2
L4@EMI@

G
1 2 R184 L5

2
1 2 MBK1608221YZF_2P
APU_DP1_TXN3_C R186 1 2 22_0402_5% HDMI_R_CK- 3 1HDMI_DETECT 1 2 1 2 HP_DETECT
+3VS 6 DP1_HPD
EMI@ 10K_0402_5%

D
RP1 1
DP1_AUXN 1 8 +HDMI_5V_OUT
Q15

1
APU_DP1_TXP2_C R187 1 EMI@ 2 22_0402_5% HDMI_R_D0+ DP1_AUXP 2 7 C131
HDMI_SCLK 3 6 SSM3K7002FU_SC70-3 R185 220P_0402_50V7K
4 3 HDMI_SDATA 4 5 2
4 3 100K_0402_5%
W CM-2012-900T_0805 4.7K_0804_8P4R_5%

2
L6@EMI@ 1 2
1 2 5V Level
APU_DP1_TXN2_C R190 1 2 22_0402_5% HDMI_R_D0-
EMI@

APU_DP1_TXP1_C R191 1 EMI@ 2 22_0402_5% HDMI_R_D1+

4 3
4 3
W CM-2012-900T_0805
L7@EMI@ 1 2
B
1 2 8/20 change HDMI Conn HDMI Conn. B
APU_DP1_TXN1_C R192 1 2 22_0402_5% HDMI_R_D1-
EMI@ CONN@
JHDMI1
APU_DP1_TXP0_C R193 1 EMI@ 2 22_0402_5% HDMI_R_D2+ HP_DETECT 19
18 HP_DET
+HDMI_5V_OUT +5V
4 3 17
4 3 SC300002800 HDMI_SDATA 16 DDC/CEC_GND
W CM-2012-900T_0805 @ESD@ DM6 HDMI_SCLK 15 SDA
L8@EMI@ 1 2 HP_DETECT 1 1 109 HP_DETECT 14 SCL
1 2 13 Reserved
APU_DP1_TXN0_C R194 1 2 22_0402_5% HDMI_R_D2- HDMI_SDATA 2 2 98 HDMI_SDATA HDMI_R_CK- 12 CEC 20
EMI@ 11 CK- GND 21
HDMI_SCLK 4 4 77 HDMI_SCLK HDMI_R_CK+ 10 CK_shield GND 22
HDMI_R_D0- 9 CK+ GND 23
5 5 66 8 D0- GND
HDMI_R_D0+ 7 D0_shield
3 3 HDMI_R_D1- 6 D0+
5 D1-
8 HDMI_R_D1+ 4 D1_shield
HDMI_R_D2- 3 D1+
IP4292CZ10-TB 2 D2-
+HDMI_5V_OUT HDMI_R_D2+ 1 D2_shield
URH1 D2+
CONCR_099AKAC19NBLCNF
2 W=40mils
GND
1 +5VS
IN
3
A OUT A

W=40mils SA00004ZA00
1
AP2330W -7_SC59-3

CG4
0.1U_0402_16V7K 2 Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI Connector
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 20 of 47
5 4 3 2 1
 A B C D E

@ESD@ @ESD@
DT3 DT4
SC300001G00 SC300001G00
DAC_C_BLU 6 3 DAC_C_RED CRT_DATA 6 3 CRT_CLK
I/O4 I/O2 I/O4 I/O2
+HDMI_5V_OUT +HDMI_5V_OUT
CRT share HDMI Power 5 2 5 2
VDD GND VDD GND

1 DAC_C_GRN 4 1 CRT_HSYNC_2 4 1 CRT_VSYNC_2 1

I/O3 I/O1 I/O3 I/O1
T16
AZC099-04S.R7G_SOT23-6 AZC099-04S.R7G_SOT23-6

CONN@
JCRT
@ 6
11
DAC_C_RED 1
7
CRT_DATA 12
DAC_C_GRN 2
8
CRT_HSYNC_2 13
DAC_C_BLU 3
+HDMI_5V_OUT 9
+HDMI_5V_OUT +HDMI_5V_OUT
CRT_VSYNC_2 14
W=40mils 4
CRT@ RT5 1 2 CRT_HSYNC_2 1 10
1 2 2 1 CRT@ LT4 10_0402_5% CRT_CLK 15

0.1U_0402_16V4Z
CT9 0.1U_0402_16V4Z @ 5

CT8
CRT@ 10K_0402_5% 1 2 CRT_VSYNC_2 1
2 2
5

1
CRT@ UT2 CRT@ LT5 10_0402_5% 2 CRT@ CT12 16 GND
1 1
74AHCT1G125GW_SOT353-5 17 GND
P

OE#

DAC_HSYNC 2 4 CRT_HSYNC_1 100P_0402_50V8J

6 DAC_HSYNC A Y 2
CRT@ CT10 @ CT7
G

10P_0402_50V8J 2 2 10P_0402_50V8J
SUYIN_070546FR015S265ZR
3

+HDMI_5V_OUT
@ T19
CT11 1 2 0.1U_0402_16V4Z
5

CRT@
P

OE#

DAC_VSYNC 2 4 CRT_VSYNC_1
6 DAC_VSYNC A Y
G

CRT@ UT3
74AHCT1G125GW_SOT353-5
3

+3VS +3VS +HDMI_5V_OUT

1
RT1 CRT@

4.7K_0402_5%

RT2 CRT@

4.7K_0402_5%

RT4 CRT@

2.2K_0402_5%

RT3 CRT@

2.2K_0402_5%
3 3

2
2
DAC_DDC_DATA 1 6 CRT_DATA
6 DAC_DDC_DATA
LT1 1 2 DAC_C_RED
6 DAC_RED
FBMA-L11160808601LMA10T_2P CRT@ Q4101A

5
CRT@ SM010030380 2N7002KDWH_SOT363-6
LT2 1 2 DAC_C_GRN
6 DAC_GRN 4 3
FBMA-L11160808601LMA10T_2P DAC_DDC_CLK CRT_CLK
6 DAC_DDC_CLK
CRT@ SM010030380
LT3 1 2 DAC_C_BLU CRT@ Q4101B
6 DAC_BLU
FBMA-L11160808601LMA10T_2P 2N7002KDWH_SOT363-6
22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

68P_0402_50V8J

68P_0402_50V8J

68P_0402_50V8J

CRT@ SM010030380
1 1 1 1 1 1
CT1

CT2

CT3

CT4

CT5

CT6

2 2 2 2 2 2

4 4
CRT@ CRT@ CRT@ CRT@ CRT@ CRT@
CRT@ RPC13
DAC_RED 1 8
DAC_GRN 2 7
DAC_BLU 3 6 Security Classification Compal Secret Data Compal Electronics, Inc.
4 5 2013/02/26 2015/07/08 Title
Issued Date Deciphered Date
150_0804_8P4R_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 21 of 47
A B C D E
 5 4 3 2 1

WL_OFF# 0_0402_5% 2 @ 1 RC162 APU_WL_OFF#

APU_WL_OFF# 9

+3VS_WLAN

1
D +3VS_WLAN @ RN3 +1.5VS_WLAN +3VS_WLAN D
10K_0402_5%
JMINI1 CONN@

2
28 WLAN_WAKE# 0_0402_5% 2 @ 1RN2 1
3 1 2
APU_BT_ON# 5 3 2 4
7 5 4 6
9 MINI1_CLKREQ# 7 6
9 8
11 9 8 10
7 CLK_PCIE_MINI1# 11 10
13 12
7 CLK_PCIE_MINI1 15 13 12 14
15 14 16
16

17
19 17 18
21 19 18 20 WL_OFF#
23 21 20 22
5 PCIE_ARX_DTX_N2 23 22 PLT_RST# 11,24,31,9
25 24
5 PCIE_ARX_DTX_P2 25 24 +3VS_WLAN
27 26
29 27 26 28
31 29 28 30
5 PCIE_ATX_C_DRX_N2 31 30
5 PCIE_ATX_C_DRX_P2 33 32
C 33 32 C
35 34
37 35 34 36 USB20_N3_R RN4 1 @ 2 0_0402_5%
39 37 36 38 1 @ 2 0_0402_5% USB20_N3 7
USB20_P3_R RN5
41 39 38 40 USB20_P3 7
43 41 40 42
45 43 42 44
45 44 MINI1_LED# 28
47 46
E51TXD_P80DATA 49 47 46 48
28 E51TXD_P80DATA 51 49 48 50
E51RXD_P80CLK
28 E51RXD_P80CLK 51 50 52
53 52
54 GND1
GND2

1
APU_BT_ON# 1 RC160 2 E51RXD_P80CLK
9 APU_BT_ON#
1K_0402_1% BELLW_80053-1021 RN7
4.7K_0402_5%

2
+3VS_WLAN USB20_N3_R

1
+1.5VS +1.5VS_WLAN
@R205
B RN1 @ 300_0402_5% B
1 2
1

2
0_0603_5% @ CN1
1 10P_0402_50V8J
4.7U_0603_6.3V6K @C292
@ C292
2

+3VS_WLAN_R +3VS_WLAN

R271 @
1 2
0.1U_0402_16V7K
CN3

0_0603_5% 1 1
CN2
R272 @
1 2 4.7U_0603_6.3V6K
2 2
0_0603_5%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 22 of 47
5 4 3 2 1
 5 4 3 2 1

CONN@
JHDD
2.5" SATA HDD connector +5VS_HDD1 1
GND GND
23
7 SATA_ITX_C_DRX_P0 C155 1 2 0.01U_0402_16V7K SATA_ITX_DRX_P0 2 24
C156 1 2 0.01U_0402_16V7K SATA_ITX_DRX_N0 3 A+ GND
7 SATA_ITX_C_DRX_N0 A-
4
C153 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND
7 SATA_PRX_DTX_N0 B-

10U_0603_6.3V6M

0.1U_0402_16V7K
+5VS C154 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6
7 SATA_PRX_DTX_P0 B+

C150
1 1 7
GND

C149
0_0603_5% +3VS
D R201 1 @ 2 D
+5VS_HDD1
0_0603_5% RS11 1 2 0_0402_5% 8
R212 1 @ 2 2 2 9 VCC3.3
RS12 1 @ 2 0_0402_5% JHDD_P10 10 VCC3.3
9 DEVSLP0 11 VCC3.3
12 GND
13 GND
14 GND
15 VCC5
+5VS_HDD1 VCC5
16
17 VCC5
18 GND
19 RESERVED
20 GND
21 VCC12
22 VCC12
VCC12
SANTA_193202-1

C C

+5VS_ODD
Pleace near ODD Connector
Change ODD Conn 08/22, check pin define

1000P_0402_50V7K

0.1U_0402_25V6K

10U_0805_10V6K
1 1 1

CS13
CS16

CS12
2 2 2

CONN@
+5VS JODD
1
+5VS_ODD CS11 2 1 0.01U_0402_16V7K SATA_PTX_DRX_P1 2 GND
7 SATA_PTX_DRX_P1_C RX+
CS14 2 1 0.01U_0402_16V7K SATA_PTX_DRX_N1 3
7 SATA_PTX_DRX_N1_C RX-
B U20 4 B
GND
10U_0603_6.3V6M
C227

10U_0603_6.3V6M

1 1 1 14 CS15 2 1 0.01U_0402_16V7K SATA_PRX_DTX_N1 5

@ 2 VIN1 VOUT1 13 7 SATA_PRX_DTX_N1_C CS18 2 1 0.01U_0402_16V7K SATA_PRX_DTX_P1 6 TX-
VIN1 VOUT1 7 SATA_PRX_DTX_P1_C TX+
C229

C226 7
3 12 1 2 GND
2 2 9 ODD_PWR ON1 CT1 8
4 11 560P_0402_50V7K 9 ODD_PLUG# 9 DP
+5VALW VBIAS GND +5V
C230 10
5 10 1 2 ODD_DA#_M 11 +5V
28 WL_PWREN_EC ON2 CT2 +3VS_WLAN_R 12 MD 14
+3VALW 6 9 100P_0402_50V8J 13 GND GND1 15
7 VIN2 VOUT2 8 +3VS +3VS GND GND2
VIN2 VOUT2
1U_0603_10V4Z

1 1 OCTEK_SLS-13HCAB
10U_0603_6.3V6M
C228

C223

1 15 CS17
GPAD

2
1 0.1U_0402_25V6K
1U_0603_10V4Z
C224

TPS22966DPUR_SON14_2X3 R954 ESD@

2
2 10K_0402_5% 2
2

G
2

1
ODD_DA# 1 3 ODD_DA#_M Place CS17 close to JODD
9 ODD_DA#
D

S
Q84
2N7002K_SOT23-3

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ODD/SATA Conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 23 of 47
5 4 3 2 1
 5 4 3 2 1

LDO mode Switcing mode

@
J1 +LAN_VDD_3V3 Rising time
LL1 SMT @
1
1 2
2
need>0.5mS and <100mS 8/15 Change to LDO Mode
CL21 SMT @
+3VALW JUMP_43X79
@ UG5
LL2 @ SMT
CL8,CL23@ SMT +LAN_VDD_1V0
5 1 +LAN_VDD_3V3 LL1 @
IN OUT 1 2
2
CL14 & CL15 close UL1 Pin22
GND 0_0603_5%
1@ RL35 20_0201_5% 1 4 3 @ LL2
CL26 & CL27 close UL1 Pin30
SS EN +LAN_REGOUT 1 2

1U_0402_6.3V6K

1U_0402_6.3V6K
@ CL28 2.2UH +-5% NLC252018T-2R2J-N

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
4.7U_0603_6.3V6K
APL3512_SOT23-5 1 1 1 1 1 1 1 1 1

0.1U_0402_16V7K
D 2 D

CL8
1500P_0402_50V7K @10_100@

CL23
1
@ CL11 CL12 CL13 CL14 CL15 CL26 CL27
CL21 @ @ Giga@ @ 10_100@
2 2 2 2 2 2 2 2 2
@ RL29 2 1 10K_0402_5%LAN_PWR_EN_R 2
28 LAN_PWR_EN

Place CL11~CL13 close UL1 Pin 3, 8 , 22 EC_LAN_ISOLATEB#_R 2 1

LL2, CL8, CL23 for 8161 1K_0402_5% RM6
+3VS
1
CL8 & CL18 close LL2

2
+LAN_VDD_3V3 +VDDREG @ CL29
2
0.1U_0402_16V7K 8151/8166 Co-Lay RM11
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
+LAN_VDD_3V3=40mil 15K_0402_5%
0.1U_0402_16V7K

0.1U_0402_16V7K

0.1U_0402_16V7K
1 1 1 1 1 1

1
@Giga@ UL1 +LAN_VDD_1V0
CL10

CL16
CL20 @ CL19 CL9 @ CL5 L +VDDREG=40mil
@ @ +LAN_REGOUT=60mil
2 2 2 2 2 2 LAN_MDIP0 1 3
LAN_MDIN0 2 MDIP0 AVDD10 8
08/17 CL24,CL25 Change form 27p to 18p
LAN_MDIP1 4 MDIN0 AVDD10 30 +LAN_VDD_3V3 XTLI
LAN_MDIN1 5 MDIP1 AVDD10 22 +LAN_VDD_3V3
LAN_MDIP2 6 MDIN1 DVDD10 2 1 XTLO
LAN_MDIN2 7 MDIP2 11 +LAN_VDD_3V3 1M_0402_5% RL7
MDIN2 AVDD33

1
LAN_MDIP3 9 32
LAN_MDIN3 10 MDIP3 AVDD33 @ RL10 RL15
MDIN3 23 +VDDREG 1 2
CL9 & CL5 close to UL1: Pin 11,32 CL10& CL16 close to UL1: Pin 23 VDDREG(VDD33) 24 +LAN_REGOUT
10K_0402_5%

LAN_CLKREQ# 2 @ RL6 1 0_0201_5% LAN_CLKREQ#_R 12 REGOUT 0_0603_5%

CL19 close to UL1: Pin 32 9 LAN_CLKREQ# RTL8111G

2
PLT_RST# 19 CLKREQB 21 LANWAKEB
11,22,31,9 PLT_RST# PERSTB LANWAKEB EC_PME# 28

3
CL20 close to UL1: Pin 11 20 EC_LAN_ISOLATEB#_R 1 @ RL50 2 0_0402_5% YL1
ISOLATEB EC_LAN_ISOLATEB# 28
CLK_PCIE_LAN 15 2 2

OSC

OSC
7 CLK_PCIE_LAN REFCLK_P

10P_0402_50V8J

10P_0402_50V8J
CLK_PCIE_LAN# 16 27 LED0 TH2 EC control 08/17 Add 0ohm
7 CLK_PCIE_LAN# REFCLK_N LED0 26 LED1/GPO TH1 CL25 CL24
PCIE_ATX_C_DRX_P3 13 LED1/GPO 25 LED2 TH3

GND

GND
5 PCIE_ATX_C_DRX_P3 14 HSIP LED2(LED1) 1 1
PCIE_ATX_C_DRX_N3
5 PCIE_ATX_C_DRX_N3 HSIN
C PCIE_ARX_DTX_P3 CR11 1 2 0.1U_0402_10V7K PCIE_ARX_C_DTX_P3 17 28 XTLI C
5 PCIE_ARX_DTX_P3 HSOP CKXTAL1
PCIE_ARX_DTX_N3 CR13 1 2 0.1U_0402_10V7K PCIE_ARX_C_DTX_N3 18 29 XTLO
5 PCIE_ARX_DTX_N3

4
HSON CKXTAL2
RSET 31 33
RSET GND 25MHZ_20PF_FSX3M-25.M20FDO

2
SP050005L00 Footprint
RL11
TSL1 2.49K_0402_1%
Giga@ SA00005YT00 UL1
+V_DAC 1 24 10_100@

1
LAN_MDIN3 2 TCT1 MCT1 23 RJ45_TX3- RP5 S IC RTL8111G-CG QFN 32P E-LAN CTRL
LAN_MDIP3 3 TD1+ MX1+ 22 RJ45_TX3+ 1 8 SA000063500
Swap P/N 08/16 TD1- MX1- 2 7
(SA000063500) 8166EH 10/100 JLAN CONN@
4 21 3 6 (SA00005YT00) RTL8111G Giga RJ45_TX0+ 1
LAN_MDIN2 5 TCT2 MCT2 20 RJ45_TX2- 4 5 PR1+
LAN_MDIP2 6 TD2+ MX2+ 19 RJ45_TX2+ RJ45_TX0- 2
TD2- MX2- 75_0804_8P4R_1% PR1-
7 18 SD300002E80 2 RJ45_RX1+ 3
LAN_MDIN1 8 TCT3 MCT3 17 RJ45_RX1- CL2 PR2+
LAN_MDIP1 9 TD3+ MX3+ 16 RJ45_RX1+ SE167100J80 RJ45_TX2+ 4
TD3- MX3- 10P_1808_3KV PR3+
10 15 1 RJ45_TX2- 5
LAN_MDIN0 11 TCT4 MCT4 14 RJ45_TX0- PR3-
TD4+ MX4+ 1
LAN_MDIP0 12 13 RJ45_TX0+ CL3 EMI@ RJ45_RX1- 6
TD4- MX4- PR2-
3

2
YSLC05CH_SOT23-3

ESD@ LANGND 120P_0402_50V8J RJ45_TX3+ 7 9

TSL1 DL1 2 PR4+ GND 10
10_100@ LANKO_LG-2446S-1 Giga@ RJ45_TX3- 8 GND
2 1 PR4-
@EMI@ SP050003P00 S X'FORM_ NS892407 1G
CL1 CL4 SP050006B10 SANTA_130456-291
1
0.01U_0402_16V7K
2
0.1U_0402_16V7K (SP050003P00) 10/100
(SP050006B10) Giga
1

SCA00000U10 LANGND

B B

RR1
1 2 +3VS_CR
+3VS +3VS_CR
0_0603_5%
short@
1 1 Card Reader Connector
4.7U_0402_6.3V6M
CR9
2
CR10
2 0.1U_0402_16V7K
RTS5239 RR4-RR9 close to chip CONN@
CR12-CR13 close to chip or socket JREAD1
UR1 SD_D3_R 1
PCIE_ATX_C_DRX_P1 1 12 SD_D1 @ RR2 1 2 SD_D1_R 208MHz DAT3
Close to Chip 5 PCIE_ATX_C_DRX_P1 HSIP SP1
0_0402_5%
PCIE_ATX_C_DRX_N1 2 13 SD_D0 @ RR4 1 2 0_0402_5% SD_D0_R @ CR12 SD_CMD_R 2
5 PCIE_ATX_C_DRX_N1 HSIN SP2 +CR_VDD_3V3 CMD
CLK_PCIE_CR 3 14 SD_CLK EMI@ RR5 1 2 33_0402_5% SD_CLK_R 1 2
7 CLK_PCIE_CR 4 REFCLKP SP3 16
CLK_PCIE_CR# SD_CMD @ RR3 1 2 0_0402_5% SD_CMD_R Close to Conn 3
7 CLK_PCIE_CR# REFCLKN SP4 VSS1
CL17 1 2 0.1U_0402_16V7K PCIE_ARX_C_DTX_P1 5 17 SD_D3 @ RR6 1 2 0_0402_5% SD_D3_R 6.8P_0402_50V8C
5 PCIE_ARX_DTX_P1 HSOP SP5
CL18 1 2 0.1U_0402_16V7K PCIE_ARX_C_DTX_N1 6 18 SD_D2 @ RR7 1 2 0_0402_5% SD_D2_R +CR_VDD_3V3 4
5 PCIE_ARX_DTX_N1 HSON SP6 VDD

0.1U_0402_16V7K
20 SD_WP
SP7

4.7U_0603_6.3V6M
1 SD_CLK_R 5
CLK

1
15 1 2 CR7 CR8
24 DV33_18 11 6
9 CR_CLKREQ#
CR_CLKREQ#
CLKREQ# DV12_S
+DVDD12 CR14 1U_0402_6.3V4Z Close to Chip VSS2
PLT_RST# 23

2
22 PERST# 2 SD_D0_R 7
SD_CD# 21 MS_INS# 9 +3VS_CR DAT0
+3VS_CR 1 2 19 SD_CD# 3V3_IN 7 +AVDD12 SD_D1_R 8
10K_0402_5% RR8 GPIO AV12 10 DAT1
CARD_3V3 +CR_VDD_3V3
SD_D2_R 9
DAT2
6.2K_0402_1% 1 2 RR9 RREF 8 25 SD_CD# 10 12
RREF GND CD G1
RTS5239-GR_QFN24_4X4 SD_WP 11 13
RR9 close to chip WP G2
TAITW_PSDAT0-09GLBS1ZZ4H1
A A

+DVDD12 +DVDD12 +AVDD12 +AVDD12 Close to Chip

+3VS_CR
0.1U_0402_16V7K

0.1U_0402_16V7K
4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

1 1
1

0.1U_0402_16V7K

CR1 CR2 CR3 CR4 1 1

CR5 CR6
2

2 2 4.7U_0402_6.3V6M @
2 2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN 8151/8166_ CR RTS5238
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 24 of 47
5 4 3 2 1
 A B C D E

RS1 @ 0_0402_5% USB3.0 need support 2.5A

2 1 CS1 USB30_MTX_C_DRX_P0 1 2 USB3TXDP0_C_R change USB PWR SW SA00003TV00
7 USB30_MTX_DRX_P0
0.1U_0402_16V7K
WCM-2012-900T_4P low active
4 3 +5VALW +USB_VCCA
4 3
EMI@ US1
W=100mils
1 2 W=100mils

1000P_0402_50V7K
1 2 1 8

0.1U_0402_16V7K
GND VOUT

47U_0805_6.3V6M
LM1 2 7
SM070003K00 3 VIN VOUT 6
1 2 1 CS2 USB30_MTX_C_DRX_N0 1 2 USB3TXDN0_C_R VIN VOUT 1
7 USB30_MTX_DRX_N0 4 5 1 1 1
0.1U_0402_16V7K RS2 @ 0_0402_5% EN FLG @

CS6
1 CS5
G547I2P81U_MSOP8 CS4
CS3
2 2 2
RS3 @ 0_0402_5% 0.1U_0402_16V7K
2
7 USB30_MRX_DTX_P0
1 2 USB3RXDP0_C <DB>Del B Cap.
WCM-2012-900T_4P @
4 3 RS4 1 2
4 3 28 USB_ON#
<EC> 0_0402_5% RS5 1 @ 2 USB_OC0# USB_OC0# 9
EMI@ 0_0402_5%
1 2
1 2
LM2 SM070003K00
1 2 USB3RXDN0_C @ESD@
7 USB30_MRX_DTX_N0
RS6 @ 0_0402_5% DM1 SCA00000U10
2 USB20_N8_C
RS7 @ 0_0402_5% 1
1 2 USB20_P8_C 3 USB20_P8_C
7 USB20_P8
LM3 USB20_N8 YSLC05CH_SOT23-3
1 2
1 2
2
USB2.0/USB3.0 port 1 2

1
EMI@
4 3 R221
4 3 @ SC300002800 +USB_VCCA
300_0402_5%
WCM-2012-900T_4P ESD@ DM2 JUSB4
1 2 USB20_N8_C USB3RXDN0_C 1 1 109 USB3RXDN0_C USB3TXDP0_C_R 9
7 USB20_N8

2
RS8 @ 0_0402_5% 1 SSTX+
USB3RXDP0_C 2 2 98 USB3RXDP0_C USB3TXDN0_C_R 8 VBUS
1 10P_0402_50V8J SSTX-
@ C294 USB20_P8_C 3
USB3TXDN0_C_R 4 4 77 USB3TXDN0_C_R 7 D+
USB20_N8_C 2 GND 10
2 USB3TXDP0_C_R 5 5 66 USB3TXDP0_C_R USB3RXDP0_C 6 D- GND 11
4 SSRX+ GND 12
3 3 USB3RXDN0_C 5 GND GND 13
SSRX- GND
8 ACON_TARA4-9K1311
CONN@
IP4292CZ10-TB

@ RS13 0_0402_5%
1 2 USB20_N9_C @ESD@
3 USB2.0 port x 2 7 USB20_N9
DM3 SCA00000U10 3
LM4 EMI@ 2 USB20_N9_C
1 2 1
1 2 3 USB20_P9_C +USB_VCCB
CONN@
4 3 YSLC05CH_SOT23-3 JUSB
4 3 1
WCM-2012-900T_4P 2 1
+USB_VCCB 1 2 USB20_P9_C 3 2
+5VALW 7 USB20_P9 3
@ RS14 0_0402_5% 4
5 4
W=100mils US2 W=100mils @ RS15 0_0402_5% 6 5
1 8 6
2 GND VOUT 7 1 2 USB20_P0_C USB20_P9_C 7
7 USB20_P0 7
3 VIN VOUT 6 USB20_N9_C 8
VIN VOUT LM5 EMI@ 9 8
4 5 9
EN FLG 1 2 USB20_P0_C 10
1 1 2 USB20_N0_C 11 10 13
G547I2P81U_MSOP8 11 G1
12 14
CS10 12 G2
4 3 @ESD@
0.1U_0402_16V7K 4 3 DM4 SCA00000U10 E-T_6916K-Q12N-00L
2
WCM-2012-900T_4P 2 USB20_P0_C
1 2 USB20_N0_C 1
7 USB20_N0 3
@ RS16 0_0402_5% USB20_N0_C
USB_ON# @ 1 2
4 RS10 0_0402_5% RS9 1 @ 2 USB_OC1# USB_OC1# 9 YSLC05CH_SOT23-3 4
0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB 3.0/2.0 conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 25 of 47
A B C D E
 5 4 3 2 1

UA1
+3VS +DVDD +DVDD_IO +1.5VS
20 1
MIC1_R DVDD +DVDD
19 9 1 @ 2 1 2
MIC1_L DVDD_IO +DVDD_IO
LA3

.1U_0402_16V7K
CA5

10U_0603_6.3V6M
CA6

.1U_0402_16V7K
CA7

10U_0603_6.3V6M
CA1 1 2 4.7U_0402_6.3V6M INT_MICR_C 18 26 RA2 SUPPRE_ KC FBMA-10-100505-101T 0402
MIC2_R AVDD1 +5VS_AVDD
INT_MIC RA3 1 2 1K_0402_5% CA4 1 2 4.7U_0402_6.3V6M INT_MICL_C 17 40 +1.5VS_AVDD 0_0603_5% 1 1 1 1 PCB Footprint = R_0402
MIC2_L AVDD2

CA8
31 41
MIC1_VREFO_L PVDD1 +5VS_PVDD
MUTE_LED_CTR 30 46
29 MIC1_VREFO_R PVDD2 2 2 2 2
+MIC2_VREFO MIC2_VREFO
23 45 SPK_R+
24 LINE2_R SPK_OUT_R+ 44 SPK_R-
LINE2_L SPK_OUT_R-

Internal Speaker Place near Pin1 Place near Pin9

16 42 SPK_L+
D MONO_OUT SPK_OUT_L+ 43 SPK_L- D
PC_BEEP 12 SPK_OUT_L- +5VS_AVDD +5VS
PCBEEP LA4 +1.5VS_AVDD +1.5VS
+3VS 10 33 HPOUT_R RA4 1 2 75_0402_1% HP_OUTR 1 2
9 HDA_SYNC_AUDIO SYNC HPOUT_R 32 HPOUT_L RA5 1 2 75_0402_1% HP_OUTL
Headphone FBMA-L11160808601LMA10T_2P 1 2
HPOUT_L

.1U_0402_16V7K
CA9

4.7U_0603_6.3V6K
CA10
HDA_RST_AUDIO# 11 LA5
9 HDA_RST_AUDIO# RESET#

.1U_0402_16V7K
CA12

4.7U_0603_6.3V6K
CA13
1 2 600ohms @100MHz 1A SUPPRE_ KC FBMA-10-100505-101T 0402
2 CPVDD +3VS 1 @ 2 5 1 2 PCB Footprint = R_0402
SDATA_OUT 8 1 2 22_0402_5% HDA_SDOUT_AUDIO 9 P/N: SM01000BU00
RA6 SDATA_IN RA7
SDATA_IN HDA_SDIN0 9
CA17 4.7K_0402_5% CA11 1 2 10U_0603_6.3V6M ALDO_CAP 7
LDO3-CAP 6 2 1
4.7U_0603_6.3V6K BCLK HDA_BITCLK_AUDIO 9
1 CA14 1 2 2.2U_0402_6.3V6M ACPVEE 34 2 1
CPVDD 36 CPVEE 22
CBN 35 CPVDD LINE1_L 21
1 2 2.2U_0402_6.3V6M 37 CBN LINE1_R 48
CA15 CBP
CBP SPDIFO/GPIO2
MIC_JD Place near Pin26
Place near Pin40
FBMA-L10-160808-301LMT_2P EMI@ LA7 15 JDREF RA9 2 1 20K_0402_1% GNDA
D_MIC_L_CLK 2 1 D_MIC_CLK D_MIC_DATA 2 JDREF 28 AVREF CA16 2 1 .1U_0402_16V7K GNDA
19 D_MIC_L_CLK GPIO0/DMIC_DATA VREF
D_MIC_L_DATA 2 1 D_MIC_DATA D_MIC_CLK 3 27 CA18 1 2 10U_0603_6.3V6M
19 D_MIC_L_DATA GPIO1/DMIC_CLK LDO1_CAP +5VS_PVDD +5VS
FBMA-L10-160808-301LMT_2P LA8 39 CA19 1 2 10U_0603_6.3V6M MUTE_LED 29
LDO2_CAP LA6 600ohms @100MHz 2A
PLUG_IN# RA10 1 2 39.2K_0402_1% SENSEA 13 25 1 2
14 SENSE_A AVSS1 38 FBMA-L11-201209601LMA20T_2P P/N: SM01000EE00
SENSE_B AVSS2

.1U_0402_16V7K
CA20

.1U_0402_16V7K
CA21

10U_0603_6.3V6M
CA22

10U_0603_6.3V6M
CA23
GNDA

3
4 1 1 2 2
47 DVSS 49 DA8
PDB Thermal Pad

3
+1.5VS +DVDD YSLC05CH_SOT23-3
SCA00002900 Q4B
1

ALC3227-CG_MQFN48P_6X6 AVREFCA24 1 2 2.2U_0402_6.3V6M 2 2 1 1

2N7002KDW_SOT363-6

1
MUTE_LED_CTR 5
RA25
2.2K_0402_5% 1K_0402_5%

4
1
RA26 GNDA
2 2

1
GNDA
2

10K_0402_5%
B

QA1 RA12
E

HDA_RST_AUDIO# 3 1 PD#

2
C

C C
MMBT3904WH_SOT323-3
1

SB000008E10
8/20 change conn check pin def
28 EC_MUTE#
1 2 10K_0402_5% Power down (PD#) power stage for save power Internal SPK
<DB>Relace RA13/RA14/RA15/RA16 close to UA1
DA3 RA11 0V: Power down power stage CONN@
CH751H-40PT_SOD323-2 SM010008A00 JSPK1
3.3V: Power up power stage
2

SPK_R- EMI@ RA131 2 FBMA-L11160808601LMA10T_2P SPK_R-_CONN 1

SPK_R+ EMI@ RA141 2 FBMA-L11160808601LMA10T_2P SPK_R+_CONN 2 1
SPK_L- EMI@ RA151 2 FBMA-L11160808601LMA10T_2P SPK_L-_CONN 3 2 5
SPK_L+ EMI@ RA161 2 FBMA-L11160808601LMA10T_2P SPK_L+_CONN 4 3 GND 6
SM010008A00 4 GND
ACES_87213-0400G

wide 40 MIL @EMI@ @EMI@ @EMI@ @EMI@

1 CA470 1 CA471 1 CA472 1 CA473

120P_0402_50V8J

120P_0402_50V8J

120P_0402_50V8J

120P_0402_50V8J
SPK_R-_CONN SPK_L-_CONN
2 2 2 2
SPK_R+_CONN SPK_L+_CONN

3
DA1 @ESD@ DA2 @ESD@
SCA00002900 SCA00002900
L03ESDL5V0CC3-2_SOT23-3 L03ESDL5V0CC3-2_SOT23-3
PC Beep

1
1 2 PC_BEEP_R
EC Beep 28 EC_BEEP#
CA31 Reserve for ESD request.
.1U_0402_16V7K RA19 INT_MIC_R HP_OUTR_R HP_OUTL_R +MIC2_VREFO
B
47K_0402_5%
GNDA Jack detect B

3
APU Beep 9 APU_SPKR
1 2 1 2 1 2 PC_BEEP Combo Mic = High

1
CA33 CA34 DA4
Normal HP = Low
1

.1U_0402_16V7K .1U_0402_16V7K YSLC05CH_SOT23-3 DA6

SCA00002900 YSLC05CH_SOT23-3 RA17
RA20 SCA00000U10 2.2K_0402_5%
10K_0402_5% ESD@

2
@ESD@ MIC_JD 1 2 INT_MIC
2

RA18
Close to Codec pin12

10U_0603_6.3V6M
CA32
22K_0402_5%

1
2

1
1

GNDA

COMBO AUDIO JACK

HPR, HPL, 15mil Keep 30mil CONN@
@ RA28 1 2 0_0402_5% EMI@ JHP
INT_MIC RA21 1 2 BLM15AG601SN1D_2P INT_MIC_R 3

6
@ RA27 1 2 0_0402_5% EMI@
HP_OUTL RA22 1 2 BLM15AG601SN1D_2P HP_OUTL_R 1

1 2 EMI@ 2
CA40 @EMI@ HP_OUTR RA23 1 2 BLM15AG601SN1D_2P HP_OUTR_R 4
.1U_0402_16V7K
PLUG_IN#
5
100P_0402_50V8J
CA35

100P_0402_50V8J
CA36

100P_0402_50V8J
CA37
1 2 1 1 1
1

CA38 @EMI@
A .1U_0402_16V7K RA24 @EMI@ SINGA_2SJ-E960-001F A

@EMI@

@EMI@
22K_0402_5%
2 2 2 GNDA
1 2
2

CA39 @EMI@ Pin4 and Pin5

.1U_0402_16V7K Normal OPEN
1 2 GNDA GNDA GNDA GNDA
CA29 EMI@
.1U_0402_16V7K

1 2
For ESD request
Security Classification Compal Secret Data Compal Electronics, Inc.
CA30 EMI@ 2013/01/04 2015/01/04 Title
Issued Date Deciphered Date
.1U_0402_16V7K
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AUDIO ALC259-VC2-CG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 1.0
GNDA DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 26 of 47
5 4 3 2 1
 ROM only mode R PIN 30 4.7k pull loRR Pin 31 4.7k pull high.
JPHW7 need to short EP mode : PIN 30 4.7k pull high, Pin 31 4.7k pull low.
+3VS +3VS_RT Layout note Layout note
Close to EEPROM : PIN 30 4.7k pull high, Pin 31 4.7k pull high.
80mil @ JPHW7 80mil
Close to LT5 Close to Pin18 Close to Pin13
1 2 Close to Pin11 Pin27 Close to Pin7 Default mode
1 2 BeemaLvds@ BeemaLvds@ +SWR_VDD
JUMP_43X79 BeemaLvds@ BeemaLvds@ +SWR_V12
+3VS_RT +3VS_RT

10U_0603_6.3V6M

0.1U_0402_16V4Z

22U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1 1 1 1 1
1 1 1 1

2
CT71

CT81

CT91

CT101

CT111
BeemaLvds@

CT121

CT131

CT141

CT151
RT21 RT31
2 2 2 2 2 2132S@
Layout note 2 2 2 2
4.7K_0402_5% 4.7K_0402_5%

Close to Pin3

1
BeemaLvds@ BeemaLvds@ MIIC_SDA MIIC_SCL
BeemaLvds@ BeemaLvds@ BeemaLvds@
BeemaLvds@ BeemaLvds@ +DP_V33

2
BeemaLvds@
10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

RT41 RT51
1 1 1 4.7K_0402_5% 2132S@ 4.7K_0402_5%
CT16

CT17

CT18

PIN30 PIN31

1
2 2 2

BeemaLvds@

+3VS_RT
UT1
BeemaLvds@ 19 LVDS_CLKP_eDP
LT612 1 +DP_V33 3 TXEC+ 20 LVDS_CLKN_eDP
40mil DP_V33 TXEC-
FBMA-L11-201209-221LMA30T_0805
RP38 BeemaLvds@
BeemaLvds@ 100mil 13 SWR_VDD TXE2+
21 LVDS_TXP2_eDP

Power
80mil LT512 1 +SWR_VDD 40mil 18 22 LVDS_TXN2_eDP LVDS_CLKP_eDP 4 5
SWR / LDO Mode select

LVDS
PVCC TXE2- LVDS_CLKP_F 19
FBMA-L11-201209-221LMA30T_0805 LVDS_CLKN_eDP 3 6
LVDS_CLKN_F 19
+SWR_V12 LT7 1 2 +SWR_LX 40mil 12 23 LVDS_TXP1_eDP LVDS_TXP2_eDP 2 7 LVDS_TXP2_F 19
SWR_LX TXE1+
@ 0_1206_5% 40mil 11 SWR_VCCK TXE1-
24 LVDS_TXN1_eDP LVDS_TXN2_eDP 1 8
LVDS_TXN2_F 19
LDO SWR 40mil 27 VCCK
40mil 7 DP_V12 TXE0+
25 LVDS_TXP0_eDP
0_0804_8P4R_5%
26 LVDS_TXN0_eDP
TXE0- <CONN>
RP39 BeemaLvds@
2132S Do not support mount LT7
LVDS_TXP1_eDP 4 5

H_EDP_AUXP_C_TL 2
RTD2132S LVDS_TXN1_eDP
LVDS_TXP0_eDP
3
2
6
7
LVDS_TXP1_F
LVDS_TXN1_F
19
19
AUX_P LVDS_TXP0_F 19

DP-IN
2132R Use 0 ohm mount LT7 H_EDP_AUXN_C_TL 1 14 LVDS_TXN0_eDP 1 8
<CONN>

GPIO
AUX_N GPIO(PWM OUT) eDP_DP_INT_PWM 19 LVDS_TXN0_F 19
15 +DP_ENVDD
5 GPIO(Panel_VCC) 16 +DP_ENVDD 19
H_EDP_TXP0_C_TL DP_INT_PWM
H_EDP_TXN0_C_TL 6 LANE0P GPIO(PWM IN) 17 TS_BKOFF#
DP_INT_PWM 19,6 <CPU> 0_0804_8P4R_5%
LANE0N GPIO(BL_EN)
If use 2132R, please select LDO mode as default. RP44 BeemaLvds@
EC_SMB_CK2 9 LVDS 29 LCD_CLK_eDP LCD_CLK_eDP 4 5
12,28,6 EC_SMB_CK2 CIICSCL1 MIICSCL1 LCD_CLK 19
EC_SMB_DA2 10 28 LCD_DATA_eDP LCD_DATA_eDP 3 6
<EC CTRL> 12,28,6 EC_SMB_DA2 CIICSDA1 EDID MIICDA1 LCD_DATA 19

Other
2 7
BeemaLvds@ 1 8
EDP_HPD 1 2 RT192 32 ROM 31 MIIC_SCL
6 EDP_HPD HPD MIICSCL0
1K_0402_1% 30 MIIC_SDA
MIICSDA0 0_0804_8P4R_5%
1

1 RT11 8
2 1 BeemaLvds@ 4 DP_REXT 33 +3VS_RT
19 EDP_HPD_panel 2
DP_GND GND
CT13 100K_0402_5% BeemaLvds@
220P_0402_50V7K @ RT19 LCD_CLK_eDP RT6 1 2 4.7K_0402_5%
2 0_0402_5% RT8 2132S@ RTD2132S-VE-CG_QFN32_5X5 BeemaLvds@
2

12K_0402_1% LCD_DATA_eDP RT7 1 2 4.7K_0402_5%

BeemaLvds@ UT1 BeemaLvds@
1

RT11
BeemaeDP@ RTD2132N-CG QFN32
100K_0402_5%
SD028100380
Layout note
Close to Pin8 PIN15 PIN16 Accept voltage input (high level)
RT14 BeemaeDP@
0_0402_5% 2132S TL_ENVDD 2132S 3.3V
KabiniLvds@
RT14 1 2 0_0402_5% 2132R +LCD_VDD * 2132R 1.5~3.3V
CT24
@ * Version R internal Power Switch, can * Version R has internal level shifter, remove
1 2
+3VS output 1A, Rds(on)=0.2 ohm level shifter circuit on AMD platform
0.1U_0402_16V7K
<RTS2132>
5

UT31
<EC CTRL> TS_BKOFF# 1
Different between 2132S and 2132R
P

B 4
Y DISPOFF# 19
1

BKOFF# 2
28 BKOFF# A
G

RT15
BeemaLvds@ TC7SH08FUF_SSOP5
2132S 2132R
3

100K_0402_5% BeemaLvds@
1. Support SWR mode 1. Support LDO mode and SWR mode
2

2. Internal ROM
3. Support LCD_VDD(internal Power switch)
< Kabini LVDS> < Kabini eDP> 4. Integrates Level shifter

LVDS_TXN2 BeemaeDP@ C231 1 2 0.1U_0201_10V6K LVDS_TXN2_K C231 C236 C231

LVDS_TXP2 BeemaeDP@ C232 1 2 0.1U_0201_10V6K LVDS_TXP2_K KabiniLvds@ KabiniLvds@ KabinieDP@
LTDP0_TXP3 LVDS_CLKP @ C233 1 2 0.1U_0201_10V6K LVDS_CLKP_F 0_0201_5% 0_0201_5% 0.1U_0201_10V6K
6 LVDS_CLKP
LTDP0_TXN3 LVDS_CLKN @ C234 1 2 0.1U_0201_10V6K LVDS_CLKN_F SD043000080 SD043000080 SE00000SV00
6 LVDS_CLKN
C232 C237
KabiniLvds@ KabiniLvds@ C232
0_0201_5% 0_0201_5% KabinieDP@ +LCDVDD
SD043000080 SD043000080 0.1U_0201_10V6K
C233 C238 SE00000SV00 +DP_ENVDD 1 2
LTDP0_TXP1 LVDS_TXP1 @ C235 1 2 0.1U_0201_10V6K LVDS_TXP1_F KabiniLvds@ KabiniLvds@ 80ml trace width RT9 0_0805_5%
6 LVDS_TXP1
LTDP0_TXN1 LVDS_TXN1 @ C236 1 2 0.1U_0201_10V6K LVDS_TXN1_F 0_0201_5% 0_0201_5% C239 BeemaLvds@
6 LVDS_TXN1

1
LTDP0_TXP2 LVDS_TXP0 @ C237 1 2 0.1U_0201_10V6K LVDS_TXP0_F SD043000080 SD043000080 KabinieDP@
<CPU> LTDP0_TXN2
6 LVDS_TXP0
LVDS_TXN0 @ C238 1 2 0.1U_0201_10V6K LVDS_TXN0_F C234 C239 0.1U_0201_10V6K Close to Pin15
2
RT10
6 LVDS_TXN0
KabiniLvds@ KabiniLvds@ SE00000SV00 CT23 100K_0402_5%
0_0201_5% 0_0201_5% 4.7U_0603_6.3V6K BeemaLvds@
SD043000080 SD043000080 C240 BeemaLvds@ 1

2
C235 C240 KabinieDP@
LTDP0_TXP0 BeemaLvds@ CT21 1 2 0.1U_0201_10V6K H_EDP_TXP0_C_TL KabiniLvds@ KabiniLvds@ 0.1U_0201_10V6K
6 LVDS_TXP2
0_0201_5% 0_0201_5% SE00000SV00
LTDP0_TXN0 BeemaLvds@ CT22 1 2 0.1U_0201_10V6K H_EDP_TXN0_C_TL SD043000080 SD043000080 Close to Panel conn.
6 LVDS_TXN2

LTDP0_AUXP BeemaLvds@ CT19 1 2 0.1U_0201_10V6K H_EDP_AUXP_C_TL

6 AUXP_DDC_CLK

LTDP0_AUXN BeemaLvds@ CT20 1 2 0.1U_0201_10V6K H_EDP_AUXN_C_TL

6 AUXN_DDC_DATA

RP40
RP40 KabiniLvds@
Security Classification Compal Secret Data Compal Electronics, Inc.
BeemaeDP@ AUXN_DDC_DATA 4 5 AUXN_DDC_DATA_K 2013/02/26 2015/07/08 Title
AUXP_DDC_CLK 3 6 AUXP_DDC_CLK_K
Issued Date Deciphered Date
0_0804_8P4R_5%
SD309000080 LVDS_TXN2_K 2 7 LVDS_TXN2_F AUXN_DDC_DATA_K BeemaeDP@ C239 1 2 0.1U_0201_10V6K LCD_DATA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP to LVDS
LVDS_TXP2_K 1 8 LVDS_TXP2_F AUXP_DDC_CLK_K BeemaeDP@ C240 1 2 0.1U_0201_10V6K LCD_CLK AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
0_0804_8P4R_5% Date: Tuesday, May 20, 2014 Sheet 27 of 47
 5 4 3 2 1

14" DB SI PV MV
Analog Board ID definition
+3VALW_EC
UMA
+3VALW_EC 0 ohm 15K ohm 27K ohm 43K ohm
+3VL R214
L9 L10 DIS

2
1 2 0.1U_0402_25V6 0.1U_0402_25V6 1 2 +EC_VCCA 130k ohm 200k ohm 270k ohm 430k ohm
BLM18AG601SN1D_2P 1 1 C176 1 1 2 2 BLM18AG601SN1D_2P R210 R214
C175 1 Ra

1000P_0402_50V7K
C180
C177 C178 C179 C181 100K_0402_1%
1000P_0402_50V7K +EC_VCC_VL 0.1U_0402_25V6

1
2 2 2 2 1 1
0.1U_0402_25V6 0.1U_0402_25V6 2
AD_BID0 15" DB SI PV MV
ECAGND UMA
ECAGND 36

2
12k ohm 20K ohm 33K ohm 56K ohm
@ R214 R214
DIS

111
125
D D
20K_0402_1% 160k ohm 240k ohm 330k ohm 560k ohm

22
33
96

67
9
U44 R214

1
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC

EC_VDD/VCC

EC_VDD/AVCC
EC_GA20 1 21 MINI1_LED# DIS_MV@ R214 UMA_MV@ R214
9 EC_GA20 GATEA20/GPIO00 GPIO0F MINI1_LED# 22
EC_KBRST# 2 23 EC_BEEP#
9 EC_KBRST# 3 KBRST#/GPIO01 BEEP#/GPIO10 26 EC_BEEP# 26
SERIRQ S RES 1/16W 560K +-1% 0402 S RES 1/16W 56K +-1% 0402
31,7 SERIRQ LPC_FRAME# 4 SERIRQ GPIO12 27 SD034560380 SD034560280
31,7 LPC_FRAME# LPC_FRAME# ACOFF/GPIO13
LPC_AD3 5 B/I#
31,7 LPC_AD3 7 LPC_AD3 B/I# 36,37
LPC_AD2 PWM Output
31,7 LPC_AD2 LPC_AD2
LPC_AD1 8 63 C184 0.01U_0402_50V7K 2 1 ECAGND
31,7 LPC_AD1 10 LPC_AD1 BATT_TEMP/AD0/GPIO38 64
LPC_AD0 LPC & MISC AD_BID0
31,7 LPC_AD0 LPC_AD0 AD1/GPIO39 65 ADP_I ADP_I 36,38
LPC_CLK0_EC 12 ADP_I/AD2/GPIO3A 66 ADP_ID EC_ACIN R229 1 @ 2 0_0402_5%
7 LPC_CLK0_EC CLK_PCI_EC AD Input AD3/GPIO3B ADP_ID 36 ACIN 12,36,37,38
13 75
9 LPC_RESET# PCIRST#/GPIO05 AD4/GPIO42
+3VALW_EC 2 1 EC_RST# 37 76 DP_ENBKL
R226 47K_0402_5% EC_SCI# 20 EC_RST# IMON/AD5/GPIO43 DP_ENBKL 6 C188 2 1 100P_0402_50V8J
9 EC_SCI# EC_SCII#/GPIO0E
2 1 1 @ 2 38
C186 0.1U_0402_25V6 R223 10K_0402_1% GPIO1D
DS9 @ESD@ 1 @ 2 68 LAN_PWR_EN
7 LPC_CLKRUN_L DAC_BRIG/GPIO3C LAN_PWR_EN 24
LPC_RESET# 2 1 R355 10K_0402_1% DA Output 70 EC_LAN_ISOLATEB# EC_LAN_ISOLATEB# 24
29 KSI[0..7] 55 EN_DFAN1/GPIO3D 71
KSI0 EN_DFAN1 EN_DFAN1 30
KSI1 56 KSI0/GPIO30 IREF/GPIO3E 72
CK0402101V05_0402-2 KSI2 57 KSI1/GPIO31 CHGVADJ/GPIO3F 20mil trace
KSI3 58 KSI2/GPIO32 83 EC_MUTE#
KSI3/GPIO33 EC_MUTE#/GPIO4A EC_MUTE# 26
KSI4 59 84 PM_SLP_S4# +EC_VCC_VL 0_0402_5% 1 @ 2 +3VL
KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 PM_SLP_S4# 40 R222
KSI5/GPIO35 CAP_INT#/GPIO4C WLAN_OFF_LED# 29
KSI6 61 PS2 Interface 86 SERR#
KSI6/GPIO36 EAPD/GPIO4D SERR# 9
KSI7 62 87 TP_CLK
29 KSO[0..17] 39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_CLK 29 2 1
KSO0 TP_DATA USB_ON# +5VALW
KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA 29
KSO1 40 10K_0402_1% R228
KSO2 41 KSO1/GPIO21
KSO3 42 KSO2/GPIO22 97 VGATE 2 @ 1
KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 VGATE 43 +3VALW
KSO4 43 98 10K_0402_1% R362
KSO5 44 KSO4/GPIO24 WOL_EN/GPXIOA01 99 VLDT_EN#
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH
VLDT_EN# 32
C C
KSO7 46 KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH 36
KSO7/GPIO27 SPI Device Interface
KSO8 47
KSO9 48 KSO8/GPIO28 119 EC_SPI_SO
49 KSO9/GPIO29 SPIDI/GPIO5B 120 EC_SPI_SO 7
KSO10 EC_SPI_SI
KSO10/GPIO2A SPIDO/GPIO5C EC_SPI_SI 7 +3VALW_EC
KSO11 50 SPI Flash ROM 126 EC_SPI_R_CLK 1 2 EC_SPI_CLK
51 KSO11/GPIO2B SPICLK/GPIO58 128 EC_SPI_CLK 7
KSO12 EC_SPI_CS0# @ R252 0_0402_5%
KSO12/GPIO2C SPICS#/GPIO5A EC_SPI_CS0# 7
KSO13 52 RP2
KSO14 53 KSO13/GPIO2D LID_SW# 1 8
KSO15 54 KSO14/GPIO2E 73 TOUCH_ON# DP_ENBKL 2 7
KSO15/GPIO2F ENBKL/AD6/GPIO40 TOUCH_ON# 19
KSO16 81 74 SPOK VR_ON 3 6
82 KSO16/GPIO48 PECI_KB930/AD7/GPIO41 89 SPOK 39,41,42 4 5
KSO17 TS_GPIO_EC SYSON
KSO17/GPIO49 FSTCHG/GPIO50 TS_GPIO_EC 19
90 BAT_CHG_LED
BATT_CHG_LED#/GPIO52 BAT_CHG_LED 36
91 CAP_LOCK# 100K_0804_8P4R_5%
CAPS_LED#/GPIO53 CAP_LOCK# 29
EC_SMB_CK1 77 GPIO 92 PWR_LED#
31,37,38 EC_SMB_CK1 EC_SMB_CK1/GPIO44 PWR_LED#/GPIO54 PWR_LED# 30
EC_SMB_DA1 78 93
31,37,38 EC_SMB_DA1 79 EC_SMB_DA1/GPIO45 BATT_LOW_LED#/GPIO55 95 WLAN_ON_LED# 29
EC_SMB_CK2 SM Bus SYSON
12,27,6 EC_SMB_CK2 EC_SMB_CK2/GPIO46 SYSON/GPIO56 SYSON 40
EC_SMB_DA2 80 121 VR_ON
12,27,6 EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 VR_ON 43 +3VS
127 0.95_1.8VALW_PWREN
PM_SLP_S4#/GPIO59 0.95_1.8VALW_PWREN 42
+3VALW_EC RP3 +3VALW_EC
SLP_S3# 6 100 EC_RSMRST# EC_SMB_DA2 1 8
SLP_S3# 9 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 EC_RSMRST# 9
SLP_S5# 14 101 EC_LID_OUT# EC_SMB_CK2 2 7
SLP_S5# 9 PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# 9

2
EC_SMI# 15 102 VCIN1_PH R218 EC_SMB_DA1 3 6
9 EC_SMI# EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 VCIN1_PH 36
Delay EC_PWROK 50ms WL_PWREN_EC 16 103 H_PROCHOT#_EC BeemaeDP@ EC_SMB_CK1 4 5
23 WL_PWREN_EC GPIO0A H_PROCHOT#_EC/GPXIOA06 H_PROCHOT#_EC 36,6 10K_0402_1%
AC_AND_CHAG 17 104 MAINPWON
for VGA criterial 37 AC_AND_CHAG 18 GPIO0B VCOUT0_PH/GPXIOA07 105
MAINPWON 39
AC_LED# GPO BKOFF# 10K_0402_1% R218 2.2K_0804_8P4R_5%
36 AC_LED# GPIO0C BKOFF#/GPXIOA08 BKOFF# 27
WLAN_WAKE# 19 GPIO 106 PBTN_OUT# SD034100280 KabinieDP@

1
22 WLAN_WAKE# EC_INVT_PWM 25 GPIO0D PBTN_OUT#/GPXIOA09 107 PBTN_OUT# 9
19 EC_INVT_PWM 28 EC_INVT_PWM/GPIO11 PCH_APWROK/GPXIOA10 108
FAN_SPEED1 VGA_AC_BATT VGA_AC_BATT 12 PANEL_SEL
30 FAN_SPEED1 EC_PME# 29 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11
24 EC_PME# 30 EC_PME#/GPIO15
E51TXD_P80DATA
9 SYS_PWRGD 22 E51TXD_P80DATA EC_TX/GPIO16

2
E51RXD_P80CLK 31 110 EC_ACIN R219 VGA_AC_BATT 2 @ 1 +3VALW
22 E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01
2 1 SYS_PWRGD 1 @ 2 GPIO18 32 112 EC_ON BeemaLvds@ 10K_0402_1% R366
10K_0402_1% @ R250 R251 0_0402_5% 34 PCH_PWROK/GPIO18 EC_ON/GPXIOD02 114 ON/OFF# EC_ON 39 10K_0402_1%
36 SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 115 LID_SW# ON/OFF# 30 10K_0402_1% R219
NUM_LED#/GPIO1A GPI LID_SW#/GPXIOD04 LID_SW# 30
Delay SUSP# 10ms
+1.8VALW 116 SUSP# SD034100280 KabiniLvds@
SUSP# 32,40,41,47

1
SUSP#/GPXIOD05 117 USB_ON#
B GPXIOD06 USB_ON# 25 B
modify by 20130103 118 PANEL_SEL
PECI_KB9012/GPXIOD07
AGND/AGND

122
13,45,9 DGPU_PWR_EN XCLKI/GPIO5D +3VS
2 1 SYS_PWRGD 1 @ 2 EC_CRY2 123 124 V18R
GND/GND
GND/GND
GND/GND
GND/GND

9 RTC_CLK XCLKO/GPIO5E V18R

10K_0402_1% R257 R253 0_0402_5% 1
1

GND0

2 C190
R254 C191
100K_0402_1% 22P_0402_50V8J 4.7U_0603_6.3V6K RP4
KB9012QF-A3_LQFP128_14X14 2 EC_SCI# 1 8
11
24
35
94
113

69

1 Part Number = SA00004OB30 EC_SMI# 2 7

20mil
2

LPC_RESET# 3 6
4 5
ECAGND 2 L11 1
10K_0804_8P4R_5%
DS1 @ESD@ BLM18AG601SN1D_2P
H_PROCHOT#_EC 2 1

CK0402101V05_0402-2 E51TXD_P80DATA 1 R211 2100K_0402_1%

SUSP# 1 R213 2
SYS_PWRGD C182 1 2 0.1U_0402_25V6 100K_0402_1%

DS3 @ESD@
EC_KBRST# 2 1

CK0402101V05_0402-2
DS4 @ESD@
SUSP# 2 1 +3VALW_EC

VLDT_EN# 2 1
CK0402101V05_0402-2 10K_0402_1% R230
DS5 @ESD@
SUSP# 2 1

CK0402101V05_0402-2
A A
DS6 @ESD@ +3VALW
SPOK 2 1

TP_CLK 2 1
CK0402101V05_0402-2 4.7K_0402_5% R244
TP_DATA 2 1
DS8 @ESD@ 4.7K_0402_5% R245
SLP_S3# 2 1

CK0402101V05_0402-2 Security Classification Compal Secret Data Compal Electronics, Inc.

DS10 ESD@ 2011/07/08 2015/07/08 Title
EC_RST# 2 1
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB9012 A3
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
CK0402101V05_0402-2 C 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 28 of 47
5 4 3 2 1
 28 KSI[0..7]
KSI7 Keyboard conn
KSI6
KSI5
KSI4
Touch pad conn KSI3
KSI2 CONN@ JKB1
KSI1 KSI1 1
KSI0 KSI7 2 1
KSI6 3 2
KSO9 4 3
KSI4 5 4
KSI5 6 5
28 KSO[0..17]
KSO17 KSO0 7 6
KSO16 KSI2 8 7
KSO15 KSI3 9 8
KSO14 KSO5 10 9
ESD@ KSO13 KSO1 11 10
KSI0 C193 2 1 100P_0402_50V8J KSO12 KSI0 12 11
KSO11 KSO2 13 12
KSO10 KSO4 14 13
KSO9 KSO7 15 14
KSO8 KSO8 16 15
KSO7 KSO6 17 16
KSO6 KSO3 18 17
KSO5 KSO12 19 18
KSO4 KSO13 20 19
KSO3 KSO14 21 20
KSO2 KSO11 22 21
KSO1 KSO10 23 22
KSO0 KSO15 24 23
KSO16 25 24
KSO17 26 25
+5VS 27 26
CAP_LOCK# R203 1 2 3.3K_0402_5% 28 27
28 CAP_LOCK#
26 MUTE_LED MUTE_LED R207 1 2 3.3K_0402_5% 29 28
WL_WHIT 30 29
WL_AMBER 31 30 33
+5VS 32 31 G1 34
32 G2
ACES_50690-0320N-P01

+5VALW +5VALW
+3VALW
CONN@
JTP
1 1
TP_CLK 2 1
28 TP_CLK 3 2
TP_DATA C134
28 TP_DATA 4 3 470P_0402_50V8J CAP_LOCK#
4 2 MUTE_LED
5
GND 6
GND
HB_A090420-SAHR21 1 1

1
Amber White
2

ESD@ CC122 ESD@ CC123

DM5 R157 R158 100P_0402_50V8J 100P_0402_50V8J
3.3K_0402_5% 3.3K_0402_5% 2 2
YSLC05CH_SOT23-3
SCA00000U10

2
WL_AMBER WL_WHIT
ESD@

2N7002KDW_SOT363-6

2N7002KDW_SOT363-6
6

3
Q20A

Q20B
1

2 5
28 WLAN_OFF_LED# WLAN_ON_LED# 28

4
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 29 of 47
 A B C D E

Powert Button Connector

+3VL

1 1
White
1
LED10 +3VALW
C166 220_0402_5% R2744
0.1U_0402_25V6 PWR_LED# 2 1 1 2
2 CONN@ 28 PWR_LED#
JPWR
1 1 LTW-110DC5-C_WHITE

3
LID_SW# 2 1
28 LID_SW# 3 2 CS20
28 ON/OFF# ON/OFF# 0.1U_0402_16V7K
4 3
4 2
5
White
GND 6 LED9 +3VS
GND 220_0402_5% R2743
HB_A090420-SAHR21 SATA_LED# 2 1 1 2
+3VL 7 SATA_LED#

1 LTW-110DC5-C_WHITE

3
ON/OFF# 1 R215 2 CS19 0.1U_0402_16V7K
100K_0402_1%
2
2 2
LID_SW#

1
ESD@ CC124
100P_0402_50V8J
2

3 3
+FAN_POWER

40mil
FAN conn +3VS
2.2U_0603_6.3V6K

1000P_0402_50V7K

1 1

1
+5VS +FAN_POWER
CE22 CE23 CE25 RE50
2.2U_0603_6.3V6K 10K_0402_5%
2 2 1 2
40mil CONN@ JFAN1

2
1
UE3 2 1
1 8 28 FAN_SPEED1 3 2
2 VEN GND 7 3
3 VIN GND 6 4
VO GND 1 GND
4 5 5
28 EN_DFAN1 VSET GND CE24 GND
APE8873M SOP 8P 0.01U_0402_16V7K ACES_85204-0300N
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title
PWRBTN/FAN
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 30 of 47
A B C D E
 5 4 3 2 1

D D

ACCELEROMETER +3V_GSEN
+3VS +3VS

+3VALW RH411 1 @ 2 +3V_GSEN

TPM1.2

1
0_0402_5%
@ RH503 0.1U_0402_16V4Z
0_0402_5% 1@ 1@ 1@
C1053 C1054 C1055
1

2
@ DH8 0.1U_0402_16V4Z @
2 2 2 C1052 *
SI# 2012.04.10 Change ACCEL_INT# to INT1
1 2 0.1U_0402_16V4Z 0.1U_0402_16V4Z

24
19
10
ACCEL_INT# 9

5
+3V_GSEN U69 2
ACCEL_INT#_R

VDD
VDD
VDD

VSB
CH751H-40PT_SOD323-2
@ U25
1 9 +3V_GSEN LPC_AD0 26 28
Vdd_IO INT2 11 28,7 LPC_AD0 23 LAD0 LPCPD# 9 1 2 PLT_RST#
LPC_AD1 BADD
INT1 28,7 LPC_AD1 LAD1 TESTB1/BADD
GS_SMB_CK1 4 14 LPC_AD2 20 8
SCL/SPC VDD 28,7 LPC_AD2 LAD2 TEST1
GS_SMB_DA1 6 LPC_AD3 17 R1412 0_0402_5%
7 SDA/SDI/SDO 5 28,7 LPC_AD3 LAD3 14
2 R208 1 8 SDO/SA0 GND 12 XTALO 13
+3V_GSEN CS GND XTALI
10K_0402_5% 10 TPM
RES
1

13 1 1 21 SLB 9656 TT 1.2 @

RES 7 LPC_CLK1 LCLK
@ R227 2 15 C241 LPC_FRAME# 22 2 T45 PAD
3 NC RES 16 28,7 LPC_FRAME# 16 LFRAME# GPIO2 6
0_0402_5% C242 PLT_RST#
NC RES 11,22,24,9 PLT_RST# LRESET# GPIO
0.1U_0402_16V7K 10U_0603_6.3V6M SERIRQ 27 T46 PAD
2 2 28,7 SERIRQ 15 SERIRQ @
HP3DC2TR CLKRUN#
2

+3VS 1 @ 2 7 1
@ @ R1380 PP NC 3
4.7K_0402_5% NC 12

GND
GND
GND
GND
NC
1

C C
@R209

1
0_0402_5% SLB 9656 TT 1.2

4
11
18
25
R1409
0_0402_5%
2

2
+3VALW +3VALW
2

@ R231 @ R232
4.7K_0402_5% 4.7K_0402_5%
2

@ QG1A
1

EC_SMB_CK1 6 1 GS_SMB_CK1
28,37,38 EC_SMB_CK1
2N7002DWH_SOT363-6
R217 1 @ 2 0_0402_5%
5

@ QG1B

EC_SMB_DA1 3 4 GS_SMB_DA1
28,37,38 EC_SMB_DA1
2N7002DWH_SOT363-6

B B
R216 1 @ 2 0_0402_5%

H23 H24 H22

H_2P6X3P1 H_2P6X3P1 H_3P0 H12 H14 H17 H18 H19 H20 H21
H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8
HOLEA HOLEA HOLEA
HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA

@ @ @
1

@ @ @ @ @ @ @
1

GPU screw hole CPU screw hole FIDUCIAL

H1 H3 H4 H5 H6 H7 FD1 FD2
H_2P8 H_2P8 H_2P8 H_2P8 H_2P8 H_2P8

HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA H25 H26 H9 H10 H11 H13 @ @

1
H_5P0 H_5P0 H_5P0 H_5P0 H_5P0 H_5P0
FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @ @ @ @ HOLEA HOLEA HOLEA HOLEA HOLEA HOLEA
1

FD3 FD4

@ @ @ @ @ @
1

1
A @ @ A

1
FIDUCIAL_C40M80 FIDUCIAL_C40M80

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LED/Screw hole
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 31 of 47
5 4 3 2 1
 A B C D E

+5VALW
+
+5VS
+1.8VALW
1
.
1
+5VALW TO +5VS 8
10U_0805_10V4Z
C201
+1.8VS
1 1
V

10U_0805_10V4Z
C202

1U_0603_10V4Z
C203
1 R195 1 @ 2 0_0402_5%
2 APU_VDDIO 43

10U_0805_10V4Z
C205
1 1

2 2 1 1

10U_0805_10V4Z
C204

1U_0603_10V4Z
C206
U17
2
T
1
2 VIN1 VOUT1
14
13
O U18 2 2

VIN1 VOUT1 1 7
SUSP# 3 12 2 VIN VOUT 8

4
ON1

VBIAS
CT1

GND
11 1 28,40,41,47 SUSP#
SUSP# + 3
VIN

ON
VOUT

CT
6

5
ON2 CT2
10 C207 1
+3VALW
6
VIN2 VOUT2
9 2
330P_0402_50V7K
+5VALW . 4
VBIAS
GND
5
1
7
VIN2 VOUT2
8 1 1
8 GND
9 C208

1U_0603_10V4Z
C216
330P_0402_50V7K
2
GPAD
15 C209
V
10U_0603_6.3V6M
C210

10U_0603_6.3V6M
C211

1 1 560P_0402_50V7K TPS22967DSGR_SON8_2X2
2 2
1
TPS22966DPUR_SON14_2X3
S
1U_0603_10V4Z
C213

2 2
+3VS
2 (
5
+3VALW TO +3VS 1 1 A

10U_0603_6.3V6M
C217

1U_0603_10V4Z
C218
)
2 2
+
2 2

1
.
5
V
T
O
++
01
..
+0.95VALW U19
AO4430L_SO8
+0.95VS

95 8
7
1
2
1
5V +0.95VS

4.7U_0603_6.3V6K
C222

1U_0402_6.3V6K
C225
C221 6 3 1 1
4.7U_0603_6.3V6K 5
V
2 S

1
2 @2
3 R273 3

+5VALW T( 470_0603_5%

O12

3 2

2N7002KDW_SOT363-6
2 0.95VS_GATE
R270
A 1
C16

2N7002KDW_SOT363-6
4.7K_0402_5%

6
+)

Q5B
.1U_0402_16V7K
VLDT_EN# 5
2
0

Q5A
VLDT_EN# 2
28 VLDT_EN#

4
.

1
9
5
V
S
(
4
A
)
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC Interface
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Custom Date: Tuesday, May 20, 2014 Sheet 32 of 47
A B C D E
 5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power sequence
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 33 of 47
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/02/26 Deciphered Date 2015/07/08 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EE Change list
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 34 of 47
5 4 3 2 1
 5 4 3 2 1

CMSRC ACDRV
B+
DC IN ACFET RBFET
D D

P36 Jumper +3VALW

RT8243A +3VALWP SY8003D
+1.8VALWP Jumper +1.8VALW
Charger
BQ24738 SPOK
EN P41
+5VALWP Jumper +5VALW
P38 EC_ON
EN P39

BATDRV +1.35V_VDDQP Jumper +1.35V_VDDQ

RT8207M SY8003D UMA only
Battery RBFET +1.5VSP Jumper +1.5VS
BATT
+0.6V_0.675VSP +0.6V_0.675VS SUSP#
SYSON Jumper EN P41
EN
P37 SUSP# P40

C C

RT8237E
+0.95VALWP Jumper +0.95VALW

0.95_1.8VALW_PWREN
EN P42

+CPU_CORE
ISL6277A

VR_ON +CPU_CORE_NB
EN P43~P44
B B

ISL62881C DIS only

+VGA_CORE
DGPU_PWR_EN
EN P45~P46

SY8208D DIS only

+1.5VSP Jumper +1.5VS
SUSP#
EN P47

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2012/04/03 Deciphered Date 2014/12/31 Title
Power Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-A997P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 35 of 47
5 4 3 2 1
 5 4 3 2 1

PL1 EMI@ VIN

ADPIN HCB2012KF-221T30_2P
1 2

PL2 EMI@
HCB2012KF-221T30_2P
1 2 @ PR2
0_0402_5%
PJP1 1 2 ACIN_LED

1000P_0402_50V7K
28 AC_LED#
ACES_59012-0080N-002

100P_0402_50V8J

100P_0402_50V8J

1000P_0402_50V7K
2 1
2 1

1
EMI@ PC1

EMI@ PC2

EMI@ PC3

EMI@ PC4
D D
4 3
4 3 PR3

2
6 5 ADP_SIGNAL 100K_0402_5%
6 5

2
Charge_LED 8 7 ACIN_LED
8 7
PR1
10K_0402_5% PR5
ADP_SIGNAL 1 2 2K_0402_5%
ADP_ID 28 1 2 Charge_LED
28 BAT_CHG_LED
3

1
100P_0402_50V8J

1000P_0402_50V7K
1

GLZ3.6B_LL34-2

1
PR8

10K_0402_5%
PR7

PD3

@ PC5

PC6
100K_0402_5%

2
2

2
ESD@ PD1 ESD@ PD2
1

L30ESD24VC3-2_SOT23-3 L30ESD24VC3-2_SOT23-3

+5VS

C +3VALW C

1
43,6,9 PROCHOT# PR10
47K_0402_1% PR11
6

PU1A 10K_0402_1%
2

4
PQ2A PC8 LM393DR_SO8

2
L2N7002DW 1T1G_SC88-6 0.022U_0402_16V7K 2

G
2 1 2 1 -
O

1
3

100P_0402_50V8J
+
1

1
P
1

PC9
PR12
PD4 PR13 8 100K_0402_1%

2
CD4148W N-1_1206-2 1.5M_0402_5%

2
2

+5VS B/I# 28,37

ADP_I 28,38

+3VALW +3VALW _EC

1

1
B B
PR17 PR26
47K_0402_1% PU1B PR18 PR25 5.9K_0402_1%
3

LM393DR_SO8 10K_0402_1% 10K_0402_1%

2

PQ2B PC12
2

2
L2N7002DW 1T1G_SC88-6 0.022U_0402_16V7K 5
P

5 1 2 7 + VCIN0_PH 28 VCIN1_PH 28

0.1U_0402_16V7K

0.1U_0402_16V7K
O
1

1
6
100P_0402_50V8J

-
G
1

1
@ PC15

@ PC16
4

PR21 PH1 PR27 @ PR28

PC13
4

PD5 PR20 100K_0402_1% 100K_0402_1%_NCP15W F104F03RC 10K_0402_1% 10K_0402_1%

2

2
CD4148W N-1_1206-2 1.5M_0402_5%
2

2
ECAGND 28 H_PROCHOT#_EC 28,6
2

ACIN 12,28,37,38

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/08/07 Deciphered Date 2016/08/06 Title
DC Conn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-A997P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 36 of 47
5 4 3 2 1
 5 4 3 2 1

@ PJPB2
1 2
1 2
JUMP_43X118

D D
BATT++ BATT+ BATT
@VGA@ PQ1
EMI@ PL3 SI4483ADY-T1-GE3_SO8
@ PJPB1 HCB2012KF-121T50_0805 1 8
1 1 2 2 7
1 2 3 6
2 3 5 @UMA@ PQ1
3

1
4 EMI@ PC10 EMI@ PC11 @ PR14 AO4407AL 1P SO8
4 5 1000P_0402_50V7K 0.01U_0402_25V7K 470K_0402_5%

4
5 6 1 2

2
6 7
7

1
8
8 9 @ PR15 @ PR16
GND 10
GND 470K_0402_5% 4.7K_0402_5%
PR19
OCTEK_BTJ-08FUAB 100_0402_5%

6 2
1 2
EC_SMB_DA1 28,31,38
PR22 @ PQ3A
100_0402_5% L2N7002DW 1T1G_SC88-6
1 2 2
EC_SMB_CK1 28,31,38
+3VL +3VL

1
1

100K_0402_5%

1
PR29
@ PR23
220K_0402_5%

3
C PR30 C
100_0402_5% 2 +3VL

2
1 2
B/I# 28,36
5

1
@ PQ3B
L2N7002DW 1T1G_SC88-6 @ PR24

6
220K_0402_5%
3

3
@ PQ4A
L2N7002DW 1T1G_SC88-6

2
2

3
1

1
@ PC14
100P_0402_50V8J 5
ACIN 12,28,36,38

2
ESD@ PD6 ESD@ PD7 @ PQ4B
1

L30ESD24VC3-2_SOT23-3 L30ESD24VC3-2_SOT23-3 L2N7002DW 1T1G_SC88-6

4
AC_AND_CHAG 28
Need to define "AC_AND_CHAG" signal with EC

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/08/07 Deciphered Date 2016/08/06 Title
BATT Conn
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-A997P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 37 of 47
5 4 3 2 1
 A B C D

1
D
2 PQ102
G 2N7002KW_SOT323-3
S

3
PR101 PR102
1 2 1 2

1M_0402_5% 3M_0402_5%
1 1

VIN PQ101 P1 P2 B+
AON6414AL_DFN8-5 PQ103 PR103 EMI@ PL101 PQ104
1 AON7506_DFN33-8-5 0.01_1206_1% 1.2UH_NRS4018T1R2NDGJ_2.6A_30% AON7506_DFN33-8-5
2 1 1 4 1 2 1
5 3 2 2

2200P_0402_50V7K
3 5 2 3 5 3

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

@EMI@ PC123

PC104

PC105
1

1
2200P_0402_50V7K

0.01U_0402_50V7K
4
1

1
VIN
PC101

PC102

PC107
2

2
1 2
2

2
3

2
PC106
0.1U_0402_25V6 PR104
ACDRV1_CHG 4.12K_0603_1%

0.1U_0402_25V6
PD101 BATDRV_CHG 1 2 BATDRV1_CHG

0.1U_0402_25V6

PC109
BAS40CW_SOT323-3

1
PC108
PC110
0.047U_0402_25V7K

2
1 2

5
10_1206_1%
PR105

1
2.2_0603_5%
PR106
PD102
RB751V-40_SOD323-2 @ PR107 PQ105
0_0603_5% SIS412DN-T1-GE3_POWERPAK8-5

2
PC111 DH_CHG 1 2 4

2
1U_0603_25V6K
1 2
4.12K_0603_1%

4.12K_0603_1%

REGN_CHG
1

2 BATT 2

VCC_CHG

BST_CHG
PR108

PR109

DH_CHG
PC112 PL102

LX_CHG

3
2
1
1U_0603_25V6K 4.7UH_ETQP3W4R7WFN_5.5A_20% PR110
1 2 0.01_1206_1%
LX_CHG 1 2 CHG 1 4
2

@EMI@ PR111
2 3

4.7_1206_5%
20

19

18

17

16
PU101

CSON1
CSOP1

RB551V-30_SOD323-2
BTST
PHASE

HIDRV
VCC

REGN

10U_0805_25V6K

10U_0805_25V6K
21 PQ106
PAD

0.1U_0402_25V6

0.1U_0402_25V6

1
AON7506_DFN33-8-5

PC114

PC115
1 SNB_CHG 2

1
PD103
ACN_CHG 1 15 DL_CHG 4
ACN LODRV

PC113

PC116
1

2
2 14

680P_0603_50V8J
ACP_CHG PR112

2
ACP GND

@EMI@ PC117
0_0603_1%

3
2
1

2
BQ24738RGRR_QFN20_3P5X3P5 1 2 CSOP1
CMSRC_CHG 3 13 SRP_CHG
CMSRC SRP

2
PR113 PC118
ACDRV_CHG 4 12 SRN_CHG 0_0603_5% 0.1U_0603_16V7K

2
PR114 ACDRV SRN 1 2 CSON1
10K_0402_1%
1 2 5 11 BATDRV_CHG
+3VL ACPRES ACDET BATDRV

IOUT

SDA

SCL

ILIM
12,28,36,37 ACIN
6

10
ACDET_CHG

IOUT_CHG

ILIM_CHG
3 3

PR115
357K_0402_1% +3VL
VIN 1 2

0.01U_0402_25V7K
100K_0402_1%
1
422K_0402_1%

PR116

PC119
1

1
PR117

2
2
2

Vin Dectector
EC_SMB_CK1 28,31,37
Min. Typ Max.
0.1U_0402_25V6

66.5K_0402_1%
1

H-->L 17.23V
PC120

PR118
1

EC_SMB_DA1 28,31,37
L-->H 17.63V
@ PR119
2

0_0402_5%
2

1 2
ILIM and external DPM ADP_I 28,36
1

3.61A PC121 @ PC122

100P_0402_50V8J 0.1U_0402_10V7K
2

4
Please locate the RC 4

Near EC chip
2011-02-22

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/08/07 Deciphered Date 2016/08/06 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CHARGER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Sheet 38 of 47
A B C D
 A B C D

PR302
165K_0402_1%
1 2

PR303
56K_0402_1%
1
1 2 1

PR304
@ PC302 143K_0402_1%
100P_0402_50V8J 1 2
1 2

PR301 PR305
14K_0402_1% 30K_0402_1%
1 2 1 2

B+ 3/5V_B+ 3/5V_B+
EMI@ PL301
HCB2012KF-121T50_0805
1 2 +3VALW PR306 PR307
20K_0402_1% 19.1K_0402_1%

ENTRIP_3V

ENTRIP_5V
1 2 1 2

4.7U_0805_25V6K

4.7U_0805_25V6K
1

TON_35V
2200P_0402_50V7K

1
PC321

PC322
FB_3V

FB_5V
4.7U_0805_25V6K

4.7U_0805_25V6K
PR318

@EMI@ PC318
10K_0402_1%
1

1
PC319

PC320

2
FB2 FB=2V

FB1 FB=2V
2
28,41,42 SPOK
2

5
PQ301

ENTRIP2

ENTRIP1
TON
SIS412DN-T1-GE3_POWERPAK8-5 21
PC305 PR309 6 PAD
0.1U_0402_10V7K 2.2_0402_1% PGOOD 20 PR310 PC306
4 1 2 BST1_3V 1 2 BYP1 2.2_0402_1% 0.1U_0402_10V7K
BST_3V 7 1 2 BST1_5V 1 2 4
@EMI@ PR319 BOOT2 19 BST_5V
2
0_0402_5% BOOT1 @EMI@ PR320 PQ302 2

1 2 8 0_0402_5% SIS412DN-T1-GE3_POWERPAK8-5
1
2
3
PL303 UGATE2 18 1 2

3
2
1
UGATE1
Vo=3.4V 4.7UH_ETQP3W4R7WFN_5.5A_20% PL302
1 2 LX_3V 9 2.2UH_ETQP3W2R2WFN_8.5A_20% Vo=5.14V
+3VALWP PHASE2 17 LX_5V 1 2
PHASE1 +5VALWP
1

@EMI@ PR311
4.7_1206_5%

@EMI@ PR312
LG_3V 10

4.7_1206_5%
LGATE2
5

16 LG_5V

ENLDO
LGATE1

5
220U_6.3VM_R15

LDO5

LDO3

AON7506_DFN33-8-5
1

ENM
VIN
PQ303
SNUB_3V 2

+
PC316

AON7506_DFN33-8-5

220U_6.3VM_R15
1

SNUB_5V 2
PU301

11

12

13

14

15
4 +

PC317
RT8243AZQW_WQFN20_3X3
2

PQ304
4

+5VLP

+3VLP
680P_0603_50V8J

2
@EMI@ PC311

680P_0603_50V8J
PR313
1

+3VLP

@EMI@ PC312
499K_0402_1%
1
2
3

1
1 2 @ PJ301
3/5V_B+

3
2
1
JUMP_43X39
2

100K_0402_1%
1 2

1U_0603_10V6K
0.1U_0603_25V7K
+3VL

2
1 2

1
PC313

PR314

PC314
1

1
(100mA,40mils ,Via NO.= 2)

1
PC310

2
4.7U_0603_10V6K

2
PR315
2.2K_0402_1%
3
1 2 3

28 EC_ON
@ PR316 @ PJ304
0_0402_5% JUMP_43X39
1 2 1 2
+VL
28 MAINPWON 1 2

4.7U_0603_6.3V6K
(100mA,40mils ,Via NO.= 2)

1
@ PC315
1

1
@ PR317 PC309
100K_0402_5% 4.7U_0603_10V6K
2

2
2
@ PJ302
1 2
+3VALWP 1 2 +3VALW
JUMP_43X118

@ PJ303
1 2
+5VALWP 1 2 +5VALW
JUMP_43X118

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/08/07 Deciphered Date 2016/08/06 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
3VALW/5VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Sheet 39 of 47
A B C D
 5 4 3 2 1

EMI@ PLM1
HCB2012KF-121T50_0805 PCM2 PRM1
B+ 1 2 B+_DDR 0.22U_0402_10V6K 2.2_0402_1%
1 2 BST_DDR-1 1 2

2200P_0402_50V7K

10U_0805_25V6K
D D

4.7U_0805_25V6-K
@EMI@ PCM13
@EMI@ PRM12

1
PCM1

PCM3
0_0402_5%
1 2
+1.35V_VDDQP

2
+0.6V_0.675VSP

BST_DDR
DH_DDR
LX_DDR
5

10U_0805_6.3V6K

10U_0805_6.3V6K
1

1
PCM4

PCM5
16

17

18

19

20

2
4

VLDOIN
PHASE

UGATE

BOOT

VTT
PQM1 21
SIS412DN-T1-GE3_POW ERPAK8-5 PAD
PLM2 DL_DDR 15 1

1
2
3
2.2UH_ETQP3W 2R2W FN_8.5A_20% LGATE VTTGND
1 2
+1.35V_VDDQP 14
PGND VTTSNS
2
1

5
PRM3
13.3K_0402_1%
PRM2 @EMI@ 1 2 CS_DDR 13 PUM1 3
4.7_1206_5% PQM2 CS RT8207MZQW _W QFN20_3X3 GND
AON7506_DFN33-8-5
330U_2.5V_M

1
2

4 12 4 VTTREF_DDRT
+ +5VALW VDDP VTTREF
PCM6

C PRM4 C
1SNB_DDR

5.1_0603_5%
1 2 VDD_DDR 11 5 +1.35V_VDDQP
2 +5VALW VDD VDDQ

PGOOD
1
2
3

1
TON
PCM8 PCM9 PCM10

FB
S5

S3
PCM7 @EMI@ 1U_0603_10V6K 1U_0603_10V6K 0.033U_0402_16V7K

2
680P_0603_50V7K
2

10

6
FB=0.75V
TON_DDR

FB_DDR
S5_DDR

S3_DDR
PRM5
8.06K_0402_1%
1 2 +1.35V_VDDQP
PRM6
887K_0402_1% Vo=1.3545V
B+_DDR 1 2

1
@0@ PRM7
0_0402_5%
1 2 PRM8
28 PM_SLP_S4#
10K_0402_1%

1
@ESD@ PDM2
CK0402101V05_0402-2
PRM9

2
30K_0402_5%
1 2 @ PJPM2
B 28 SYSON B
1 2
+1.35V_VDDQP 1 2 +1.35V_VDDQ
JUMP_43X118

2
@ PJPM1
@ PRM11 JUMP_43X39
0_0402_5% 1 2
28,32,41,47 SUSP#
1 2 +0.6V_0.675VSP 1 2
+0.6V_0.675VS

1
0.1U_0402_10V7K

@ESD@ PDM1
1

CK0402101V05_0402-2
@ PCM12
PCM11
0.1U_0402_10V7K

2
A A

Security Classification Compal Secret Data

Title
Compal Electronics, Inc.
Issued Date 2013/08/07 Deciphered Date 2016/08/06
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.35V/0.675VS
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-A521P 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 40 of 47
5 4 3 2 1
 5 4 3 2 1

D D

UMA@ PU1501

EMIUMA@ PL1501 4 5 UMA@ PL1502

PGND NC
+3VALW HCB1608KF-121T30_0603 2.2UH +-20% MMD-04BZ-2R2M-X2 3A Vo=1.503V
1 2 1.5V_B+ 3 6 1 2
IN LX +1.5VSP

2200P_0402_50V7K

22U_0805_6.3V6M

22U_0805_6.3V6M

1
2 7

22P_0402_50V8J
PG EN

@EMIUMA@ PC1510

UMA@ PC1509
1

1
1 8

UMA@ PC1501

UMA@ PC1502
UMA@ PR1504

22U_0805_6.3V6M

22U_0805_6.3V6M
FB=0.6V FB SGND 9 30.1K_0402_1%
PGND

1
UMA@ PC1503

UMA@ PC1504
SY8003DFC_DFN8_2X2

2
1
@EMIUMA@ PR1502
1

4.7_1206_5%
UMA@ PR1505
20K_0402_1%
@UMA@ PR1501 @ PJP1501

2
0_0402_5% JUMP_43X79

2
1 2 EN_1.5V 1 2
28,32,40,47 SUSP# +1.5VSP 1 2 +1.5VS

1
1
UMA@ PR1503

680P_0402_50V7K
@EMIUMA@ PC1507
@UMA@ PC1508 1M_0402_5%

1
0.1U_0402_16V7K

2
C C

2
PU1801
B B
EMI@ PL1801 4 5 PL1802
PGND NC
+3VALW HCB1608KF-121T30_0603 2.2UH +-20% MMD-04BZ-2R2M-X2 3A Vo=1.8V
1 2 1.8V_B+ 3 6 1 2
IN LX +1.8VALWP
2200P_0402_50V7K

22U_0805_6.3V6M

22U_0805_6.3V6M

1
2 7

22P_0402_50V8J
PG EN PR1804
1

1
1 8
@EMI@ PC1810

PC1801

PC1802

PC1809
20K_0402_1%

22U_0805_6.3V6M

22U_0805_6.3V6M
FB=0.6V FB SGND 9
PGND
2

1
PC1803

PC1806
SY8003DFC_DFN8_2X2

2
1
1

4.7_1206_5%

PR1805
@EMI@PR1802

10K_0402_1%
@ PR1801

2
0_0402_5%
2

1 2 EN_1.8V
28,39,42 SPOK
@ PJP1801
1

JUMP_43X79
@ESD@ PD1801
1

CK0402101V05_0402-2

1 2
+1.8VALW P 1 2 +1.8VALW
1

PR1803
680P_0402_50V7K

@ PC1808 1M_0402_5%
1

0.1U_0402_16V7K
2

@EMI@PC1807
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/08/07 Deciphered Date 2016/08/06 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.5VS/1.8VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Sheet 41 of 47
5 4 3 2 1
 5 4 3 2 1

EMI@ PL9501
HCB2012KF-121T50_0805
0.95V_B+ 1 2
B+

2200P_0402_50V7K
4.7U_0805_25V6K

4.7U_0805_25V6K
1

1
PC9501

@EMI@ PC9503
PC9502
2

2
D D

5
4
PR9503 PC9504
PU9501 2.2_0603_5% 0.1U_0603_25V7K PQ9501
PR9502 1 10 1
BST_0.95V 2 BST_0.95V-1 1 2 SIS412DN-T1-GE3_POWERPAK8-5
105K_0402_1% PGOOD BOOT +0.95VALWP +0.95VALW

3
2
1
@ PR9504 1 2 TRIP_0.95V 2 9 UG_0.95V PL9502 @ PJ9501
0_0402_5% CS UGATE 2.2UH_ETQP3W2R2WFN_8.5A_20% JUMP_43X118
1 2 EN_0.95V 3 8 SW_0.95V 1 2 1 2
28 0.95_1.8VALW_PWREN EN PHASE 1 2

1
@0@ PR9511 FB_0.95V 4 7
FB VCC +5VALW

5
0_0402_5% @ PJ9502

330U 6.3V M
AON7506_DFN33-8-5

ESR=15m ohm
1

PC9508
28,39,41 SPOK 1 2 RF_0.95V 5 6 LG_0.95V @EMI@ PR9505 JUMP_43X118
RF LGATE
1

+
0.1U_0402_16V7K
4.7_1206_5% 1 2
1 2

VGA@ PQ9502
CK0402101V05_0402-2
@ESD@ PD9501

@ PC9505
11

1SNB_0.95V2
TP
1

1
PR9506 RT8237EZQW(2)_WDFN10_3X3 PC9506 4 2
470K_0402_1% 1U_0603_6.3V6M
2

2
C C
2

3
2
1
The RC value (PC10 and PR7) need fine-tune if need @EMI@ PC9509
680P_0402_50V7K

2
UMA@ PQ9502
MDV1527URH_POWERDFN33-8-5
PR9508
3.48K_0402_1%
1 2
1

PR9510 MOSFET: 3x3 DFN

10K_0402_1%
H/S Rds(on): 27mohm(Typ), 34mohm(Max)
2

Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C

L/S Rds(on): 9.9mohm(Typ), 13mohm(Max)

B
Idsm: 13.5A@Ta=25C, 11A@Ta=70C B

Choke: 7x7x3
Rdc=15.5mohm +/-15%

Switching Frequency: 290kHz

Imax=8A
OCP~10.977A
OVP: 120%~130%
VFB=0.704V, Vout=0.949V
MOSFET footprint: SIS412DN

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/08/07 Deciphered Date 2016/08/06 Title
0.95VALW
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
B 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 42 of 47
5 4 3 2 1
 5 4 3 2 1

15W@ PRG2
1.33K_0402_1% PCG1 PRG1
330P_0402_50V7K 2K_0402_1% CPU_B+ EMI@ PLZ2
15W@ PRG11 1 2 1 2 HCB2012KF-121T50_0805
324_0402_1% 1 2
APU_CORE_NB
B+
25W@ PRG2 PRG3 PCG4 PRG4 TDC 13A

2200P_0402_50V7K
5
1.5K_0402_1% 137K_0402_1% 390P_0402_50V7K 41.2K_0402_1% 1 1

10U_0805_25V6K

10U_0805_25V6K
1 2 1 2 1 2 1 2 Peak Current 17A

1
+ +

PCG3

PCG2

@EMI@ PCG20

@ PCG21

PCG19
33U_25V_M

33U_25V_M
6 APU_VDDNB_SEN
@ PRG19 OCP current 21A
PRG5 PCG5 PRG7 PCG6 0_0603_5%
Load line -4mV/A

2
10_0402_5% 1000P_0402_50V7K301_0402_1% 100P_0402_50V8J DH_CNB 1 2 DH_CNB-1 4 2 2

+CPU_CORE_NB 1 2 1 2 1 2 1 2 FSW=450kHz
D
PRG8 PCG11 PQG1 DCR 1.19mohm +/-5% D

@ PCG8 2.2_0603_1% 0.22U_0603_25V7K AON7518_DFN8-5

3
2
1
1000P_0402_50V7K BST_CNB 1 2 BST1_CNB 1 2
1 2 PLG1
@ PRG10 @ PCG9 0.24UH 20% PCME063T-R24MS1R195 28A
PHG1 100_0402_1% 220P_0402_50V7K LX_CNB 1 4
+CPU_CORE_NB_FB
10K_0402_5%_ERTJ0ER103J 1 2 1 2 +CPU_CORE_NB

1
2 3
1

25W@ PRG11
PCG7 360_0402_1% @EMI@ PRG9
0.1U_0603_50V7K 1 2 4.7_1206_5%
0.033U_0402_16V7K
2

0.1U_0402_10V6K

1SNB_CNB 2
1

DL_CNB 4

AON6504
0.24uH (DCR 1.19+-5%)
11K_0402_1%
2 1

PQG2
PRG12
PCG13

PCG12
3.65K_0603_1%
PRG14

VSUMP_CNB 1 2
2

1
PRG15
2

3
2
1
2.61K_0402_1% PRG29
121K_0402_1% @EMI@ PCG15
1

VSUMP_CNB 680P_0603_50V7K

2
+CPU_CORE_NB_FB

2
PRG16
PRZ43 10K_0402_1%
27.4K_0402_1% 1 2 +5VALW
1 2 DL_CNB

ISUMN_NB
ISUMP_NB

COMP_NB

FCCM_NB
VSEN_NB
ISEN1_NB

FB_NB
PHG2 LX_CNB
470K_0402_5%_TSM0B474J4702RE PRG20
10.5K_0402_1% DH_CNB
PRG18 1 2 1 2
133K_0402_1%
1 2

48

47

46

45

44

43

42

41

40

39

38

37
+5VALW PUZ1
1 2

ISEN1_NB

ISUMP_NB

ISUMN_NB

VSEN_NB

FB_NB

COMP_NB

PGOOD_NB

FCCM_NB

PWM2_NB

LGATEX

PHASEX

UGATEX
6 APU_SVC CPU_B+
PCG14 @ PRZ36
1000P_0402_50V7K 0_0402_5% 1 36 BST_CNB
C 1 2 ISEN2_NB BOOTX @ PRZ44 C
NTC_NB 2 35 2 1
36,6,9 PROCHOT# NTC_NB VIN
@ PRZ38 @ PRZ41 IMON_NB 3 34 BOOT2 0_0603_5%
IMON_NB BOOT2

1
100K_0402_1% 0_0402_5%
+3VS
1 2 1 2 SVC_CPU 4 33 UGATE2 PCZ42
SVC UGATE2
0.22U_0603_25V7K

2
@ PRZ45 VR_HOT_CPU 5 32 PHASE2
32 APU_VDDIO VR_HOT_L PHASE2 +5VALW
0_0402_5%
1 2 SVD_CPU 6 31 LGATE2 @ PRZ4
6 APU_SVD SVD LGATE2 CPU_B+
ISL6277AHRZ-T QFN 48P PWM 0_0402_5%
1 2 7 30 VDDP 1 2
@ PRZ47 VDDIO VDDP
PCZ1 0_0402_5% SVT_CPU 8 29 VDD 2 1
1U_0603_16V6K 1 2 SVT VDD

10U_0805_25V6K

10U_0805_25V6K
EN_CPU 9 28 PRZ6 PQZ1
ENABLE PWM_Y

1
@ PRZ48 1_0603_5% AON7518_DFN8-5

PCZ2

PCZ3
1U_0603_16V6K

1U_0603_16V6K
6 APU_SVT

1
0_0402_5% PWROK_CPU 10 27 LGATE1
1 2 PWROK LGATE1

PCZ8

PCZ9
28 VR_ON

2
1 2 IMON 11 26 PHASE1 @ PRZ33

2
ESD@ PDZ2 IMON PHASE1 0_0603_5%
@ESD@ PDZ1 CK0402101V05_0402-2 12 25 UGATE1 UGATE1 1 2 UGATE1-1 4
NTC UGATE1

PGOOD
CK0402101V05_0402-2 1 2

BOOT1
ISUMN
ISUMP

COMP
ISEN3

ISEN2

ISEN1

VSEN

@ PRZ49
RTN

FB2

0_0402_5%
FB

TP
1 2 PLZ1
6 APU_PWRGD_L

3
2
1
+5VALW
NTC

0.24UH 20% PCME063T-R24MS1R195 28A

13

14

15

16

17

18

19

20

21

22

23

24

49
+3VS PHASE1 1 4
@ESD@ PDZ3 PRZ16 +CPU_CORE

1
CK0402101V05_0402-2 2.2_0603_1% PCZ10 25W@ PRZ13 2 3 1 2 ISEN2
COMP
ISUMP

ISUMN
ISEN2

ISEN1

1
BOOT1

PRZ11 1 2 15W@ PRZ52 PRZ12 @ESD@ PDZ4 BOOT1 1 2 1 2 10K_0402_1%

FB2

FB

133K_0402_1% 0_0402_5% 100K_0402_5% CK0402101V05_0402-2 ISEN1 1 2 PRZ14 25W@

1 2 1 2 1 2 0.22U_0603_25V7K PRZ17 @EMI@ 10K_0402_1%
PHZ1 PRZ18 4.7_1206_5% PRZ20

2
470K_0402_5%_TSM0B474J4702RE 10.5K_0402_1% 3.65K_0402_1%

2
1 2 1 2 1 2 25W@ PCZ13 VGATE 28 LGATE1 4 VSUM+ 1 2
0.22U_0402_10V6K

1
PCZ11 1 2 PRZ19
B B
1000P_0402_50V7K PRZ42 PQZ2 PCZ14 @EMI@ 1_0402_1%
27.4K_0402_1% 25W@ PCZ12 PCZ36 AON6504 680P_0603_50V7K VSUM- 1 2

3
2
1

2
1 2 0.22U_0402_10V6K 10P_0402_50V8J
VSUM- 1 2 1 2

VSUM+
APU_core
PCZ15 PRZ22 PCZ16 @ PRZ23 TDC 20A
1

1000P_0402_50V7K 301_0402_1% 100P_0402_50V8J 32.4K_0402_1% CPU_B+

Peak Current 25A
1

PRZ21 1 2 1 2 1 2 1 2
15W@ PRZ51

10K_0402_5%

2.61K_0402_1%
OCP current 31.25A
0.15U_0402_10V6K

0.033U_0402_16V7K
1

11K_0402_1%
1

25W@ PRZ25 PRZ26 PCZ22

25W@ PCZ17

PCZ18

Load line -2.1mV/A

10U_0805_25V6K

10U_0805_25V6K
1 2

2.21K_0402_1% 137K_0402_1%390P_0402_50V7K 25W@ PQZ3

PRZ24

5
PHZ2
PCZ19 1 2 1 2 1 2 AON7518_DFN8-5 FSW=450kHz
2

1
25W@ PCZ20

25W@ PCZ21
10K_0402_5%_ERTJ0ER103J 330P_0402_50V7K
2

DCR 1.19mohm +/-5%

1 2 1 2 25W@ PRZ28

2
0_0603_5%
2

25W@ PRZ29 PRZ27 PCZ23 UGATE2 1 2 4

UGATE2-1
VSUM- 1 2 2K_0402_1% 680P_0402_50V7K
332_0402_1%
1

PCZ24 1 2 1 2 25W@ PLZ3

3
2
1
0.1U_0603_50V7K PRZ32 0.24UH 20% PCME063T-R24MS1R195 28A
2

@ PRZ30 @ PCZ25 10_0402_5% PHASE2 1 4

100_0402_1% 820P_0402_50V7K 1 2 +CPU_CORE
+CPU_CORE
25W@ PRZ50 25W@ PCZ26 25W@ PRZ31 2 3 1 2 ISEN1

1
BOOT2 1 2 1 2 10K_0402_1%
APU_VDD_SEN 6 @EMI25W@PRZ35 ISEN2 1 2 25W@ PRZ34
2.2_0603_1% 0.22U_0603_25V7K 4.7_1206_5% 10K_0402_1%
15W@ PRZ25 25W@ PRZ37
1.6K_0402_1% 3.65K_0402_1%

2
LGATE2 4 VSUM+ 1 2
15W@ PRZ29 PRZ40

1
390_0402_1% 10_0402_5% APU_VDD_RUN_FB_L 6
1

1 2 25W@ PQZ4 @EMI25W@PCZ27 25W@ PRZ39

15W@ PCZ17 PCZ28 AON6504 680P_0603_50V7K 1_0402_1%

3
2
1

2
A 0.1U_0402_10V7K 0.01U_0402_25V7K VSUM- 1 2 A
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2012/11/07 Deciphered Date 2012/11/07 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_CORE/CPU_CORE_NB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-A997P
Date: Tuesday, May 20, 2014 Sheet 43 of 47
5 4 3 2 1
 A
B
C
D
2 1 2 1 2 1 2 1 2 1

RF@ PCZ128 PCZ118 PCZ113 PCZ107 PCZ101

5
5

2
1
+
68P_0402_50V8J 0.01U_0402_50V7K 0.22U_0402_16V7K 22U_0805_6.3V6M 22U_0805_6.3V6M
PCZ124
330U_D2_2V_Y 2 1 2 1 2 1 2 1 2 1

RF@ PCZ129 PCZ119 PCZ114 PCZ108 PCZ102

+CPU_CORE

68P_0402_50V8J 0.01U_0402_50V7K 0.22U_0402_16V7K 22U_0805_6.3V6M 22U_0805_6.3V6M

+CPU_CORE
+CPU_CORE

2 1 2 1 2 1 2 1 2 1

RF@ PCZ130 PCZ120 @ PCZ115 PCZ109 PCZ103

2
1
+
68P_0402_50V8J 0.01U_0402_50V7K 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M
PCZ126
330U_D2_2V_Y 2 1 2 1 2 1 2 1 2 1

RF@ PCZ131 PCZ121 @ PCZ116 PCZ110 PCZ104

68P_0402_50V8J 180P_0402_50V8J 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M

Local
2 1 2 1 2 1 2 1

PCZ122 @ PCZ117 @ PCZ111 PCZ105

180P_0402_50V8J 22U_0805_6.3V6M 22U_0805_6.3V6M 22U_0805_6.3V6M

2 1 2 1 2 1

@ PCZ123 @ PCZ112 PCZ106

180P_0402_50V8J 22U_0805_6.3V6M 22U_0805_6.3V6M

4
4

2 1 2 1 2 1

2
1
+
PCG114 PCG109 PCG107 PCG101
330U_D2_2V_Y 0.22U_0402_16V7K 10U_0603_6.3V6M 22U_0805_6.3V6M

2 1 2 1 2 1

2
1
+
PCG115 PCG110 PCG108 PCG102
330U_D2_2V_Y 0.22U_0402_16V7K 22U_0805_6.3V6M 22U_0805_6.3V6M

2 1 2 1 2 1
+CPU_CORE_NB
+CPU_CORE_NB

PCG111 RF@ PCG116 PCG103

180P_0402_50V8J 68P_0402_50V8J 22U_0805_6.3V6M

2 1 2 1 2 1
+CPU_CORE_NB

PCG112 RF@ PCG117 PCG104

Issued Date
180P_0402_50V8J 68P_0402_50V8J 22U_0805_6.3V6M

2 1 2 1 2 1
Local

Security Classification
PCG113 RF@ PCG118 PCG105
180P_0402_50V8J 68P_0402_50V8J 22U_0805_6.3V6M

3
3

2 1 2 1

RF@ PCG119 PCG106

68P_0402_50V8J 22U_0805_6.3V6M

2012/11/07
+CPU_CORE

+CPU_CORE_NB
2
2

Compal Secret Data

Deciphered Date
7
10

2
2

330uF/9m 22uF/0805

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
2

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
0.22uF/0402

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
A3
Size
Title

Date:
1
10uF/0603

Document Number
LA-A997P
Tuesday, May 20, 2014
0.01uF/0402

3
2

1
1

Sheet
180pF/0402

44
of
PROCESSOR DECOUPLING
Compal Electronics, Inc.

47
Rev
1.0
A
B
C
D
 5 4 3 2 1

GPIO21 GPIO29 GPIO30 GPIO20 GPIO15

VID5 VID4
0 1
1 0
1 0
1 0
1 0
1 0
D D
1 0
1 0
1 0
1 1
1 1
1 1
1 1
1 1
1 1
VID3 VID2
1 1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
0 0
0 0
0 1
0 1
1 0
1 0
VID1 VDDC
1 1.125V
0 1.100V
1 1.075V
0 1.050V
1 1.025V
0 1.000V
1 0.975V
0 0.950V
1 0.925V
0 0.900V Vboot(merge)
1 0.875V
0 0.850V
1 0.825V
0 0.800V
1 0.775V

+VGA_B+ B+
+5VS VGA@ EMIVGA@
PRV2 @VGA@ PRV3 PLV1
1_0603_5% 0_0603_5% HCB2012KF-121T50_0805
VSUM+ 1 2 1 2 1 2
VGA@ PRV1
2.61K_0402_1%
1

1
VGA@ 1 H-side MOS:SIR472DP

10U_0805_25V6K

10U_0805_25V6K

2200P_0402_50V7K
1
VGA@ PCV3

VGA@ PCV5

VGA@ PCV6

@EMIVGA@ PCV7

33U_25V_M
0.1U_0402_25V6K

Rds(on):
10K_0402_5%_ERTJ0ER103J

1
PCV2 0.22U_0603_25V7K +

PCV28
2
VGA@ PRV4

VGA@ PCV1

@VGA@ 1U_0402_6.3V6K 12mohm @Vgs=10V

11K_0402_1%

2
1

VGA@ PRV5
2

2
PCV4 82.5_0402_1% 2 15mohm @Vgs=4.5V
0.1U_0402_25V6K
VGA@ PHV1

Id :20A @Ta=25 degC

2

1 2
1

Layout Note: @VGA@

2

C PH1 should place near Choke PCV8 C

VGA@ 0.01U_0402_25V7K L-side MOS:MDU1511RH
2

PRV6
2

909_0402_1% Rocset Rds(on):

VSUM- 1 2 2.0mohm(typ) & 2.4mohm(max) @Vgs=10V
1

VGA@ @VGA@ @VGA@ @VGA@ PRV8 2.7mohm(typ) & 3.3mohm(max) @Vgs=4.5V

PCV9 PRV7 PCV10 0_0402_5%
0.1U_0402_25V6K 100_0402_1% 180P_0402_50V8J 1 2
Id :100A@Ta=25 degC
+5VS
2

@VGA@ PRV9 1 2 1 2
0_0402_5%
1 2 VGA@ VGA@ Choke: 0.36uH (Size:10*10*4)
VGA@ PRV10 PCV11
PCV12 2.2_0603_5% 0.22U_0603_25V7K Rdc=1.1mohm +-5%
1000P_0402_50V7K 1 2 1 2 Heat Rating Current=33A

13 IMON_VGA
11 VDD_VGA
RTN_VGA

5
12 VIN_VGA
1 2

14BST_VGA
Saturation Current=39A

10 VSUM+
VSUM
1

VGA@
@VGA@ PCV13
PCV14 330P_0402_50V7K 29 Output Cap: 10mohm * 560uF * 3 pcs
2

9
330P_0402_50V7K 4 4
1 2 VGA@ VGA@
AGND

RTN

ISUM+

VDD

VIN

IMON

BOOT
ISUM
PQV1 PQV3
@VGA@ PRV11 SIR472DP-T1-GE3_PAK8-5 SIR472DP-T1-GE3_PAK8-5
0_0402_5% VGA@

3
2
1

3
2
1
1 2 VSENS_VGA 7 15 DH_VGA PLV2
+VGA_CORE VSEN UGATE 0.36U PCMB104T-R36MH1R105 30A GLUE +VGA_CORE
FB_VGA 6 16 LX_VGA 1 4
FB PHASE

1
COMP_VGA 5 17 2 3
COMP VSSP

5
VGA@ @EMIVGA@
VGA@ VGA@ VW_VGA4 PUV1 18 DL_VGA PRV16
VGA@ PRV12 VGA@ PRV13 PCV15 PCV16 VW ISL62881C_QFN28_4X4 LGATE 4.7_1206_5%
2.37K_0402_1% 226K_0402_1% 390P_0402_50V7K 1000P_0402_50V7K RBIAS 3 19 VCCP_VGA 1 2 +5VS

SNB_VGA 2
RBIAS VCCP

1
1 2 1 2 1 2 1 2
VGA_PWRGD2 20 0_0603_5% 4 4 VGA@ VGA@
PGOOD VID0
1

@VGA@ PRV15 PRV20 PRV17

VGA@ 1 21 VGA@ VGA@ 3.65K_0805_1% 1_0402_1%

560U_2.5V_M

560U_2.5V_M

560U_2.5V_M
1 1 1
DPRSLPVR

B
VGA@ VGA@ VGA@ PRV14 CLK_EN# VID1 PQV2 PQV4
B

2
1
PCV24 PRV18 VGA@ PCV25 PRV19 47K_0402_1% VGA@ + + +

VGA@ PCV19

VGA@ PCV21

VGA@ PCV18
VR_ON

AON6504 AON6504

3
2
1

3
2
1

1
1000P_0402_50V7K 715_0402_1% 56P_0402_50V8 8.06K_0402_1% Rbias PCV17 @EMIVGA@
VID6

VID5

VID4

VID3

VID2
2

1 2 1 2 1 2 1 2 2.2U_0603_6.3V6K PCV26

VSUM+

VSUM-
2
Rfset 2 2 2
680P_0603_50V7K

2
VGA@ +3VS
28

27

26

25

24

23

22

PRV21
@VGA@ PRV34
10K_0402_1%
1

1.91K_0402_1%
VR_ON

1 2
DPRSLPVR

+3VS

9 VGA_PWRGD
2

1 2
12 GPU_GPIO0
GPU_VID1 12
0_0402_5% VGA@ PRV22
@VGA@ PRV23 @0VGA@ PRV40 10K_0402_1%
0_0402_5% 1 2 GPU_VID2 12
1 2
13,28,9 DGPU_PWR_EN
GPU_VID3 12
1

@VGA@
PCV27
.1U_0402_16V7K GPU_VID4 12
2

Remark:
1. Rbias=147K GPU_VID5 12 TDC 21A
=>set the controller for CPU_CORE application Peak Current = 31.5A
Vboot regulation
Rbias=47k OCP Current = 37.8A
VGA@ @VGA@ +3VS_VGA
=>set the controller for GPU_CORE application PRV24 PRV25 Load line disable
1K_0402_1% 1K_0402_1%
1 2 GPU_VID1 1 2
2. Switching frequency setting:
Rfset(kohm)=[period(us)-0.29]*2.65 VGA@ @VGA@
PRV26 PRV27
=8.06Kohm 1K_0402_1% 1K_0402_1%
A Fsw=1/period(us)=300KHZ 1 2 GPU_VID2 1 2 Module model information: A

VGA@ @VGA@
ISL62881C_V1A for IC
3. Operation mode: PRV28 PRV29 ISL62881C_V1B for SW
1K_0402_1% 1K_0402_1%
when GPU_CORE VR application 1 2 GPU_VID3 1 2
DPRSLPVR (pin28)=0 => 1 phase CCM mode
@VGA@ VGA@
DPRSLPVR (pin28)=1 => 1 phase DE mode PRV30 PRV31
1K_0402_1% 1K_0402_1%
1 2 GPU_VID4 1 2

@VGA@ VGA@
Security Classification Compal Secret Data Compal Electronics, Inc.
2013/08/07 2016/08/06 Title
PRV32 PRV33
Issued Date Deciphered Date VGA_CORE
1K_0402_1% 1K_0402_1%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1 2 GPU_VID5 1 2 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-A997P
Date: Tuesday, May 20, 2014 Sheet 45 of 47
5 4 3 2 1
 4
3
2
1
2 1 2 1

PCV67 PCV51
10U_0603_6.3V6M 2.2U_0402_6.3V6M
2 1 2 1

PCV68 PCV52
+VGA_CORE

10U_0603_6.3V6M 2.2U_0402_6.3V6M

A
A

2 1 2 1

PCV69 PCV53
10U_0603_6.3V6M 2.2U_0402_6.3V6M
2 1 2 1

PCV70 PCV54
10U_0603_6.3V6M 2.2U_0402_6.3V6M
2 1 2 1

PCV71 PCV55
10U_0603_6.3V6M 2.2U_0402_6.3V6M
2 1 2 1

PCV72 PCV56
10U_0603_6.3V6M 2.2U_0402_6.3V6M
2 1 2 1

PCV73 PCV57
10U_0603_6.3V6M 2.2U_0402_6.3V6M
2 1

PCV58
2.2U_0402_6.3V6M
PCV74 2 1
1U_0402_6.3V6K
2 1 PCV59
2.2U_0402_6.3V6M
PCV75 2 1
1U_0402_6.3V6K

B
B

2 1 PCV60
2.2U_0402_6.3V6M
PCV76 2 1
1U_0402_6.3V6K
2 1 PCV61
2.2U_0402_6.3V6M
PCV77 2 1
1U_0402_6.3V6K
2 1 PCV62
2.2U_0402_6.3V6M
2 1

PCV78 PCV63
0.1U_0402_10V7K 2.2U_0402_6.3V6M
2 1 2 1

PCV79 PCV64

Issued Date
0.1U_0402_10V7K 2.2U_0402_6.3V6M
2 1 2 1

Security Classification
PCV80 PCV65
0.1U_0402_10V7K 2.2U_0402_6.3V6M
2 1 2 1

PCV81 PCV66
22U_0603_6.3V6M 2.2U_0402_6.3V6M
2 1

PCV82
22U_0603_6.3V6M

C
C

2 1

2013/08/07
Compal Secret Data
Deciphered Date
2016/08/06

D
D

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Title

Date:
Document Number

Tuesday, May 20, 2014

LA-A997P
E
E

Sheet
VGA CHIP DECOUPLING

46
Compal Electronics, Inc.

of
47
Rev
1.0
4
3
2
1
 5 4 3 2 1

@VGA@ PRW2
0_0402_5%
1 2
SUSP# 28,32,40,41

1M_0402_1%
VGA@ PRW1
1

1
D @VGA@ D
PCW2
0.01UF_0402_25V7K

2
2
@EMIVGA@ PRW3 @EMIVGA@ PCW3
4.7_1206_5% 680P_0603_50V7K
EMIVGA@ PLW1 VGA@ PUW1 1 2 SNB_VRAM 1 2
HCB2012KF-121T50_0805 SY8208DQNC_QFN10_3X3
+1.5VRAMP +1.5VS
B+ 1 2 B+_VRAM 8
IN EN
1 @VGA@ PRW4 VGA@ PCW5
2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0_0603_5% 0.1U_0603_25V7K
6 BST_VRAM 1 2 BST_VRAM-N 1 2
@EMIVGA@ PCW1

VGA@ PCW4

VGA@ PCW6
VGA@ PLW2 @PJW1
@ PJW1
BS
1

1
1.5UH_PCMC063T-1R5MN_9A_20% Vo=1.503V JUMP_43X118
9 10 LX_VRAM 1 2 1 2
GND LX 1 2
2

30.1K_0402_1%

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM

22U_0805_6.3VAM
VGA@ PCW10

VGA@ PCW11
1

330P_0402_50V7K
VGA@ PRW5

VGA@ PCW7

VGA@ PCW8

VGA@ PCW9
1

1
4 FB_VRAM
FB FB=0.6V
3 7
+3VALW

2
ILMT BYP

2
C C
2 5
PG LDO

VGA@ PCW12

VGA@ PCW13
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
1
1

1
2
VGA@

2
PRW6
20K_0402_1%

2
B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2016/08/06 Title
2013/08/07 Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VRAM Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, May 20, 2014 Sheet 47 of 47
5 4 3 2 1