IRF740

Data Sheet January 2002

10A, 400V, 0.550 Ohm, N-Channel Power Features

MOSFET 10A, 400V
This N-Channel enhancement mode silicon gate power field
rDS(ON) = 0.550
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of Single Pulse Avalanche Energy Rated
energy in the breakdown avalanche mode of operation. All of SOA is Power Dissipation Limited
these power MOSFETs are designed for applications such
as switching regulators, switching converters, motor drivers, Nanosecond Switching Speeds
relay drivers, and drivers for high power bipolar switching Linear Transfer Characteristics
transistors requiring high speed and low gate drive power.
High Input Impedance
They can be operated directly from integrated circuits.
Related Literature
Formerly developmental type TA17424.
- TB334 Guidelines for Soldering Surface Mount
Components to PC Boards
Ordering Information
PART NUMBER PACKAGE BRAND Symbol
IRF740 TO-220AB IRF740 D

NOTE: When ordering, include the entire part number.

Packaging
JEDEC TO-220AB
TOP VIEW

SOURCE
DRAIN
GATE

DRAIN
(FLANGE)

2002 Fairchild Semiconductor Corporation IRF740 Rev. B

 IRF740

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

IRF740 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 400 V
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 400 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 10 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 6.3 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 40 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS 20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 125 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 520 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260 oC

CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS VGS = 0V, ID = 250A (Figure 10) 400 - - V
Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250A 2.0 - 4.0 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 A
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 A
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX , VGS = 10V 10 - - A
Gate to Source Leakage Current IGSS VGS = 20V - - 500 nA
Drain to Source On Resistance (Note 2) rDS(ON) VGS = 10V, ID = 5.2A (Figures 8, 9) - 0.47 0.550
Forward Transconductance (Note 2) gfs VDS 50V, ID = 5.2A (Figure 12) 5.8 8.9 - S
Turn-On Delay Time tD(ON) VDD = 200V, ID 10A, RG = 9.1, - 15 21 ns
Rise Time tr RL = 20, VGS = 10V - 25 41 ns
MOSFET Switching Times are Essentially
Turn-Off Delay Time tD(OFF) Independent of Operating Temperature - 52 75 ns
Fall Time tf - 25 36 ns
Total Gate Charge Qg(TOT) VGS = 10V, ID = 10A, VDS = 0.8 x Rated BVDSS - 41 63 nC
(Gate to Source + Gate to Drain) Ig(REF) = 1.5mA (Figure 14)
Gate Charge is Essentially Independent of Operating
Gate to Source Charge Qgs - 6.5 - nC
Temperature
Gate to Drain Miller Charge Qgd - 23 - nC
Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 1250 - pF
Output Capacitance COSS - 300 - pF
Reverse-Transfer Capacitance CRSS - 80 - pF
Internal Drain Inductance LD Measured From the Modified MOSFET - 3.5 - nH
Contact Screw on Tab to Symbol Showing the
Center of Die Internal Devices
Measured From the Drain Inductances - 4.5 - nH
D
Lead, 6mm (0.25in) From
Package to Center of Die LD
Internal Source Inductance LS Measured From the - 7.5 - nH
Source Lead, 6mm G
(0.25in) From Header to LS
Source Bonding Pad
S

Thermal Resistance Junction to Case RCS - - 1.0 oC/W

Thermal Resistance Junction to Ambient RJA Free Air Operation - - 62.5 oC/W

2002 Fairchild Semiconductor Corporation IRF740 Rev. B

 IRF740

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET - - 10 A
D
Symbol Showing the
Pulse Source to Drain Current ISDM - - 40 A
Integral Reverse
(Note 3)
P-N Junction Diode
G

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 10A, VGS = 0V (Figure 13) - - 2.0 V
Reverse Recovery Time trr TJ = 25oC, ISD = 10A, dISD/dt = 100A/s 170 390 790 ns
Reverse Recovered Charge QRR TJ = 25oC, ISD = 10A, dISD/dt = 100A/s 1.6 4.5 8.2 C
NOTES:
2. Pulse Test: Pulse width 300s, duty cycle 2%.
3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 9.1H, RG = 25, peak IAS = 10A.

Typical Performance Curves Unless Otherwise Specified

1.2 10
POWER DISSIPATION MULTIPLIER

1.0
8
ID, DRAIN CURRENT (A)

0.8
6
0.6

4
0.4

0.2 2

0 0
0 50 100 150
25 50 75 100 125 150
TC , CASE TEMPERATURE (oC)
TC , CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE
ZJC, TRANSIENT THERMAL IMPEDANCE

1
0.5

0.2
0.1 0.1
0.05
0.02
0.01 PDM
SINGLE PULSE
10-2 t1
t2t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZJC + TC
10-3
10-5 10-4 10-3 10-2 0.1 1 10
t1, RECTANGULAR PULSE DURATION (S)

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

2002 Fairchild Semiconductor Corporation IRF740 Rev. B

 IRF740

Typical Performance Curves Unless Otherwise Specified (Continued)

100 15
PULSE DURATION = 80s
VGS = 10V
DUTY CYCLE = 0.5% MAX
10s VGS = 6.0V
12
ID, DRAIN CURRENT (A)

ID, DRAIN CURRENT (A)

VGS = 5.5V
10 100s
9
1ms VGS = 5.0V

OPERATION IN THIS 6
1 REGION IS LIMITED 10ms
BY rDS(ON)
VGS = 4.5V
TC = 25oC DC 3
TC = 150oC
VGS = 4.0V
SINGLE PULSE
0.1 0
1 10 102 103 0 40 80 120 160 200
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

15 100

IDS(ON), DRAIN TO SOURCE CURRENT (A)

PULSE DURATION = 80s VGS = 10V PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX VGS = 6.0V DUTY CYCLE = 0.5% MAX
VGS = 5.5V VDS 50V
12
ID, DRAIN CURRENT (A)

10
9

VGS = 5.0V
6 TJ = 150oC TJ = 25oC
1

3 VGS = 4.5V

VGS = 4.0V
0 0.1
0 2 4 6 8 10 0 2 4 6 8 10
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

5 3.0
PULSE DURATION = 80s PULSE DURATION = 80s
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
NORMALIZED DRAIN TO SOURCE

ID = 10A, VGS = 10V

2.4
rDS(ON), DRAIN TO SOURCE

4
ON RESISTANCE VOLTAGE
ON RESISTANCE

3 VGS = 10V 1.8

2 1.2

VGS = 20V
1 0.6

0 0
25 10 20 30 40 50 -60 -40 -20 0 20 40 60 80 100 120 140 160
TC , CASE TEMPERATURE (oC) TJ, JUNCTION TEMPERATURE (oC)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

2002 Fairchild Semiconductor Corporation IRF740 Rev. B

 IRF740

Typical Performance Curves Unless Otherwise Specified (Continued)

1.25 2500
ID = 250A VGS = 0V, f = 1MHz
CISS = CGS + CGD
NORMALIZED DRAIN TO SOURCE

CRSS = CGD
1.15 2000
COSS CDS + CGD
BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)
1.05 1500
CISS

0.95 1000

COSS
0.85 500 CRSS

0.75 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 1 2 5 10 2 5 102 2 5 103
TJ, JUNCTION TEMPERATURE (oC) VDS , DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

15 100
PULSE DURATION = 80s PULSE DURATION = 80s
ISD, SOURCE TO DRAIN CURRENT (A)
DUTY CYCLE = 0.5% MAX DUTY CYCLE = 0.5% MAX
VDS 50V
gfs, TRANSCONDUCTANCE (S)

12

TJ = 25oC 10
9
TJ = 150oC
TJ = 150oC
6 TJ = 25oC
1.0

0 0.1
0 4 8 12 16 20 0 0.3 0.6 0.9 1.2 1.5
VSD, SOURCE TO DRAIN VOLTAGE (V)
ID, DRAIN CURRENT (A)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20
ID = 10A
VGS, GATE TO SOURCE VOLTAGE (V)

16

VDS = 80V
12
VDS = 200V

VDS = 320V
8

0
0 12 24 36 48 60
Qg, GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

2002 Fairchild Semiconductor Corporation IRF740 Rev. B

 IRF740

Test Circuits and Waveforms

VDS
BVDSS

L tP
VDS

VARY tP TO OBTAIN IAS

+ VDD
REQUIRED PEAK IAS RG
VDD
VGS -
DUT

tP
0V IAS
0
0.01
tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
RL VDS
90% 90%

+
VDD 10% 10%
RG 0
-
DUT 90%

VGS 50% 50%

PULSE WIDTH
VGS 10%
0

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

VDS
CURRENT (ISOLATED
REGULATOR SUPPLY)
VDD

SAME TYPE Qg(TOT)

AS DUT VGS
12V
0.2F 50k Qgd
BATTERY
0.3F
Qgs

D
VDS

G DUT
0

IG(REF) S
0
VDS IG(REF)
IG CURRENT ID CURRENT
SAMPLING SAMPLING
RESISTOR RESISTOR 0

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

2002 Fairchild Semiconductor Corporation IRF740 Rev. B

TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx FAST OPTOLOGIC SMART START VCX
Bottomless FASTr OPTOPLANAR STAR*POWER
CoolFET FRFET PACMAN Stealth
CROSSVOLT GlobalOptoisolator POP SuperSOT-3
DenseTrench GTO Power247 SuperSOT-6
DOME HiSeC PowerTrench SuperSOT-8
EcoSPARK ISOPLANAR QFET SyncFET
E2CMOSTM LittleFET QS TinyLogic
EnSignaTM MicroFET QT Optoelectronics TruTranslation
FACT MicroPak Quiet Series UHC
FACT Quiet Series MICROWIRE SILENT SWITCHER UltraFET
STAR*POWER is used under license
DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4
This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.