1 - Overview

O i off a C
Computer

COL 100 - Introduction to Computer Science

Department of Computer Science and Engineering
Indian Institute of Technology Delhi

Components of a Computer

CPU Memory

Interconnect/Network:
Small scale: Bus (wires+control)
Large scale: Network of
Computer Systems, Internet

I/O I/O I/O

Device Device2 Device3
(keyboard) (monitor) (mouse)

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 Writing and Executing
a Program
Editor

Compiler
Executable Stored
Program in
disk

Loader
INPUT
(keyboard,
mouse) MEMORY
CPU Instructions
and Data
OUTPUT
(monitor,
printer)
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Elementary Unit: Instruction

Executable Program is a Sequence of

Instructions
in machine language (understood by CPU)
generated from high-level program by Compiler
This sequence is first loaded into memory
CPU accesses and executes the instructions
from memory
one instruction at a time

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 Computer Memory
Address
0
Logical array of locations 1
Each location has an 2
ADDRESS
Start address is 0
End address depends on
amount of memory y present
p
in computer
254
Instructions and Data are 255
stored in these locations
A memory with
256 locations
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Loading a Program to Memory

Sequence of
instructions first 100 Inst 1
loaded into memory 101 Inst 2

Execution: interpret Stored 102 ...

in Inst n
one instruction at a disk 103

time
254
255

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 What does an Instruction
look like?

Sample First Second

Instruction: Which Destination
Operand Operand
4 FIELDS Operation? Address
Address Address

Compiler
ADD 201 202 200
... 200 x
x = y + z; Instruction
201 y
...
202 z
203 ...
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Encoding an Instruction
Operation
ADD is one operation type Type Operand1
Other operand types: SUB, Addr Operand2
Addr Dest
MULT, COMPARE... Addr
We can ENCODE each
operation type by a number ADD 201 202 200
ADD: 10
SUB: 11 Instruction
MULT: 12 Encoding
etc.
So, the whole instruction 10 201 202 200
consists of just 4 numbers
Encoded Instruction
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 Instruction Set of a CPU
Operation
The example instruction is an 11-
Type Operand1
digit number Addr Operand2
2 digits for Operation type Addr D
Dest
3 digits for Operand 1 Addr
3 digits for Operand 2
3 digits for Destination ADD 201 202 200
Such an instruction can support
100 operation types Instruction
operands can occupy any of
1000 locations Encoding
cod g
Instruction Set of a CPU
2-digits 3-digits 3-digits 3-digits
the set of valid instructions
recognised by the CPU 10 201 202 200

Encoded Instruction
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Memory Hierarchy
Larger the memory, slower the access time
Memory organised as hierarchy of levels
Registers (one word in each register) - an integer can
be stored in a register
Cache (103 to 106 words)
Main memory (107 to 1010 words)
Disk (>1010 words)
Attempt to keep frequently used data closer to CPU

L2
Main Disk
L1 Memory
Registers CPU Cache Cache
inside
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