ESE319 Introduction to Microelectronics

Common Emitter BJT Amplifier

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 1

 ESE319 Introduction to Microelectronics

Adding a signal source to the

single power supply bias amplifier

Desired effect addition Starting point -

of bias and signal sources single dc source

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 2

 ESE319 Introduction to Microelectronics

Wrong Way to Combine Sources

<=>
=100 =100

Source with low output Thevenin equivalent at base:

impedance upsets bias.

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 3

 ESE319 Introduction to Microelectronics

Wrong Way - Continued

50 5
V th = V B VB
2000050 2000
Vth
5020000
Rth= R'B= RBRS = 50
5020000
We effectively short out the
To analyze, bias source!
1. Isolate base circuit,
2 .Use superposition, The signal source essentially
3. Apply Thevenin is unaffected. (Why? What is its
equivalent again for the Thevenin equivalent?)
base bias source, VB:
2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 4
 ESE319 Introduction to Microelectronics

The Right Way Use a Blocking Capacitor

A capacitor is an OPEN at
dc and RS does not affect the
vCb
iCb
+ -
bias! The capacitor charges
Cb to the dc bias source, VB, to
satisfy Kirchoff's voltage law
and the dc bias is in series
with the signal source.
=100
DESIGN GOAL: for f fmin, set the
For convenience lets value of Cb so that its voltage drop vCb
continue to use the base
bias Thevenin equiv.
is negligible at the lowest operating
frequency fmin.

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 5

 ESE319 Introduction to Microelectronics

Blocking Capacitor Selection

ic
evaluate
ib apply ib
ie
<=> ib ie ic
vbg
r bg = i e =i b i b
ib
=100 r bg
vbg = i b r i e RE =i b r i b 1 RE
Use the small signal equivalent
circuit and superposition to vbg
r bg = = r 1 RE 1 RE
estimate the input resistance of ib
the transistor.
2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 6
 ESE319 Introduction to Microelectronics

Capacitor Selection- continued

The signal source sees the 20 k bias source resistance
in parallel with r bg. So the signal source equivalent circuit is:
iCb vCb
+ - The capacitor voltage drop is:
Cb 1
vCb= i Cb
j Cb
vsig
Where the capacitor current is:
=100 1
v sig = i Cb RS RBr bg
j Cb
r bg 100 RE =400 k v sig vsig
iCb => vCb
Therefore: 1 j C b RB1
RB
400 j Cb
RBr BG= 2020 k = RB
420
2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 7
 ESE319 Introduction to Microelectronics

Capacitor Selection - continued

vsig 1
vCb =
j C b RB1 or Cb
C b RB
iCb vCb DESIGN GOAL: Choose Cb for negligible voltage
+ -
Cb drop at vCb for f fmin, i.e.
vsig v sig
vCb for f fmin
j C b RB1 10
vsig 10
vCb min C b RB 10 C b
10 2 f min RB
OR
DESIGN GOAL: Choose Cb so that Cb=0.1 min ,
i.e. 1 10
Cb= =0.1 min C b =
C b RB 2 f min RB

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 8

 ESE319 Introduction to Microelectronics

Capacitor Selection - continued

Select the LOWEST frequency of
interest. This sets the lower bound
on Cb. Using fmin = 20 Hz frequency for
our example circuit:
2 f min=2 206.2820=125.6 sec1
10 10 106
Cb C b min= 3
= =4 F
2 f min RB 125.62010 0.25
10 ANY capacitor larger than 4 F will
C b min=
2 f min RB do the job! This is an inequality, not an
equality! Choose Cb = 5 F

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 9

 ESE319 Introduction to Microelectronics

Common Emitter Unity Gain Amplifier

Cb Cb
5 uF 5 uF

Equivalent circuits
How can we achieve reasonable gain with this circuit?
Solution: Split RE and use capacitor bypassing.

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 10

 ESE319 Introduction to Microelectronics

Bypass for Gain

Procedure:
1. Split the emitter resistor in
Cb
two. Later, we will show that
5 uF the voltage gain will be close
+
ie to -RC/RE1.
vRE1 2. Bypass RE2 with a capacitor
-
+ Cbyp that looks like a near
vZE2
short circuit at the lowest
-
frequency of interest (fmin).
=100
i.e. |vZE2| << |vRE1| for f fmin)
1
Z E2 = RE2 v RE1=i e RE1 & v ZE2=i e Z E2
j C byp

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 11

 ESE319 Introduction to Microelectronics

Bypass for Gain - continued

Rb
20 k Ohm + Rb
vRE1 20 k Ohm
-
+
vZE2
-
=100 =100

Small signal circuit Desired circuit for f fmin

i.e. DESIGN GOAL: Choose Cbyp
s.t. |vZE2| << |vRE1| for f fmin
2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 12
 ESE319 Introduction to Microelectronics
Need to develop a design equation for Cbyp
Rs||Rb
b c s.t. DESIGN GOAL: |vRE1| >> |vZE2|
ic
ib or DESIGN GOAL: | 1/ j C byp | << RCbyp
e

ie
RE2
where Z E2 =
j C byp RE2 1
+
vRE1 v ZE2
- Z E2 RE2 / RE1 1
+ | |=| |=| |
vZE2 vRE1 RE1 j C byp RE2 1 10
-
(Thevenin resistance) R
Cbyp

i e =1 i b RE2 1 10
=100 C byp 10 =
RE1 2 f min RE2 2 f min RE1
r e RE1 10
C byp min=
vRE1=i e RE1 & v ZE2=i e Z E2 2 f min RE1

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 13

 ESE319 Introduction to Microelectronics

DESIGN GOAL: |1/ j C byp| << RCbyp

set v-sig = 0
RSRB
RCbyp= RE2 RE1 r e RE2 RE1
1
1 1
RE2RE1= RE2 RE1
C byp 10

10 10
C byp =
(Thevenin resistance) min RE2 RE1 2 f min RE2RE1

=100

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 14

 ESE319 Introduction to Microelectronics
10 10
C byp min= = F =79.6 F
2 f min RE1 2 x 20 x 1000
Choose Cbyp = 100 F

Final Design
Cb
5 uF

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 15

 ESE319 Introduction to Microelectronics

Gain Calculation in Passband

Simple gain calculation:
+ vout - v sig v sig
i b=
Rs r 1 RE1 1 RE1
vout = RC i c = RC i b
RC
vout = v sig
1 RE1
=100
v out RC
G= =4
Passband model vsig RE1

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 16

 ESE319 Introduction to Microelectronics

Multisim Simulation

20 Hz Gain

I kHz Gain
2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 17
 ESE319 Introduction to Microelectronics

What if R E is Fully Bypassed?

vout RC
G= = ?
vsig RE1
0

2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 18

 ESE319 Introduction to Microelectronics

What if R E is Fully Bypassed?

v sig vsig
i b= =
Rs r 1 RE1 RS r
Cb
0
5 uF vout vout = RC i c = RC i b
RC RC
vout = v sig vsig
RS r r
RC
.= v = g m RC vsig
/ g m sig
I C =1 mA =100
vout
g m=0.04 S G= g m RC =160
vsig
r =/ g m=2.5 k
2008 Kenneth R. Laker (based on P.V. Lopresti) updated 24Sep08 KRL 19