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Bus 1 Bus 2
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The two most commonly applied timing-control methods triggers the one-shot circuit, driving its output high and
are the one-shot circuit in Figure 3 and the inverting buffer enabling driver DR2.
with a time delay in Figure 4. To ensure correct switching 3. The time constant, RD CD, must be so calculated that
behavior, both methods require defined start conditions the one-shot circuits output remains high for the entire
after power up and bus idling. This is accomplished through time of the data packet.
fail-safe biasing resistors, RFS, which create a fail-safe 4. DR2 continues driving bus 2 for the duration of the one-
voltage, VFS, above the receiver input sensitivity of VFS > shot time constant. XCVROUT represents the receiver
+200 mV when no transceiver is actively driving the bus. output state of a remote transceiver on bus 2. Note that
A run-through of the one-shot circuits functional while DR2 is enabled, the pull-up resistor, RPU, pulls the
sequence (numbered here and in Figure 3) clarifies the disabled receivers (RX2s) output high in order to keep
repeater operation: RX1 enabled.
1. During bus idling, the receiver outputs of both repeater
A drawback of this solution is that the R-C time con-
ports are high due to VFS. Thus, both transceivers hold
stant depends on the data-packet length and the data rate
each other in receive mode.
at which the signal is transmitted. Also, one-shot circuits
2. Next, the arriving start bit of an incoming data packet are sensitive to noise transients, which can cause false
on port 1 drives the output of RX1 low. This transition triggering and repeater breakdown.
VFS
VCC 1 S Data Stop
R PU VCC
VCC
RX 2 2
R FS
RD tD
3
CD RT 4 3
VFS
2 R FS
1 RX 1 DR 2 4 S Data Stop
XCVR OUT
VFS
VCC 1
R PU VCC
RX 2 2
R FS
DD
tD
3 4 VTH+
RT 5 3
RD CD
R FS
1 RX 1 DR 2 4
2
VFS VFS
XCVR OUT
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Nevertheless, one-shot circuits are used often in inter- 4. The driver enable time is extended by the delay time
face bridges such as RS-232 to RS-485 converters. These (tD) versus the actual data-bit interval to establish a
converters directly connect an RS-485 network to the valid high signal on the bus. This is done prior to switch
RS-232 ports of older PCs or RS-232-controlled machinery. ing from transmit to receive mode in order to keep the
A more robust and data-rate-independent alternative to receiver output continuously high. Because the propaga
the one-shot circuit is timing control through an inverting tion delays of receivers are shorter than those of drivers,
Schmitt-trigger buffer with different charge and discharge it is impossible for the receiver to turn low, not even for
times. The underlying principle is to actively drive a bus a short instant. Once the driver is disabled, the external
during logic-low states and to disable the driver during fail-safe resistors bias bus 2 to above 200 mV, which is
logic-high states. The enabling and disabling sequences seen by the active receiver as a defined high.
then occur on a per-bit basis, which makes the repeater 5. The differential output voltages on bus 2 are VOD =
function independent of data rate and packet length. VFS > +200 mV during an idle bus, VOD < 1.5 V for a low
A run-through of the inverter-controlled repeaters func- bit, and VOD > 1.5 V for the time delay (tD) at the begin-
tional sequence (numbered here and in Figure 4) clarifies ning of a high bit. Afterwards, VOD = VFS > +200 mV for
its operation: the remainder of a high bit.
1. During bus idling, the receiver outputs of both repeater Again, XCVROUT represents the receiver output state of a
ports are high due to VFS. The delay capacitor, CD, is remote transceiver on bus 2. While legacy repeater designs
fully charged, driving the inverter output low to main- typically were limited to data rates of 10 kbps, modern
tain the transceiver in receive mode. transceivers with shorter propagation delays allow for
2. Then a low bit on bus 1, driving the output of RX1 low, higher data rates of up to 100 kbps and more.
rapidly discharges CD and enables driver DR2. For simplicity, the repeater discussion has so far excluded
3. When the bus voltage turns positive (VBus > 200 mV), the important aspect of galvanic isolation. However, in long-
the output of RX1 turns high, which drives DR2s output haul networksthe main application field of repeaters
high and slowly charges CD via RD. The minimum time large ground-potential differences (GPDs) between net-
constant (RD CD) must be so calculated that at the work nodes are common. These GPDs present themselves
maximum supply voltage, VCC(max), and the minimum as large common-mode voltages across the transceiver
positive inverter input threshold, VTH+(min), the delay inputs and can damage a device if not eliminated through
time, tD, exceeds the maximum low-to-high propagation galvanic isolation. When a transceivers bus circuitry is iso-
delay, tPLH(max), of the driver by, say, 30%. For example, lated from its control circuitry, the bus system is floating
given a capacitance of CD = 100 pF, the required resis- and independent from a local nodes ground potential.
tor value for RD is Figure 2 shows the driver and receiver section of a bus
node being isolated from the nodes control circuitry.
1.3 tPLH(max) However, in the case of the repeater, dual isolation is
RD = . required because the inner control logic must be isolated
(
CD ln 1 VTH +(min) VCC(max) ) from bus 1 and bus 2. Furthermore, the two buses must
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be isolated from each other. A repeater circuit Table 1. BOM for the repeaters signal path
accomplishing this is shown in Figure 5, accom- DESIGNATOR FUNCTION DEVICE/VALUE SUPPLIER
panied by its bill of material (BOM) in Table 1.
U1, U2 Isolated half-duplex transceiver ISO15DW Texas
The circuit uses two isolated RS-485 transceiv-
U3 Dual Schmitt-trigger inverter SN74LVC2G14DBV Instruments
ers, each requiring a separate, isolated supply,
VISO, derived from the central 3.3-V supply of RPU Pull-up resistor 4.7 kW
the control section (Figure 6). RFS Fail-safe resistor 348 W
RT Termination resistor 120 W
Conclusion
RD Delay resistor 10 kW
A repeater can be used as a bus extender or a Vishay
stub extender. For a bus extender, a repeater CS Storage capacitor 10 F
builds the end of one bus and the beginning of CB Bypass capacitor 0.1 F
another. This allows a fixed installation of fail- CD Delay capacitor 100 pF
safe and termination resistors at both ports.
DD Discharge diode 1N4448
When a repeater is used as an extender for long
stubs, however, it can be located anywhere in
the network. In this case the resistors at the port side con- Related Web sites
necting to the bus should be removed, while the resistors
www.ti.com/interface
at the stub port can remain installed.
www.ti.com/product/partnumber
Reference Replace partnumber with ISO15, SN6501, or
1. Application Guidelines for TIA/EIA-485-A, TIA TSB-89, SN74LVC2G14
January 1, 2006. Available at www.global.ihs.com
CB 16 U1 1 CB CB 1 U2 16 CB
R FS Vcc2 Vcc1 R PU R PU Vcc1 Vcc2 R FS
6 3
12 D R 12
A 5 DD RD C D 6 4 A
DE U3a RE
Bus 1 RT ISO15 4 4 5 3 1
U3b 5 ISO15 RT Bus 2
13 RE DE 13
B 3 2 C D RD DD 6 B
R D
R FS GND2 GND1 GND1 GND2 R FS
9,10,15 2,7,8 2,7,8 9,10,15
0.1 F 0.1 F
VISO1 = MBR0520L 2 2 MBR0520L VISO2 =
3.3 V 1:1.1 3 Vcc D2 3 1:1.1 3.3 V
D2 Vcc
10 F 10 F
SN6501 + SN6501
1 3.3 V 1
D1 GND GND D1
MBR0520L 4,5 4,5 MBR0520L
10 F 10 F
18
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