Documente Academic
Documente Profesional
Documente Cultură
8, 2002
Multi-series Connection of
High-Voltage IGBTs
Yasushi Abe
Koji Maruyama
1
Fuji Electric Journal Vol.75 No.8, 2002
Figure 3 shows the circuit configuration of two series Fig.4. Timing chart
connected IGBTs. The gate balance core is made up of a
secondary winding with a turn ratio of 1:1.
Off On Off
V i1 0
As shown in Figure 3, the gate balance core is inserted by
Off On Off
connecting each winding to the gate wire of the devices in V i2 0
series. As a result, the gate wire of each series connected V g1 V g1 V g2 V g1 V g2
device is magnetically coupled. V g2 0
2
Fuji Electric Journal Vol.75 No.8, 2002
Figure 6 shows the gate balance core and the gate drive Fig.7. Stack and circuit configuration
circuit peripheral. The gate balance core is contained in the
Gate drive circuit IGBT Cooling fin
gate drive circuit.
Q11 - Q14 and Q21 - Q24 in the figure are IGBTs, GDU11 -
GDU14 and GDU21 - GDU24 are gate drive circuits, R11 - R14
and R21 - R24 are voltage dividing resistors, and Tg11 - Tg14 (a) Complete stack
and Tg21 - Tg24 are gate balance cores. When the gate Gate balance core
balance cores are connected as shown in the figure, all gate GDU11 I g1 Tg11 Q11
R11 V CE(Q11)
wires of the IGBTs that are connected in series are coupled
magnetically. GDU12 I g2 Tg12 Q12
R12 V CE(Q12)
Fig.6. Gate balance core and gate drive circuit peripheral
Q13
GDU13 Tg13 I g3
R13 V CE(Q13)
GDU14 I g4 Q14
29.5 R14 V CE(Q14)
Ed
29.4 Q21
26.5 GDU21 Tg21
R21 V CE(Q21)
(Unit: mm)
(a) Gate balance core Q22
GDU22 Tg22
R22 V CE(Q22)
Gate drive circuit IGBT Cooling fin
Q23
GDU23 Tg23
R23 V CE(Q23)
Q24
GDU24
R24 V CE(Q24)
(b) Gate drive circuit peripheral Fig.8. Gate current measurement results
We first measured the gate current timing with and without (a) Without gate balance core
gate balance cores to verify the gate current balance effect of
the gate balance core. Figure 8 shows the measurement
results. When there was no gate balance core, the gate
current Ig1 of Q11 started to flow 200ns earlier than the other
gate currents. However, as the figure makes clear, when I g1, I g2, I g3, I g4
0
gate balance cores were connected, the gate currents of the
four devices started to flow at the same time.
1 s
3
Fuji Electric Journal Vol.75 No.8, 2002
We then measured the device voltage to verify that balancing Fig.9. Element voltage balance measurement results
the gate current timing can have an effect on the element
voltage sharing balance. Figure 9 shows the element
voltage waveforms of Q11 and Q12.
IC
It is clear from the figure that if no gate balance core exists,
the device voltage VCE (Q11) of Q11 that is turned off earlier
increases more than the device voltages of the other devices.
V CE(Q11)
However, when connecting gate balance cores are
connected, the device voltage can be equalized.
V CE(Q12)
3. Conclusion 0
1 s
This paper presents a technique that enables the series
connection of multiple high-voltage IGBTs. To promote the (a) Without gate balance core
miniaturization and improved performance of high-voltage
power conversion equipment such as those used in power
systems and industrial plants, we intend to continue working
on the development of high-voltage technology, which
includes series connection technology.
References
IC V CE(Q11), V CE(Q12)
(1) Eguchi, N. et al. Constituent Technologies Supporting Power
Electronics for Power and Industries. Fuji Review vol. 74,
no. 5, 2001. pp. 265-272
0
1 s
(2) Abe, Y. et al. Improving Element Voltage Balance for IGBTs
Connected in Series. National Symposium of the Institute of (b) With gate balance core
Electrical Engineers in 2001, 4-002, 2001
VCE(Q11),VCE(Q12):500V/div
IC:500A/div