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Fault Analysis of Inverter-Interfaced Distributed

Generators with Different Control Schemes
Zhikang Shuai, Senior Member, IEEE, Chao Shen, Xin Yin, Xuan Liu, Member, IEEE,
and Z. John Shen, Fellow, IEEE

AbstractDiversification of control schemes adopted by inverter- Kp Proportional gain

interfaced distributed generators (IIDGs) leads to difficulties in fault Ki Integral gain
current estimation in a microgrid, which might make pre-existing
protection systems invalid and threaten the safety of power electronic
Kpwm Equivalent gain of the inverter
devices. It is therefore important to study fault characteristics of IIDGs. kvp Proportional gain of voltage loop
This paper investigates characteristics of fault current of IIDGs caused by kvi Integral gain of voltage loop
both symmetrical and asymmetrical faults. Two kinds of widely used kip Proportional gain of current loop
control modes, current control (constant current control and PQ control) kii Integral gain of current loop
and voltage control (V/F control and droop control), are under
Fundamental angular frequency
investigation to provide an intuitive comparison on fault current. In
particular, a novel algorithm is proposed to calculate fault current of Angle of the impedance vector
droop-controlled IIDGs. It is found that different limiters have great Angle of the voltage vector
impacts on fault response of IIDGs and detailed researches are carried out Angle of the current vector
to identify the effects in this paper. Simulation results based on Time constant
PSCAD/EMTDC and calculation results based on Matlab/Simulink verify
the correctness of the proposed fault models.
List of superscript
Index Terms Inverter-interfaced distributed generators (IIDGs), * Reference value of variable
Microgrid, Fault current, Limiter. + Variables in positive sequence network
_
Variables in negative sequence network
I. NOMENCLATURE k kth step of iteration process
List of Abbreviations
List of subscript
DGs Distributed generators
d Variables in d axis in dq frame
IIDGs Inverter-interfaced distributed generators
q Variables in q axis in dq frame
CC Constant Current control
abc Three phase variables in phase a, b and c
PCC Point of common coupling
g Equivalent variables of the grid
STS Static transfer switch
int Inverter internal variable
PWM Pulse width modulation
min Minimum value of the variable
PLL Phase locking loop
mod Modulation variables
RMS Root mean square
0 Initial value of the variable
abc frame Natural reference frame
f Fault moment
dq frame Synchronous reference frame
lim Limited value of the variable
th The threshold value of the variable
List of symbols
v Variables related to the voltage
i Instantaneous currents
i Variables related to the current
v Instantaneous voltages
LC Variables related to the LC filter
E Inverter internal voltage phasor
L Variables related to the filter inductance
I Current phasor
V Voltage phasor
R Parasitic resistance of the inductor II. INTRODUCTION
L
C
s
The filtering inductance
The filtering capacitor
Laplace operator
D istributed generators (DGs) utilizing renewable energy
sources (solar, wind, etc.) have become an alternative
method to solve energy crisis and environment problems [1].
m Droop coefficient of P-f Power electronic devices like inverters are employed as the
n Droop coefficient of Q-V interfaces to improve the controllability of DGs and ensure the
Z The amplitude of impedance power quality. The increasing penetration of inverter-interfaced
P Active power distributed generators (IIDGs) has significantly challenged the
Q Reactive power distribution network in terms of intermittent power generation,
p Instantaneous active power bidirectional power flow, limited overcurrent capacity, etc. In
q Instantaneous reactive power order to effectively manage distributed energy, the concept of
microgrid was proposed which aggregates DGs, loads and

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energy storage units [2].
A microgrid can be used to enhance power reliability and
reduce operation cost with proper control and design [3].
However, many challenges have been raised simultaneously.
One of severe challenges is that fault current in a microgrid
probably damages power electronic devices because of the
limited thermal overcurrent capacity of semiconductor devices
[4-5]. Moreover, IIDGs response quite differently from
synchronous generators during fault period so that fault current
calculation methods of conventional power systems cannot be
fully applicable [6-7]. This probably makes protection systems
invalid during transient period. Thus, to enhance the reliability
of protection systems as well as to ensure the safety of power
electronic devices, fault response of IIDGs needs to be
restudied comprehensively.
However, the diversification of control schemes adopted by
IIDGs in a microgrid leads to the complexity on fault current
estimation. Current control and voltage control are two kinds of
widely used control modes in a microgrid. They have different
control targets and are suitable for different conditions. To
extend conventional fault analysis methods to IIDGs, Current-
controlled IIDGs are modeled as ideal current sources and
voltage-controlled IIDGs are modeled as ideal voltage sources
during fault period in [8-9]. However, the accuracy of fault
models is not enough during the subtransient (the first cycle)
and transient (2-6 cycles) periods. To better reflect transient
response of IIDGs, dynamic characteristic of control systems
needs to be considered. For current-controlled IIDGs, they can
regulate output current directly so that fault current can be
described by analyzing dynamic response of control loops [10].
For voltage-controlled IIDGs, it is much more complicated
because they cannot regulate output current directly [11]. A
feasible idea to study fault current of voltage-controlled IIDGs
is to find out the dominate factors in transient response by
analyzing the time constants of different control loops and then
fault analysis of IIDGs can be simplified into mathematical
descriptions on the interaction between two voltage sources.
Based on this idea, inrush fault current is identified in a
synchronverter in [12], which consists of a gradually attenuated
periodic component and a dc component. V/F control and
droop control are widely used to maintain stability in a
microgrid [13][17]. Unfortunately, to the authors best
knowledge, literatures that address fault characteristic of these
two control schemes are limited. Moreover, multi-DGs with
different control schemes are integrated in a microgrid to
improve power reliability, but bring complexity on fault
analysis at the same time. Thus, differences among them need
to be found out to help the stable operation of a microgrid.
In this paper, it is also found that limiters have great impacts
on fault response of IIDGs. Limiters are usually used in control
systems to achieve the rational operation of a microgrid. Due to
limited thermal overcurrent capacities of semiconductor
devices, current limiters are necessary for the safe operation of
inverters [10]. Meanwhile, modulating wave limiters are
applied to avoid being driven into over-modulation range [14].
Specific to droop-controlled IIDGs, droop limiters are needed
for system stability and high power quality [15]. During
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transient period, system electrical parameters undergo
significant change so that control systems can be easily driven
into the states that limiters function. These nonlinear limiters
would change operation states of IIDGs and make fault current
totally different from normal operation conditions. For the
reliability of protection devices, the impacts of different
limiters need serious attention.
The objective of this paper is to analyze fault characteristics
of IIDGs with different control schemes and deliver elaborative
comparisons among them. Both current control and voltage
control are addressed. Different limiters are found to have great
impacts on fault response and detailed analysis is carried out in
this paper. The rest of this paper is organized as follows:
Topology of a microgrid is introduced in Section III. Then fault
models and fault current analytical solutions for current-
controlled IIDGs and voltage-controlled IIDGs are derived in
Sections III-VI respectively. Moreover, the impacts of different
limiters on fault current are studied simultaneously. Finally,
fault current comparisons among different control schemes and
conclusions are given in Section VII and VIII respectively.
III. FAULT RESPONSE OF CONSTANT CURRENT-CONTROLLED
IIDGS
A. Topology of A Microgrid
Fig.1 shows the studied topology of a low-voltage microgrid
in this paper. A step-up transformer is used to connect a
microgrid to the utility grid. The microgrid can operate either in
grid-connected or in stand-alone mode and a STS (static
transfer switch) is utilized to switch between these two
operation modes.
0.2+j0.1
Utility Grid Load
/Yg STS Z2 fault
0.3+j0.157
10kV 10/0.4kV
DG
Z1
Fig.1 Topology of a microgrid
During the grid-connected operation, DGs are controlled in
current control mode, like constant current control and PQ
control, in order to provide a preset power to the utility grid.
When the microgrid is cut off from the utility grid, a DG must
switch to voltage control mode, like V/F control and droop
control, to maintain system stability. From the perspective of a
microgrid, the utility grid can be seen as a grounded voltage
source while the microgrid is a three-phase three-wire system
without the neutral line.
B. Control Structures of Constant Current-Controlled IIDGs
Direct current control is usually applied with distributed
generators in grid-connected mode [16]. Constant current-
controlled IIDGs aim at delivering constant current to the
system and guaranteeing high current quality. The control
system is implemented in the abc frame (natural reference
frame) for its concision. The current loop is responsible for
tracing reference current and ensuring high power quality. It is
noted that the magnitude, frequency and initial angle of
reference current is given and will not change even the system
is subjected to faults.
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vabc 1 vga
vgb vgc

vgabc (pu)
0.5

i K p s Ki 1 iLabc 0
++ +-
Labc
+ Kpwm -0.5
- s R sL -1
Fig.2 Generic control block diagram of CC-controlled IIDGs 1 vinta
vintb vintc

vintabc (pu)
Fig.2 shows the block diagram of CC-controlled IIDGs. PI 0.5
controller is used to realize current tracking with reference 0
-0.5
signals. By transforming modulation signals to per unit values, -1
Kpwm equals to 1 and voltage feedforward control can achieve a 2 ia ic ib
high performance. According to Fig.2, input-output transfer

iabc (pu)
1
function can be derived as follows: 0

iLabc Gi s iLabc
-1
(1)
-2
where 0 tf t
Ls 2 K p R s Ki
Fig.4 Three-phase PCC voltage (upper), inverter internal voltage (middle) and
Gi s (2) output current (bottom) of CC-controlled IIDGs when subjected to two phase
K p s Ki grounded fault at tf (dip to 33% of the rated value)

C. Fault Current Analysis of Constant Current-Controlled D. Influence of Limiters

IIDGs When Subjected to Symmetrical and Asymmetrical Current limiters and modulation wave limiters are used to
Faults limit the magnitude of the reference current and modulation
It can be seen from (1) that output current of CC-controlled voltage respectively. In a CC-controlled IIDG, reference
IIDGs is only relevant to the reference current. Since reference current will not change whether there is a fault or not and a
current remains constant, CC-controlled IIDGs would deliver voltage drop at PCC will lead to a decrease in the magnitude of
constant current to the grid whether the grid voltage sags or not. modulation voltage. So, limiters would not function in
In other words, CC-controlled IIDGs can be seen as a constant CC-controlled IIDGs during transient period.
current source during transient periods.
When the system is subjected to asymmetrical faults, like IV. FAULT RESPONSE OF PQ-CONTROLLED IIDGS
two phase grounded fault, symmetrical component method can A. Control Structures of PQ-Controlled IIDGs
be used to illustrate fault characteristic of IIDGs. As analyzed PQ controllers are widely used in PV systems and wind
in [7], CC-controlled IIDGs can still regulate three phase output generation systems and PQ-controlled IIDGs deliver preset
current independently because the control system is power to the utility grid [18]. The control block diagram of a
implemented in a natural reference frame. Invariance in PQ controller is shown in Fig.5. The whole system is
reference current would lead to constant output current of implemented in a dq frame (synchronous reference frame)
CC-controlled IIDGs even when asymmetrical faults are where synchronous angle is aligned to q axis. The outer power
considered, as described by (1). In this condition, inverter loop is to generate and limit the value of the reference current
internal voltage is adjusted to realize balanced output current. so that it can be tracked by a current controller. The PI
According to (3), we get that inverter internal voltage Vintabc are controller can realize zero steady-state error between the
unbalanced. reference current and output current. The differences between
di
L Labc RiLabc vint abc vgabc (3) PQ controllers and CC controllers are that the reference current
dt in CC controllers will not change whether the grid voltage sags
Note that CC-controlled IIDGs only regulates the current or not while the reference current in a PQ controller is relevant
flowing through inductance, so the filter capacitors C do appear to PCC voltages.
in sequence networks. Fault models of CC-controlled IIDGs For a given rated active power P* and reactive power Q*, the
can be described by Fig.3. In positive sequence networks, reference current of a PQ controller can be produced by (4)
IIDGs are equivalent to current sources in parallel with filtering iLd

1 vd vq P
capacitors. However, only filtering capacitors appear in 2 (4)
iLq vd vq vq vd Q
2
negative sequence networks. Fault response of CC-controlled
IIDGs is shown in Fig.4. It is observed that when two-phase vq vq
grounded faults occur at tf, three phase output current remains i*
Lq k p s ki + _ 1 iLq
+_ + Kpwm +_
balanced and inverter internal voltage Vintabc are unbalanced. s + R sL

iLq L
Z g g Z g g L

Gi i Labc
C V g C Vg iLd L L

i*Ld _
k p s ki _ + 1 iLd
+ + Kpwm +
Fig.3 Positive (left) and negative (right) sequence fault models of CC- s R sL
controlled IIDGs
Fig.5 Generic control block diagram of PQ-controlled IIDGs

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According to (4), a sudden drop in the voltage magnitude
would lead to the increase in the reference current. The transfer
function can be derived from the control block diagram of
PQ-controlled IIDGs, shown in (5). (Kpwm equals to 1 to achieve
a high performance of voltage feedback control). It is observed
that output current is relevant to the reference current.
k p s ki (5)
iLdq 2 iLdq
Ls R k p s ki
B. Fault Current Analysis of PQ-Controlled IIDGs When
Subjected to Symmetrical Faults
As discussed above, CC-controlled IIDGs can be seen as
constant current sources during transient period. However, for
PQ-controlled IIDGs, it is much more complicated. According
to equation (5), fault current of a PQ-controlled IIDG is similar
to transient response of a second-order system. By applying the
inverse Laplace transformation to equation (5), analytical
solutions of fault current can be derived as follows:
iLdq iLdq iLdq 0 iLdq
Aer1t t f Ber2 t t f
k p r1 ki k p r2 ki
A B
L r1 r2 L r1 r2
where r1 and r2 are the roots of characteristic equations shown
in (5). iLdq0 are the initial value of output current in the dq frame.
When subjected to symmetrical faults, reference current in dq
output current. So, fault current cannot be described by (9)
precisely.
In fact, there are many filtering modules in control systems
to filter out interference signals. Assuming that with a proper
filtering method [20], only positive sequence component would
be delivered to the control system, then fault models of IIDGs
will only appear in positive sequence networks as shown in
Fig.6, where iL is defined by (6). Similar to CC-controlled
IIDGs, PQ-controlled IIDGs are equivalent to current sources
in parallel with filter capacitors in positive sequence networks
and only filtering capacitors appear in negative sequence
networks. The differences between these two control schemes
are that whether the amplitude of the equivalent current source
changes or not. Fig.7 shows the fault response of PQ-controlled
IIDGs. It is observed that the output current of PQ-controlled
IIDGs undergoes a step response and calculation results based
on equation (6) can predict fault current precisely. Moreover, in
order to keep the output current balanced, inverter internal
voltage Vintabc are adjusted to be unbalanced according to (3).
(6)
Z g g Z g g
(7) iL C Vg C Vg
Fig.6 Positive (left) and negative (right) sequence fault models of PQ-
controlled IIDGs
1 vga v
vgb gc
vgabc (pu)

0.5
axis iLdq* only consists of the dc component so that they can be 0
-0.5
traced by a PI controller. Current in the abc frame can be -1
derived by applying the inverse Park transform to equation (6). vinta
Based on the analysis above, fault current of PQ-controlled vintb vintc
vintabc (pu)

0.5
IIDGs is well regulated by (6). So, they can be seen as a current 0
source whose magnitude undergoes a step response when -0.5
-1
symmetrical faults occur.
3 calculation results
2
iabc (pu)

C. Fault Current Analysis of PQ-Controlled IIDGs When 1

0
Subjected to Asymmetrical Faults -1
-2
-3 ia ic ib
When a microgrid experiences asymmetrical faults, there
0 tf t
would be negative sequence components in voltage signals. As
Fig.7 PCC voltage (upper), inverter internal voltage (middle) and output current
a result, vd and vq shown in (4) include sinusoidal signals with (bottom) of PQ-controlled IIDGs when subjected to two phase grounded fault
the 2-nd harmonics, which can be represented by (8): at tf (dip to 33% of the rated value)
vd Vn sin 2t

(8) D. Influence of Limiters

vq Vp Vn cos 2t
Due to limited overcurrent capacities of semiconductor
where Vn and Vp represent the magnitude of negative and devices, current limiters are applied in PQ control loops.
positive sequence voltage respectively. By substituting (8) to According to equation (4), power control loops might produce a
(4), we get the reference current iLd* and iLq*. large reference current value that exceeds the threshold ith (i.e.

QV p Vn P sin 2t Q cos 2t two times greater than the rated value) when faults occur. In
iLd this case, the reference current becomes irrelevant to PCC
Vn Vp 2VpVn cos 2t
2 2
(9) voltages and will be locked at ith. Assuming that current loops
PV p Vn P cos 2t Q sin 2t
can realize trace in a short time, the amplitude of fault current

iLq will be determined and equation (6) can be simplified into (10)
Vn Vp 2V pVn cos 2t
2 2
iLq iLq

lim
It can be observed from (9) that 2-nd harmonics appear in the (10)
iLd ith iLq lim
2 2
reference current. PI controllers cannot realize zero steady-state
error trace when sinusoidal components are included in input
Fig.8 shows how PQ-controlled inverters react when current
signals [19]. Even in steady state, there would be deviations in
limiters are applied. It is observed that the amplitude of fault
the magnitude and phase between the reference current and
current cannot reach the amplitude of the reference current i*

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and are determined by ith. So, conclusions are made that PQ- P+jQ equivalent circuit
controlled inverters with current limiters can be seen as a
constant current source and the amplitude of the current source Z g g
E Z Vg 0
is determined by the limiters threshold value.
3 ith ia ic ib Fig.10 Equivalent circuit of V/F-controlled IIDGs
2
i*
iabc (pu)

1
0 B. Fault Current Analysis of V/F-Controlled IIDGs When
-1 Subjected to Symmetrical Faults
-2
-3 As shown in Fig.10, a V/F-controlled inverter can be seen as
0 tf t
a voltage source in series with the output impedance. So, fault
Fig.8 Fault current of PQ-controlled IIDGs with current limiters when
subjected to two phase grounded fault at tf (PCC voltage dip to 33% of the rated
current of V/F-controlled IIDGs can be described based on the
value) fault analysis of an ideal voltage source. When symmetrical
faults occur in a microgrid, system structure and parameters
V. FAULT RESPONSE OF V/F-CONTROLLED IIDGS will undergo significant disruptions. As a result, the total
impedance and the total impedance angle, the grid voltage and
A. Control Structure of V/F-Controlled IIDGs
the rotor angle turns into Zeq and , Vg and respectively.
V/F-controlled IIDGs are widely applied to maintain voltage Fault current can be calculated by the following mathematical
and frequency stability in a microgrid operating in stand-alone differential equation:
mode [21]. The control block diagrams of V/F control in dq
frame are provided in Fig.9. The objective of the outer voltage
di
L' a R'ia 2E sin t 2Vg' sin t ' (13)
dt

loop is to regulate output voltage and generate reference current
for further controls. The inner current loop intends to accelerate Solution of equation (13) can be divided into two parts:
current tracking and generate voltage modulation waves which particular solution and general solution. General solution
are delivered to PWM block to drive semiconductor switches. represents the periodic component of fault current which is
Decoupling can be applied to negate any transient errors caused determined by the voltage source while particular solution
by coupling among any of the phases. IIDGs operating in represents the exponential damping component which is
voltage-controlled mode are unable to regulate output current determined by line parameters and the moment faults occur.
directly, which might lead to overcurrent during transient The periodic component of fault current can be formed as
period. follows (phasors are represented in bold italic):
Vg'

According to Fig.9, the transfer function can be described by
equation (11) (Detailed description for the simplification of ip 2 sin t ' (14)
Z eq'
voltage and current control loops can be found in [15])
and the exponential damping component, whose amplitude is
Vdq Gv s Vdq Z s iodq (11)
determined by the moment faults occur (assume that faults
in which occur at t0) , can be also derived
kvp s kvi E Vg E Vg' t
Gv s iap 2 sin t0 2 '
e Ta
i Cs Cs 2 kvp s kvi
3
(12) Z eq'
sin t 0

Z eq
Z s is 2
(15)
i Cs Cs 2 kvp s kvi
3
where Ta=L/R, Ta is the time constant of the free damping part.

where i represents time constant of the inner current control L and R represent the total inductance and resistance
respectively. Then, we can get the fault current of an ideal
loop. According to equation (11), a V/F-controlled inverter can
three-phase voltage source at any time in post-fault conditions.
be seen as a voltage source in series with output impedance, as
shown in Fig.10. ia' i p iap (16)

ioq Vq ioq

Vq K vp s K vi iLq K ip s K ii Vqref iLq
+- ++
+ +- ++ +-
1
+-
1
Vq
s s + - Ls R - Cs

Vq C iLq L
L C
Vabc Vabc abc
dq/ Kpwm
abc /dq
Vd C iLd L L C
Vd K vp s K vi i
K ip s K ii Vdref
+- +-+ +- +-+ -
Ld 1 - 1
s
+- Ls R
+- Vd
s iLd Cs

iod Vd iod
Fig.9 Generic control block diagram of V/F-controlled IIDGs

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is observed that inverter output voltage undergoes a sudden

E
drop at tf and returns to preset value after a short time, which is
caused by the increase of the amplitude of inverter internal
' voltage.
Vg' Vg 1 vga vgc vgb
ia0 '

vgabc (pu)
0.5
Ia 0
-0.5
ip0
iap0 I a I p -1

1 va vc vb

vabc (pu)
0.5
0
Ip -0.5
Fig.11 Phasor-diagram of network voltage and current -1

Fig.11 shows the phasor diagram of network voltage and 10 calculation results
current. Phasors E, Vg, Vg, Ia and Ip in Fig.11counterclockwise

at the angular speed . Projections of current phasors Ia and Ip
over vertical coordinates represent the inverters pre-fault and
post-fault output current respectively. The phasor Ia-Ip is
derived at the moment of grid fault whose projection iap0 equals
to the initial value of the exponential damping component. It
can be seen from Fig.11 that the smaller the angle between Ip
and the vertical coordinate is, the sooner fault current reaches
the peak value. In general, fault current peak value of an ideal
voltage source will appear within half a cycle after faults.
Fault analysis of an ideal voltage source is provided above.
When it comes to V/F control, some changes need to be made
according to the control scheme adopted by an inverter. Since
mathematical descriptions on the interactions between two
voltage sources can be adopted to explain the fault current of a
V/F-controlled inverter, assumptions are made that the fault
current of a V/F-controlled inverter consists of a periodic
component and an exponential damping component. The
exponential damping component is determined at the moment
faults occur and is irrelevant to dynamic response of the control
system, as shown in (15). V/F-controlled IIDGs aim at
maintaining output voltage constant, which makes the
amplitude of inverter internal voltage under pre-fault and post-
fault conditions not consistent. This makes fault current
periodic components of V/F-controlled IIDGs different from
ideal voltage sources discussed above. The transient response
of V/F-controlled IIDGs is similar to that of a synchronous
generator which maintains the terminal voltage constant by
increasing field current [22]. The differences between these two
systems are that V/F-controlled IIDGs response much faster
than synchronous generators during transient period. So, the
internal voltage E can be described by (17), whose amplitude
undergoes a step response.
t
E E E0 E e v
E* and E0 represent voltage values for the steady state and
initial state respectively. v is the time constant of the PI
controller in a voltage loop(i is ignored since it is too small).
Combining equations (17) and (14), the periodic component of
fault current can be determined. And fault current of V/F-
controlled IIDGs is determined by substituting (14) and (15) to
(16). Based on this method, calculation results are shown in
Fig.12 to compare with the simulation results. The comparison
shows good agreement in both the first circle and steady state. It
iabc (pu)
5
0
-5 ia ic ib
-10
0 tf t
Fig.12 PCC voltage (upper), output voltage (middle) and output current
(bottom) of V/F-controlled IIDGs when subjected to symmetrical fault at tf (dip
to 85% of the rated value)
C. Fault Current Analysis of V/F-Controlled IIDGs When
Subjected to Asymmetrical Faults
When asymmetrical faults are considered, transient response
of a V/F-controlled inverter is similar to the transient process of
a synchronous generator in some aspects. Negative sequence
current flowing through stator side in a synchronous generator
will cause 2-nd harmonic current in rotor side and further lead
to 3-rd harmonics in stator side [22]. The results are that higher
harmonics current would appear in both stator and rotor sides.
When it comes to V/F-controlled IIDGs, there would be
negative sequence components in detected voltage and current
signals. The negative components which are delivered to the
control system would introduce 2-nd harmonics in both output
voltage and current signals in the dq frame. When modulation
signals produced in the dq frame are transformed to the abc
frame to compare with carrier signals, both power frequency
and 3-rd harmonic signals would occur. And 3-rd harmonic
signals in abc frame would produce 2-nd harmonic and higher
harmonics signals in dq frame. Transient process of V/F-
controlled IIDGs can be illustrated in Table I when
asymmetrical faults are considered.
TABLE I
ANALYSIS ON THE RELATIONSHIP AMONG DIFFERENT
FREQUENCE COMPONENTS IN FAULT CURRENT
dq
dc component 2-nd harmonic Higher harmonics
frame
(17)
abc
Positive sequence Negative sequence 3-rd harmonic
frame
Moreover, PI controllers cannot reach zero steady-state error
trace when sinusoidal components are included in the input
signals. Thus, fault current of V/F-controlled IIDGs cannot be
described analytically when any changes are not considered in
the control system. To simplify this complex process, filtering
modules are introduced to filter out negative sequence signals
so that only positive voltage will appear in inverter internal
voltage (Note that filtering modules will also introduce time

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delay to transient process). In this case, fault models of V/F- phase of the equivalent voltage source can be described by (18)
controlled inverters would only appear in positive sequence and the corresponding equivalent circuits are shown in Fig.15.

V Vmod d Vmod q
networks. However, negative sequence current will still appear, 2 2

because there is passage way for negative sequence current to

flow. It is defined in [22] that negative sequence impedance of
synchronous generators equals to the ratio of negative sequence
terminal voltage to negative sequence current. For V/F-
controlled IIDGs, control systems lose the control ability of
negative sequence networks and negative sequence impedance
can be defined by the filter rather than being shaped by the
control system. So, in positive sequence networks, a V/F-
controlled inverter is equivalent to a voltage source in series
with output impedance while only output impedance appears in
negative sequence networks, as shown in Fig.13. Fig.14 shows
fault response of V/F-controlled IIDGs. Inverter internal
voltage maintains balanced because only positive signals are
delivered to the control system. It is observed that calculation
results based on fault models shown in Fig.13 can predict fault
current precisely in steady state.
+ Z Z g g Z LC LC Z g g
Gv vabc Vg
- Fig.16 when modulation wave limiters function. Compared
Fig.13 Positive (left) and negative (right) sequence equivalent circuits of
V/F-controlled IIDGs
1 vga vgc vgb
vgabc (pu)
int 2 (18)
Vmod d
arctan V
mod q
+ Z LC LC Z g g Z LC LC Z g g
Vint Vg Vg
-
Fig.15 Positive (left) and negative (right) sequence equivalent circuits of
V/F-controlled IIDGs with modulation waveform limiters
In normal operation conditions, positive sequence output
impedance of V/F-controlled IIDGs is shaped by control loops.
However, when modulation wave limiters are considered,
positive sequence impedance is decided by LC filters (shown in
Fig.15) because voltage loops and current loops lose the control
ability and the closed loop system turns into an open loop
system.
Transient response of V/F-controlled IIDGs is shown in
Vg
with Fig.12, inverter output voltage cannot return to preset
value because modulation wave limiters prevent inverter
internal voltage from increasing. It is observed that fault current
of a V/F-controlled inverter with modulation wave limiters is

0.5
0 similar to that of an ideal voltage source which reaches peak
-0.5 value within half a cycle. Simulation results verify the
-1
correctness of our proposed fault models.
1.5 vintb vinta vintc va vc vb
vintabc (pu)

1 1
vabc (pu)

0.5 0.5
0 0
-0.5
-1 -0.5
-1.5 -1
15 calculation results ia ib ic
iabc (pu)

10 6 Peak value
4
iabc (pu)

5 2
0
-5 0
-10 -2
-15 -4 ib ia ic
-6
Fig.14 PCC voltage (upper), inverter internal voltage (middle) and output 0 tf t
current (bottom) of V/F-controlled IIDGs when subjected to two phase
Fig.16 Fault current of V/F-controlled IIDGs with modulation wave limiters
grounded fault at tf (dip to 70% of the rated value).
when subjected to symmetrical faults at tf (PCC voltage dip to 85% of the rated
D. Influence of Limiters value).

When current limiters are taken into consideration in

V/F-controlled IIDGs, inverters are unable to regulate the
terminal voltage and the reference current is locked at a
constant value. In this case, outer voltage loops are out of
control and V/F-controlled IIDGs turn out to be a current
source whose current reference value is determined by the
current limiters like current-controlled IIDGs discussed above.
When modulation wave limiters are adopted, modulation
signals might be locked at a preset value. The amplitude and
phase of the modulation signals are decided by the threshold
value of the limiter, as shown in (18). Vmodd and Vmodq represent
the magnitude of modulation wave in dq axis respectively and
Vint represents RMS value of inverter internal voltage. In this
condition, fault current of a V/F-controlled inverter is similar to
that of an ideal three-phase voltage source. The amplitude and
VI. FAULT RESPONSE OF DROOP-CONTROLLED IIDGS
A. Control Structure of Droop-Controlled IIDGs
Droop control strategy is widely used in a microgrid for its
advantages of load sharing, virtual inertia and plug and play
characteristic [15][23]. The general control principle of a
droop-controlled inverter is described in Fig.17. Similar to
V/F-controlled IIDGs, voltage and current control loops aim at
regulating output voltage and current. Power control loops
distinguish droop-controlled IIDGs from V/F-controlled IIDGs,
which can be described by (19).
mp / f s 1
(19)
V V nq / f s 1
* *
where and V represent nominal angular speed and nominal

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PCC 104
L R 2.5
represents zero
Edc 2 represents pole
4
C 10
1.5 0.5
iT Vo io
1 0

Imaginary Axis
PWM -0.5
modulation 0.5
Power -5.0005 5 4.9995
calculation 0
Vdref Vqref Response p q -0.5
Current speed
Lowpass
controller -1
filter
idref iqref
-1.5
P Q
Vq E
Voltage Virtual Power -2
controller impedance controller -2.5
Vd -2200 -1800 -1400 -1000 -600 -200 0
Fig.17 Droop-controlled IIDGs in synchronous reference frame Real Axis
. Fig.18 Pole-zero map of voltage gain in transfer function
voltage respectively, m and n are droop coefficients
for P-f and
.
Q-V curves, p and q are instantaneous active and reactive components need to be determined by iterative algorithm and
powers respectively. To achieve a good filtering performance, the exponential damping component is determined right at the
time constant f is around 20ms which makes power loops moment faults occur according to (15). For voltage-controlled
response much slower than inner control loops (as illustrated in IIDGs, inverter internal voltage is relevant to both the reference
Fig.17). Virtual inductance is adopted in [24-25] to realize voltage Vdq* and the voltage gain Gv(s), which can be explained
decoupling between active and reactive powers in low-voltage by (20). The reference voltage Vdq* is calculated by the power
distribution networks. When virtual impedance control is loop. As analyzed above, time constant of the power loop is
considered, transfer function (11) turns into (20). much larger than the inner voltage and current loops and
Vdq Gv' s Vdq Zoiodq (20) determines the dominate factors during the transient response
of droop-controlled IIDGs. So, we need to find out whether
where transient response of the voltage gain Gv(s) affects the transient
Z o s Z s Gv' s Z v s process of inverter internal voltage or not.
(21)
'

1 The pole-zero map of voltage gain Gv is shown in Fig.18.
G s G s

v v
vs 1 The pole closest to the imaginary axis is -5.0002, but it has little
Zv(s) is the virtual impedance and v is the time constant of the effect on dynamical properties of voltage loops because of the

low-pass filter in the virtual impedance loop. To achieve a good zeros nearby. So, the dominate pole of Gv becomes -100 and the

high-frequency filtering performance, the cut-off frequency is time constant of voltage gain Gv is around 10ms which is close
set to 100Hz and v is around 10ms. to the time constant of power loop filter. From the analysis
results, it can be observed that time constants of power loop and
B. Fault Current Analysis of Droop-Controlled IIDGs When voltage gain are of the same order which means that the voltage
Subjected to Symmetrical Faults
gain Gv can be reduced to a first-order module in the process of
There is a similarity between droop-controlled and V/F- iterations to solve the fault current.
controlled DGs that they are both equivalent to voltage sources To remove the strong coupling between power and voltage,
in series with output impedance. As discussed in Section V-B, we divide fault current calculation procedures into several little
fault current of an ideal voltage source includes a periodic time interval Tg, which are much smaller than time constants of
steady-state component and an exponential damping power and voltage controllers. In theory, Tg should meet
min v , f
component. It is same for droop-controlled DGs. The
exponential damping component is irrelevant to the control Tg
(22)
scheme adopted by inverters and can be calculated by (15). So, 100
the periodic component needs to be determined according to the The detailed steps for the iterative algorithm can be
control scheme adopted by inverters. Specific to droop control, described as follows.
when a fault occurs, the output power of inverters would Step 1: The initial magnitude of the free damping component
increase which leads to a decrease of the reference voltage, as can be calculated by substituting equation (14) into (15).
indicated in equation (19). And the decrease of the reference Step 2: Calculate the output real and reactive powers at the
voltage will further change the output power. The relationship present moment by substituting voltage magnitude and phase
between output power and voltage is called coupling in this angle at the previous moment.
paper and this coupling distinguishes fault current of
droop-controlled IIDGs from V/F-controlled IIDGs. p k

E k 1 2

cos '
E k 1Vg'
cos k 1 '
The coupling makes transient response of droop-controlled Z eq' Z eq' (23)
IIDGs hard to be described. A feasible method to describe fault
current is to calculate inverter internal voltage iteratively, qk
E k 1 2

sin '
E k 1Vg'
sin k 1 '
' '
which is firstly proposed in [11]. In our method, only periodic Z eq Z eq

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Step 3: From equation (19), a low-pass filter can be seen as a state.

first-order module and the transient response of a power loop
C. Fault Current Analysis of Droop-Controlled IIDGs When
can be described by (24)
t
Subjected to Asymmetrical Faults

f As discussed in section V-C, negative signals may bring
P k (t ) p k ( P0 p k ) e (24)
t
current harmonics if they are delivered to control systems.

f Moreover, output power ripple would lead to the magnitude
Q k (t ) q k (Q0 q k ) e
and frequency ripple of the reference voltage according to (19).
where P0 and Q0 represent inverter output active and reactive This is unbearable for a utility grid. Though dual-sequence
powers in pre-fault conditions. In each iterative cycle, Pk and Qk control can regulate positive and negative networks
are both functions of time. independently, it increases the complexity of control systems at
Step 4: According to the droop relationship between P-f and the same time [26]. Similar to the V/F control, we assume that
Q-V, variations on voltage magnitude and angular frequency negative sequence signals are filtered out and equivalent
can be derived by (25) circuits of droop-controlled IIDGs only appear in the positive
d m P k P0

(25)
sequence network, as shown in Fig.20. It is noted that the
amplitude of the equivalent voltage source is determined by
dE n Q Q0
k
(20). However, the average output power used in the iterative
Step 5: From the analysis shown in previous sections, algorithm is different from (23) because there are power flows
transient response of the voltage gain Gv(s) is approximately in the negative sequence network, which can be calculated by
equivalent to the step response of a first-order loop, which can (28):
be expressed as ~ k E k 1 2 E k 1Vg

t p cos
cos k 1 V I
E (t ) E0 dE (1 e )
k
(26) v Z eq Z eq (28)

~k E
2
where E0 represents the inverter pre-fault equivalent voltage k 1 k 1

sin k 1 V I
E Vg
and the phase angle of output voltage can be calculated by q
sin
k k 1 Tg d (27) Z eq Z eq
- -
Step 6: Substituting voltage magnitude and phase angle where V and I represent negative sequence voltage and current
calculated by equations (26) and (27) into equation (14), phasors at the terminal of the inverter.
periodic component of fault current can be determined. Z LC LC Z g g
+ Z o o Z g g
Step 7: Post-fault current at any time can be determined by
Gv' vabc Vg Vg
substituting equations (14) and (15) into equation (16). Then, -
go to Step 1 until faults are cleared.
Fig.20 Positive (left) and negative (right) sequence equivalent circuits of
vgb vga vgc
1 droop-controlled IIDGs
vgabc (pu)

0.5
1 ua uc ub
0
uabc (pu)

-0.5 0.5
-1 0
-0.5
-1
2 P Q
P/Q (pu)

3
simulation result
P/Q(pu)

1 2 P Q
calculation result
0 1

4 simulation result calculation result 0

3 ia
2 4
ia ic ib
ia (pu)

iabc (pu)

1 2
0
-1
-2
-3
0 tf
Fig.19 PCC voltage (upper), output power (middle) and fault current (bottom)
of droop-controlled IIDGs when subjected to symmetrical faults at tf (PCC
voltage dip to 87% of the rated value)
Fault response of a droop-controlled inverter is shown in
Fig.19. Comparison analysis between simulation results and
calculation results is carried out in phase a to verify the
correctness of our algorithm intuitively. Output active power
recovers to the initial state value because the frequency in a
grid-connected system stays the same in steady state. It can be
observed that the iterative algorithm proposed in our paper can
predict fault current precisely in both the first cycle and steady
0
-2
t -4
0 tf t
Fig.21 PCC voltage (upper), output power (middle) and fault current (bottom)
of droop-controlled IIDGs when subjected to two phase grounded fault at tf (dip
to 80% of the rated value)
Fig.21 shows fault response of droop-controlled inverters.
To filter out power ripples caused by negative sequence signals,
the cut-off frequency of the power filter needs to be set to a very
small value. However, a very small cut-off frequency might
lead to the instability of a droop controller [15]. So, the value of
cut-off frequency cannot be set to very small and power ripples
cannot be filtered out perfectly which leads to the error of the

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proposed models in predicting the three-phase fault current, as VII. COMPARISON ANALYSIS WHEN DIFFERENT CONTROL
shown in Fig.21. SCHEME IS ADOPTED
D. Influence of Limiters This paper studies fault response of IIDGs in a low-voltage
microgrid. In the studied system, IIDGs are ungrounded while
Power loops in droop-controlled IIDGs deliver reference
the utility grid can be seen as a grounded voltage source. This
voltage signals to inner control loops. Current limiters and
makes a difference because there is no passageway for zero
modulation wave limiters are added in inner control loops. So,
sequence current to flow. So only positive and negative
when current limiters and modulation wave limiters function,
sequence circuits will be considered when the system is
there is no difference between the fault response of V/F-
subjected to asymmetrical faults. The summaries of the detailed
controlled IIDGs and that of droop-controlled IIDGs.
discussions elaborated in Section III-VI are presented in Table
To achieve the stability and ensure power quality of a
II.
microgrid, the variations of voltage magnitude and frequency
TABLE II
are limited to 10% and 2% of rated value respectively [15].
SUMMARIES ON FAULT MODELS WHEN SYMMETRICAL AND
When the output power increases dramatically during fault ASYMMETRICAL FAULTS ARE APPLIED
period, the reference voltage might be decreased to the limited Symmetrical Faults Asymmetrical Faults
Control
value of droop limiters. In this case, the magnitude of the Schemes
Equivalent Equivalent Internal Output
reference voltage is determined by the threshold value Vmin. It source impedance voltage current
Constant Filter
should be noted that though frequency is limited to a certain CC
current capacitor Unbalanced Balanced
value, phase angle difference keeps changing because the control
source (parallel)
frequency of inverters is different from that of the power grid. PQ
Controlled Filter
The angular speed can be calculated by (29). current capacitor Unbalanced Balanced
control
source (parallel)
mP min
(29) V/F
Controlled Shaped by

min min Voltage controller Balanced Unbalanced

control
source (series)
Fault models of droop-controlled IIDGs are presented in Droop
Controlled Shaped by
Fig.22 when droop limiters are taken into consideration. The Voltage controller Balanced Unbalanced
control
source (series)
amplitude of the equivalent voltage source is determined by the
For further understanding of fault characteristics of IIDGs,
minimum value of the droop limiter. Fig.23 shows fault current
several performance indices are chosen to give a
of droop-controlled IIDGs. It is observed that fault current in
comprehensive comparison analysis in this section. To better
the first cycle is identical whether droop limiters are considered
reflect the effects of different control schemes and limiters on
or not. When limiters are considered, the amplitude of fault
fault characteristics, only positive sequence networks are
current is larger at steady state because limiters prevent inverter
considered because IIDGs have limited effects on negative
internal voltage decreasing to a value lower than the threshold
sequence networks.
value Vmin. Calculation results based on fault models proposed
in Fig.22 can predict fault current precisely, as shown in Fig.23. A. Comparison of Peak Current
During transient period, fast response of control systems
+ Z o o Z g g Z LC LC Z g g
GV '
Vg Vg would probably cause current overshoot which can be
v min
- explained by automatic control theories [27]. The peak fault
current will threaten the safe operation of IIDGs since the
Fig.22 Positive (left) and negative (right) sequence equivalent circuits of
droop-controlled IIDGs with droop limiters
thermal overcurrent capacities of semiconductor devices are
380
limited. Estimating the peak current is important as it
determines the maximum stress level that a protection device is
E (V)

340
with limiter
able to withstand. It should be noted that the peak value of fault
300 without limiter
current is relevant to many factors, such as system capacities
260
and system parameters. For the purpose of the illustration, the
335 data shown in Fig.24 is based on simulation models established
325 without limiter
(rad/s)

in PSCAD/EMTDC which have the same circuit topology and

315 with limiter
305
system parameters. The time when fault current reaches its
295 peak value is defined as tp. It is highly recommended for
6 calculation result protection devices to react before fault current reaches the peak
4 value.
ia (pu)

2
0 It can be seen from Fig.24 that droop-controlled IIDGs reach
-2
-4 simulation result the peak value within half a cycle while PQ-controlled IIDGs
-6
0 tf t and V/F-controlled IIDGs reach the peak value within a few
Fig.23 Magnitude of reference voltage (upper), reference angular frequency cycles. Another conclusion that can be drawn is that
(middle) and phase a fault current (bottom) of droop-controlled IIDGs with or voltage-controlled IIDGs tend to have higher fault current peak
without droop limiters when subjected to symmetrical faults at tf (PCC voltage
dip to 70% of the rated value) values than current-controlled IIDGs when storage capacities in

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dc side assume to be sufficiently large. Specially, fault current As shown in Table III, when current limiters are applied,
in CC control remains constant whether faults occur or not. IIDGs can be seen as a constant current source (assuming that
tp(ms) peak value(85%) peak value(70%) the time constant of the inner current loop can be ignored).
120ms 12pu Modulation wave limiters will deliver constant reference
voltage to the PWM module so that IIDGs are equivalent to
100ms 10pu
ideal voltage sources during transient period. Droop limiters in
80ms 8pu power control loops can remove the coupling effect between
60ms 6pu
voltage magnitude and output reactive power while frequency
still remains coupled with output active power.
40ms 4pu

20ms 2pu
VIII. CONCLUSION
The diversification of control schemes in microgrids makes
0ms 0pu
CC control PQ control V/F control droop control it difficult to estimate fault current of IIDGs during transient
Fig.24 Fault current peak value and tp of IIDGs under different control schemes period. This paper investigates fault characteristics of IIDGs
(85% and 70% represent that PCC voltages drop to 85% and 70% of rated value with four different control schemes. In summary, voltage-
respectively) controlled IIDGs can be modelled as a voltage source in series
B. Comparison of Current Component with output impedance while current-controlled IIDGs can be
seen as a current source in parallel with the filter capacitor
Overcurrent protection systems depend on the coordination
during transient period. When systems are subjected to
among different current relays and overcurrent detection
asymmetrical faults, we assume that negative sequence signals
algorithms of a single relay. The balance between operation
are filtered out and only positive sequence signals are delivered
accuracy and rapidity of protective devices is important for
into control systems. Under this assumption, fault current of
protection systems and the separation of fault current
current-controlled IIDGs remains balanced while fault current
component is helpful for protective devices to identify faults.
of voltage-controlled IIDGs is unbalanced.
Summaries are made in Table III. It can be seen that there is
It is found in this paper that limiters have great impacts on
no dc component in fault current of current-controlled IIDGs
fault response. Three performance indices are chosen to give a
while dc component appears in fault current of voltage-
comprehensive comparison analysis among different control
controlled IIDGs. Power frequency ac component remains
schemes and conclusions can be made as follows:
constant for the CC control while it undergoes a step response
(1) Voltage-controlled IIDGs seem to provide higher fault
for both PQ control and V/F control. The step response of ac
current peak value and less peak time than current-controlled
component in PQ control is caused by the variance of the
IIDGs.
reference current. However, the increase in the amplitude of
(2) There is no exponential damping dc component in fault
inverter internal voltage leads to the step response of fault
current of current-controlled IIDGs while it appears in fault
current in V/F control. Specific to droop-controlled IIDGs, the
current of voltage- controlled IIDGs.
ac component of fault current is coupled with output power.
(3) Current limiters make fault current of IIDGs similar to
C. Comparison of Limiters Effect that of a constant current source. When modulation wave
Due to the limited overcurrent capacities and nonlinearity of limiters are adopted, IIDGs can be modelled as ideal voltage
power semiconductor switches, limiters are necessary for the sources. When droop limiters are considered, the magnitude of
safe operation of IIDGs. When subjected to local faults, IIDGs the equivalent voltage source is limited to a certain value while
could be easily driven into conditions that limiters function, the phase angle difference between the equivalent voltage
which makes fault current totally different from that in normal source and the grid keeps changing.
operation conditions. Conclusions are made in Table III.
TABLE III ACKNOWLEDGMENT
SUMMARIES FOR IIDGs WHEN DIFFERENT LIMITERS ARE ADOPTED The authors thank the National Natural Science Foundation
AC of China (No. 51622702) and the Higher National Excellent
Modulation
Control DC Component Current Droop
Wave Doctoral Dissertation of Special Funds (No. 201441) for the
Schemes Component (power Limiter Limiter
Limiter financial support provided. The authors also would like to
frequency)
CC thank the editors and the reviewers constructive remarks and
No Constant
control valuable suggestions on our manuscript.
Constant
PQ Step
No current
control response
source APPENDIX
Constant Ideal Parameters of the studied system
V/F Step
Yes current voltage A. Topology parameters
control response
source source
Droop
Constant Ideal Voltage Z1=0.3+j0.157 Z2=0.15+j0.08 Zload=13.2+j3.14
Yes Coupled current voltage Magnitude
control Zg=0.2+j0.1 Vg=0.4kV L=2mH C=20uF Vdc=1kV
source source Decoupled

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Transactions on Power Delivery
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Xin Yin received the B.S., the M.S. and Ph.D degrees
from Hunan University, in 1993, 2000, and 2011,
respectively, all in electrical engineering. He was with
the Hunan University, as an Assistant Professor
between 1998 and 2005. Starting in 2006, he became an
Associate Professor at Hunan University. His research
interests include power electronics, and Microgrid
stability. Dr. Yin is a recipient of the 2007 Scientific
and Technological Awards of Ministry of Education,
China.

Xuan Liu (M14) received the B.S. and M.S degrees

from Sichuan University, China, in 2008 and 2011, and
Ph.D. degree from Illinois Institute of Technology,
USA, in 2015, respectively. He is currently a professor
at College of Electrical and Information Engineering,
Hunan University, Changsha, China. His research
interests include smart grid security, operation and
economics of power systems.

Z. John Shen (S'89-M'94-SM'01-F'11) received BS

from Tsinghua University, China, in 1987, and M.S.
and Ph.D. degrees from Rensselaer Polytechnic
Institute, Troy, NY, in 1991 and 1994, respectively, all
in electrical engineering.
He was on faculty of the University of
Michigan-Dearborn between 1999 and 2004, and the
University of Central Florida between 2004 and 2012.
He joined the Illinois Institute of Technology in 2013
as the Grainger Chair Professor in Electrical and Power
Engineering. He has also held a courtesy professorship
with Hunan University, China since 2007; and with Zhejiang University, China
since 2013. His research interests include power electronics, and power
semiconductor devices, etc.
Dr. Shen has been an active volunteer in the IEEE Power Electronics Society,
and has served as VP of Products 2009-2012, Associate Editor and Guest Editor
in Chief of IEEE Transactions on Power Electronics, technical program chair
and general chair of several major IEEE conferences.

0885-8977 (c) 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.