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A PHASE-LOCKED LOOP ALGORITHM FOR SINGLE-PHASE GRID-

CONNECTED SYSTEMS WITH SUB AND INTERHARMONICS IMMUNITY

Renato G. Arajo1, Francisco Kleber A. Lima1, Joo A. Moor Neto2, Carlos Gustavo C. Branco1
1
Federal University of Ceara (UFC), Fortaleza Ceara, Brazil
2
Federal Centre of Technology Education (CEFET-RJ), Rio de Janeiro Rio de Janeiro, Brazil
e-mail: renato.g.a@hotmail.com, klima@dee.ufc.br, jamoor.neto@gmail.com, gustavo@dee.ufc.br

Abstract This paper proposes a new closed-loop current in the equipments and installations. These variations
synchronization algorithm, PLL (Phase-Locked Loop), are generated by loads operating in transitional arrangements.
for applications in power conditioner systems for single- The second mechanism can be determined as the switching
phase networks. The structure presented is based on the (do not synchronized with the frequency of the power system)
correlation of the input signal with a complex signal of semiconductor devices in static converters. The main
generated from the use of an adaptive filter in a PLL sources of these disturbances are loads that use electric arc,
algorithm in order to minimize the computational effort. electric drives of variable load and static converters [7].
Moreover, the adapted PLL, due to the use of the In addition to these facts, the presence (in particular) of
adaptive filter, presents a higher level of rejection for two subharmonics and interharmonics in electrical systems cause
particular disturbances: interharmonic and sub synchronous oscillations in mechanical systems, flickers,
subharmonic, when compared to the original algorithm. overheating, reduction in the life cycle and the wrong
Simulation and experimental results will be presented in operation of equipments. The presence of these two
order to prove the efficacy of the proposed adaptive disturbances cause a reduction of accuracy in particular
algorithm. The algorithm will be exposed to several synchronization methods based on PLL, due to the sensitivity
scenarios. The response of the algorithm also be of these methods to these disturbances. As increases the
compared to the synchronization system based on SOGI- amplitude of the subharmonics and of the interharmonics
FLL. there is an increase in the error of the values estimated by the
synchronization system. This could cause the wrong operation
Keywords Adaptive Filter, Interharmonics, Phase- of power converters, active filters and reading mistakes of
Locked Loop, Power Converters, Subharmonics, measuring instruments that work with the measurement of
Synchronization System. synchronized signals [8]-[10].
It is emphasized that with the widespread use of
I. INTRODUCTION distributed generation units based on power converters in
distribution networks, the importance of synchronization
In applications related to power converters, the reliable methods are even more pronounced. The distributed
synchronization method represents a very important element generation units in electric networks has required the large
for the control strategy performance of this equipment. The use and improvement of synchronization algorithms to detect
information generated by the synchronization system is used the fundamental component of positive sequence of the
at different levels in the control strategy of the converters power grid. Distributed generation units like wind
connected to the grid. When the input signal is characterized generators, photovoltaic systems or micro-turbines units
as a pure sine wave, a zero crossing detector performs this require a synchronization system that works under polluted
task satisfactorily. However, due to the presence of conditions. As a result, the performance of the system must
harmonics in the input signal, the detection method and other guarantee the disturbance rejection [10]-[13].
methods derived of this do not provide, in general, From to the exposed, this paper aims to provide a single-
satisfactory results [1] [2]. phase PLL algorithm that have high rejection capability
Different algorithms were presented in order to detect the interharmonics and subharmonics. This synchronization
phase angle, frequency and magnitude of the input signal system can be used quite effectively in more intelligent
fundamental component [3]-[5]. These algorithms are control strategies for power converters. The proposed
analyzed in terms of dynamic response and steady state synchronization system will be evaluated by means of
response. The behavior in disturbances are also considered. mathematical analysis and computer simulations performed
However, these algorithms do not perform well when this using the PSCAD/EMTDC software. Will be analyzed
waveform has distortions due to the presence of harmonics aspects such as the disturbance rejection capability and
[6]. The estimated values with the algorithms indicate that, up dynamic response of the algorithm. In order to perform the
against strongly distorted signals, it is necessary to readjust comparative analysis, the algorithm will be compared with
the parameters of these methods aiming a slower response, the synchronization system based on the SOGI-FLL. Finally,
otherwise, the estimated output signal will be affected experimental results obtained through HIL (Hardware-in-the-
dramatically. Loop) platform are presented, which will be compared to the
In particular, there are two basic mechanisms that generate simulations results obtained in order to validate the proposed
subharmonics and interharmonics. The first mechanism is the simulation study.
generation of these disturbances due to fast variation of
II. PLL ALGORITHM WITH HARMONIC DISTORTION -1 Im g (t )
IMMUNITY (t ) tan
Re g (t ) . (4)
1

The structure of the single-phase PLL proposed in [14] is
shown in Figure 1. This structure allows to estimate the From the synchronization angle information is obtained
frequency f , the synchronization angle (t) and the the angular frequency by the time derivative of the
fundamental component of the input signal u(t). angular displacement . The angular frequency is the
internal input of the loop that performs the calculation of the
cos(2 f t )
fundamental frequency, in Hz, of the input signal. The
1
internal loop, which performs the calculation of the
1 1t +1 frequency, is illustrated in Figure 2.
Integration
Period T1 Re g(t )
1(t) + ()
1(t ) d
-1 Img (t ) f dt Integration
u(t) Inner Product g(t) tan d Frequency 1
Re g(t ) -
dt Calc.
K
MF
2
Integration
+
Period T1 Im g(t ) f
0 +

f
1
-sin(2 f t)
1
Fig. 1. Structure of the PLL. Fig. 2. Internal loop for frequency estimation.

From the correct estimation of the input voltage Adopting f as an initial estimative of the frequency, in
fundamental component frequency, f = f , the phase angle Hz, the estimated frequency f at any time will be:
of the fundamental component ( ) of this signal can be
determined by the projection of u(t) in the complex subspace d
f t f + K (t ) - 2 f1 dt . (5)
1 0 MF dt 1
e . Thus, it has been represented an inner product g(t)
which ensures only a correlation between the orthogonal
subspace of the signals at the fundamental frequency and the The internal loop frequency estimation performs yet, the
fundamental component of the input signal. paper of a low pass filter with transfer function given by (6)
The inner product g(t) is a complex function comprising a and is represented by the block diagram of Figure 3.
real part Re{g(t)} and one imaginary part Im{g(t)},
represented by: f1 ( s ) K MF
. (6)
1 ( s ) s + 2 K MF

g ( t ) u ( t ) e - j (2 ft ) dt Re g ( t ) + j Im g ( t ) . (1)
1(t ) + () 1 KMF f
s 1
The real and imaginary parts of (1) represent correlators -
between the input signal u(t) and a complex exponential 2 f
1
2
e . Therefore, the orthogonal signals Re{g(t)} and
Im{g(t)} of (1) are always other than zero only at the Fig. 3. Block diagram of internal loop for frequency estimation.
fundamental frequency of the input signal u(t), ensuring
immunity to interference by harmonics. III. OPTMIZED PLL ALGORITHM
From to the exposed, being u(t) a sine function, it follows
that the real part of the complex function defined in (1) at the Modifying the structure proposed in [14], it was
fundamental frequency is: considered only the calculation process of the real part
Re{g(t)} of the inner product g(t) given by (2). The
Re g (t ) u (t ) cos(2 ft ). (2) imaginary part Im{g(t)} is estimated by an adaptive filter in
which its input is the signal Re{g(t)}. Thus, there will be two
The imaginary part of the complex function defined in (1) orthogonal signals Re{g(t)}_f and Im{g(t)}_f from the input
at the fundamental frequency is: Re{g(t)}. This makes the number of mathematical operations
are reduced and there is an increase in the interharmonic and
Im g (t ) u (t )sin (2 ft ). (3) subharmonic rejection. The remainder of the algorithm is the
same as the original algorithm. Figure 4 illustrates the block
diagram of PLL considering the insertion of the adaptive
Using the orthogonal signals { ( )}and { ( )}, can filter.
determine the synchronism angle of the fundamental
component of the input signal u(t) by:
Inner Product g(t) Using this idealized filter, quadrature signals are
Re g(t) _ f generated from the input signal. These signals are used to
u(t) Integration
Period T1
Adaptive -1 Img(t ) _ f
Re g(t ) Filter
tan
Reg(t ) _ f

form the complex subspace e required to get the
Im g(t ) _ f synchronism angle. The Bode diagram related to the real and
imaginary signals of the filter are shown in Figures 6 and 7,
respectively. The value of the gain used for this case was
1 1t+1 100.

Bode Diagram
0
f Frequency
1 d -10
cos(2 f t )

Magnitude (dB)
1 Calc. dt
Fig. 4. Block diagram of the optimized PLL. -20

-30
The used adaptive filter, shown in Figure 5, is an adapted -40
version for single-phase systems obtained from a model for
three-phase systems analyzed in [15]. The original version is 90
utilized in three phase systems operating in coordinates. 45

Phase (deg)
Therefore, it is required the orthogonal signal input obtained
after application of the Clarke transformation on the signals 0

in abc coordinates. -45

-90 0 1 2 3
10 10 10 10
x - x Frequency (Hz)

+ +
KMF Integration Fig. 6. Bode diagram of the real signal.
Re{g(t)} - Realf
Bode Diagram
0
Magnitude (dB)

1 -20

-40

+ x
-60
-
Integration
Imf -80

-45
Phase (deg)

Fig. 5. Block diagram of the adaptive filter.


-90
The original version of the discussed filter can be
-135
represented as the following expressions:
-180 0 1 2 3
10 10 10 10
1 Frequency (Hz)
x ( s ) K MF x ( s ) - x ( s ) -1x ( s )
s Fig. 7. Bode diagram of the imaginary signal.
. (7)
x ( s ) 1 K
s
MF
x ( s ) - x ( s ) +1x ( s ) It can be seen that using the adaptive filter, the real and
imaginary signals will be less affected by disturbances in
The modified model, for the application of this work, relation with input signal Re{g(t)}, since there will be an
presents the following resulting expressions: increase in immunity to disturbances, in particular the
interharmonic and subharmonic. If on one hand the insertion
of the adaptive filter provides an improvement in the
1
x ( s ) K MF x ( s ) - x ( s ) -1x ( s ) rejection of disturbances, on the other hand it is imperative to
s (8)
. consider your impact on the dynamics of the algorithm in
1
x ( s ) - x ( s )+ x ( s )
1 this situation. In the results, will be exposed the dynamic
s
response of the algorithm facing strongly distorted signals.
Presenting the following transfer function: IV. SIMULATION RESULTS
x ( s ) K MF ( s +1) To validate the proposed study, simulations were
, (9)
x ( s ) s 2 + s ( K 2
MF +1) + K MF +1 performed in PSCAD/EMTDC software.
x ( s ) K MF 1
. (10)
x ( s ) s 2 + s ( K MF +1) + K MF +12
A. Steady State Simulation
Input Signal Fundamental Component
Two scenarios were simulated. In the first scenario

Signal (p.u.)
1
(Figure 8), the input signal is composed by the fundamental

(a)
component, 10% distortion at 30 Hz and 10% distortion at 0
36 Hz. In the second scenario (Figure 9) the input voltage is
-1
composed by the fundamental component, 20% of distortion
at 222 Hz and 20% of distortion at 312 Hz.
0.5 0.52 0.54 0.56 0.58 0.6 0.62
Time (s)
Input Signal Fundamental Component
Signal (p.u.)

1
Fund. Component Estimated Signal Angle

Signal (p.u.)
1
(a)

(b)
-1 0

0.5 0.51 0.52 0.53 0.54 0.55 0.56 -1


Time (s)
0.5 0.52 0.54 0.56 0.58 0.6 0.62
Estimated Signal Angle Time (s)
Signal (p.u.)

1 Fig. 10: Dynamic performance for subharmonics: (a) input signal


and fund. component, (b) fund. component, estimated signal and
(b)

0
angle.
-1

Input Signal Fundamental Component


0.5 0.51 0.52 0.53 0.54 0.55 0.56

Signal (p.u.)
Time (s) 1
Fig. 8: Performance of the PLL for subharmonics: (a) input signal (a)
0
and fundamental component, (b) estimated signal and angle.
-1
Input Signal Fundamental Component
Signal (p.u.)

1 0.5 0.52 0.54 0.56 0.58 0.6 0.62


Time (s)
(a)

-1 Fund. Component Estimated Signal Angle


Signal (p.u.)

1
0.5 0.51 0.52 0.53 0.54 0.55 0.56
(b)

Time (s) 0

Estimated Signal Angle -1


Signal (p.u.)

1
0.5 0.52 0.54 0.56 0.58 0.6 0.62
(b)

0
Time (s)
-1 Fig. 11: Dynamic performance for interharmonics: (a) input signal
and fund. component, (b) fund. component, estimated signal and
0.5 0.51 0.52 0.53 0.54 0.55 0.56 angle.
Time (s)
Fig. 9: Performance of the PLL for interharmonics: (a) input signal The algorithm obtains satisfactory results. It can be seen
and fundamental component, (b) estimated signal and angle. that, in both cases, 100 ms after the time t = 0.5 s, the
estimated output is synchronized with the fundamental
It can be seen that even with the strongly distorted input component of the input signal.
signal, the algorithm obtains satisfactory results.
C. Comparison with SOGI-FLL
B. Dynamic Behavior The SOGI-FLL was adjusted according to [16]. The gain
In this case, two scenarios were simulated. The input value adjusted was 0.7 and the value of adjusted was 100.
values were considered the same as the presented in the Applying the same input signals previously described, it
Figures 8(a) and 9(a) for subharmonics and interharmonics, follows that the rms value of the obtained error for
respectively. In both cases, at time t = 0.5 s, the amplitude of subharmonics and interharmonics can be seen in the
the fundamental component changes from 1.0 p.u. to 0.8 p.u., Figure 12(a) and the Figure 12(b), respectively.
the phase changes from 0 to 30 and the frequency changes
from 60 Hz to 62 Hz. The Figure 10 presents the estimated
values in the presence of subharmonics and the Figure 11
presents the estimated values in the presence of
interharmonics.
0.4
Proposed PLL
0.3
Error (p.u.)
(a) SOGI-FLL
0.2

0.1

0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8


Time (s)
0.4
Proposed PLL
0.3
Error (p.u.)

SOGI-FLL
(b)

0.2

0.1

0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 Fig. 14: Input signal, estimated signal and synchronism angle.
Time (s)
Fig. 12: Comparison of the error between the proposed PLL and
Next are analyzed the dynamic response. Two scenarios
the SOGI-FLL: (a) error in the presence of subharmonics, (b) error
in the presence of interharmonics. were implemented. The input values were considered the
same as the presented in the Figures 13 and 14 for
Analyzing the behavior of the error in the Figure 12(a), it subharmonics and interharmonics, respectively. In both
is observed that the steady state error presented by the cases, at time t, the amplitude of the fundamental component
proposed PLL is 0.014 p.u. and the settling time is 100 ms. changes from 1.0 p.u. to 0.8 p.u., the phase changes from 0
The steady state error presented by the SOGI-FLL is to 30 and the frequency changes from 60 Hz to 62 Hz. The
0.07 p.u. and the settling time is 60 ms. Figure 15 presents the estimated values in the presence of
Analyzing the behavior of the error in the Figure 12(b), it subharmonics and the Figure 16 presents the estimated
is observed that the steady state error presented by the values in the presence of interharmonics.
proposed PLL is 0.009 p.u. and the settling time is 100 ms.
The steady state error presented by the SOGI-FLL is
0.035 p.u. and the settling time is 60 ms. Change of the signal
Although to present a slower dynamic response, the
results define the proposed PLL as another option of
synchronization system algorithm in situations where it is
desired a finer accuracy as regards the presence of
subharmonics and interharmonics.

V. EXPERIMENTAL RESULTS

Next are presented the experimental results implemented


in the HIL (Hardware-in-the-Loop) platform DSPACE 1103.
The Figure 13 presents the input signal, the synchronism
Fig. 15: Input signal, estimated signal and synchronism angle.
angle and the estimated signal for an input signal composed
by the fundamental, 10% of subharmonic at 30 Hz and 10%
of subharmonic at 36 Hz. The Figure 14 presents the input Change of the signal
signal, the synchronism angle and the estimated signal for an
input signal composed by the fundamental component, 20%
of interharmonic at 222 Hz and 20% of interharmonic at
312 Hz.

Fig. 16: Input signal, estimated signal and synchronism angle.

To a previously submitted input signal (Figure 15 for


subharmonics and Figure 16 for interharmonics), it is
presented the rms value of the error generated by the
proposed PLL and by the SOGI-FLL, regarding the
fundamental component of the input signal. The Figure 17
Fig. 13: Input signal, estimated signal and synchronism angle. presents the error for subharmonics and the Figure 18 presents
the error for interharmonics.
Transactions on Industrial Electronics, vol. 46, no. 5,
pp. 917-922, 1999.
Change of the signal Proposed PLL
[2] K.-J. Lee, J.-P.Lee, D. Shin, D.-W.Yoo, H.-J Kim, A
Novel Grid Synchronization PLL Method Based on
Adaptive Low-Pass Notch Filter for Grid-Connected
PCS, IEEE Transactions on Industiral Electronics,
vol. 61, no. 1, pp. 292-301, 2014.
[3] M. K. Ghartemani, H. Karime, M. R. Iravani, A
SOGI-FLL error Proposed PLL error Magnitude/Phase-Locked Loop System Based on
Estimation of Frequency and In-Phase/Quadrature-
Phase Amplitudes, IEEE Transactions on Industrial
Electronics, vol. 51, no. 2, pp. 511-517, April, 2004.
[4] T. Thacker, R. Wang, D. Dong, R. Burgos, F. Wang, D.
SOGI-FLL Boroyevich, Phase Locked Loop Using State Variable
Feedback for Single-Phase Converter Systems, in 24th
Annual IEEE Applied Power Electronics Conference
and Exposition (APEC), 2009, pp. 864-870.
Fig. 17: Signal estimated by the proposed PLL, signal estimated by [5] Z. Wang, Y. Wang, S. Wu, Enhanced Single-phase
the SOGI-FLL, error of the proposed PLL and error of the SOGI- Locked Loop for Grid-Connected Converter in
FLL. Distribution Network, in IEEE International
Conference on Electrical and Control Engineering
(ICECE), 2010, pp. 3705-3709.
Change of the signal Proposed PLL
[6] T. Thacker, D. Boroyevich, R. Burgos, Fei Wang,
Phase-Locked Loop Noise Reduction via Phase
Detector Implementation for Single-Phase Systems,
IEEE Transactions on Industrial Electronics, vol. 58 ,
SOGI-FLL error no. 6, pp. 2482-2490, 2011.
[7] Z. Hanzelka, A. Bien, Guia de Aplicao de Qualidade
Proposed PLL error de Energia, AGH University of Science and
Technology, July, 2014.
[8] D. Sharmitha, D. Sundararajan, Estimation of
Harmonics and Interharmonics Using Phase-Locked
Loop, Power, Energy and Control (ICPEC), 2013
SOGI-FLL International Conference, pp.514-519, 2013.
[9] L. Feola, R. Langella, A. Testa, On the Effects of
Unbalances, Harmonics and Interharmonics on PLL
Systems, IEEE Transactions on Instrumentation and
Fig. 18: Signal estimated by the proposed PLL, signal estimated by Measurement, vol. 62, no. 9, pp. 2399-2409, 2013.
the SOGI-FLL, error of the proposed PLL and error of the SOGI- [10] R. Langella, P. Marino, G. Raimondo, L. Rubino, N.
FLL. Serbia, A. Testa, On the Effects of Interharmonic
Distorcion on Static Converters Controlled by Means of
VI. CONCLUSIONS PLL Systems, Harmonics and Quality of Power
(ICHQP), 2010 14th International Conference on, pp.1-
6, 2010.
In this paper, a new PLL (Phase-Locked Loop) algorithm [11] F. Blaabjerb, R. Teodorescu, M. Lissere, A. V. Timbus,
was presented. One of the main characteristics of this PLL is Overview of Control and Grid Synchronization for
the high immunity to subharmonics and interharmonics. In Distributed Power Generation Systems, IEEE
order to prove the effectiveness of the presented algorithm, Transactions on Industiral Electronics, vol. 53, no. 5,
pp. 1398-1409, 2006.
were performed simulations through PSCAD/EMTDC
[12] F. Liccardo, P. Marino, G. Raimondo, Robust and Fast
software and was assembled the PLL structure in HIL Three-Phase PLL Tracking System, IEEE
(Hardware-in-the-Loop) platform. Transactions on Industiral Electronics, vol. 58, no. 1,
In particular, the algorithm had good results, proving the pp. 221-231, 2011.
interhamonics and subharmonics rejection capacity. [13] Y. Cheng, F. Zhou, J. Lv, J. Du, Resarch on
Compared with the SOGI-FLL structure, the proposed Distributed Power Generation Measurement
Technology, Electronics, Computer and Applications,
algorithm presented a higher immunity to disturbances. The 2014 IEEE Workshop, pp. 39-42, 2014.
results showed that the structure of the proposed PLL is able [14] L. Lovisolo, J. A. M. Neto, J. C. Ferreira, M. Aredes,
to estimate the synchronism angle, the frequency and the Implementao Digital de um Algoritmo PLL (Phase-
fundamental component of the input signal accurately. Locked Loop) com Alta Imunidade s Distores
Harmnicas, VIII Conferncia Internacional de
Aplicaes Industriais (Induscon), Poos de Caldas,
ACKNOLEDGEMENTS 2008.
[15] M. C. Benhabib, S. Saadate, A New Topology for a
The authors would like to thank the National Counsel of Modular Active Power Filter, IEEE International
Technological and Scientific Development (CNPq) for the Symposium on Industrial Electronics (ISIE), pp. 827-
832, 2005.
financial support through Project 486948/2012-9.
[16] M. Ciobotaru, R. Teodorescu, F. Blaabjerg, A New
Single-Phase PLL Structure Based on Second Order
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