Documente Academic
Documente Profesional
Documente Cultură
Ch ter
10 Memory Devices
10.1 Introduction
A Digital Processor generally requires the storage of data used in a program as
well as the storage of instruction for execution of a program. Hence, digital sys-
tems require memory facilities for temporary as well as permanent storage of data.
Thus, a memory stores data for processing & instructions for execution.
memory
primary magnetic
semiconductor or storage
Static dynamic
RAM RAM
semirandom serial
access access
erasable permanent e.g., magnetic
e.g. flopydisk
tapes,
CD-ROM
CCD
hard disk
masked PROM
Information from magnetic & optical storage devices such as hard disk, read
only Memory (CD-ROM) and digital tape must be accessed sequentially, starting
at the beginning of a data file or track. In contrast, data stored in an electronic
memory cell can be accessed at random and on demand using direct addressing.
Direct addressing eliminates the need to process a large stream of irrelevant data
in order to find the desired data word.
Logic diagram
select line FACT:
The human brain can
i/p o/p
D Q probably store up to one
> billion, trillion bits of in-
formation.
Flip-flop stores one bit of
read/write
information.
Register stores a word.
select line
Register file stores a num-
i/p M o/p ber of words information
The very first computer
read/write
memory consisted of a
Fig.10.2 Binary cell that stores 1-bit of in- minute magnetic toroid,
formation called core memory.
Operation
The binary cell showed in the figure 10.2 stores 1-bit of information in its internal
latch. The select input enables the cell for reading or writing and the read/write
input determines the cell operation, when it is selected. A 1 in the read/write
input provides the read operation by forming a path from the latch to the output
terminal, where as a 0 in the read/write input provides the write operation by
forming a path from the input terminal to the latch.
Memory Devices 10.3
word 0
M M M M
word 1
address
i/p
M M M M
memory word 2
enable
M M M M
word 3
M M M M
read/write
output data Q0 Q1 Q2 Q3
lines are transferred into the four binary cells of the selected words. The binary
cells which are not selected are disabled, and their previous binary value remain
unchanged.
Note: A memory with 2K words of n-bits per words requires K-address lines that
requires a K 2K decoders. Each one of the decoder outputs selects one
word of n-bits, for reading or writing.
Example 10.1 How many address inputs data outputs are required for a
16 K 12 memory?
I Solution
We know that,
A memory with 2K words requires K-address line.
Number of words = 16K = 24 210 = 214
Number of address = 14
Number of output lines = 12
Example 10.2 The following memory units are specified by the number of words
times the number of bits per word. How many address line and output data lines
are needed in each of the following cases,
1. 4K 16
2. 4M 8
3. 8G 4
I Solution
A memory with the form
2K N depicts
K is the number of address lines and N is the output lines
1. 4K 16
= (22 210 ) 16
= 212 16
Hence, number of address lines = 12
number of data output lines = 16
Memory Devices 10.5
2. 4M 8
= (22 220 ) 8
= 222 8
Hence, number of address lines = 22
number of data output lines = 8
3. 8G 4
= (23 230 ) 4
= 233 4
Hence Number of address lines = 33
Number of data output lines = 4
Coincident Decoding
A decoder with K inputs and 2K outputs requires 2K numbers of AND gates with
K inputs per gate. The total number of gates and the number of input per gate can
be reduced by employing two decoders in a two dimensional selection scheme.
In this configuration, two K/2 input decoders are used, instead of one K input
decoder. One decoder performs the row selection and other the column selection
in a 2D matrix configuration as shown in Fig.10.4.
532 decoder
0 1 2 20 31
0
1
532 2 binary
A decoder address
12 01100 10100
A B
31
number of AND gates with 10 inputs in each to 64 numbers of AND gates with
5 inputs in each. Each word within the memory is selected by the coincidence
between 1 of 32 rows and 1 of 32 columns for a total of 1024 words.
For example, consider the word whose address is 404. The 10-bit binary
equivalent of 404 is 01100 10100. This makes A = 01100 (binary 12) and B =
10100 (binary 20). So the coincidence of binary 12 and binary 20 outputs gives
the n-bit word that is selected.
Advantages of PLDS
Programmable logic devices offer a number of advantages over fixed logic de-
vices, including:
Design flexibility:
PLDs offer customers much more flexibility during the design cycle be-
cause design intentions are simply a matter of changing the programming
file and the results of design changes can be seen immediately in working
parts.
Improved reliability:
Lower power plus fewer interconnections and packages translate into greatly
improved system reliability.
Lower power:
CMOS and fewer packages combine to reduce power consumption.
Reduced complexity:
Since PLDs consume lower power, requirements are less board space and
simple testing procedures.
PLDs are field programmable, i.e., can be programmed outside the manu-
facturing environment.
Memory Devices 10.7
PLDs are erasable and re-programmable logic device, i.e. they allow cor-
rection of errors, updating, and reuse of the device for a different design its
ultimate aim is reusability.
There are three fundamental types of standard PLDs:
1. PROM (Programmable Read only Memory)
2. PAL (Programmable Array Logic)
3. PLA (Programmable Logic Array)
Other PLDs are also there like Complex Programmable Logic Device (CPLD),
for example Field Programmable Gate Array (FPGA).
In order to show the internal logic diagram for such technologies in a concise
form, it is necessary to have special symbols for array logic. The Fig.10.5 shows
the conventional and array logic symbols for a multiple input AND gate and a
multiple input OR gate.
XX X X X
XX X X X
Example 10.3 Implement the following Boolean functions using the PAL de-
vice X
f (A, B, C, D) = m(2, 12, 13)
Memory Devices 10.9
I Solution
X
f (A, B, C, D) = m(2, 12, 13)
f = A BCD + ABC D + ABCD
f = A BCD + ABC(D + D)
f = A BCD + ABC
Example 10.4 Implement the combinational circuit having the truth table as
given below using PLA.
10.10 Digital Electronics, an easy approach to learn
X C
C X X X C
Programmable
AND gate
f1
X X X X
f2
X X
Programmable
OR gate
It has the complexity between that of PALs and FPGAs and architectural features
of both.
I/O
PLD PLD
I/O
GLOBAL
INTERACTION
I/O MATRIX PLD
PLD I/O
The CPLD has two levels of programmability, each PLD block can be pro-
grammed and then the inter connection between the PLDs can be programmed.
FPGA structure
configurable
logic block
i/o
block
horizontal routing
channel
vertical routing
channel
Logic diagram
WL word line
M1
storage
capacitor
B
bit line
Advantages
1. The primary advantage of DRAM is its structural simplicity: only one tran-
sistor and capacitor are required per bit, compared to 4 or 6 transistors in
SRAM. This allows DRAM to reach very high densities.
2. DRAM chip is used in personal & mainframe computers & in engineering
applications.
Limitations
1. Due to the presence of junction leakage current across the storage node, the
chip information is degraded periodically
2. A refresh operation is required periodically even when the memory arrays
are not accessed (that is cell data must be read & rewritten periodically)
VDD
M2 M4
M5 M6
Q
Q
M1 M3
BL BL
Each bit in an SRAM is stored in four transistors that form two cross coupled
inverters. This storage cell has two stable states which are used to denote 0 &
1. Two additional access transistors serve to control the access to a storage cell
10.14 Digital Electronics, an easy approach to learn
during read & write operations. A typical SRAM uses six MOSFETS to store
each memory bit, as shown in Fig.10.12.
DRAM SRAM
1) Minimum number of transistors 1) Minimum number of transistors
required for 1-bit storage: only required for 1-bit storage is six.
one transistor.
2) DRAM memory can be deleted 2) Refreshing option is not avail-
and refreshed while running the able.
program.
3) Data is stored as a charge in a ca- 3) Data is stored in flip flop level.
pacitor
4) Possess less spaces in the chip 4) Possess comparably more
spaces in the chip.
5) Consumes less power 5) Comparably consumes more
power.
6) Less costly 6) Four times more expensive than
DRAM.
7) Has higher storage capacity 7) Comparably less storage capac-
ity
8) For accessing data or informa- 8) For accessing a data or informa-
tion DRAM takes more time tion less time is needed.
2 Concept:
General difference between DDR RAM & SDRAM
DRAM is used temporarily to store information in computers. It is made up of many
cells & each cell is referred to as bit. A cell contains a capacitor & a transistor. Since,
computer machine language is made up of 1s and 0s, it has the value of one when
active & zero when inactive.
SDRAM or Synchronous Random Access Memory is the result of DRAM evolution.
This type of memory synchronizes the input and output signals with the system board.
Its speed rating are in MHz. SDRAM transmits every clock count at a specific time.
DDR-RAM (Double Data Rate Random Access Memory) does the same but it does so,
twice every clock count. This makes DDR RAM twice as fast as SDRAM. Over the
years, RAM has become very fast & efficient.
Memory Devices 10.15
Brain Teasers
1. A certain memory chip is specified as 2K8. How many words can be
stored on this chip? How many total bits can this chip store?
Memory Devices 10.17
I Solution
Here, 1 word = 8-bit
2K word can be stored
=21024 words
=2048 words
The total number of bits stored in the chip
=20488
=16384 bits
2. How many 32K8 RAM chips are needed to provide a memory capacity
of 256K bytes?
I Solution
1K 8 = 1K byte
32K 8 = 32K byte
So, number of chips required = 256/32 = 8
I Solution
8k 8 = (23 210 ) 8 = 213 8
Number of address line = 13
Number of decoder input line = 13
Number of decoder output line = 213 = 8K
Size of the decoder = 13 213
Objective Questions
1. The difference between a PLA and a PAL is:
C. The PAL has more possible product terms than the PLA.
D. PALs and PLAs are the same.
3. What is the other name for digital circuitry called sequential logic?
A. Compiling C. Simulation
B. Downloading D. Synthesis
A. Volatile C. EPROM
B. Nonvolatile D. Volatile EPROM
10. Which is the type of memory for information that does not change on your
computer?
A. Bytes C. Meters
B. Millimeters D. Bits
13. Which computer memory is used for storing programs and data currently
being processed by the CPU?
1. A 2. B 3. C 4. B 5. B 6. C
7. B 8. D 9. A 10. B 11. a 12. D
13. B
Exercises
10.1 Which of the following memories uses a MOSFET and a capacitor as its
memory cell?
(a) DRAM
(b) ROM
10.20 Digital Electronics, an easy approach to learn
(c) SRAM
(d) DROM
10.4 15, 4
10.5
A B C D A B CD
X X XX
X X X X
f
X X X
10.7
A B C A B C
X X X
X XX X
X X X X